WO2018051473A1

WO2018051473A1 - Printed wiring board

Info

Publication number: WO2018051473A1
Application number: PCT/JP2016/077337
Authority: WO
Inventors: 顕匡濱
Original assignee: 三菱電機株式会社
Priority date: 2016-09-15
Filing date: 2016-09-15
Publication date: 2018-03-22
Also published as: JPWO2018051473A1

Abstract

This printed wiring board is provided with: an insulating substrate (1); a conductive wiring pattern, which is formed on the insulating substrate (1), and which has an element mounting foot pattern (2Fa), i.e., a component mounting pattern, and a signal line (2S), i.e., a lead-out line connected to a foot pattern (2Fb); and a solder resist (3) as an insulating film covering the wiring pattern, excluding an element mounting section on the foot patterns (2Fa, 2Fb). The solder resist (3) has an opening (4) in the element mounting section, and the outer ends of the foot patterns (2Fa, 2Fb) are positioned further toward the outer side than the inner end of the opening (4). With such configuration, the printed wiring board, which is capable of eliminating disconnection of the wiring pattern even in an environment where a wiring conductor forming the wiring pattern corrodes, can be obtained.

Description

Printed wiring board

The present invention relates to a printed wiring board, and more particularly to a countermeasure against corrosion of the printed wiring board.

Although copper is generally used for the circuit pattern of the printed wiring board, since the copper easily undergoes a chemical reaction due to gas and other disturbances and is easily corroded, the circuit pattern has a characteristic of being easily disconnected.

In a printed wiring board, a circuit pattern called a footprint is used in an area where components are mounted. Circuit patterns other than the footprint are covered with a solder resist, which is a dielectric, for insulation. Since the solder resist is resistant to corrosion, the circuit pattern covered with the solder resist is also resistant to corrosion.

On the other hand, the footprint needs to expose the copper surface for electrical connection between the component and the footprint.

Also, when connecting a circuit pattern formed on the back surface to a circuit pattern formed on the front surface of the printed wiring board, the circuit patterns on the front surface and the back surface are connected by through vias. A circuit pattern made of a conductor pattern is covered with a solder resist, but an opening is formed in the solder resist around the through via to make a connection. The through via is technically difficult to cover with the solder resist, so copper is exposed. Further, it is said that the foot pattern for connecting the chip parts is easily disconnected at the connection portion with the signal pattern.

Therefore, in Patent Document 1, for example, the signal pattern connected to the foot pattern of the row located outside the BGA (Ball Grid Array) part is made thicker than the signal pattern connected to the foot pattern of the row located inside. In addition, the signal pattern of the outermost conductor layer is covered with a protective film.

JP 2000-315843 A

However, in the configuration of Patent Document 1, copper is exposed in the footprint pattern, and there is a problem that the base of the lead line from the through via of the circuit pattern is corroded and easily broken.

Also, even if a protective film is used for the through via, it is physically difficult to cover the inner wall of the through via with the protective film, and there is a problem that it is easily corroded.

The present invention has been made in view of the above, and an object of the present invention is to provide a printed wiring board capable of suppressing the occurrence of disconnection of the wiring pattern even in an environment where the wiring conductor forming the wiring pattern corrodes. And

In order to solve the above-described problems and achieve the object, the present invention provides a conductive substrate having an insulating substrate, a component mounting pattern formed on the insulating substrate, and a lead wire connected to the component mounting pattern. A wiring pattern and an insulating film covering the wiring pattern except for an element mounting portion on the component mounting pattern are provided. The insulating film has an opening in the element mounting portion, and the outer edge of the component mounting pattern is located outside the inner edge of the opening.

According to the present invention, it is possible to obtain a printed wiring board capable of suppressing occurrence of disconnection of the wiring pattern even in an environment where the wiring conductor forming the wiring pattern corrodes.

The perspective view which shows the printed wiring board of Embodiment 1. FIG. II-II sectional view of FIG. FIG. 2 is an enlarged view of a foot pattern of the printed wiring board according to the first embodiment, where (a) is a top view showing a pair of foot patterns, and (b) is a cross-sectional view along IIIb-IIIb in (a). 2 is an enlarged view of a through via of the printed wiring board according to the first embodiment, (a) is a top view showing a via connection pattern, and (b) is a cross-sectional view along IVb-IVb in (a). FIG. FIG. 4 is an enlarged view of a through via of a printed wiring board according to a second embodiment, (a) is a top view showing a via connection pattern, and (b) is a Vb-Vb cross-sectional view of (a). The figure which shows the case where opening is shifted | deviated and formed in the printed wiring board of Embodiment 2. FIG. 4 is a diagram showing a printed wiring board according to a third embodiment, and is an enlarged view of a through via periphery The figure which shows the modification of the printed wiring board of Embodiment 3. The figure which shows the modification of the printed wiring board of Embodiment 3. It is a figure which shows the printed wiring board of Embodiment 4, and is an enlarged view of a foot pattern

Hereinafter, embodiments of a printed wiring board according to the present invention will be described in detail with reference to the drawings. In addition, this invention is not limited by this embodiment, In the range which does not deviate from the summary of this invention, it can change suitably. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding. The same applies between the drawings. Further, even a plan view may be hatched to make the drawing easy to see, while a cross-sectional view may not be hatched to make the drawing easy to see.

Embodiment 1 FIG.
1 is a perspective view showing a printed wiring board according to Embodiment 1, and FIG. 2 is a cross-sectional view taken along the line II-II in FIG. 3A and 3B are enlarged views of a foot pattern which is a component mounting pattern of the printed wiring board according to the first embodiment, and FIG. 3A is a top view showing a pair of foot patterns. 3 (b) is a sectional view taken along line IIIb-IIIb of FIG. 3 (a). 4A and 4B are enlarged views of through vias that are vias of the printed wiring board according to the first embodiment. FIG. 4A is a top view showing a via connection pattern, and FIG. FIG. 4 is a cross-sectional view taken along the line IVb-IVb in FIG. The printed wiring board 10 according to the first embodiment is a foot pattern 2F formed on a first main surface 1A of an insulating substrate 1 made of a glass epoxy substrate and connected to a signal line 2S that is a lead line. The outer edge is located outside the inner edge of the opening 4 provided in the solder resist 3 which is an insulating film. Further, the signal line 2S is connected to the wiring layer 6 on the back side provided on the second main surface 1B through the through via 5. The wiring material constituting the signal line 2S and the like is made of a copper layer, and the opening 4 provided in the element mounting portion on the foot pattern 2F and the opening provided in the via connection pattern 2V in the formation region of the through via 5 are provided. The wiring material is covered with the solder resist 3 except for 7.

The printed wiring board 10 according to the first embodiment includes a foot pattern 2F for mounting the chip component 20 on the first main surface 1A of the insulating substrate 1 in which the through vias 5 are formed, a via connection pattern 2V, a foot A signal line 2S connected to the pattern 2F and the via connection pattern 2V is provided. The wiring layer 2 constituting the wiring portion such as the signal line 2S is made of a copper layer, and the wiring layer 2 is an insulating layer made of the solder resist 3 except for the opening 4 provided in the element mounting portion on the foot pattern 2F. It is covered with a film. The outer edge of the foot pattern 2F is located outside the inner edge of the opening 4.

As shown in FIGS. 3A and 3B, the foot pattern 2 F has an outer edge arranged outside the inner edge of the opening 4 of the solder resist 3, as shown in enlarged views in FIGS. The wiring layer 2 on the first main surface 1A side of the region constituting the foot pattern 2F has a line width L ₀ connected to the foot patterns 2Fa and 2Fb made of a square pad with one side L ₁ via the connecting portion 2B. Signal line 2S.

The opening width L ₂ of the opening 4 of the solder resist 3 is sufficiently smaller than the length L ₁ of one side of the foot patterns 2Fa and 2Fb, and is sufficient between the inner edge of the opening 4 and the outer edge of the foot patterns 2Fa and 2Fb. An annular portion with a wide width is formed. Even if the foot patterns 2Fa, 2Fb and the mask for opening formation are slightly misaligned, the outer edges of the foot patterns 2Fa, 2Fb or the connection part 2B to the signal line 2S are securely exposed by the solder resist 3 without being exposed from the opening 4. Covered. In other words, the entire periphery of the foot pattern is enlarged, and the width of the lead lines of the foot patterns 2Fa and 2Fb, that is, the signal lines 2S is reduced under the solder resist 3. That is, the signal line 2S is thinned in the region under the solder resist 3.

Further, the connecting portion 2B which is a boundary portion between the foot patterns 2Fa and 2Fb and the signal line 2S is outside the opening 4 and is covered with the solder resist 3.

The signal line 2S is electrically connected to the through via 5, and a via connection pattern including a wiring pattern formed in the same process as the signal line 2S in the region surrounding the through via 5 on the first main surface 1A. 2V is formed. And the portion of the via connection pattern 2V are opened 7 formed in the solder resist 3, the outer edge 2V _F via connection pattern 2V is solder - and being located outside the inner edge of the opening 7 of the resist 3 . That is, the outer edge portion of the via connection pattern 2 V is covered with the solder resist 3.

As shown in the enlarged views of FIGS. 4A and 4B, the outer edge portion is formed by the outer edge 2V _F on the upper edge of the through via 5, that is, the first main surface 1A side which is the upper surface of the insulating substrate 1. An annular pattern 2V ₁ having an inner periphery is formed. That is, the via connection pattern 2 </ _b > V is a circular pattern 2 </ _b > V ₂ including the annular pattern 2 </ _b > V ₁ and the upper surface of the through via 5. The outer edge 2V _F of the via connection pattern 2V at the upper edge of the through via 5 is arranged outside the inner edge 7 _i of the opening 7 of the solder resist 3. The wiring layer 2 on the first main surface 1A side in the region constituting the via connection pattern 2V has a line width L ₀ connected to the via connection pattern 2V formed of a circular pad having a diameter R ₁ via the connection portion 2B. And a signal line 2S.

The opening diameter R ₂ of the opening 7 is sufficiently smaller than the outer diameter R ₁ of the via connection pattern 2V, and an annular portion having a certain and sufficient width is formed between the inner edge of the opening 7 and the outer edge of the via connection pattern 2V. Therefore, even if the via connection pattern 2V and the mask for forming the opening are slightly misaligned, the outer edge of the via connection pattern 2V or the connection portion 2B to the signal line 2S is surely not exposed from the opening 7, and the solder resist 3 is reliably exposed. Covered with. That is, the entire periphery of the via pattern 2 V is enlarged so that the width of the signal line 2 S that is a lead line is narrowed under the solder resist 3. That is, the signal line 2S is thinned in the region under the solder resist 3. The solder resist 3 has an opening 7 smaller than the via connection pattern 2V on the via connection pattern 2V.

The solder resist 3 is a photosensitive insulating material obtained by adding acrylic acid and acid anhydride to a novolak type epoxy resin, for example, and is obtained by forming an opening pattern by photolithography after coating. When a component such as the chip component 20 is mounted on the printed wiring board 10 by soldering, it prevents the solder from adhering to other than the contacts for electrical connection and causing a short circuit. Further, it is effective in protecting the wiring pattern from the external environment such as dust, heat, and moisture, and maintaining the electronic equipment stably. Further, the solder resist 3 can maintain electrical insulation between the wiring patterns and can prevent a short circuit.

In the printed wiring board 10, for example, after the through via 5 is formed in the insulating substrate 1 made of a glass epoxy board or the like, the copper layer formed on the first main surface 1 A and the second main surface 1 B is patterned by photolithography. To do. After that, it is obtained by applying a solder resist 3 and forming an opening by photolithography.

The chip component 20 includes, for example, a capacitor body 21 and

electrodes

22a and 22b. In mounting, the pair of

electrodes

22a and 22b are placed on the pair of foot patterns 2Fa and 2Fb of the printed wiring board 10, and are connected to each other by, for example, solder reflow.

Therefore, with the above configuration, even if the connecting portion between the signal line 2S and the foot patterns 2Fa and 2Fb, that is, the roots of the foot patterns 2Fa and 2Fb is corroded by corrosive gas or the like, the time until disconnection becomes very long. Even if a part of the parts is corroded, if it is connected somewhere, the foot pattern 2F and the chip part 20 are securely connected, and the connection between the chip part 20 and the signal line 2S is ensured.

For example, in the case of a conventional printed circuit board in which the size of the foot pattern 2F is smaller than the size of the opening 4 of the solder resist 3, the outer edges of the foot patterns 2Fa and 2Fb or the connecting portions of the foot patterns 2Fa and 2Fb shown by broken lines in FIG. 2B is exposed inside the opening 4 of the solder resist 3. In this case, since these outer edges are located on the inner side of the inner edge of the opening 4, the connecting portions 2B between the foot patterns 2Fa, 2FB and the signal line 2S, that is, the roots of the foot patterns 2Fa, 2Fb are corroded by corrosive gas or the like. And disconnection is likely to occur. On the other hand, even if some of the foot patterns 2Fa and 2Fb of the first embodiment are corroded, the foot pattern 2F and the chip component 20 are securely connected as long as they are connected somewhere. Connection with the line 2S is ensured. The signal line 2S can also be regarded as a lead line for the foot patterns 2Fa, 2FB or the via connection pattern 2V. That is, as shown in FIGS. 3A and 3B, the opening width L ₂ of the opening 4 of the solder resist 3 is sufficiently smaller than the length L ₁ of one side of the foot patterns 2Fa and 2Fb, and the opening 4 An annular portion having a sufficient width is formed between the inner edge of the foot pattern 2F and the outer edge of the foot pattern 2Fa, 2Fb, and the connection between the foot pattern 2Fa, 2Fb and the signal line 2S is ensured.

Further, as shown in FIGS. 4A and 4B, the via connection pattern 2V is the same as that of the foot pattern, and the via connection pattern 2V is larger than the outer peripheral portion of the through via 5, and the entire outer peripheral portion, that is, the whole. Since the circumference is covered, even if the base of the lead wire corrodes in any direction of the outer peripheral portion of the through via 5, the time until the entire outer peripheral portion corrodes and is disconnected becomes very long. Even if the signal line 2S covered by the solder resist 3 from the through via 5, that is, the lead line of the via connection pattern 2V to the signal line 2S becomes corroded and becomes thin, current is passed through the via connection pattern 2V other than the corroded portion. Since it is possible, it becomes difficult to disconnect. In other words, even if a portion of the metal is corroded, if the connection is somewhere, the connection between the signal line 2S of the first main surface 1A and the wiring layer 6 on the back surface formed on the second main surface 1B on the back surface side is established. Secured. That is, as shown in FIGS. 4A and 4B, the opening diameter R ₂ of the opening 7 of the solder resist 3 is sufficiently smaller than the outer shape R ₁ of the via connection pattern 2V, and the inner edge of the opening 7 is connected to the via connection. An annular portion having a sufficient width is formed between the outer edge of the pattern 2V and the connection between the via connection pattern 2V and the signal line 2S is ensured.

As described above, according to the printed wiring board 10 of the first embodiment, the outer edge of the foot pattern 2F or the via connection pattern 2V is positioned outside the inner edge of the

opening

4 or 7. Thereby, since the outer edge of the foot pattern 2F is protected by the solder resist 3 without being exposed from the opening 4, it is possible to prevent disconnection due to corrosion and to obtain a highly reliable printed wiring board 10. Further, it is possible to suppress corrosion of the roots of the foot patterns 2Fa and 2Fb, that is, the signal lines 2S, that is, the connection portions 2B between the foot patterns 2Fa and 2Fb and the signal lines 2S due to corrosive gas or the like. Moreover, since the outer edge of the via connection pattern 2V is protected by the solder resist 3 without being exposed from the opening 7, it is possible to prevent disconnection due to corrosion and to obtain a highly reliable printed wiring board. Further, corrosion of the root of the via connection pattern 2V, that is, the signal line 2S, that is, the connection portion 2B between the via connection pattern 2V and the signal line 2S due to corrosive gas or the like can be suppressed.

In other words, the foot patterns 2Fa, 2Fb or the via connection pattern 2V are widened and extended below the solder resist 3. As a result, the signal lines 2S or the lead lines that are easily corroded are completely hidden under the solder resist 3, so that they are not disconnected. Even if the base of the signal line 2S or the lead wire is corroded by corrosive gas or the like, the time until disconnection becomes very long. Furthermore, the lead lines from the foot patterns 2Fa and 2Fb to the signal line 2S or the signal line 2S are thickened. Thereby, the time until disconnection becomes very long.

Furthermore, a method of applying a resist solution or marking ink to the through via 5 has also been proposed. In the above method, there is a problem that the through hole is corroded by the resist solution or the marking ink itself due to the displacement.

In addition, the printed wiring board on which a light emitting diode (LED: Light Emitting Diode) or the like is mounted may impair the function of the mounted component by applying the coating agent. There is a problem that the countermeasures used cannot be performed.

The printed wiring board covers the surface of the wiring material with an insulating material such as a solder resist, but on the foot pattern or through via for connecting components, an opening is provided in the insulating material to make electrical connection I am doing so. In particular, a printed wiring board using a highly oxidizing wiring material such as copper has a high possibility of disconnection due to corrosion at the edge of the foot pattern or the through via exposed in the opening of the insulating material. Therefore, in the conventional printed wiring pattern design, there is a problem that disconnection is likely to occur at the connection portion between the foot pattern or the through via and the edge portion connected to the foot pattern or the through via, that is, the connection portion of the signal line as the lead line. there were. In addition, even if only the edge of the through via on the wiring pattern side covered with the solder resist, that is, the connection part with the signal line that is the lead wire is disconnected, the printed connection is made with the through via interposed therebetween. There is a problem that the connection of the patterns on both sides of the wiring board is completely disconnected.

On the other hand, according to the printed wiring board 10 of the first embodiment, the outer edges of the foot pattern 2F and the via connection pattern 2V are located outside the inner edge of the

opening

4 or 7 as described above. As a result, as described above, the outer edges of the foot pattern 2F and the via connection pattern 2V are protected by the solder resist 3 without being exposed from the opening 4, thereby preventing disconnection due to corrosion and obtaining a highly reliable printed wiring board 10. be able to.

According to the printed wiring board 10 of the first embodiment, even in an environment where the copper forming the substrate pattern corrodes due to misalignment, the root of the lead line of the circuit pattern that easily corrodes is protected by the resist. There is an effect of preventing the pattern from being disconnected without applying a corrosion-resistant coating material.

Embodiment 2. FIG.
FIG. 5 is a diagram showing the printed wiring board according to the second embodiment, and is an enlarged view of the periphery of the through via. FIG. 5A is a top view showing a via connection pattern, and FIG. 5B is a Vb-Vb sectional view of FIG. 5A. The printed wiring board 10 according to the second embodiment is an example in which the signal line 2S as the lead line and the via connection pattern 2V are square patterns. The printed wiring board 10 according to the second embodiment is characterized by having a wide portion 2W wider than the line width of the normal signal line 2S at the connection portion 2B with the via connection pattern 2V. The element mounting portions on the foot patterns 2Fa and 2Fb have an opening 4 smaller than the area of the foot patterns 2Fa and 2Fb, and a solder resist 3 that is an insulating film covering the wiring pattern. The other areas are the same as the example shown in FIG. 4 in the first embodiment. This makes it difficult for the signal line 2S to be disconnected due to corrosion.

With the above configuration, in addition to the configuration of the peripheral portion of the through via of the first embodiment, having the wide portion 2W makes the effect that the signal line 2S hardly breaks due to corrosion more reliable, and further, the via connection pattern 2V. And the signal line 2S are provided with an intermediate width wiring portion, current concentration is mitigated and disconnection due to current concentration is prevented. Further, the printed wiring board 10 according to the second embodiment has the wide portion 2W wider than the line width of the normal signal line 2S at the connection portion 2B with the via connection pattern 2V, thereby improving the mechanical strength against the tensile force. Can be measured.

Further, the above configuration is the same for the foot pattern, and it goes without saying that the connecting portion 2B between the foot patterns 2Fa, 2Fb and the signal line 2S may have a wide portion 2W similar to that of the second embodiment. Nor.

For example, as shown in FIG. 6, the case where the formation position of the opening 4 is shifted to the foot pattern 2Fa side from the center of the foot patterns 2Fa, 2Fb will be described. For example, on the foot pattern 2Fa side, the connection portion 2B between the via connection pattern 2V and the signal line 2S is exposed. However, since the wide portion 2W wider than the line width of the signal line 2S exists in the connection portion 2B, even if it is exposed from the opening 4 and corroded, it is wide and can prevent disconnection. Further, on the foot pattern 2Fb side, the edge of the foot pattern 2Fb is exposed from the opening 4. However, the opening 4 is smaller than the foot patterns 2Fa and 2Fb, and the other regions are covered with a solder resist 3 that is an insulating film covering the wiring pattern. At the edge portion, the foot pattern 2Fb is formed on the three peripheral edges of the opening 4. Because it exists, the current path is maintained. That is, the opening width of the opening 4 of the solder resist 3 is sufficiently smaller than the length of one side of the foot patterns 2Fa and 2Fb, and between the inner edge of the opening 4 and the outer edge of the three peripheral edges of the foot patterns 2Fa and 2Fb. An annular portion having a sufficient width is formed.

Therefore, since the signal line 2S is connected to the foot patterns 2Fa and 2Fb via the wide portion 2W, the connection between the foot patterns 2Fa and 2Fb and the signal line 2S is maintained, and disconnection can be prevented. As described above, according to the configuration of the second embodiment, disconnection can be avoided even when a displacement occurs, and the configuration of the second embodiment has a structure that is resistant to displacement. Here, the foot pattern, which is a component mounting pattern, is a rectangular or circular wide portion on which mounting components are mounted, and a narrow lead wire is connected to the foot pattern or between the foot pattern and the lead wire. An intermediate pattern that is a wide portion may be formed. The foot pattern refers to a region continuously connected to a region where mounting components are mounted, and a narrow region including a connection portion is regarded as a lead line.

Embodiment 3 FIG.
FIG. 7 is a diagram showing the printed wiring board according to the third embodiment, and is an enlarged view of the periphery of the through via. The printed wiring board 10 according to the third embodiment includes a line width expanding portion 2WS in which the signal line width gradually increases as it approaches the contact point between the signal line 2S as a lead line and the via connection pattern 2V. And The other areas are the same as the example shown in FIG. The same symbols are assigned to the same parts.

According to the above configuration, since the signal line width is gradually increased toward the via connection pattern 2V, the pattern edge is gentle, and the line width expansion part 2WS is Even if exposed from the opening 7, the risk of disconnection due to corrosion is reduced, and the signal line 2S is less likely to be disconnected.

In addition, since the signal line 2S in use is gradually widened, current concentration can be prevented compared to the case where the line width is suddenly increased.

According to the printed wiring board 10 of the third embodiment, an example in which the signal line width is gradually increased as the contact point between the signal line 2S and the via connection pattern 2V is approached, and the line width expanding portion 2WS having a triangular shape is provided. As described above, the line width expanding portion 2WS is not limited to a triangular shape, and a semicircular shape including a line width expanding portion 2RS whose corners are rounded as shown in FIG. It may be circular. Alternatively, as shown in FIG. 9, the signal line 2 S may be a trapezoidal line width expanding portion 2 TS having a symmetrical shape with respect to the signal line that is centered with respect to the opening 7.

Embodiment 4 FIG.
FIG. 10 is a view showing a modification of the foot pattern in the printed wiring board 10 of the second embodiment shown in FIG. The printed wiring board 10 of Embodiment 4 shows an example in which the foot patterns 2Fa, 2Fb are smaller than the resist openings 4, and the positions where the openings 4 are formed are closer to the foot pattern 2Fa side than the centers of the foot patterns 2Fa, 2Fb. The case where it deviates to will be described. For example, on the foot pattern 2Fa side, the connection portion 2B between the via connection pattern 2V and the signal line 2S which is a lead line is exposed. However, since the wide portion 2W wider than the line width of the signal line 2S exists in the connection portion 2B, even if it is exposed from the opening 4 and corroded, it is wide and can prevent disconnection. Further, on the foot pattern 2Fb side, the edge of the foot pattern 2Fb is exposed from the opening 4. However, since the edge exposed from the opening 4 constitutes the foot pattern 2Fb, the current path is maintained.

Therefore, the connection with the signal line 2S is maintained and disconnection can be prevented. As described above, according to the configuration of the fourth embodiment, disconnection can be avoided even when a deviation occurs.

As described above, according to the printed wiring boards of the first to fourth embodiments, even in an environment where copper forming the wiring pattern corrodes, the wiring pattern lead-out line such as the signal line 2S that is easily corroded can be obtained. Since the root is protected by the solder resist 3, it is possible to prevent the wiring pattern such as the signal line 2S from being disconnected without applying a special coating material.

In addition, even if a part of the via connection pattern 2V of the through via 5 is disconnected, the via connection pattern remaining through the peripheral pattern can be energized, so that it is possible to suppress disconnection failure.

According to the above configuration, corrosion can be prevented without applying a special coding agent by drawing the pattern thickly or covering the solder resist 3 which is resistant to corrosion widely. Furthermore, even if the via connection pattern 2V on the signal line 2S side or the lead-out line side is corroded by expanding the pattern around the via including the through via 5, the via connection pattern 2V other than the lead-out side including the reverse side is routed. Can be energized, and complete disconnection during corrosion can be prevented.

In the third embodiment, the example in which the signal line width is gradually increased toward the via connection pattern 2V has been described. However, the connection part between the foot pattern and the signal line is directed to the foot pattern. Needless to say, the same effect can be obtained by providing the line width enlarged portion in which the signal line width gradually increases.

In the first to fourth embodiments, the case where a copper layer is used as a wiring layer has been described. Needless to say.

In the first to fourth embodiments, the example in which the solder resist is used as the insulating layer has been described. However, the present invention is not limited to the solder resist, and other organic insulating films such as polyimide or inorganic insulating films can also be applied. It is.

Further, in the first to fourth embodiments, the example in which the glass epoxy substrate is used as the insulating substrate has been described. However, the insulating substrate is not limited to the glass epoxy substrate, and other resin substrates and ceramic substrates are used. It can also be applied to glass substrates.

In the first to fourth embodiments, the through via penetrating from the front surface, which is the first main surface of the insulating substrate, to the back surface, which is the second main surface, has been described. And a wiring formed on both surfaces of each insulating substrate, the present invention can also be applied to vias formed on each insulating substrate. In addition, vias penetrating from the surface that is the first main surface of the insulating base material constituting each layer to the back surface that is the second main surface are arranged, and the vias are arranged in a row in the thickness direction of the insulating substrate. Needless to say, the present invention can be applied to each insulating base material even when they are formed out of alignment.

The configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

1 Insulating substrate, 1A 1st main surface, 1B 2nd main surface, 2 wiring layer, 2B connection part, 2S signal line, 2F, 2Fa, 2Fb foot pattern, 2V via connection pattern, 2W wide part, 2WS line width expansion Part, 2RS semicircular line width enlargement part, 2TS trapezoidal line width enlargement part, 3 solder resist, 4 openings, 5 through vias, 6 backside wiring layer, 7 openings, 10 printed wiring board, 20 chip parts , 22a, 22b electrodes.

Claims

An insulating substrate;
A conductive wiring pattern formed on the insulating substrate and having a component mounting pattern and a lead wire connected to the component mounting pattern;
An insulating film covering the wiring pattern except for an element mounting portion on the component mounting pattern, and
The printed circuit board, wherein the insulating film has an opening in the element mounting portion, and an outer edge of the component mounting pattern is located outside an inner edge of the opening.
The printed wiring board according to claim 1, wherein the lead line is connected to the component mounting pattern through a wide portion wider than the lead line width at a connection portion with the component mounting pattern.
A via penetrating from the first main surface of the insulating substrate to the second main surface facing the first main surface;
A via connection pattern made of the conductive wiring pattern is formed in a region surrounding the via on the first main surface;
The printed wiring board according to claim 1, wherein an outer edge portion of the via connection pattern is covered with the insulating film.
4. The printed wiring board according to claim 3, wherein the outer edge portion of the via connection pattern forms an annular pattern having an upper edge of the via as an inner periphery.
5. The printed wiring according to claim 3, wherein the lead-out line width of the lead-out line increases as it approaches a connecting portion between the lead-out line and the component mounting pattern or via connection pattern. substrate.
The printed wiring board according to any one of claims 1 to 5, wherein the insulating film is a solder resist.
An insulating substrate;
A via penetrating from a first main surface of the insulating substrate to a second main surface facing the first main surface;
A conductive wiring pattern including a via connection pattern formed on the insulating substrate and formed in a region surrounding the via on the first main surface;
An insulating film covering the wiring pattern,
The printed wiring board, wherein an outer edge portion of the via connection pattern is covered with the insulating film.
An insulating substrate;
A conductive wiring pattern formed on the insulating substrate and having a component mounting pattern for mounting an element and a lead wire connected to the component mounting pattern;
The device mounting portion on the component mounting pattern has an opening smaller than the component mounting pattern, and includes an insulating film covering the wiring pattern,
The printed wiring board, wherein the lead wire is connected to the component mounting pattern through a wide portion wider than the lead wire width at a connection portion with the component mounting pattern.