WO2018040543A1 - 像素单元、显示基板、显示设备、驱动像素电极的方法 - Google Patents

像素单元、显示基板、显示设备、驱动像素电极的方法 Download PDF

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Publication number
WO2018040543A1
WO2018040543A1 PCT/CN2017/077079 CN2017077079W WO2018040543A1 WO 2018040543 A1 WO2018040543 A1 WO 2018040543A1 CN 2017077079 W CN2017077079 W CN 2017077079W WO 2018040543 A1 WO2018040543 A1 WO 2018040543A1
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Prior art keywords
switching transistor
voltage
pixel
signal line
pixel unit
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PCT/CN2017/077079
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English (en)
French (fr)
Inventor
滕万鹏
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京东方科技集团股份有限公司
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Priority to US15/552,781 priority Critical patent/US10573268B2/en
Publication of WO2018040543A1 publication Critical patent/WO2018040543A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a pixel unit, a display substrate having the pixel unit, a display device including the display substrate, and a method for driving a pixel electrode in the pixel unit.
  • LCDs liquid crystal displays
  • the image quality displayed by the existing large-sized display devices is often unsatisfactory and even severely flawed.
  • An important factor influencing the quality of the displayed image is the longer data line of the display device. As the size of the display device becomes larger, the length of the data line therein also increases. Longer data lines have a larger impedance, resulting in a larger voltage drop across the data lines. This causes the charging voltage of some of the pixels in the display device to be lower than the design value.
  • the portion of the data line that is remote from the data driver may have a greater loss of data signals than the portion of the data line that is adjacent to the data driver and the initial data signal that is output from the data driver. Therefore, the pixel electrodes of some pixels cannot be sufficiently charged, so that the displayed image quality is deteriorated.
  • Embodiments of the present invention provide a pixel unit, a display substrate having the pixel unit, a display device including the display substrate, and a method for driving a pixel electrode in the pixel unit to alleviate or alleviate the above-mentioned problems existing in the prior art. problem.
  • Embodiments of the present invention provide a pixel unit including a pixel electrode and a pixel driving circuit.
  • the pixel driving circuit includes a switching module and a compensation module, and the compensation module is connected to the first signal line, the second signal line, the data line, and the switch module,
  • the switch module is connected to the second signal line, the compensation module and the pixel electrode, the compensation module is configured to store a compensation voltage under the control of the first signal line, and the compensation module is further used in the second signal line
  • the data voltage supplied from the compensation voltage and the data line is controlled to be supplied to the switch module for supplying the compensation voltage and the data voltage to the pixel electrode under the control of the second signal line.
  • the compensation voltage stored by the compensation module may be a first voltage supplied via the first signal line, with which the data voltage loss due to the voltage drop on the longer data line can be compensated.
  • the pixel unit provided by the embodiment of the present invention, the pixel voltage actually provided to the pixel electrode can be numerically approximated by the sum of the compensation voltage stored by the compensation module and the data voltage supplied through the data line.
  • the charging rate of the pixel electrode is effectively compensated, which is advantageous for improving the image display quality of the display device.
  • the compensation module can include a first switching transistor, a second switching transistor, and a capacitor, the switching module including a third switching transistor.
  • a first end of the first switching transistor is coupled to the data line, a second end is coupled to the first end of the second switching transistor, and a second end of the second switching transistor is coupled to the second end of the capacitor, the capacitor
  • the first end is connected to the first end of the third switching transistor, the second end of the third switching transistor is connected to the pixel electrode, and the control ends of the first switching transistor and the third switching transistor are both connected to the second signal line, and the second A control terminal of the switching transistor is coupled to the first signal line and the first end of the capacitor.
  • the compensation module further includes a resistor, the first end of the resistor being coupled to the first signal line and the second end of the resistor being electrically coupled to the control terminal of the second switching transistor.
  • the resistor is disposed in the same layer as the pixel electrode.
  • Another embodiment of the present invention provides a display substrate, which may include a common electrode, an array of pixel cells arranged in a pixel unit according to any one of the foregoing embodiments, and an electrical connection to the data line.
  • a data voltage source that provides a data voltage.
  • the compensation module in the pixel unit may include a first switching transistor, a second switching transistor, and a capacitor, and the pixel unit may further include a resistor, the first end of the resistor is connected to the first signal line, and the resistor The second end of the device is electrically connected to the control end of the second switching transistor, and the resistor and the common electrode can be disposed in the same layer.
  • the first signal line and the second signal line may be adjacent two gate lines in the display substrate, respectively.
  • the resistors included in each pixel unit located in the same row in the pixel cell array may have the same resistance value.
  • a resistor in a pixel unit farther from the data voltage source has a resistance value closer to a pixel unit closer to the data voltage source.
  • the resistance of the resistor is small.
  • the resistance of the resistor in any row of pixel units is smaller than the adjacent row of pixel units adjacent to the data voltage source adjacent thereto.
  • the resistance of the resistor is small.
  • the resistance of the resistor in the Nth row of pixel cells in the pixel cell array is (K-N+1)R/K, where K is the total number of rows of the pixel cell array, and R is a single data.
  • the resistance of the line is (K-N+1)R/K, where K is the total number of rows of the pixel cell array, and R is a single data. The resistance of the line.
  • a further embodiment of the present invention provides a display device, which may include the display substrate as described in any of the foregoing embodiments.
  • Still another embodiment of the present invention provides a method for driving a pixel electrode in a pixel unit, the pixel unit including a pixel electrode and a pixel driving circuit, the pixel driving circuit including a switching module and a compensation module, the method Can include:
  • the compensation module receives the first voltage provided by the first signal line and stores a compensation voltage associated with the first voltage under control of the first signal line;
  • the compensation module provides the compensation voltage and the data voltage provided by the data line to the switch module under the control of the second signal line, and the switch module supplies the compensation voltage and the data voltage to the pixel electrode.
  • the compensation module can include a first switching transistor, a second switching transistor, and a capacitor, the switching module including a third switching transistor, the first terminal of the first switching transistor is connected to the data line, and the second end is connected to a first end of the second switching transistor, a second end of the second switching transistor is coupled to the second end of the capacitor, a first end of the capacitor is coupled to the first end of the third switching transistor, and a second end of the third switching transistor is coupled To the pixel electrode, the method can include:
  • the first signal line applies the first voltage to a control end of the second switching transistor and a first end of the capacitor, the capacitor storing the compensation voltage
  • the second signal line applies the first to the control terminals of the first switching transistor and the third switching transistor
  • the two voltages cause the first switching transistor and the third switching transistor to be turned on, and the second end of the capacitor receives the data voltage provided by the data line, and supplies the compensation voltage and the data voltage to the pixel electrode.
  • both the first voltage and the second voltage are pulsed voltages, and the pulses of the second voltage are delayed by pulses of the first voltage.
  • the first signal line and the second signal line may be adjacent two adjacent gate lines in the display device to which the pixel unit belongs.
  • FIG. 1 is a block diagram showing the structure of a pixel unit according to an embodiment of the present invention
  • FIG. 2 is a view schematically showing a structural view of a display substrate according to an embodiment of the present invention
  • FIG. 3 is a view schematically showing a specific circuit of a pixel driving circuit in a pixel unit according to an embodiment of the present invention
  • FIG. 4 is a view schematically showing a specific circuit of a pixel driving circuit in a pixel unit according to another embodiment of the present invention.
  • FIG. 5 is a schematic timing diagram showing signal driving of a pixel driving circuit in a pixel unit according to an embodiment of the present invention
  • FIG. 6 schematically illustrates a flow chart of a method for driving pixel electrodes in a pixel unit, in accordance with one embodiment of the present invention.
  • first end and the second end of the switching transistor mentioned herein are used to distinguish the two ends of the switching transistor except the control end (gate), and one end is called the first end, and the other end is called the second end. end.
  • the first end and the second end of the switching transistor are symmetrical, so the first end and the second end are interchangeable. It should also be understood that "connected” or “electrically connected” as used herein may be used to mean that the two elements are directly connected, or that the two elements are indirectly connected (ie, there may be other element).
  • FIG. 1 schematically shows a structural block diagram of a pixel unit according to an embodiment of the present invention
  • FIG. 2 shows an array of pixel units composed of a plurality of such pixel units.
  • a single pixel unit may include a pixel electrode 20 and a pixel driving circuit 10.
  • the pixel driving circuit 10 may include a switching module 102 and a compensation module 101, and the compensation module 101 and the first signal line La, The two signal lines Lb and the data lines data are connected to the switch module 102.
  • the switch module 102 is connected to the second signal line Lb, the compensation module 101 and the pixel electrode 20.
  • the compensation module 101 is configured to store the compensation voltage under the control of the first signal line La.
  • the compensation module 101 is further configured to provide the data voltage Vdata provided by the compensation voltage and the data line data to the switch module 102 under the control of the second signal line Lb, and the switch module 102 is configured to compensate under the control of the second signal line Lb.
  • the voltage and data voltage Vdata are supplied to the pixel electrode 20.
  • a display device such as an LCD typically includes a plurality of pixel units arranged in an array, and the pixel unit provided by this embodiment of the present invention may be any pixel unit of a display device.
  • the pixel driving circuit 10 in the pixel unit is particularly suitable for a pixel unit of the display device that is far from the data voltage source (data driver).
  • data driver data driver
  • the compensation module can be stored and compensated under the control of the first signal line.
  • the compensation module may use the first voltage provided via the first signal line as the compensation voltage.
  • the compensation module can also supply the data voltage provided by the compensation voltage and the data line to the pixel electrode via the switch module under the control of the second signal line. Therefore, for the pixel unit provided by the embodiment of the present invention, the pixel voltage actually provided to the pixel electrode is numerically approximated by the sum of the compensation voltage stored by the compensation module and the data voltage supplied through the data line.
  • the first voltage (compensation voltage) supplied via the first signal line can compensate for the data voltage loss due to the voltage drop on the longer data line, so that the charging rate of the pixel electrode is effectively compensated, which is advantageous for Improve the image display quality of the display device.
  • FIG. 3 schematically shows a specific circuit configuration of a pixel driving circuit 10 in a pixel unit according to an embodiment of the present invention.
  • the compensation module 101 can include a first switching transistor 101a, a second switching transistor 101b, and a capacitor 101c
  • the switching module 102 can include a third switching transistor 102a.
  • the compensation module 101 may further include a resistor 101d, the first end of the resistor 101d and the first signal.
  • the line La is connected, and the second end of the resistor 101d is electrically connected to the control terminal of the second switching transistor 101b.
  • the first voltage signal provided by the first signal line La can be supplied to the control terminal of the second switching transistor 101b while being supplied to the first terminal m of the capacitor 101c.
  • the second voltage signal supplied from the two signal lines Lb may be supplied to the control terminals of the first switching transistor 101a and the third switching transistor 102a.
  • the first switching transistor 101a and the third switching transistor 102a can be simultaneously turned on or off controlled by the second signal line Lb, and the second switching transistor 101b can be turned on or off by being controlled by the first signal line La.
  • the capacitor 101c can receive and store the first voltage supplied via the first signal line La as the compensation voltage.
  • the compensation module since the compensation module has the resistor 101d, the magnitude of the compensation voltage stored by the compensation module can be adjusted by selecting or adjusting the resistance value of the resistor 101d.
  • the first switching transistor 101a, the second switching transistor 101b, and the The three-switch transistor 102a may be an N-type transistor or a P-type transistor including, but not limited to, an N-type thin film transistor and a P-type thin film transistor.
  • FIGS. 3 and 4 schematically illustrate that the switching elements in the compensation module include the first switching transistor 101a and the second switching transistor 101b, the switching module is turned on.
  • the off component includes a third switching transistor 102a, however, both the compensation module or the switch module may also include other switching elements that may serve as an auxiliary.
  • the pixel driving circuit 10 provided by the embodiment of the present invention is not limited to including only one capacitor 101c, and the compensation module 101 or the switching module 102 may include another capacitor (for example, a voltage regulator or a filter capacitor) that may function to optimize the circuit.
  • another capacitor for example, a voltage regulator or a filter capacitor
  • the first end of the first switching transistor 101a is connected to the data line data
  • the second end is connected to the first end of the second switching transistor 101b
  • the second end of the second switching transistor 101b The second end is connected to the second end n of the capacitor 101c
  • the first end m of the capacitor 101c is connected to the first end of the third switching transistor 102a
  • the second end of the third switching transistor 102a is connected to the pixel electrode 20
  • the control terminals of 101a and the third switching transistor 102a are both connected to the second signal line Lb
  • the control terminal of the second switching transistor 101b is connected to the second terminal of the resistor 101d and the first terminal m of the capacitor 101c.
  • the first signal line La and the second signal line Lb may be adjacent two gate lines in a display panel of the display device.
  • other gate lines may be spaced between the first signal line and the second signal line. Therefore, the voltage signal supplied from the first signal line and the second signal line may be a voltage pulse signal having a time difference.
  • the resistor 101d may be disposed in the same layer as the pixel electrode 20.
  • the material of the resistor 101d may be a transparent conductive material such as indium tin oxide (ITO), so that the resistor 101d and the pixel electrode 20 can be fabricated on the same layer by one patterning process, thereby simplifying the manufacturing process of the display panel of the display device.
  • ITO indium tin oxide
  • ITO has a characteristic of large square resistance, a single resistor 101d which satisfies the requirements can be realized with a small area, thereby minimizing the influence on the pixel aperture ratio of the display device.
  • each of the switching transistors in FIG. 3 is an N-type thin film transistor
  • the first voltage V1 is supplied via the first signal line La, and therefore, the first voltage V1 is applied to the control terminal of the second switching transistor 101b, so that the second switching transistor 101b is turned on, first Voltage V1 charges the first end m of capacitor 101c. Therefore, from the time t1, the potential Vcm of the first terminal m of the capacitor 101c can be raised to be approximately equal to the first voltage V1. At this time, the second switching transistor 101b and the The three-switch transistor 102a is turned off, and the capacitor 101c can maintain its potential at the first terminal m approximately equal to the first voltage V1 for a certain period of time.
  • the pulse of the second voltage V2 is supplied to the control terminals of the first switching transistor 101a and the third switching transistor 102a via the second signal line Lb, so that the first switch The transistor 101a and the third switching transistor 102a are turned on.
  • the pulse of the first voltage V1 does not exist, the potential of the control terminal of the second switching transistor 101b remains approximately equal to the first voltage V1 due to the potential holding function of the capacitor 101c, so the second switching transistor 101b is turned on. Therefore, the first switching transistor 101a, the second switching transistor 101b, and the third switching transistor 102a are all turned on from the time t2.
  • the data voltage Vdata is applied to the second terminal n of the capacitor 101c via the first switching transistor 101a and the second switching transistor 101b, and accordingly, the potential Vcm of the first terminal m of the capacitor 101c is approximately the same due to the bootstrap effect of the capacitance
  • the data voltage Vdata is increased based on the voltage level of a voltage V1, and the potential Vcm of the first terminal m of the capacitor 101c is bootstrapped to Vdata+V1 (Vdata+V1), and since the third switching transistor is turned on, Vcm is supplied to the pixel. Electrode 20.
  • the third switching transistor 102a can supply the first voltage V1 and the data voltage Vdata to the pixel electrode 20, that is, the voltage actually applied to the pixel electrode 20 is approximately equal to the sum of the first voltage V1 and the data voltage Vdata. .
  • the potential Vcm of the first terminal m of the capacitor 101c is significantly increased from the time t2.
  • the display substrate may include a pixel unit array composed of a plurality of pixel units, electrically connecting the same data line (eg, data 1, data 2, data 3, data 4) and data lines to each column of pixel units. Electrical connections, a data voltage source 30 for providing a data voltage, and a common electrode (not shown in Figure 1). It can be understood that the display substrate can be an array substrate of a display device.
  • the pixel unit in the display substrate may be a pixel unit as provided in any of the foregoing embodiments.
  • the compensation module in the pixel unit may include a first switching transistor, a second switching transistor, and a capacitor, and the pixel unit may further include a resistor, the first end of the resistor is connected to the first signal line, and the resistor The second end of the device is electrically connected to the control terminal of the second switching transistor, and the resistor and the common electrode are disposed in the same layer.
  • the compensation voltage provided by the compensation module can be adjusted by using a resistor.
  • the common electrode of the display substrate and the resistor in each pixel unit can be fabricated by one patterning process, which is advantageous for simplifying the process of manufacturing the display substrate.
  • the first signal line and the second signal line may be different gate lines in the display substrate for providing gate drive signals, respectively.
  • the first signal line and the second signal line are respectively two adjacent gate lines (eg, Gate N and Gate N-1) in the display substrate. Therefore, the voltage signal supplied from the first signal line and the second signal line may be a voltage pulse signal having a time difference.
  • the resistors included in each pixel unit located in the same row in the pixel cell array have the same resistance value.
  • the resistors included in each of the pixel driving circuits 10 in the Nth row of pixel units may have the same resistance value, and each of the pixel driving circuits 10 in the N-1th row of pixel units
  • the included resistors can have the same resistance value. Since the distances of the pixel electrodes in the pixel unit of the same row from the data voltage source 30 can be regarded as approximately equal, the lengths of the data lines between the pixel electrodes and the data voltage source 30 are substantially the same, and the amount of data voltage to be compensated is also approximated. Consistently, therefore, the resistance values of the resistors in the pixel drive circuit 10 in the pixel unit of the same row can be set to be equal.
  • the data voltage at the pixel unit farther from the data voltage source 30 has a larger pressure than the pixel unit closer to the data voltage source 30. Therefore, the pixel electrode in the pixel unit farther from the data voltage source 30 requires a larger compensation voltage.
  • the resistance of the resistor in the pixel unit farther from the data voltage source 30 is closer to the pixel unit than the data voltage source 30. The resistance of the resistor is small.
  • the resistance of the resistor in the pixel unit of any row is closer to the previous row adjacent to the data voltage source 30 adjacent thereto.
  • the resistance of the resistor in the pixel unit is small. That is, the resistance of the resistor in each pixel unit in the pixel unit array gradually decreases as the distance from the pixel unit to the data voltage source 30 increases. In this way, the pixel electrodes in the pixel unit of the same column can receive the approximately uniform driving voltage, thereby accurately compensating the charging voltage of the pixel electrodes of the pixel units of each row, which is beneficial to further improve the image quality of the display device.
  • the resistance of the resistor in the Nth row of pixel cells in the pixel cell array is (K-N+1)R/K, where K is the total number of rows of the pixel cell array, and R is a single data.
  • the resistance of the line is (K-N+1)R/K, where K is the total number of rows of the pixel cell array, and R is a single data. The resistance of the line.
  • the display device provides a display device, which may include The display substrate provided by any of the foregoing embodiments.
  • the display device can be any product or component having a display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • Other indispensable components of the display device are understood by those skilled in the art, and are not described herein, nor should they be construed as limiting the invention.
  • Yet another embodiment of the present invention provides a method for driving a pixel electrode in a pixel unit, the pixel unit includes a pixel electrode and a pixel driving circuit, and the pixel driving circuit includes a switching module and a compensation module, as shown in FIG.
  • the method can include the following steps:
  • the compensation module Under the control of the first signal line, the compensation module receives the first voltage provided by the first signal line, and stores a compensation voltage associated with the first voltage;
  • the compensation module supplies the compensation voltage and the data voltage provided by the data line to the switch module, and the switch module supplies the compensation voltage and the data voltage to the pixel electrode.
  • the compensation module may include a first switching transistor, a second switching transistor, and a capacitor, the switching module including a third switching transistor, the first end of the first switching transistor is connected to the data line, and the second end is connected to a first end of the second switching transistor, a second end of the second switching transistor is coupled to the second end of the capacitor, a first end of the capacitor is coupled to the first end of the third switching transistor, and a second end of the third switching transistor is coupled To the pixel electrode.
  • a method of driving a pixel electrode in a pixel unit may include:
  • the first signal line applies the first voltage to a control terminal of the second switching transistor and a first terminal of the capacitor, and the capacitor stores the compensation voltage;
  • the second signal line applies a second voltage to the control terminals of the first switching transistor and the third switching transistor, such that the first switching transistor and the third switching transistor are turned on, and the second end of the capacitor receives the data voltage provided by the data line to the pixel
  • the electrodes provide a compensation voltage and a data voltage.
  • both the first voltage and the second voltage are pulsed voltages, and the pulses of the second voltage are delayed by pulses of the first voltage.
  • the first signal line and the second signal line may be adjacent two adjacent gate lines in the display device to which the pixel unit belongs.

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Abstract

公开了一种像素单元，包括像素电极（20）和像素驱动电路（10），像素驱动电路（10）包括开关模块（102）和补偿模块（101），补偿模块（101）与第一信号线（La）、第二信号线（Lb）、数据线（data）和该开关模块（102）相连，开关模块（102）与第二信号线（Lb）、该补偿模块（101）以及该像素电极（20）相连，补偿模块（101）可用于在第一信号线（La）的控制下存储补偿电压，补偿模块（101）还可用于在第二信号线（Lb）的控制下将补偿电压和数据电压（Vdata）提供给开关模块（102），开关模块（102）可在第二信号线(Lb)的控制下将补偿电压和数据电压（Vdata）提供给像素电极（20）。该像素单元可以降低像素单元中的像素电极（20）接收到的驱动电压与从数据驱动器输出的初始数据信号之间的差异，从而提升像素电极（20）充电率，改善显示设备所显示的图像质量。

Description

像素单元、显示基板、显示设备、驱动像素电极的方法
相关申请的交叉引用
本申请要求于2016年9月1日向中国专利局提交的专利申请201610801079.7的优先权利益，并且在此通过引用的方式将该在先申请的内容并入本文。
技术领域
本发明涉及显示技术领域，具体地涉及一种像素单元、具有该像素单元的显示基板、包括该显示基板的显示设备以及用于驱动像素单元中的像素电极的方法。
背景技术
当前，大尺寸的诸如液晶显示器(LCD)的显示设备得以普及应用并越来越受到人们的欢迎。然而，现有的大尺寸的显示设备显示的图像质量时常不尽如人意，甚至存在严重瑕疵。关于所显示的图像质量的一个重要影响因素是显示设备的较长的数据线。随着显示设备的尺寸变得更大，其中的数据线的长度也随之增加。较长的数据线具有较大的阻抗，从而在数据线上产生较大的压降。这使得显示设备中的一些像素的充电电压可能低于设计值。例如，对于同一条数据线，远离数据驱动器的数据线部分与靠近数据驱动器的数据线部分相比，其所提供的数据信号与从数据驱动器输出的初始数据信号可能存在较大的损失。因此，一些像素的像素电极的不能被充分地充电，使得所显示的图像质量变差。
发明内容
本发明的实施例提供一种像素单元、具有该像素单元的显示基板、包括该显示基板的显示设备以及用于驱动像素单元中的像素电极的方法，以缓解或减轻现有技术中存在的上述问题。
本发明的实施例提供了一种像素单元，该像素单元包括像素电极和像素驱动电路。像素驱动电路包括开关模块和补偿模块，所述补偿模块与第一信号线、第二信号线、数据线和所述开关模块相连，所述 开关模块与第二信号线、所述补偿模块和所述像素电极相连，所述补偿模块用于在第一信号线的控制下存储补偿电压，所述补偿模块还用于在第二信号线的控制下将补偿电压和数据线提供的数据电压提供给开关模块，所述开关模块用于在第二信号线的控制下将所述补偿电压和所述数据电压提供给像素电极。
补偿模块所存储的补偿电压可以是经由第一信号线提供的第一电压，利用该存储的补偿电压，可以补偿由于较长的数据线上的压降所导致的数据电压损失。利用本发明实施例提供的像素单元，实际提供给像素电极的像素电压在数值上可近似于补偿模块所存储的补偿电压和通过数据线提供的数据电压的和。这样，像素电极的充电率得以有效地补偿，有利于改进显示设备的图像显示质量。
在一些实施例中，补偿模块可包括第一开关晶体管、第二开关晶体管以及电容器，所述开关模块包括第三开关晶体管。
在一些实施例中，第一开关晶体管的第一端连接至数据线、第二端连接至第二开关晶体管的第一端，第二开关晶体管的第二端连接至电容器的第二端，电容器的第一端连接至第三开关晶体管的第一端，第三开关晶体管的第二端连接至像素电极，第一开关晶体管和第三开关晶体管的控制端均与第二信号线连接，第二开关晶体管的控制端与第一信号线和电容器的第一端相连接。
在一些实施例中，补偿模块还包括电阻器，电阻器的第一端与第一信号线连接，电阻器的第二端电连接至第二开关晶体管的控制端。通过设计或选择具有不同阻值的电阻器，可以调节补偿模块所存储的实际补偿电压，从而可以为不同的像素单元中的像素提供不同的补偿电压。
在一些实施例中，所述电阻器与所述像素电极同层设置。
本发明的另一实施例提供了一种显示基板，该显示基板可包括公共电极、阵列分布的如前述实施例中任一实施例提供的像素单元的像素单元阵列、以及电连接至数据线用于提供数据电压的数据电压源。
在一些实施例中，像素单元中的补偿模块可包括第一开关晶体管、第二开关晶体管以及电容器，所述像素单元还可包括电阻器，电阻器的第一端连接至第一信号线，电阻器的第二端电连接至第二开关晶体管的控制端，所述电阻器和所述公共电极可同层设置。
在一些实施例中，第一信号线和第二信号线可以分别是显示基板中的相邻的两条栅线。
在一些实施例中，位于像素单元阵列中同一行的各像素单元所包括的电阻器可具有相同的电阻值。
在一些实施例中，在像素单元阵列中同一列的各像素单元中，距离所述数据电压源较远的像素单元中的电阻器的阻值比距离所述数据电压源较近的像素单元中的电阻器的阻值小。
在一些实施例中，在像素单元阵列中同一列的各像素单元中，任一行像素单元中的电阻器的阻值比与其相邻的、距离所述数据电压源较近的前一行像素单元中的电阻器的阻值小。
在一些实施例中，像素单元阵列中的第N行像素单元中的电阻器的阻值为(K-N+1)R/K，其中K为像素单元阵列的总行数，R为单根数据线的电阻。
本发明的又一实施例提供了一种显示设备，该显示设备可包括如前述实施例中任一实施例所述的显示基板。
本发明的再一实施例提供了一种用于驱动像素单元中的像素电极的方法，所述像素单元包括像素电极和像素驱动电路，所述像素驱动电路包括开关模块和补偿模块，所述方法可包括：
在第一信号线的控制下，所述补偿模块接收所述第一信号线提供的第一电压，并存储与第一电压相关的补偿电压；
在第二信号线的控制下，所述补偿模块将所述补偿电压和数据线提供的数据电压提供给开关模块，所述开关模块将所述补偿电压和所述数据电压提供给像素电极。
在一些实施例中，补偿模块可包括第一开关晶体管、第二开关晶体管以及电容器，所述开关模块包括第三开关晶体管，第一开关晶体管的第一端连接至数据线、第二端连接至第二开关晶体管的第一端，第二开关晶体管的第二端连接至电容器的第二端，电容器的第一端连接至第三开关晶体管的第一端，第三开关晶体管的第二端连接至像素电极，所述方法可包括：
第一信号线向第二开关晶体管的控制端和电容器的第一端施加所述第一电压，所述电容器存储所述补偿电压；
第二信号线向第一开关晶体管和第三开关晶体管的控制端施加第 二电压，使得第一开关晶体管和第三开关晶体管导通，电容器的第二端接收数据线提供的数据电压，向像素电极提供补偿电压和数据电压。
在一些实施例中，第一电压和第二电压均是脉冲电压，且第二电压的脉冲延迟于第一电压的脉冲。
在一些实施例中，第一信号线和第二信号线可以分别是像素单元所属的显示设备中的相邻的两条栅线。
附图说明
下面，参考附图更详细地并且通过非限制性的示例方式描述本发明的实施例，以提供对本发明的原理和精神的透彻理解。
图1示意性示出了根据本发明的一个实施例的像素单元的结构框图；
图2示意性地示出了根据本发明的一个实施例的显示基板的结构图；
图3示意性地示出了根据本发明的一个实施例提供的像素单元中的像素驱动电路的具体电路；
图4示意性地示出了根据本发明的另一实施例提供的像素单元中的像素驱动电路的具体电路；
图5示意性地示出了本发明的实施例提供的像素单元中的像素驱动电路的信号时序图；
图6示意性地示出了根据本发明的一个实施例的用于驱动像素单元中的像素电极的方法的流程图。
具体实施方式
下面，通过示例的方式来详细说明本发明的具体实施例。应当理解的是，本发明的实施例不局限于以下所列举的示例，本领域技术人员利用本发明的原理或精神可以对所描述的各实施例进行修改和变型，得到形式不同的其它实施例，显然，这些实施例都落入本发明要求保护的范围。
此外，需要说明的是，本文所参考的附图是为了说明和解释本发明的实施例的需要，附图所体现的每个单元并不一定与实际的电路结构完全相同，不同单元之间的具体连接仅仅用于示意性地说明本发明 的实施例，这些都不构成对本发明的保护范围的限制。在不冲突的情况下，本发明的各实施例中的技术特征可以相互组合。
另外，本文提到的开关晶体管的第一端和第二端是用于区分开关晶体管除控制端(栅极)之外的两端，将其中一端称为第一端，另一端称为第二端。开关晶体管的第一端和第二端是对称的，所以第一端、第二端是可以互换的。还应理解的是，本文提到的“连接”或“电连接”可用于表示两个元件直接连接，或者，也可表示这两个元件间接连接(即，这两个元件之间可能存在其它元件)。
参照图1和图2，图1示意性地示出了根据本发明的实施例的像素单元的结构框图，图2示出了由多个这样的像素单元构成的像素单元阵列。在图1所示的实施例中，单个的像素单元可包括像素电极20和像素驱动电路10，像素驱动电路10可包括开关模块102和补偿模块101，补偿模块101与第一信号线La、第二信号线Lb、数据线data和开关模块102相连，开关模块102与第二信号线Lb、补偿模块101和像素电极20相连，补偿模块101用于在第一信号线La的控制下存储补偿电压，补偿模块101还用于在第二信号线Lb的控制下将补偿电压和数据线data提供的数据电压Vdata提供给开关模块102，开关模块102用于在第二信号线Lb的控制下将补偿电压和数据电压Vdata提供给像素电极20。
诸如LCD的显示设备通常包括阵列布置的多个像素单元，本发明的该实施例提供的像素单元可以是显示设备的任何像素单元。并且，像素单元中的像素驱动电路10特别适用于显示设备的距离数据电压源(数据驱动器)较远的像素单元。对于一般的LCD显示设备，由于数据线上存在一定的压降，导致连接至同一数据线的不同像素单元中的像素电极实际所接收到的数据电压可能是不同的，距离数据电压源较远的像素单元中的像素电极接收到的数据电压信号可能存在较大的衰减，这些像素电极的驱动电压与设计值(期望值)可能存在较大偏差，因而像素电极不能被充分地充电。对于LCD显示设备而言，这可能意味着在一些显示区域内不能形成预期的电场，相应地，可能使一部分液晶分子不能以期望的角度偏转，甚至有可能偏转方向存在较大误差，因而，对显示设备的图像质量造成不利影响。而对于本发明实施例提供的像素单元，其中的补偿模块可以在第一信号线的控制下存储补偿 电压，例如，补偿模块可以将经由第一信号线提供的第一电压作为补偿电压。而且，补偿模块还可在第二信号线的控制下将补偿电压和数据线提供的数据电压经由开关模块提供给像素电极。因此，对于本发明实施例提供的像素单元，实际提供给像素电极的像素电压在数值上可近似于补偿模块所存储的补偿电压和通过数据线提供的数据电压的和。换句话说，经由第一信号线提供的第一电压(补偿电压)可补偿由于较长的数据线上的压降所导致的数据电压损失，使得像素电极的充电率得以有效地补偿，有利于改进显示设备的图像显示质量。
图3示意性地示出了根据本发明的实施例的像素单元中的像素驱动电路10的具体电路结构。在该实施例中，补偿模块101可包括第一开关晶体管101a、第二开关晶体管101b以及电容器101c，开关模块102可包括第三开关晶体管102a。
如图4所示，在另一实施例中，除了第一开关晶体管101a、第二开关晶体管101b以及电容器101c，补偿模块101还可包括电阻器101d，电阻器101d的第一端与第一信号线La连接，电阻器101d的第二端电连接至第二开关晶体管101b的控制端。从图3和图4所示的实施例可以看出，第一信号线La提供的第一电压信号可以提供给第二开关晶体管101b的控制端，同时提供给电容器101c的第一端m，第二信号线Lb提供的第二电压信号可以提供给第一开关晶体管101a和第三开关晶体管102a的控制端。因此，第一开关晶体管101a和第三开关晶体管102a可以受控于第二信号线Lb而同时导通或关断，第二开关晶体管101b可受控于第一信号线La而接通或关断，同时，电容器101c可以接收并存储经由第一信号线La提供的第一电压作为补偿电压。另外，对于图4所示的实施例，由于补偿模块具有电阻器101d，因此，可以通过选择或调整电阻器101d的电阻值而调整补偿模块所存储的补偿电压的大小。
应当能够领会到的是，取决于第一信号线La和第二信号线Lb所提供的电压信号的形式以及数据线所提供的数据电压Vdata，第一开关晶体管101a、第二开关晶体管101b和第三开关晶体管102a可以是N型晶体管，也可以是P型晶体管，包括但不限于N型薄膜晶体管和P型薄膜晶体管。尽管图3和图4示意性地示出了补偿模块中的开关元件包括第一开关晶体管101a、第二开关晶体管101b，开关模块中的开 关元件包括第三开关晶体管102a，但是，补偿模块或开关模块均还可包括可能起到辅助作用的其它开关元件。此外，本发明实施例提供的像素驱动电路10不限于仅包括一个电容器101c，补偿模块101或开关模块102均可包括可能起到优化电路功能的另外的电容器(例如，稳压或滤波电容器)。
再次参照图4，根据本发明的一个实施例，第一开关晶体管101a的第一端连接至数据线data、第二端连接至第二开关晶体管101b的第一端，第二开关晶体管101b的第二端连接至电容器101c的第二端n，电容器101c的第一端m连接至第三开关晶体管102a的第一端，第三开关晶体管102a的第二端连接至像素电极20，第一开关晶体管101a和第三开关晶体管102a的控制端均与第二信号线Lb连接，第二开关晶体管101b的控制端与电阻器101d的第二端和电容器101c的第一端m相连接。在一些实施例中，第一信号线La和第二信号线Lb可以是显示设备的显示面板中的相邻的两条栅线。替代性地，第一信号线和第二信号线之间也可以间隔有其它的栅线。因此，第一信号线和第二信号线所提供的电压信号可以是存在时间差的电压脉冲信号。
对于图4所示的实施例，电阻器101d可以与像素电极20同层设置。电阻器101d的材料可以为诸如铟锡氧化物(ITO)的透明导电材料，这样，可以将电阻器101d和像素电极20通过一次构图工艺制作于同一层，从而简化显示设备的显示面板的制作工艺。另外，由于铟锡氧化物(ITO)具有方阻较大的特性，所以可以以较小的面积来实现满足要求的单个电阻器101d，从而尽可能降低对显示设备的像素开口率的影响。
下面，参照图5以及图3，通过示例的方式来具体说明本发明的实施例提出的像素单元中补偿模块对提供给像素电极的驱动电压进行补偿的原理和过程。下面以图3中的各开关晶体管为N型薄膜晶体管为例进行说明。
如图5所示，在t1时刻，经由第一信号线La提供第一电压V1，因此，第一电压V1被施加给第二开关晶体管101b的控制端，使得第二开关晶体管101b开启，第一电压V1对电容器101c的第一端m进行充电。因此，从t1时刻开始，电容器101c的第一端m的电位Vcm可被提升至近似等于第一电压V1。此时，第二开关晶体管101b和第 三开关晶体管102a均断开，电容器101c在一定时间内可维持其第一端m的电位近似等于第一电压V1。在t2时刻，即，在第一电压V1的脉冲结束时，第二电压V2的脉冲经由第二信号线Lb被提供至第一开关晶体管101a和第三开关晶体管102a的控制端，使得第一开关晶体管101a和第三开关晶体管102a导通。此时，尽管不存在第一电压V1的脉冲，但是由于电容器101c的电位保持功能，第二开关晶体管101b的控制端的电位保持近似等于第一电压V1，所以第二开关晶体管101b导通。因此，在从t2时刻开始，第一开关晶体管101a、第二开关晶体管101b和第三开关晶体管102a均导通。数据电压Vdata经由第一开关晶体管101a和第二开关晶体管101b被施加至电容器101c的第二端n，相应地，由于电容的自举效应，电容器101c的第一端m的电位Vcm在近似于第一电压V1的电压水平的基础上增加数据电压Vdata，电容器101c的第一端m的电位Vcm被自举到Vdata+V1(Vdata+V1)，由于第三开关晶体管打开，使得Vcm被提供至像素电极20。因此，从t2时刻开始，第三开关晶体管102a可以将第一电压V1和数据电压Vdata提供至像素电极20，即，向像素电极20实际施加的电压近似等于第一电压V1和数据电压Vdata之和。从图5可以看出，在从t2时刻开始，电容器101c的第一端m的电位Vcm明显增大。
本发明的另一实施例提供了一种显示基板，其可包括本发明的上述实施例中的任一实施例所描述的像素单元。再次参照图2，显示基板可包括由多个像素单元组成的像素单元阵列、与每列像素单元电连接同一根数据线(例如，data 1、data 2、data 3、data 4)、与数据线电连接，用于提供数据电压的数据电压源30以及公共电极(图1中未示出)。可以理解的是，该显示基板可以是显示设备的阵列基板。
显示基板中的像素单元可以是如前述实施例中任一实施例提供的像素单元。例如，在一个实施例中，像素单元中的补偿模块可包括第一开关晶体管、第二开关晶体管以及电容器，像素单元还可包括电阻器，电阻器的第一端连接至第一信号线，电阻器的第二端电连接至第二开关晶体管的控制端，并且电阻器和公共电极可同层设置。这样，可以利用电阻器对补偿模块所提供的补偿电压进行调节，另外，可以通过一次构图工艺来制作显示基板的公共电极和各个像素单元中的电阻器，有利于简化制作显示基板的工艺。
第一信号线和第二信号线可以分别是显示基板中的用于提供栅极驱动信号的不同栅线。在一个实施例中，第一信号线和第二信号线分别是显示基板中的相邻的两条栅线(例如，Gate N和Gate N-1)。因此，第一信号线和第二信号线所提供的电压信号可以是存在时间差的电压脉冲信号。
在一个实施例中，位于像素单元阵列中同一行的各像素单元所包括的电阻器具有相同的电阻值。例如，对于图1所示的实施例，第N行像素单元中的各像素驱动电路10所包括的电阻器可具有相同的电阻值，第N-1行像素单元中的各像素驱动电路10所包括的电阻器可具有相同的电阻值。由于同一行像素单元中的像素电极距数据电压源30的距离可以视为近似相等，这些像素电极与数据电压源30之间的数据线的长度大致相同，所需要补偿的数据电压的量也近似一致，因此，可以将同一行像素单元中的像素驱动电路10中的电阻器的阻值设置为相等。
能够理解到的是，在图1所示像素单元阵列中，与距离数据电压源30较近的像素单元相比，距数据电压源30较远的像素单元处的数据电压会有较大的压降，因此，距数据电压源30较远的像素单元中像素电极需要更大的补偿电压。相应地，在一些实施例中，在像素单元阵列中同一列的各像素单元中，距离数据电压源30较远的像素单元中的电阻器的阻值比距离数据电压源30较近的像素单元中的电阻器的阻值小。
进一步地，在一些实施例中，在像素单元阵列中同一列的各像素单元中，任一行的像素单元中的电阻器的阻值比与其相邻的、距离数据电压源30较近的前一行像素单元中的电阻器的阻值小。即，像素单元阵列中各像素单元中的电阻器的阻值随着像素单元到数据电压源30的距离的增加而逐渐降低。这样，可以使得同一列像素单元中的像素电极接收到近似一致的驱动电压，实现对各行像素单元的像素电极的充电电压的精确补偿，有利于进一步提升显示设备的图像质量。
在一些实施例中，像素单元阵列中的第N行像素单元中的电阻器的阻值为(K-N+1)R/K，其中K为像素单元阵列的总行数，R为单根数据线的电阻。
本发明的另一实施例提供了一种显示设备，该显示设备可包括如 前述实施例中任一实施例提供的显示基板。该显示设备可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示设备的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本发明的限制。
本发明的又一实施例提供了一种用于驱动像素单元中的像素电极的方法，像素单元包括像素电极和像素驱动电路，像素驱动电路包括开关模块和补偿模块，如图6所示，该方法可包括如下步骤：
S1.在第一信号线的控制下，补偿模块接收第一信号线提供的第一电压，并存储与第一电压相关的补偿电压；
S2.在第二信号线的控制下，补偿模块将补偿电压和数据线提供的数据电压提供给开关模块，开关模块将补偿电压和所述数据电压提供给像素电极。
在一个实施例中，补偿模块可包括第一开关晶体管、第二开关晶体管以及电容器，所述开关模块包括第三开关晶体管，第一开关晶体管的第一端连接至数据线、第二端连接至第二开关晶体管的第一端，第二开关晶体管的第二端连接至电容器的第二端，电容器的第一端连接至第三开关晶体管的第一端，第三开关晶体管的第二端连接至像素电极。驱动像素单元中的像素电极的方法可包括：
第一信号线向第二开关晶体管的控制端和电容器的第一端施加所述第一电压，电容器存储所述补偿电压；以及
第二信号线向第一开关晶体管和第三开关晶体管的控制端施加第二电压，使得第一开关晶体管和第三开关晶体管导通，电容器的第二端接收数据线提供的数据电压，向像素电极提供补偿电压和数据电压。
在一些实施例中，第一电压和第二电压均是脉冲电压，且第二电压的脉冲延迟于第一电压的脉冲。
在一些实施例中，第一信号线和第二信号线可以分别是像素单元所属的显示设备中的相邻的两条栅线。
本以上已经参照附图详细描述了本发明的实施例，但是，应该注意的是，上述实施例用来举例说明而不是限制本发明，并且本领域技术人员将能够设计许多替代性实施例而并未脱离所附权利要求的范围。在权利要求中，词语“包括”并未排除除了权利要求中所列举的那些 之外的元件或步骤的存在。元件之前的词语“一”或“一个”并未排除多个这样的元件的存在。某些特征被记载在相互不同从属权利要求中这一纯粹事实并不意味着这些特征的组合不能被有利地使用。

Claims (16)

  1. 一种像素单元，包括像素电极和像素驱动电路，所述像素驱动电路包括开关模块和补偿模块，所述补偿模块与第一信号线、第二信号线、数据线和所述开关模块相连，所述开关模块与第二信号线、所述补偿模块和所述像素电极相连，所述补偿模块用于在第一信号线的控制下存储补偿电压，所述补偿模块还用于在第二信号线的控制下将补偿电压和数据线提供的数据电压提供给开关模块，所述开关模块用于在第二信号线的控制下将所述补偿电压和所述数据电压提供给像素电极。
  2. 如权利要求1所述的像素单元，其中所述补偿模块包括第一开关晶体管、第二开关晶体管以及电容器，所述开关模块包括第三开关晶体管，所述第一开关晶体管的第一端连接至数据线、第二端连接至第二开关晶体管的第一端，第二开关晶体管的第二端连接至电容器的第二端，电容器的第一端连接至第三开关晶体管的第一端，第三开关晶体管的第二端连接至像素电极，第一开关晶体管和第三开关晶体管的控制端均与第二信号线连接，第二开关晶体管的控制端与第一信号线和电容器的第一端相连接。
  3. 如权利要求2所述的像素单元，其中所述补偿模块还包括电阻器，电阻器的第一端与第一信号线连接，电阻器的第二端电连接至第二开关晶体管的控制端。
  4. 如权利要求3所述的像素单元，其中所述电阻器与所述像素电极同层设置。
  5. 一种显示基板，包括公共电极、阵列分布的如权利要求1所述的像素单元的像素单元阵列、以及电连接至数据线用于提供数据电压的数据电压源。
  6. 如权利要求5所述的显示基板，其中所述像素单元中的补偿模块包括第一开关晶体管、第二开关晶体管以及电容器，所述像素单元还包括电阻器，电阻器的第一端连接至第一信号线，电阻器的第二端电连接至第二开关晶体管的控制端，其中所述电阻器和所述公共电极同层设置。
  7. 如权利要求6所述的显示基板，其中所述第一信号线和第二信 号线分别是显示基板中的相邻的两条栅线。
  8. 如权利要求6所述的显示基板，其中位于像素单元阵列中同一行的各像素单元所包括的电阻器具有相同的电阻值。
  9. 如权利要求8所述的显示基板，其中在像素单元阵列中同一列的各像素单元中，距离所述数据电压源较远的像素单元中的电阻器的阻值比距离所述数据电压源较近的像素单元中的电阻器的阻值小。
  10. 如权利要求9所述的显示基板，其中在像素单元阵列中同一列的各像素单元中，任一行像素单元中的电阻器的阻值比与其相邻的、距离所述数据电压源较近的前一行像素单元中的电阻器的阻值小。
  11. 如权利要求10所述的显示基板，其中所述像素单元阵列中的第N行像素单元中的电阻器的阻值为(K-N+1)R/K，其中K为像素单元阵列的总行数，R为单根数据线的电阻。
  12. 一种显示设备，包括如前述权利要求5-11中任一项所述的显示基板。
  13. 一种用于驱动像素单元中的像素电极的方法，其中所述像素单元包括像素电极和像素驱动电路，所述像素驱动电路包括开关模块和补偿模块，所述方法包括：
    在第一信号线的控制下，所述补偿模块接收所述第一信号线提供的第一电压，并存储与第一电压相关的补偿电压；
    在第二信号线的控制下，所述补偿模块将所述补偿电压和数据线提供的数据电压提供给开关模块，所述开关模块将所述补偿电压和所述数据电压提供给像素电极。
  14. 如权利要求13所述的方法，其中所述补偿模块包括第一开关晶体管、第二开关晶体管以及电容器，所述开关模块包括第三开关晶体管，第一开关晶体管的第一端连接至数据线、第二端连接至第二开关晶体管的第一端，第二开关晶体管的第二端连接至电容器的第二端，电容器的第一端连接至第三开关晶体管的第一端，第三开关晶体管的第二端连接至像素电极，所述方法包括：
    第一信号线向第二开关晶体管的控制端和电容器的第一端施加所述第一电压，所述电容器存储所述补偿电压；以及
    第二信号线向第一开关晶体管和第三开关晶体管的控制端施加第二电压，使得第一开关晶体管和第三开关晶体管导通，电容器的第二 端接收数据线提供的数据电压，向像素电极提供补偿电压和数据电压。
  15. 如权利要求14所述的方法，其中所述第一电压和第二电压均是脉冲电压，且第二电压的脉冲延迟于第一电压的脉冲。
  16. 如权利要求15所述的方法，其中所述第一信号线和第二信号线分别是像素单元所属的显示设备中的相邻的两条栅线。
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