WO2018040405A1 - 一种液晶显示器的栅极开启电压产生装置 - Google Patents

一种液晶显示器的栅极开启电压产生装置 Download PDF

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WO2018040405A1
WO2018040405A1 PCT/CN2016/111513 CN2016111513W WO2018040405A1 WO 2018040405 A1 WO2018040405 A1 WO 2018040405A1 CN 2016111513 W CN2016111513 W CN 2016111513W WO 2018040405 A1 WO2018040405 A1 WO 2018040405A1
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voltage
gate
signal
thin film
liquid crystal
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PCT/CN2016/111513
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English (en)
French (fr)
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黄笑宇
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深圳市华星光电技术有限公司
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Priority to US15/327,320 priority Critical patent/US10621928B2/en
Publication of WO2018040405A1 publication Critical patent/WO2018040405A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits

Definitions

  • the invention belongs to the technical field of display driving, and particularly relates to a gate turn-on voltage generating device for a liquid crystal display.
  • TFT LCD Thin Film Transistor Liquid Crystal Display
  • the main driving principle of the TFT LCD is that the system motherboard connects the R/G/B compression signal, the control signal and the power through the wire connector to the connector connector on the PCB board, and the data passes through the timing controller chip on the PCB board (Timing Controller, After TCON) processing, the PCB, the source-chip on-chip (S-COF), and the gate-carrying film (G-COF) are connected to the display area on the display panel, thereby The LCD obtains the required power and signal, as shown in Figure 1.
  • the gate turn-on voltage VGH needs to be supplied to the G-COF.
  • the gate-on voltage VGH cannot be changed after the design is completed. If there is a need for a change in the gate-on voltage VGH, it needs to be implemented by externally sinking the voltage or changing the design.
  • One of the technical problems to be solved by the present invention is to provide a solution capable of changing the value of the gate-on voltage.
  • an embodiment of the present application provides a gate turn-on voltage generating device for a liquid crystal display, which is disposed in a fan-out area of a liquid crystal display array substrate, including a voltage setting unit and an option.
  • a pass unit a voltage setting unit that receives a gate voltage signal from a drive control circuit to generate a gate turn-on voltage having different voltage values; a gating unit connected to the voltage setting unit to receive the different voltages a gate-on voltage of the value, receiving a strobe signal from the drive control circuit, and outputting a corresponding gate-on voltage according to the strobe signal;
  • the drive control circuit is disposed on the printed circuit board, and the printed circuit board passes The flexible circuit board is connected to the array substrate of the liquid crystal display.
  • the strobe signal comprises a plurality of switching signals.
  • the gating unit comprises a switch matrix composed of a plurality of switching elements.
  • the switching element comprises a P-type thin film transistor and an N-type thin film transistor.
  • the gates of the thin film transistors located in one row of the switch matrix receive the same switching signal, which are turned on or off under the control of the switching signal; the sources of the thin film transistors located in one column of the switch matrix The pole and the drain are connected in series in the set order, and when the thin film transistors in one column are turned on, the corresponding gate turn-on voltage is output.
  • the sources of the thin film transistors located in the last row of the switch matrix are coupled together, and the switch matrix outputs only one gate turn-on voltage according to the control of the switching amount signal at any time.
  • the serial order of the thin film transistors located in one column of the switch matrix is determined according to the level state of the switching signal.
  • the voltage setting unit includes a resistance matrix, and different gate voltages in the resistor matrix are used to generate gate turn-on voltages having different voltage values according to the received gate voltage signal.
  • the gate voltage signal is greater than or equal to a maximum value of a required gate turn-on voltage of the array substrate.
  • the resistance matrix comprises a plurality of resistors connected in series between the gate voltage signal and a signal ground on the array substrate, and a node between any two resistors including the gate voltage signal The voltage acts as the gate turn-on voltage.
  • the gate opening voltage can be adjusted, the versatility of the liquid crystal display device design is enhanced, and the product development efficiency is improved.
  • FIG. 1 is a schematic diagram of a driving structure of a thin film transistor liquid crystal display in the prior art
  • FIG. 2 is a schematic structural diagram of a gate turn-on voltage generating device of a liquid crystal display according to an embodiment of the invention
  • FIG. 3 is a schematic diagram showing a relationship between a gate-on voltage generating device of a liquid crystal display and an existing liquid crystal display architecture according to an embodiment of the invention
  • FIG. 4 is a schematic structural diagram of a gate turn-on voltage generating device of a liquid crystal display according to another embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a gate turn-on voltage generating device of a liquid crystal display according to an embodiment of the present invention. As shown, the device mainly includes a voltage setting unit 21 and a gating unit 22.
  • the gate-on voltage generating device is disposed in a fan-out area of the liquid crystal display array substrate, and the gate voltage signal VGH generated on the main printed circuit board (PCB) of the system is transmitted to the fan-out area of the array substrate via a flexible circuit board (COF).
  • PCB main printed circuit board
  • COF flexible circuit board
  • the voltage setting unit 21 receives the gate voltage signal VGH emitted from the drive control circuit to generate gate turn-on voltages having different voltage values.
  • the gate unit 22 is connected to the voltage setting unit 21, receives the gate turn-on voltages having different voltage values output by the voltage setting unit 21, receives the strobe signal sent by the drive control circuit, and outputs the corresponding gate according to the strobe signal.
  • the pole turns on the voltage.
  • the voltage setting unit 21 has a plurality of outputs, one for each output.
  • the gate turn-on voltage, the gate unit 22 has a plurality of inputs for respectively outputting the gate turn-on voltages it receives.
  • the strobe signal may be comprised of a plurality of binary signals. If the high level and low level of the voltage represent two different states of the binary signal, respectively, the drive control circuit can be used to generate a plurality of high and low level signals to control the output of the gate open voltage having different voltage values. Finally, the purpose of changing the gate-on voltage is achieved, and the versatility of the liquid crystal display is enhanced.
  • the gating unit 22 may be in the form of a switch matrix composed of a plurality of switching elements. When a plurality of interconnected switching elements in the switch matrix are simultaneously turned on, they together form a transmission path, which can correspond to A gate turn-on voltage having a different voltage value is output.
  • the switching elements constituting the switch matrix may be a P-type thin film transistor and an N-type thin film transistor, and a plurality of P-type thin film transistors and N-type thin film transistors are formed in a fan-out region thereof by using an Array process of the array substrate. .
  • a plurality of interconnected P-type thin film transistors and/or N-type thin film transistors are simultaneously turned on, they together form a transmission path, which can output a gate-on voltage having a different voltage value.
  • the voltage setting unit 21 may be composed of a resistance matrix that generates gate-on voltages having different voltage values using different voltage dividing nodes in the resistance matrix according to the received gate voltage signal VGH.
  • the resistor matrix can be formed in the fan-out region by using the Array process of the array substrate. The details will be described below in conjunction with another embodiment.
  • the voltage setting unit of the gate turn-on voltage generating device includes four voltage dividing resistors, respectively No. 1 resistor R1, No. 2 resistor R2, No. 3 resistor R3 and No. 4 resistor R4.
  • the gate unit of the gate-on voltage generating device includes: a first NMOS transistor T1, a second NMOS transistor T2, a third PMOS transistor T3, a fourth NMOS transistor T4, a fifth NMOS transistor T5, and a sixth PMOS transistor.
  • T6 No. 7 PMOS tube T7 and No. 8 PMOS tube T8.
  • connection relationship between the components is:
  • One end of the first resistor R1 is connected to the drain of the first NMOS transistor T1, and serves as a voltage input terminal of the gate turn-on voltage generating device.
  • the other end of the first resistor R1, one end of the second resistor R2 is connected to the source of the third PMOS transistor T3.
  • the other end of the second resistor R2, one end of the third resistor R3 is connected to the drain of the fifth NMOS transistor T5.
  • the other end of the third resistor R3, one end of the fourth resistor R4 is connected to the source of the seventh PMOS transistor T7.
  • the other end of the fourth resistor R4 is connected to the signal ground GND.
  • the gate of the first NMOS transistor T1, the gate of the third PMOS transistor T3, the gate of the fifth NMOS transistor T5, and the gate of the seventh PMOS transistor T7 are connected as a gate signal of the gate turn-on voltage generating device.
  • the gate of the second NMOS transistor T2, the gate of the fourth NMOS transistor T4, the gate of the sixth PMOS transistor T6, and the gate of the eighth PMOS transistor T8 are connected, and serve as another selective communication of the gate turn-on voltage generating device.
  • the source of the first NMOS transistor T1 is connected to the drain of the second NMOS transistor T2.
  • the drain of the third PMOS transistor T3 is connected to the drain of the fourth NMOS transistor T4.
  • the source of the fifth NMOS transistor T5 is connected to the source of the sixth PMOS transistor T6.
  • the drain of the seventh PMOS transistor T7 is connected to the source of the eighth PMOS transistor T8.
  • the source of the second NMOS transistor T2, the drain of the fourth NMOS transistor T4, the drain of the sixth PMOS transistor T6, and the drain of the eighth PMOS transistor T8 are connected as a voltage output terminal of the gate turn-on voltage generating device.
  • the serial connection order of the above transistors can be determined based on the level state (set state) of the switching amount signals B1 and B2.
  • Each resistor forms a series voltage division on the gate voltage signal VGH, and the node voltage between any two resistors including the gate voltage signal VGH is V0, V1, V2, and V3, respectively, and can be adjusted by setting B1 and B2. Determine, limit the resistance of the voltage divider resistor, and change the gate turn-on voltage. Specifically,
  • the gate voltage signal VGH output by the driving control circuit is greater than or equal to a maximum value of the gate turn-on voltage required for the array substrate, for example, 33V.
  • the switching amounts B1 and B2 of the strobe signal are adjusted accordingly to obtain the gate turn-on voltage actually required by the panel.
  • different gate turn-on voltages can be obtained according to different strobe signals. Therefore, in practical applications, the output of the gate turn-on voltage can be changed by changing the level of the voltage strobe signal, and finally The purpose of changing the gate turn-on voltage is achieved, and the versatility of the liquid crystal display is enhanced.
  • the invention is suitable for application in the design of a thin film transistor liquid crystal display driving architecture, and can significantly provide efficiency in product development.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Optics & Photonics (AREA)
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  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)

Abstract

一种液晶显示器的栅极开启电压产生装置，设置于液晶显示器阵列基板的扇出区域，包括电压设定单元（21），接收驱动控制电路发出的栅极电压信号（VGH），生成具有不同电压值的栅极开启电压；选通单元（22），根据驱动控制电路发出的选通信号输出对应的栅极开启电压。该装置实现了栅极开启电压的可调节，提高了产品开发效率。

Description

一种液晶显示器的栅极开启电压产生装置
相关申请的交叉引用
本申请要求享有2016年08月31日提交的名称为“一种液晶显示器的栅极开启电压产生装置”的中国专利申请CN201610791415.4的优先权，该申请的全部内容通过引用并入本文中。
技术领域
本发明属于显示器驱动技术领域，尤其涉及一种液晶显示器的栅极开启电压产生装置。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display，TFT LCD)是当前平板显示的主要品种之一，已经成为了现代IT、视讯产品中重要的显示平台。
TFT LCD的主要驱动原理为，系统主板将R/G/B压缩信号、控制信号及动力通过线材与PCB板上的连接器connector相连接，数据经过PCB板上的时序控制器芯片(Timing Controller，TCON)处理后，经PCB板、源极驱动电路(Source-Chip on Film，S-COF)和栅极驱动电路(Gate-Chip on Film，G-COF)与显示面板上显示区连接，从而使得LCD获得所需的电源和信号，如图1所示。
为实现栅极开启，需要给G-COF提供栅极开启电压VGH。但是在现有技术中，栅极开启电压VGH在设计完成后就无法变更。如果后续有对栅极开启电压VGH变更的需要，则需要通过外灌电压或变更设计方案的方式实现。
因此，亟需一种能够变更栅极开启电压的数值的方案以解决上述问题。
发明内容
本发明所要解决的技术问题之一是需要提供一种能够变更栅极开启电压的数值的方案。
为了解决上述技术问题，本申请的实施例提供了一种液晶显示器的栅极开启电压产生装置，设置于液晶显示器阵列基板的扇出区域，包括电压设定单元与选 通单元：电压设定单元，接收驱动控制电路发出的栅极电压信号，生成具有不同电压值的栅极开启电压；选通单元，与所述电压设定单元相连接，接收所述具有不同电压值的栅极开启电压，同时接收驱动控制电路发出的选通信号，根据所述选通信号输出对应的栅极开启电压；所述驱动控制电路设置在印刷电路板上，所述印刷电路板通过柔性电路板与液晶显示器的阵列基板相连接。
优选地，所述选通信号包括多个开关量信号。
优选地，所述选通单元包括由多个开关元件组成的开关矩阵。
优选地，所述开关元件包括P型薄膜晶体管和N型薄膜晶体管。
优选地，位于所述开关矩阵的一行的各薄膜晶体管的栅极接收同一个开关量信号，在所述开关量信号的控制下开启或关闭；位于所述开关矩阵的一列的各薄膜晶体管的源极和漏极按照设定的顺序依次串接，当位于一列的各薄膜晶体管均开启后，输出对应的栅极开启电压。
优选地，位于所述开关矩阵的最末一行的各薄膜晶体管的源极耦接在一起，所述开关矩阵在任一时刻根据所述开关量信号的控制仅输出一个栅极开启电压。
优选地，根据所述开关量信号的电平状态确定位于所述开关矩阵的一列的各薄膜晶体管的串接顺序。
优选地，所述电压设定单元包括电阻矩阵，根据接收到的栅极电压信号，利用所述电阻矩阵中的不同分压节点生成具有不同电压值的栅极开启电压。
优选地，所述栅极电压信号大于或等于阵列基板所需栅极开启电压的最大值。
优选地，所述电阻矩阵包括串接于所述栅极电压信号与阵列基板上的信号地之间的多个电阻，将包括所述栅极电压信号在内的任意两个电阻之间的节点电压作为栅极开启电压。
与现有技术相比，上述方案中的一个或多个实施例可以具有如下优点或有益效果：
通过在液晶显示器阵列基板的扇出区域设置电压设定单元与选通单元，实现了栅极开启电压的可调节，增强了液晶显示设备设计的通用性，提高产品开发效率。
本发明的其他优点、目标，和特征在某种程度上将在随后的说明书中进行阐述，并且在某种程度上，基于对下文的考察研究对本领域技术人员而言将是显而易见的，或者可以从本发明的实践中得到教导。本发明的目标和其他优点 可以通过下面的说明书，权利要求书，以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本申请的技术方案或现有技术的进一步理解，并且构成说明书的一部分。其中，表达本申请实施例的附图与本申请的实施例一起用于解释本申请的技术方案，但并不构成对本申请技术方案的限制。
图1为现有技术中薄膜晶体管液晶显示器的驱动架构示意图；
图2为根据本发明一实施例的液晶显示器的栅极开启电压产生装置的结构示意图；
图3为根据本发明一实施例的液晶显示器的栅极开启电压产生装置与现有的液晶显示器架构之间的关系示意图；
图4为根据本发明另一实施例的液晶显示器的栅极开启电压产生装置的结构示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成相应技术效果的实现过程能充分理解并据以实施。本申请实施例以及实施例中的各个特征，在不相冲突前提下可以相互结合，所形成的技术方案均在本发明的保护范围之内。
图2为根据本发明一实施例的液晶显示器的栅极开启电压产生装置的结构示意图，如图所示，该装置主要包括电压设定单元21和选通单元22。
该栅极开启电压产生装置设置在液晶显示器阵列基板的扇出区域，系统的主印刷电路板(PCB)上产生的栅极电压信号VGH经由柔性电路板(COF)传输至阵列基板的扇出区域，上述架构之间的关系如图3所示。
进一步地，电压设定单元21接收驱动控制电路发出的栅极电压信号VGH，生成具有不同电压值的栅极开启电压。
选通单元22与电压设定单元21相连接，接收电压设定单元21输出的具有不同电压值的栅极开启电压，同时接收驱动控制电路发出的选通信号，根据选通信号输出对应的栅极开启电压。
从图中可以看出，电压设定单元21具有多个输出端，每个输出端对应一个 栅极开启电压，选通单元22具有多个输入端，分别用于各自输出其接收到的栅极开启电压。
在本发明的一个实施例中，选通信号可以由多个开关量信号组成。如果用电压的高电平和低电平分别表示开关量信号的两个不同的状态，则可以利用驱动控制电路产生多个高低电平信号以控制具有不同电压值的栅极开启电压的输出。最终达到栅极开启电压变更的目的，增强液晶显示器的通用性。
在本发明的一个实施例中，选通单元22可以由多个开关元件组成开关矩阵的形式，当开关矩阵中的多个相互连接的开关元件同时开启时，它们共同形成一个传输通路，可以对应输出一个具有不同电压值的栅极开启电压。
在本发明的一个实施例中，组成开关矩阵的开关元件可以为P型薄膜晶体管和N型薄膜晶体管，利用阵列基板的Array制程在其扇出区域形成多个P型薄膜晶体管和N型薄膜晶体管。当多个互相连接的P型薄膜晶体管和/或N型薄膜晶体管同时开启时，它们共同形成一个传输通路，可以对应输出一个具有不同电压值的栅极开启电压。
在本发明的一个实施例中，电压设定单元21可以由电阻矩阵组成，根据接收到的栅极电压信号VGH，利用电阻矩阵中的不同分压节点生成具有不同电压值的栅极开启电压。电阻矩阵可以利用阵列基板的Array制程在其扇出区域制作形成。下面结合另一实施例进行详细说明。
图4为根据本发明另一实施例的液晶显示器的栅极开启电压产生装置的结构示意图，如图所示，该栅极开启电压产生装置的电压设定单元包括四个分压电阻，分别为一号电阻R1、二号电阻R2、三号电阻R3和四号电阻R4。
进一步地，该栅极开启电压产生装置的选通单元包括，一号NMOS管T1、二号NMOS管T2、三号PMOS管T3、四号NMOS管T4、五号NMOS管T5、六号PMOS管T6、七号PMOS管T7和八号PMOS管T8。
各元件之间的连接关系为：
一号电阻R1的一端和一号NMOS管T1的漏极相连，并作为栅极开启电压产生装置的电压输入端。
一号电阻R1的另一端、二号电阻R2的一端和三号PMOS管T3的源极相连。
二号电阻R2的另一端、三号电阻R3的一端和五号NMOS管T5的漏极相连。
三号电阻R3的另一端、四号电阻R4的一端和七号PMOS管T7的源极相连。
四号电阻R4的另一端接信号地GND。
一号NMOS管T1的栅极、三号PMOS管T3的栅极、五号NMOS管T5的栅极和七号PMOS管T7的栅极相连，并作为栅极开启电压产生装置的一个选通信号的开关量B1的输入端。
二号NMOS管T2的栅极、四号NMOS管T4的栅极、六号PMOS管T6的栅极和八号PMOS管T8的栅极相连，并作为栅极开启电压产生装置的另一个选通信号的开关量B2的输入端。
一号NMOS管T1的源极和二号NMOS管T2的漏极相连。
三号PMOS管T3的漏极和四号NMOS管T4的漏极相连。
五号NMOS管T5的源极和六号PMOS管T6的源极相连。
七号PMOS管T7的漏极和八号PMOS管T8的源极相连。
二号NMOS管T2的源极、四号NMOS管T4的漏极、六号PMOS管T6的漏极和八号PMOS管T8的漏极相连，并作为栅极开启电压产生装置的电压输出端。
上述各晶体管的串接顺序可以根据开关量信号B1和B2的电平状态(设定的状态)来确定。
各电阻对栅极电压信号VGH形成串联分压，设包括栅极电压信号VGH在内的任意两个电阻之间的节点电压分别为V0、V1、V2、V3，可以通过调整B1、B2的设定，限制分压电阻的阻值，进行栅极开启电压的变更，具体的，
当调整开关量B1和B2均为高电平时，输出栅极开启电压V0为：
V0＝VGH  (1)
当调整开关量B1为低电平，B2为高电平时，输出栅极开启电压V1为：
Figure PCTCN2016111513-appb-000001
当调整开关量B1为高电平，B2为低电平时，输出栅极开启电压V2为：
Figure PCTCN2016111513-appb-000002
当调整开关量B1和B2均为低电平时，输出栅极开启电压V3为：
Figure PCTCN2016111513-appb-000003
进一步地，驱动控制电路输出的栅极电压信号VGH大于或等于阵列基板所需栅极开启电压的最大值，例如33V。
实际应用时，可根据一号电阻R1、二号电阻R2、三号电阻R3和四号电阻R4的比例，将输出栅极开启电压分别设定为V0＝33V、V1＝30V、V2＝27V、V3＝24V。再根据实际产品的需求，对应调整选通信号的开关量B1和B2进行设定，获得面板实际所需的栅极开启电压。
在本发明实施例中，能够根据不同的选通信号获得不同的栅极开启电压，因此，在实际应用时，就能够通过改变电压选通信号的电平来改变栅极开启电压的输出，最终达到变更栅极开启电压的目的，增强了液晶显示器的通用性。
本发明适于应用在薄膜晶体管液晶显示器驱动架构的设计中，可以显著地提供啊产品开发的效率。
虽然本发明所揭露的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所揭露的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (11)

  1. 一种液晶显示器的栅极开启电压产生装置，设置于液晶显示器阵列基板的扇出区域，包括电压设定单元与选通单元：
    电压设定单元，接收驱动控制电路发出的栅极电压信号，生成具有不同电压值的栅极开启电压；
    选通单元，与所述电压设定单元相连接，接收所述具有不同电压值的栅极开启电压，同时接收驱动控制电路发出的选通信号，根据所述选通信号输出对应的栅极开启电压；
    所述驱动控制电路设置在印刷电路板上，所述印刷电路板通过柔性电路板与液晶显示器的阵列基板相连接。
  2. 根据权利要求1所述的装置，其中，所述选通信号包括多个开关量信号。
  3. 根据权利要求2所述的装置，其中，所述选通单元包括由多个开关元件组成的开关矩阵。
  4. 根据权利要求3所述的装置，其中，所述开关元件包括P型薄膜晶体管和N型薄膜晶体管。
  5. 根据权利要求4所述的装置，其中，
    位于所述开关矩阵的一行的各薄膜晶体管的栅极接收同一个开关量信号，在所述开关量信号的控制下开启或关闭；
    位于所述开关矩阵的一列的各薄膜晶体管的源极和漏极按照设定的顺序依次串接，当位于一列的各薄膜晶体管均开启后，输出对应的栅极开启电压。
  6. 根据权利要求5所述的装置，其中，位于所述开关矩阵的最末一行的各薄膜晶体管的源极耦接在一起，所述开关矩阵在任一时刻根据所述开关量信号的控制仅输出一个栅极开启电压。
  7. 根据权利要求6所述的装置，其中，根据所述开关量信号的电平状态确定位于所述开关矩阵的一列的各薄膜晶体管的串接顺序。
  8. 根据权利要求1所述的装置，其中，所述电压设定单元包括电阻矩阵，根据接收到的栅极电压信号，利用所述电阻矩阵中的不同分压节点生成具有不同电压值的栅极开启电压。
  9. 根据权利要求8所述的装置，其中，所述栅极电压信号大于或等于阵列基板所需栅极开启电压的最大值。
  10. 根据权利要求9所述的装置，其中，所述栅极电压信号为33V。
  11. 根据权利要求9所述的装置，其中，所述电阻矩阵包括串接于所述栅极电压信号与阵列基板上的信号地之间的多个电阻，将包括所述栅极电压信号在内的任意两个电阻之间的节点电压作为栅极开启电压。
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