WO2018035688A1 - Pi膜制备的多层石墨烯量子碳基半导体材料及其制备方法 - Google Patents

Pi膜制备的多层石墨烯量子碳基半导体材料及其制备方法 Download PDF

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WO2018035688A1
WO2018035688A1 PCT/CN2016/096271 CN2016096271W WO2018035688A1 WO 2018035688 A1 WO2018035688 A1 WO 2018035688A1 CN 2016096271 W CN2016096271 W CN 2016096271W WO 2018035688 A1 WO2018035688 A1 WO 2018035688A1
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temperature
carbon
semiconductor material
graphene quantum
atom
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刘萍
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深圳丹邦科技股份有限公司
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Priority to PCT/CN2016/096271 priority Critical patent/WO2018035688A1/zh
Publication of WO2018035688A1 publication Critical patent/WO2018035688A1/zh
Priority to US16/282,314 priority patent/US10797136B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1606Graphene
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    • C01B32/00Carbon; Compounds thereof
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    • C01B32/182Graphene
    • C01B32/184Preparation
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material

Definitions

  • the present invention relates to the field of graphene semiconductor materials, and in particular to a method for preparing a multilayer graphene quantum carbon-based two-dimensional semiconductor material.
  • Two-dimensional nano-carbon materials especially graphene quantum carbon-based semiconductor materials, have attracted more and more attention, and have excellent electrical, optical, magnetic, thermal and mechanical properties, and are ideal nanoelectronic and optical electronic materials.
  • the graphene quantum carbon-based semiconductor material has a special geometry, so that the electronic state near the Fermi sub-surface is mainly extended ⁇ state. Since there is no surface dangling bond, the surface nano-carbon structure defect has little effect on the scattering of the extended ⁇ state.
  • the mobility of electrons and holes in multilayer graphene at room temperature is extremely high, both greater than 100,000 cm 2 ⁇ VS, exceeding the electron mobility of the best silicon-based field effect transistor.
  • 1000cm 2 ⁇ VS graphene can obtain a semiconductor transistor by controlling its structure.
  • the electron energy is insufficient to excite the optical phonons in the graphite, but the interaction with the acoustic phonons in the graphene Very weak, its mean free path can be as long as several micrometers, making the carrier exhibit perfect ballistic transport characteristics in a typical graphene device of several hundred nanometers long.
  • the electronic device based on graphene structure can have very good height.
  • the frequency response is expected to exceed the terahertz (THz) operating frequency of the ballistic transport transistor and is superior to all silicon-based semiconductor materials.
  • THz terahertz
  • Graphene exhibits excellent performance and attractive application prospects in field effect transistor (TET) applications due to its ultra-thin structure and excellent physical properties.
  • TET field effect transistor
  • the band gap of graphene is zero, it means that logic circuits cannot be fabricated, which is a major difficulty and challenge for the application of graphene in devices such as transistors.
  • Graphene is prepared from natural graphite ore by epitaxial growth method, graphite oxide reduction method, CVD method, stripping and re-embedding method, and organic synthesis method. According to reports in the literature, the band gap is only 0.03 eV and the area is smaller than the above method. 1 inch is simply not industrialized.
  • the present invention provides a method for preparing a multilayer graphene quantum carbon-based two-dimensional semiconductor material, and forms a flexible multilayer graphene quantum carbon-based two-dimensional semiconductor material with controllable band gap, and can be large Area, low cost, high volume, roll to roll continuous production.
  • the invention provides a method for preparing a multilayer graphene quantum carbon-based semiconductor material, comprising the following steps: S1. using a polyimide film (PI film) as a raw material, performing polymer sintering at a first temperature to remove H And O, N atoms, forming a microcrystalline carbon precursor; S2. adjusting to a second temperature, the carbon precursor is graphitized to form a multilayer graphene quantum carbon-based two-dimensional semiconductor material; wherein, at least In the step S2, doping of the nano metal material is performed to form quantum dots in the multilayer graphene.
  • PI film polyimide film
  • the first temperature is divided into three stages, the temperature at which the H atom is removed is 900 ° C to 1100 ° C, the temperature at which the O atom is removed is 1800 ° C to 2200 ° C, and the temperature at which the N atom is removed is 2700 ° C to 3300 ° C.
  • the first temperature is divided into three stages, the temperature at which the H atom is removed is 1000 ° C, the temperature at which the O atom is removed is 2000 ° C, and the temperature at which the N atom is removed is 3000 ° C.
  • the second temperature is from 2000 ° C to 3500 ° C.
  • the second temperature is divided into two stages, the first stage temperature is from 2000 ° C to 2500 ° C, and the second stage temperature is from 2500 ° C to 3500 ° C.
  • the doped nano metal material comprises calcium (Ca), strontium (Sb), niobium (Nb), yttrium (Y), molybdenum (Mo), silicon (Si), arsenic (As), indium (In), An alloy of at least one of at least one of hafnium (Hf) and gallium (Ga); and a particle size of the nanometal material of between 2 and 5 nm.
  • the doped nanometal material is InAs, forming a multilayer graphene quantum carbon-based two-dimensional semiconductor material having InAs quantum dots.
  • the present invention also provides a multilayer graphene quantum carbon-based two-dimensional semiconductor material prepared by the above-described preparation method.
  • the beneficial effects of the present invention include: preparing a flexible graphene morphology structure having a hexagonal planar network molecular structure and orderly arrangement by PI film carbonization and graphitization, the structure having large curvature, in-plane dispersion and very small degree of deviation. Through the doping of nano metal materials, quantum dots are formed to realize the opening and regulation of the band gap.
  • the preparation method can also satisfy large-area, low-cost, large-volume, roll-to-roll continuous production.
  • the multilayer graphene quantum carbon-based two-dimensional semiconductor material prepared by the method can be applied to materials such as high-performance field effect transistors and quantum computing chip semiconductors.
  • a method for preparing a multilayer graphene quantum carbon-based two-dimensional semiconductor material comprises the following steps: S1. using a PI film as a raw material, performing polymer sintering at a first temperature to remove H, O, N atoms, forming a microcrystalline carbon precursor; S2. adjusting to a second temperature, the carbon precursor is graphitized to form a multilayer graphene quantum carbon-based two-dimensional semiconductor material; wherein, at least In the step S2, doping of the nano metal material is performed to form quantum dots in the multilayer graphene.
  • the PI film is a novel transparent polyimide film prepared in the prior art CN103289402A.
  • the PI film is obtained by hybridizing an aromatic diamine and an aromatic polyanhydride, introducing a methyl group to obtain a polyimide, and performing cyclization dehydration, polycondensation, and imidization.
  • the film is excellent in orientation and has high birefringence characteristics, and the thickness expansion in the direction of carbonization and graphitization is small, and the amount of change in the surface direction length is also small, so that the tendency disorder is reduced, the linear orientation is improved, and the strength is also improved. It is not easy to cause cracking, and it can be heated and pressurized without damage.
  • the PI film is carbonized by polymer sintering to remove H, O, and N atoms, so that the heat treatment of the polymer is close to the temperature of the single crystal graphite, and the C atoms are rearranged to form a microcrystalline state of the aromatic heterocyclic compound having a large continuous area, and finally formed.
  • a microcrystalline carbon precursor having an excellent artificial heterogeneous graphite structure the carbon precursor achieving planar characteristics.
  • the carbon precursor is graphitized and the carbon structure is recombined.
  • the carbon atoms at the microcrystalline edge accelerate the movement through high temperature acceleration, and the microcrystalline states bond with each other to form macromolecules.
  • the hexagonal mesh structure is combined and crystallized, and the hexagonal carbon network layer is formed. And gradually grow, from one axis to two axes, to produce a flexible graphene morphology structure with large tortuosity, in-plane dispersion and degree of deviation, and can be bent.
  • the polymer is sintered and carbonized, the temperature at which the H atom is removed is 900 ° C to 1100 ° C, the temperature at which the O atom is removed is 1800 ° C to 2200 ° C, and the temperature at which the N atom is removed is 2700 ° C to 3300 ° C. .
  • the polymer is sintered and carbonized, the temperature at which the H atom is removed is 1000 ° C, the temperature at which the O atom is removed is 2000 ° C, and the temperature at which the N atom is removed is 3000 ° C.
  • the temperature at which graphitization is carried out is from 2000 ° C to 3500 ° C.
  • the graphitization is carried out in two stages, the first stage reaction temperature being from 2000 ° C to 2500 ° C and the second stage reaction temperature being from 2500 ° C to 3500 ° C.
  • the graphitization is carried out at 1.4 x 10 -8 - 1.8 x 10 -8 mm Hg, more preferably at 1.6 x 10 -8 mm Hg.
  • the highest peak of the crystal structure of the PI film after carbonization and graphitization is located at the right side of 1582.6 cm -1 ; the second peak is a 2D bimodal structure at 2719.8 cm -1 ; the D peak at the right of the G peak is 1363 cm -1 is small. There are few structural defects.
  • the multilayer graphene morphology is a two-dimensional crystal in which the atoms follow a regular hexagonal lattice pattern in which the hexagonal structure is arranged in an orderly manner, each carbon atom is joined by three carbon atoms, and four shell electrons are chemically combined. There is a state in which electrons move freely, and free electrons can move along the crystal lattice. Therefore, graphene has a high conductivity in the plane direction.
  • nano-metal materials are simultaneously doped to form quantum dots, and two-dimensional multilayer graphene quantum carbon groups are prepared to realize the opening and regulation of graphene band gap.
  • the nano-transition metal is covalently bonded to graphene.
  • the electron cloud overlaps it has a conjugated system (delocalized ⁇ bond).
  • the electrons share the electron logarithm between the two atoms.
  • the electrons cross the nano-barrier to form the Fermi electron sea. Electrons move from a quantum well through a quantum barrier into another quantum well, forming quantum tunneling, structural effects, and quantum confinement effects.
  • the doped nanometal material comprises an alloy of at least one of at least one of Ca, Sb, Nb, Y, Mo, Si, As, In, Hf, Ga.
  • the doped nanometal material is InAs, a multilayer graphene quantum carbon-based two-dimensional semiconductor material having InAs quantum dots formed.
  • the PI film is carbonized by polymer sintering, and the H, O, and N atoms are removed at 1000 ° C, 2000 ° C, and 3000 ° C, respectively, and the C atoms are rearranged to form a carbon precursor; the carbon precursor is inert.
  • graphitization is carried out at 2800 ° C, and a hexagonal mesh structure is started to form a high-purity single crystal graphene structure.
  • the two-dimensional carbon layer is hexagonal densely packed, and has planar network molecules arranged in an order.
  • the InAs nano-metal material is doped to form quantum dots, and a multi-layer graphene quantum carbon-based two-dimensional semiconductor material is prepared, and the quantum dot density is 1 ⁇ 10 10 -3 ⁇ 10 10 cm -2 .
  • the band gap width is 1.3-1.4 ev.
  • the doped nano metal material is a mixture of InAs and Sb, and the quantum dot density is 1.2 ⁇ 10 12 cm -2 .
  • the Sb element is added to the InAs to form the InSb x As 1-x quantum dot.
  • the band gap width can be adjusted.
  • the difference from the first embodiment or the second embodiment is that the PI film is carbonized by polymer sintering, and the H, O, and N atoms are removed at 500 ° C, 600 ° C, and 800 ° C, respectively, and the multilayer graphene quantum carbon group cannot be formed.
  • Two Dimensional semiconductor materials Two Dimensional semiconductor materials.

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Abstract

提供一种多层石墨烯量子碳基二维半导体材料及其制备方法,制备方法包括:S1.以PI膜为原料,在第一温度下进行高分子烧结,脱除H、O、N原子,形成碳素前驱体;S2.调整至第二温度,所述碳素前驱体进行石墨化,形成多层石墨烯量子碳基二维半导体材料;其中,至少在所述步骤S2中,进行纳米金属材料的掺杂,以在所述多层石墨烯中形成量子点。经该方法制备的多层石墨烯量子碳基二维半导体材料为六角平面网分子结构,且有序排列,具备柔性,曲折率大、面内分散度和偏差度非常小;通过纳米金属的掺杂形成带隙,且带隙可控;该制备方法能够大面积、低成本、大批量、卷到卷连续生产。

Description

PI膜制备的多层石墨烯量子碳基半导体材料及其制备方法 技术领域
本发明涉及石墨烯半导体材料领域,特别涉及一种多层石墨烯量子碳基二维半导体材料的制备方法。
背景技术
二维纳米碳材料特别是石墨烯量子碳基半导体材料越来越受到人们关注,具有极其优异的电学、光学、磁学、热学和力学性能,是理想的纳米电子和光学电子材料。石墨烯量子碳基半导体材料具有特殊的几何结构,使得费米子面附近的电子态主要为扩展π态,由于没有表面悬挂键,表面纳米碳结构的缺陷,对扩展π态的散射几乎不影响电子在材料中的传输,常温下电子和空穴在多层石墨烯中的迁移率极高,均大于100000cm2·VS,超出最好硅基场效应晶体管的电子迁移率。1000cm2·VS的石墨烯可以通过控制其结构得到半导体性晶体管,在小偏电压的情况下,电子能量不足以激发石墨中的光学声子,但与石墨烯中的声学声子的相互作用又很弱,其平均自由程可长达数微米,使得载流子在典型的几百纳米长的石墨烯器件中呈现完美的弹道输运特征,基于石墨烯结构的电子器件可以有非常好的高频响应,对于弹道输运的晶体管中工作频率有望超过太赫兹(THz),性能优于所有硅基已知的的半导体材料。
石墨烯因其超薄结构以及优异的物理特性,在场效应晶体管(TET)应用上展现出了优异的性能和诱人的应用前景。但由于石墨烯带隙为零,意味着无法制作逻辑电路,成为石墨烯应用于晶体管等器件中的主要困难和挑战。从天然石墨矿中制备石墨烯采用外延生长法、氧化石墨还原法、CVD法剥离再嵌入扩涨法、有机合成法,据文献报道,采用上述方法能打开带隙仅为0.03eV,且面积小于1英寸根本无法进行工业化进程。
发明内容
为解决上述问题,本发明提供一种多层石墨烯量子碳基二维半导体材料的制备方法,形成带隙可控的柔性多层石墨烯量子碳基二维半导体材料,并且能够大 面积、低成本、大批量、卷到卷连续生产。
本发明提供一种多层石墨烯量子碳基半导体材料的制备方法,包括如下步骤:S1.以聚酰亚胺薄膜(PI膜)为原料,在第一温度下进行高分子烧结,脱除H、O、N原子,形成微晶态的碳素前驱体;S2.调整至第二温度,所述碳素前驱体进行石墨化,形成多层石墨烯量子碳基二维半导体材料;其中,至少在所述步骤S2中,进行纳米金属材料的掺杂,以在所述多层石墨烯中形成量子点。
优选地,第一温度分为三段,脱除H原子的温度为900℃-1100℃,脱除O原子的温度为1800℃-2200℃,脱除N原子的温度为2700℃-3300℃。
进一步地优选,第一温度分为三段,脱除H原子的温度为1000℃,脱除O原子的温度为2000℃,脱除N原子的温度为3000℃。
优选地,第二温度为2000℃-3500℃。
进一步优选,第二温度分为两段,第一阶段温度为2000℃-2500℃,第二阶段温度为2500℃-3500℃。
优选地,掺杂的纳米金属材料包括钙(Ca)、锑(Sb)、铌(Nb)、钇(Y)、钼(Mo)、硅(Si)、砷(As)、铟(In)、铪(Hf)、镓(Ga)中的至少一种或至少两种的合金;纳米金属材料的粒径在2-5nm之间。
进一步地优选,掺杂的纳米金属材料为InAs,形成具有InAs量子点的多层石墨烯量子碳基二维半导体材料。
本发明还提供一种多层石墨烯量子碳基二维半导体材料,采用如上所述的制备方法制备得到。
本发明的有益效果包括:通过PI膜碳化和石墨化,制备具有六角平面网分子结构且有序排列的柔性石墨烯形态结构,该结构曲率大、面内分散和偏差度非常小。通过纳米金属材料的掺杂,形成量子点,实现带隙的开启与调控。该制备方法还能满足大面积、低成本、大批量、卷到卷连续生产。
通过该方法制备的多层石墨烯量子碳基二维半导体材料,能够应用于制备高性能场效应晶体管、量子计算芯片半导体等材料。
具体实施方式
以下对本发明的实施方式作详细说明。应该强调的是,下述说明仅仅是示例 性的,而不是为了限制本发明的范围及其应用。
在一种实施例中,一种多层石墨烯量子碳基二维半导体材料的制备方法,包括如下步骤:S1.以PI膜为原料,在第一温度下进行高分子烧结,脱除H、O、N原子,形成微晶态的碳素前驱体;S2.调整至第二温度,所述碳素前驱体进行石墨化,形成多层石墨烯量子碳基二维半导体材料;其中,至少在所述步骤S2中,进行纳米金属材料的掺杂,以在所述多层石墨烯中形成量子点。
在优选的实施例中,PI膜采用的是现有技术CN103289402A中制备的新型透明聚酰亚胺薄膜。该PI膜通过芳香族二元胺和芳香族多酸酐进行相互杂化,并导入甲基制得聚酰亚胺,再进行环化脱水、缩聚、酰亚胺化得到。该薄膜取向性优良,并有着双折射高的特性,在碳化、石墨化时面向的厚度膨胀变小,面方向长度变化量也小,因此趋向性紊乱减少,线取向性提高,强度也提高,不易产生破裂,可以任意加热、加压而无破损。
PI膜经高分子烧结碳化,脱除H、O、N原子,使高分子热处理接近于单结晶石墨的温度,C原子得到重新排列,形成连续区大的芳杂环化合物微晶态,最终形成具有优良人造异源石墨结构的微晶态碳素前驱体,该碳素前躯体实现平面特性。碳素前躯体经石墨化,碳结构重组,微晶态边缘的碳原子经高温加速加剧运动,微晶态互相键合生成大分子,开始六角网眼构造结合并进行结晶配向,六角碳网层面形成并逐渐生长,从一轴转变为二轴,生成曲折率大、面内分散度和偏差度非常小,并可以弯曲的柔性石墨烯形态结构。
在优选的实施例中,高分子烧结碳化,脱除H原子的温度为900℃-1100℃,脱除O原子的温度为1800℃-2200℃,脱除N原子的温度为2700℃-3300℃。
在另一优选的实施例中,高分子烧结碳化,脱除H原子的温度为1000℃,脱除O原子的温度为2000℃,脱除N原子的温度为3000℃。
在优选的实施例中,进行石墨化的温度为2000℃-3500℃。
在另一优选的实施例中,进行石墨化分两阶段,第一阶段反应温度为2000℃-2500℃,第二阶段反应温度为2500℃-3500℃。
在进一步优选的实施例中,石墨化是在1.4×10-8-1.8×10-8mm Hg,更优的是在1.6×10-8mm Hg下进行。
PI膜经碳化和石墨化后组成的晶体结构最高峰G峰位于1582.6cm-1右侧; 次高峰为2D双峰结构,位于2719.8cm-1;G峰右侧的D峰1363cm-1很小,结构缺陷少。多层石墨烯形态是二维结晶,其中,原子遵循六角形构造的规则有秩序进行配置的平面状六角形格子形态,各碳素原子是3个碳原子接合起来,化学结合中4个外壳电子中有一个电子是自由移动的状态,自由电子可以沿结晶格子移动,因此,石墨烯在面方向具有很高的导电率。
在碳化和石墨化的过程中,同时掺杂纳米金属材料,形成量子点,制备二维多层石墨烯量子碳基,实现石墨烯带隙的开启与调控。纳米过渡性金属与石墨烯以共价键连接,电子云重叠时,具有共轭体系(离域π键),两个原子之间共用电子对数,电子越过纳米势垒,形成费米电子海,电子从一个量子阱穿越量子势垒进入另一个量子阱,形成量子隧道效应,结构效应,量子限域效应。
在优选的实施例中,掺杂的纳米金属材料包括Ca、Sb、Nb、Y、Mo、Si、As、In、Hf、Ga中的至少一种或至少两种的合金。
在另一优选的实施例中,掺杂的纳米金属材料为InAs,形成的具有InAs量子点的多层石墨烯量子碳基二维半导体材料。
实施例1
在惰性气体中,PI膜经高分子烧结碳化,分别在1000℃、2000℃和3000℃,脱除H、O、N原子,C原子重排,形成碳素前驱体;碳素前驱体在惰性气体保护下,在2800℃进行石墨化,开始六角网眼构造,生成高纯度单晶石墨烯构造,二维碳层为六方密堆积,具有平面网状分子有序排列。在碳化和石墨化过程中,掺杂InAs纳米金属材料,形成量子点,制得多层石墨烯量子碳基二维半导体材料,量子点密度为1×1010~3×1010cm-2,带隙宽度为1.3-1.4ev。
实施例2
与实施例1的区别在于,掺杂的纳米金属材料为InAs和Sb的混合物,形成的量子点密度为1.2×1012cm-2。通过量子隧道效应,调控在InAs中加入Sb元素,形成InSbxAs1-x量子点,调整含量x时,可调控带隙宽度。
对比实施例1
与实施例一或实施例二的区别在于:PI膜经高分子烧结碳化,分别在500℃、600℃和800℃进行H、O、N原子的脱除,无法形成多层石墨烯量子碳基二 维半导体材料。
以上内容是结合具体/优选的实施方式对本发明所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说,在不脱离本发明构思的前提下,其还可以对这些已描述的实施方式做出若干替代或变型,而这些替代或变型方式都应当视为属于本发明的保护范围。

Claims (10)

  1. 一种多层石墨烯量子碳基二维半导体材料的制备方法,其特征在于,包括如下步骤:
    S1.以PI膜为原料,在第一温度下进行高分子烧结,脱除H、O、N原子,形成微晶态的碳素前驱体;
    S2.调整至第二温度,所述碳素前驱体进行石墨化,形成多层石墨烯量子碳基二维半导体材料;
    其中,至少在所述步骤S2中,进行纳米金属材料的掺杂,以在所述多层石墨烯中形成量子点。
  2. 如权利要求1所述的制备方法,其特征在于,所述第一温度分为三段,脱除H原子的温度为900℃-1100℃,脱除O原子的温度为1800℃-2200℃,脱除N原子的温度为2700℃-3300℃。
  3. 如权利要求2所述的制备方法,其特征在于,所述第一温度分为三段,脱除H原子的温度为1000℃,脱除O原子的温度为2000℃,脱除N原子的温度为3000℃。
  4. 如权利要求1所述的制备方法,其特征在于,所述第二温度为2000℃-3500℃。
  5. 如权利要求4所述的制备方法,其特征在于,所述第二温度分为两段,第一阶段温度为2000℃-2500℃,第二阶段温度为2500℃-3500℃。
  6. 如权利要求1所述的制备方法,其特征在于,所述纳米金属材料包括:Ca、Sb、Nb、Y、Mo、Si、As、In、Hf、Ga中的至少一种或至少两种的合金;纳米金属材料的粒径在2-5nm之间。
  7. 如权利要求6所述的制备方法,其特征在于,所述纳米金属材料为InAs。
  8. 如权利要求1所述的制备方法,其特征在于,所述步骤S1和S2在非氧化性环境中反应。
  9. 如权利要求1所述的制备方法,其特征在于,所述多层石墨烯量子碳基二维半导体材料的层数为2-50层。
  10. 一种多层石墨烯量子碳基二维半导体材料,其特征在于,通过权利要求1-9任一所述的制备方法制备得到。
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