WO2018000868A1

WO2018000868A1 - Electronic product

Info

Publication number: WO2018000868A1
Application number: PCT/CN2017/078335
Authority: WO
Inventors: 范艳辉
Original assignee: 广东欧珀移动通信有限公司
Priority date: 2016-06-28
Filing date: 2017-03-27
Publication date: 2018-01-04
Also published as: CN105916290A

Abstract

An electronic product (10), comprising: a circuit board (2), a capacitor element (3), and a chip (1). The circuit board is provided with a main ground layer and a groove (21) is provided in the surface of said circuit board. The capacitor element is arranged in the groove. The chip is arranged on the circuit board, a grounding pin (11) of the chip being connected first to a pin of the capacitor element and then to the main ground layer.

Description

electronic product

Technical field

The invention relates to the field of electronic products.

Background technique

Some circuits need to pass through the capacitor element to the single-point ground mode of the main ground during wiring. In the layout, we usually connect the wiring to the capacitor element and then connect it to the main ground. In doing so, it is easy to connect the ground line to the other ground between the main ground.

Summary of the invention

The present application is intended to address at least one of the technical problems existing in the prior art. To this end, the present invention aims to provide an electronic product in which the chip ground connection is more reliable.

An electronic product according to an embodiment of the invention includes: a circuit board having a main ground layer, a surface of the circuit board is provided with a groove; a capacitive element, the capacitive element is disposed in the recess; a chip, The chip is disposed on the circuit board, and a ground pin of the chip is connected to a pin of the capacitor element and then connected to the main ground layer.

According to the electronic product of the embodiment of the invention, by placing the capacitor element in the recess, the ground pin of the chip is connected to the main ground layer of the circuit board after connecting the pin of the capacitor element, thereby ensuring that the ground signal of the chip passes through the capacitor first. The component is then placed on the main ground of the board to prevent the ground pin of the chip from being connected to other signals and ground before being connected to the capacitor element, thereby improving the performance of the board.

Specifically, the chip is disposed on the capacitive element. This prevents the ground pin from being too long.

More specifically, the capacitive element is soldered into the recess.

In some embodiments, the electronic product further includes an inductive component disposed within the recess. Thereby, the pulse signal generated by the inductance element can be prevented from radiating interference to the outside.

Specifically, the chip is disposed on the inductance element. Therefore, the interference pulse signal generated by the chip directly enters the inductance component, thereby reducing the radiation interference of the pulse signal to the outside.

Specifically, the inductive component is soldered into the recess.

In some embodiments, the area of the circuit board that is connected to the chip is formed as a copper free area. This ensures that the components of the sensitive part of the chip work properly.

Specifically, the circuit board lays a copper skin on an adjacent layer of the copper-free sheet region.

Specifically, the chip is soldered to the circuit board.

Optionally, the electronic product is a mobile phone.

The additional aspects and advantages of the invention will be set forth in part in the description which follows.

DRAWINGS

The above and/or additional aspects and advantages of the present invention will become apparent and readily understood from

1 is an internal structural view of a side view direction of an electronic product according to an embodiment of the present invention.

Reference mark:

Electronic products 10,

Chip 1, ground pin 11, circuit board 2, recess 21, capacitive element 3, and inductive element 4.

detailed description

The embodiments of the present invention are described in detail below, and the examples of the embodiments are illustrated in the drawings, wherein the same or similar reference numerals are used to refer to the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the drawings are intended to be illustrative of the invention and are not to be construed as limiting.

The electronic product 10 according to the embodiment of the present invention is described below with reference to FIG. 1 . The electronic product 10 may be a mobile phone or the like. The electronic product 10 may also be other electronic devices such as a handheld computer, and is not specifically limited herein.

An electronic product 10 according to an embodiment of the present invention, as shown in FIG. 1, includes a circuit board 2, a capacitive element 3, and a chip 1. The circuit board 2 has a main ground layer (not shown), and the surface of the circuit board 2 is provided with a recess 21. The capacitor element 3 is disposed in the recess 21, and the chip 1 is disposed on the circuit board 2, and the ground pin 11 of the chip 1 is connected to the pin of the capacitor element 3 and then connected to the main ground layer.

In this embodiment, the circuit board 2 is fabricated by hollowing out the surface layer in the circuit board 2 and fixing the capacitive element 3 at the hollow surface layer. After the capacitor element 3 is fixed, the chip 1 is placed, and the ground pin 11 of the chip 1 is first connected to the pin of the capacitor element 3, and then the main ground layer of the circuit board 2 is connected.

By hiding the capacitive element 3 in the recess 21, the pin of the capacitive element 3 is also hidden in the recess 21, and after the ground pin 11 of the chip 1 is connected to the pin of the capacitive element 3, at least the ground pin 11 is A part also protrudes into the recess 21, so that the ground pin 11 of the chip 1 can be prevented from being connected to other signals before being connected to the capacitive element 3.

According to the electronic product 10 of the embodiment of the present invention, by disposing the capacitive element 3 in the recess 21, the grounding pin 11 of the chip 1 is connected to the main ground of the circuit board 2 after connecting the pins of the capacitive element 3, thereby ensuring The ground signal of the chip 1 passes through the capacitor element 3 to the main ground of the circuit board 2, and the ground pin 11 of the chip 1 is prevented from being connected with other signals and ground lines before being connected with the capacitor element 3, thereby improving the circuit board. 2 performance.

In some embodiments, the chip 1 is soldered to the circuit board 2 to ensure a robust and reliable connection of the chip 1.

Specifically, the chip 1 is disposed on the capacitor element 3, that is, the chip 1, the capacitor element 3, and the circuit board 2 are stacked, so that the ground pin 11 of the chip 1 can be directly connected after being bent toward the circuit board 2. The capacitive element 3 and the circuit board 2 prevent the ground pin 11 from being too long.

More specifically, the capacitive element 3 is weldedly connected within the recess 21.

In some embodiments, as shown in FIG. 1 , the electronic product 10 further includes an inductive component 4 that is disposed within the recess 21 . Thereby, the pulse signal generated by the inductance element 4 can be prevented from radiating interference to the outside.

Specifically, the chip 1 is provided on the inductance element 4.

It should be noted that when the inductor element 4 is charged and discharged, there is a spike in the process of charging and discharging from the inductor end to the signal end, and the radiation interferes with the surrounding signal. If the length of the segment is longer, it is more likely to cause large-area and strong radiation interference signals.

Therefore, in this embodiment, the surface layer of the circuit board 2 can be hollowed out during the layout, the recess 21 is formed on the circuit board 2, the inductive component 4 is placed in the recess 21, and the chip 1 working therewith is placed. In this way, the form of the upper and lower stacks is formed, so that the signal directly enters the inductive component 4 from the chip 1, so that the interfering pulse signals also come out from the chip 1 and directly enter the inductive component 4, thereby reducing the radiation interference of the pulse signal to the outside.

Specifically, the inductive component 4 is soldered into the recess 21.

In some embodiments, the area of the circuit board 2 that is connected to the chip 1 is formed as a copper-free region, that is, the copper skin on the board 2 adjacent to the chip 1 is hollowed out.

Specifically, the circuit board 2 is laid with copper on an adjacent layer of the copper-free region.

It should be noted that some chips 1 have a key signal processing part in the local part. When soldered on the circuit board 2, the part of the chip 1 near the lower edge will be adjacent to the circuit board 2, so that the trace will interfere with the chip. 1 sensitive component part. Therefore, when routing, we can hollow out the copper skin on the circuit board 2 in this area, and then lay the copper on the adjacent layer in the area, ensuring that the components of the sensitive part work normally. .

In the description of the present invention, it is to be understood that the orientation or positional relationship of the terms "center", "upper", "lower", "top", "bottom", "inside", "outside", etc. is based on The orientation or positional relationship shown in the figures is for the convenience of the description of the invention and the simplification of the description, and is not intended to indicate or imply that the device or component referred to has a specific orientation, is constructed and operated in a specific orientation, and therefore cannot be construed as a Limitations of the invention.

In the present invention, the first feature is "on" or "below" the second feature, unless otherwise explicitly stated and defined. The first and second features may be included in direct contact, and the first and second features may be included not in direct contact but through additional feature contact therebetween. Moreover, the first feature "above", "above" and "above" the second feature includes the first feature directly above and above the second feature, or merely indicating that the first feature level is higher than the second feature. The first feature "below", "below" and "below" the second feature includes the first feature directly below and below the second feature, or merely the first feature level being less than the second feature.

In the description of the present specification, the description of the terms "embodiment", "example" and the like means that a specific feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. . In the present specification, the schematic representation of the above terms does not necessarily mean the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples.

While the embodiments of the present invention have been shown and described, the embodiments of the invention may The scope of the invention is defined by the claims and their equivalents.

Claims

An electronic product, comprising:

a circuit board having a main ground layer, the surface of the circuit board being provided with a groove;

a capacitive element, the capacitive element being disposed in the recess;

a chip, the chip is disposed on the circuit board, and a ground pin of the chip is connected to a pin of the capacitive element and then connected to the main ground layer.
The electronic product of claim 1 wherein said chip is disposed on said capacitive element.
The electronic product according to claim 1 or 2, wherein the capacitive element is soldered in the recess.
The electronic product of any of claims 1 to 3, further comprising an inductive component, the inductive component being disposed within the recess.
The electronic product of claim 4 wherein said chip is disposed on said inductive component.
The electronic product of claim 4 wherein said inductive component is soldered into said recess.
The electronic product according to any one of claims 1 to 6, wherein a region of the circuit board connected to the chip is formed as a copper-free region.
An electronic product according to any of claims 1-7, wherein said circuit board is laid with copper in an adjacent layer of said copper-free region.
The electronic product of any of claims 1-8, wherein the chip is soldered to the circuit board.
The electronic product according to any one of claims 1 to 8, wherein the electronic product is a mobile phone.