Classifications

• • G—PHYSICS
  • G05—CONTROLLING; REGULATING
  • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
  • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
  • G05F1/10—Regulating voltage or current 
  • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
  • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
  • G05F1/565—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
  • G05F1/569—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
  • G05F1/573—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
• • G—PHYSICS
  • G05—CONTROLLING; REGULATING
  • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
  • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
  • G05F1/10—Regulating voltage or current 
  • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
  • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
  • G05F1/575—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

Definitions

• an active clamp can be added to the LDO voltage regulator.
• the active clamp should preferably be non-linear to ensure that it is not engaged in the normal operation of the LDO voltage regulator, but rather, holds the PMOS gate to limit the short-circuit surge of the current.
• FIG. 3 illustrates an LDO voltage regulator 300 that includes an active clamp 316 according to at least one aspect of the disclosure.
• a differential amplifier 302 of the LDO voltage regulator 300 accepts an input reference voltage V ref and generates a regulated output voltage.
• the output of the differential amplifier 302 drives a large pass transistor, transistor 304 (which may, in an aspect, be a PMOS).
• the LDO voltage regulator 300 further includes a load capacitor (C) 306 and resistors Ri 308 and R 2 310. It supplies a load current I 0 for other sub-blocks of the system.
• C load capacitor
• FIG. 4 illustrates an LDO voltage regulator 400 that includes an auxiliary amplifier 414, a compensation capacitor 412, and an active clamp 416 according to at least one aspect of the disclosure.
• a differential amplifier 402 of the LDO voltage regulator 400 accepts an input reference voltage V ref , and generates a regulated output voltage.
• the output of the differential amplifier 402 drives a large pass transistor, transistor 404 (which may, in an aspect, be a PMOS device).
• the LDO voltage regulator 400 further includes a load capacitor (C) 406, resistors Ri 408 and R 2 410, and an auxiliary amplifier 414 before the compensation capacitor 412, as described above.
• C load capacitor
• FIG. 6 is a diagram of an auxiliary amplifier 614, such as the auxiliary amplifier 214 in FIG. 2, the auxiliary amplifier 314 in FIG. 3, and the auxiliary amplifier 414 in FIG. 4, according to at least one aspect of the disclosure.
• the auxiliary amplifier 614 is a low power open loop differential amplifier with a resistive load Ri oa d, such as 5 ⁇ , to limit the gain.
• the positive supply voltage V dd may be 1.3V
• the bandgap current Iband a may be 25nA
• a first bias current Ibiasi may be 650nA
• a second bias current Ibi aS 2 may be 1.4uA.
• FIG. 7 is a diagram of an active clamp 716, such as the active clamp 316 in FIG. 3 and/or the active clamp 416 in FIG. 4, according to at least one aspect of the disclosure.
• the gate voltage of the pass device e.g., transistor 304 in FIG. 3 or the transistor 404 in FIG. 4
• control voltage Vc the gate voltage of the pass device
• Vc In the presence of the active clamp 716, however, a voltage drop in Vc causes a current flow in device 702. This current passes through a resistor 704 and is then amplified by another device 706 to intensify its nonlinearity with respect to Vc. A small drop (e.g., 0.5V) in the Vc causes a current to be injected into node Vc. Without the active clamp 716, Vc can drop all the way to 0V. The injected current is sinked by the differential amplifier (e.g., differential amplifier 302 in FIG. 3 or differential amplifier 402 in FIG. 4) and the limited bias current of the differential amplifier limits the current in the active clamp 716. As a result, the Vc cannot drop too much.
• the differential amplifier e.g., differential amplifier 302 in FIG. 3 or differential amplifier 402 in FIG. 4
• the flow 800 includes amplifying, by a differential amplifier (e.g., differential amplifier 202 in FIG. 2, differential amplifier 302 in FIG. 3, or differential amplifier 402 in FIG. 4), a differential between a reference voltage and a regulated output voltage.
• a differential amplifier e.g., differential amplifier 202 in FIG. 2, differential amplifier 302 in FIG. 3, or differential amplifier 402 in FIG. 4
• the flow 800 includes receiving, at a pass transistor coupled to the differential amplifier (e.g., transistor 204 in FIG. 2, transistor 304 in FIG. 3, or transistor 404 in FIG. 4), an output of the differential amplifier.
• a pass transistor coupled to the differential amplifier e.g., transistor 204 in FIG. 2, transistor 304 in FIG. 3, or transistor 404 in FIG. 4
• the flow 800 optionally includes coupling an active clamp to the output node of the differential amplifier and the pass transistor.
• the active clamp limits short- circuit current surges from the pass transistor.
• the pass transistor receives a voltage of 2V to 3.6V from a battery, and the LDO voltage regulator supplies an off-chip load capacitor with a voltage of 1.8V.
• the output signal from the auxiliary amplifier may cause compensation of the compensation capacitor to increase based on an amount of gain provided by the input signal from the auxiliary amplifier. In that case, the compensation of the compensation capacitor stabilizes a circuit containing the LDO voltage regulator.
• a PSRR of a circuit containing the LDO voltage regulator may improve based on an amount of gain provided by the auxiliary amplifier.
• the auxiliary amplifier may include a resistive load that limits an amount of gain of the auxiliary amplifier.
• DSP digital signal processor
• ASIC application specific integrated circuit
• FPGA field programmable gate array
• a general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine.
• a processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
• the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.
• Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another.
• a storage media may be any available media that can be accessed by a computer.
• such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Electromagnetism (AREA)
• General Physics & Mathematics (AREA)
• Radar, Positioning & Navigation (AREA)
• Automation & Control Theory (AREA)
• Continuous-Control Power Sources That Use Transistors (AREA)

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Publications (1)

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Cited By (1)

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Citations (4)

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• 2016
  • 2016-06-17 US US15/186,411 patent/US10175706B2/en active Active
• 2017
  • 2017-05-22 BR BR112018075103A patent/BR112018075103A2/pt not_active IP Right Cessation
  • 2017-05-22 JP JP2018560981A patent/JP2019518282A/ja active Pending
  • 2017-05-22 CN CN201780034598.8A patent/CN109219786A/zh active Pending
  • 2017-05-22 EP EP17726511.3A patent/EP3472682A1/en not_active Withdrawn
  • 2017-05-22 WO PCT/US2017/033812 patent/WO2017218141A1/en not_active Ceased
  • 2017-05-22 KR KR1020187035273A patent/KR20190018424A/ko not_active Ceased

Patent Citations (4)

Non-Patent Citations (1)

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