WO2017198042A1 - Direct-current bus voltage fluctuation suppression method and control method for dual-pwm current converter - Google Patents

Abstract

A direct-current bus voltage fluctuation suppression method and control method for a dual-PWM current converter. The direct-current bus voltage fluctuation suppression method comprises the following steps: establishing a power balance equation among a grid side, a load side and an intermediate capacitor (200); establishing a capacitor instantaneous active power small-signal model of the intermediate capacitor; establishing a load instantaneous active power small-signal model of the load side; calculating a grid-side instantaneous active power reference value (p*) according to the capacitor instantaneous active power small-signal model, the load instantaneous active power small-signal model and the power balance equation; and performing feedback control over the grid-side current converter (100) by using a grid-side instantaneous active power reference value as a power reference. The grid-side reference value contains direct-current bus voltage ripple waves and state change information of the load (400), and the effectiveness is high. In addition, the impact of load changes on the bus voltage is considered in the adjustment of the grid-side current converter, thereby reducing fluctuation of the direct-current bus voltage.

Description

Double PWM converter DC bus voltage fluctuation suppression method and control method

Related application

The present invention claims the priority of the Chinese patent application entitled "Double PWM Converter DC Bus Voltage Fluctuation Suppression Method and Control Method", which is filed on May 18, 2016, and whose application number is 201610334246.1, which is incorporated herein in its entirety. Reference.

Technical field

The invention relates to the technical field of power electronics, in particular to a method and a control method for suppressing DC bus voltage fluctuation of a dual PWM converter.

Background technique

In recent years, back-to-back dual PWM (Pulse Width Modulation) converters are increasingly used in industrial transmissions, etc., with DC bus voltage constant controllable, energy bidirectional flow and network side unit power factor, etc. advantage. However, in practical applications, changes in the state of the motor (load) can cause certain fluctuations or even pumping of the DC bus voltage, threatening the safe operation of the system.

In order to cope with this problem, it is often suppressed by hardware design or software control. Such as increasing the capacity of the intermediate capacitor, but this method reduces the response speed of the system, increases the size and cost of the system; or suppresses by control means such as direct power, current feedforward, current balance, etc., but only for the network side control For optimization, the physical relationship between the network side and the motor side is not established, and the DC bus voltage fluctuation cannot be effectively suppressed.

Summary of the invention

Based on this, it is necessary to provide a better dual DC PWM converter DC bus voltage fluctuation suppression method and control method for the problem that the traditional technology can not effectively suppress the DC bus voltage fluctuation.

A dual PWM converter DC bus voltage fluctuation suppression method provided for the purpose of the present invention includes the following steps:

Establish a power balance equation between the grid side, the load side, and the intermediate capacitor;

Establish a capacitor instantaneous power small signal model of the intermediate capacitor;

Establish a load instantaneous active power small signal model on the load side;

Calculating a reference power value of the network side instantaneous active power according to the capacitor instantaneous active power small signal model, the load instantaneous active power small signal model, and the power balance equation;

The network side instantaneous active power reference value is used as a power reference to feedback control the grid side converter.

As an implementation manner of a dual PWM converter DC bus voltage fluctuation suppression method, the capacitor instantaneous active power small signal model includes a DC bus voltage disturbance signal, and

The load instantaneous active power small signal model includes a phase current disturbance signal.

As an implementation manner of a dual PWM converter DC bus voltage fluctuation suppression method, the power balance equation is:

p=p _m +p _c ,

Where p is the instantaneous active power of the network side, p _m is the instantaneous active power of the load, and p _c is the instantaneous active power of the intermediate capacitor.

As an implementation manner of a dual PWM converter DC bus voltage fluctuation suppression method, the network side instantaneous active power reference value p ^* calculation function is as follows:

p ^* = f(v _dc , Δv _dc , v _si , i _si , Δi _si ),

Where v _dc is the intermediate DC bus voltage value;

Δv _dc is the disturbance value applied to the intermediate DC bus voltage;

v _si is the load phase voltage value;

i _si is the load phase current value;

Δi _si is the disturbance value applied to the load phase current;

As an implementation manner of a dual PWM converter DC bus voltage fluctuation suppression method, the load instantaneous active power small signal model is superimposed with the capacitor instantaneous active power small model by power feedforward, and the method is obtained. Network side instantaneous active power reference value.

As an implementation manner of a dual-PWM converter DC bus voltage fluctuation suppression method, a direct power control method based on a virtual flux linkage and a space vector is adopted, and the network-side converter is feedback-controlled in combination with the power reference.

As an implementation manner of a dual PWM converter DC bus voltage fluctuation suppression method, the capacitor instantaneous active power small signal model is:

Where p _c is the instantaneous active power of the intermediate capacitor, C is the capacitance value of the intermediate capacitor, v _dc is the DC bus voltage, and Δv _dc is the disturbance value applied to the intermediate DC bus voltage.

As an implementation manner of a dual PWM converter DC bus voltage fluctuation suppression method, the load instantaneous active power small signal model is:

p _m =v _sa *i _sa +v _sb *i _sb +v _sc *i _sc +v _sa *Δi _sa +v _sb *Δi _sb +v _sc *Δi _sc ,

among them,

p _m is the instantaneous active power of the load,

v _sa , v _sb , v _sc are load phase voltage values;

i _sa , i _sb , i _sc is the load phase current value;

Δi _sa , Δi _sb , Δi _sc are the perturbation values applied to the load phase current.

As an implementation of a dual PWM converter DC bus voltage fluctuation suppression method, a film capacitor is used as an intermediate capacitor in the dual PWM converter.

Based on the dual inventive PWM converter control method, the DC bus voltage fluctuation suppression method is used to suppress the DC bus voltage fluctuation by using any of the above-mentioned dual PWM converter DC bus voltage fluctuation suppression methods.

The beneficial effects of the present invention include: a DC PWM converter DC bus voltage fluctuation suppression method provided by the present invention, a small signal model of a capacitor instantaneous active power of an intermediate capacitor, and a load instantaneous active power small signal model of a load side, and The power balance equation between the network side and the load side is established by the physical relationship between the network side and the load side and the power dynamic balance relationship between the network side, the load side, and the intermediate capacitance. The small-signal model is applied to the power balance equation to calculate the power reference value controlled by the grid-side converter. The power of the grid-side converter control reference includes DC bus voltage ripple and load state change information, which is more effective. At the same time, the regulation of the grid-side converter takes into account the influence of the load change on the bus voltage, thereby reducing The fluctuation of the DC bus voltage is small.

DRAWINGS

1 is a schematic structural diagram of a dual PWM converter system;

Figure 2 is a block diagram of the motor side converter control;

Figure 3 is a block diagram of the power-forward feed-side converter control.

detailed description

In order to make the objects, technical solutions, and advantages of the present invention more comprehensible, the specific embodiments of the method and method for suppressing the DC bus voltage fluctuation of the dual PWM converter of the present invention will be described below with reference to the accompanying drawings. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The back-to-back dual PWM converter structure is shown in Figure 1. The left end is connected to the grid (three-phase R, S, T), called the grid side, and the right side is connected to the load 400. In the figure, two converters, the left side is the grid side converter 100, the right side is the load side converter 300, and the middle is the intermediate capacitor 200 connecting the two converters. The three-phase AC (R, S, T) input to the left grid provides a source of power for the overall system. The four-quadrant rectifying unit (the grid-side converter 100) performs full-controlled rectification of the three-phase alternating current to obtain an intermediate direct current. The inverter unit (load side converter 300) adjusts the intermediate DC voltage by frequency conversion to meet the operation requirements of the back end load 400 (such as a permanent magnet synchronous motor). The intermediate supporting capacitor (intermediate capacitor 200) supports the DC bus voltage, which establishes the physical connection between the grid side converter and the motor side converter, which is both the grid side load and the motor side power supply. It is connected to the grid side and the motor side of the converter, which is both the grid side load and the motor side power supply, and its voltage stability is particularly important. Two series of 3900UF/400V aluminum electrolytic capacitors can be used, and the equivalent capacitance is 1950UF stable bus. However, in the method embodiment of the present invention, it is more preferable to replace the aluminum electrolytic capacitor with a metallized polypropylene film capacitor with stronger ripple resistance, and use a 300 UF/700V two parallel capacitance replacement ratio of 30.7%, or 250 UF. /700V 2 parallel connections with a replacement ratio of 25.6%. Through the replacement of the film capacitor, the overall size of the inverter is reduced and the life is lengthened; more importantly, it has strong ripple resistance, small inductance, fast charge and discharge speed, and can quickly suppress fluctuations when the DC bus voltage fluctuates.

Taking the 15kW permanent magnet synchronous frequency conversion series as an example, the working control process of the dual PWM is introduced.

In the present embodiment, when the system is in operation, the control process on the motor side is as shown in FIG. 2, which uses space vector control to provide stable and reliable energy to the rear motor load through the outer ring of the speed and the inner loop of the current, and controls the smoothness thereof. run. The overall control uses model reference adaptive control to obtain position and velocity estimates for feedback control.

In Figure 2, ω _ref is the motor-controlled angular velocity reference value, i _qref , i _dref are the q-axis and d-axis current reference values respectively; u _q , u _d are the q-axis and d-axis voltage reference values respectively; u _α , u _β is the α-axis and β-axis voltage reference values, respectively. i _sa , i _sb , i _sc is the motor phase current; i _αs , i _βs are the α-axis and β-axis components of the motor current.

Among them, the current component is converted from the stationary coordinate to the rotating coordinate by the PARK transform, and the voltage reference value is converted from the rotating coordinate to the stationary coordinate system by the inverse inverse transform (PARK ^-1 ). The motor phase current is converted to the current in the stationary coordinate system by the CLARKE transformation.

Three controllers are used throughout the control process, including PI controller for outer loop control speed (speed loop PI controller), controller for current control of inner loop (q-axis current loop controller and d-axis current loop controller) ). Controllers that perform internal loop current control can also use PI controllers.

In the control process of the motor side in Fig. 2, space vector pulse width modulation (SVPWM) based on model reference adaptation is also adopted, which is the same as the network side pulse modulation mechanism. In other embodiments, Other pulse width modulation methods can also be used, but the space vector pulse width modulation system uses less loss and can Increase the utilization of the DC bus voltage.

Specifically, the mathematical model of the permanent magnet synchronous motor in the rotating coordinate system:

among them:

i _ds , i _qs , u _d , u _q are the components of the stator current and voltage on the d-axis and the q-axis, respectively;

L _d and L _q are a direct-axis synchronous inductor and a cross-axis synchronous inductor, respectively;

ω _e is the electrical angular velocity of the motor and ω _e =n _p ω _r (n _p is the number of motor pole pairs, ω _r is the mechanical angular velocity of the motor);

p is a differential operator, and

The permanent magnet synchronous motor ontology model is selected as the reference model, and the current model is used as the adjustable model to simplify the current model and to make the rotational speed ω _e constrained to the system matrix. get:

make:

Substituting equation (4) into equation (3) yields:

According to the current model, the parallel adjustable model is designed:

According to the POPOV superstability theory

The rotor position of the motor is:

Therefore, according to the current output of the reference model and the adjustable model, the algorithm for the entire identification speed can be obtained, and the identification operation is performed as the feedback input of the system.

In this embodiment, the position and speed estimates are obtained by the model reference adaptive control for feedback control. And through the outer ring of the speed and the inner ring of current to provide stable and reliable energy for the rear motor load, and control its smooth operation.

In other embodiments, the motor-side converter control strategy can also be controlled using direct torque control or V/F control. However, the vector coordinate transformation is used to decouple the motor excitation current and torque current, which can achieve good torque control performance. When using this strategy, the position sensor is not needed, simplifying the system structure and reducing the complexity of the control system. .

In this embodiment, for the control of the grid-side converter, referring to FIG. 3, direct power control based on virtual flux linkage and space vector is employed. In addition, a load power feedforward channel is also established. By directly feeding the instantaneous active power of the motor side to the grid side, the adjustment of the instantaneous active power of the grid side can avoid the slow process of indirect adjustment of the voltage outer loop in the conventional control, thereby enabling Effectively suppress fluctuations in the DC bus voltage.

And the direct power control using space vector can suppress the influence of grid voltage on proper orientation and control performance, overcome the influence of grid voltage harmonics, and avoid system oscillation.

Where, e _a , e _b , and e _c are the grid voltages, i _a , i _b , i _c are the grid side phase currents, and v _α ^* and v _β ^* are the rectifier reference voltage α and β axis components. v _dc ^* is the DC bus voltage reference value, v _dc is the DC bus voltage, p ^* is the instantaneous active power reference value controlled by the converter, q ^* is the reactive power reference value, and the power balance is balanced on the grid side and the load side. , q ^* =0. v _d ^* , v _q ^* are the component reference values of the voltage on the d-axis and the q-axis. S _a , S _b , and S _c are grid-side converter switching signals, and λ is a voltage vector position angle.

As can be seen from FIG. 3, the PI controller is used in this embodiment, and other controllers such as incremental PID control can also be used. However, the operation of the PI controller is simpler and easier to implement, and has better control effects on the static error of the system.

In this embodiment, the pulse modulation uses SVPWM (Space Vector Pulse Width Modulation). In other embodiments, Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), and the like may also be employed. However, in this embodiment, space vector pulse width modulation is used, which takes into account the voltage and current waveforms, and directly generates a three-phase PWM wave by using a voltage space vector. The calculation is simple, and each switching in the control involves only one power module, and the system opening loss is small. At the same time, the space vector pulse width modulation makes the maximum value of the fundamental voltage of the grid side output DC bus voltage, and the utilization ratio of the DC bus voltage to the SPWM is increased by about 15%.

The specific related calculation process is as follows:

According to the definition of instantaneous active power and reactive power, the power based on the rotating coordinate system is calculated as follows:

among them:

i _d , i _q , v _d , and v _q are components of current and voltage on the d-axis and the q-axis, respectively.

p and q are the instantaneous active power and reactive power of the network side, respectively.

According to the virtual flux linkage orientation vector relationship:

Substituting equation (9) into equation (8) gives the net side instantaneous power expression:

In view of the fact that the instantaneous power calculation in the direct power control strategy is usually carried out in a two-phase stationary coordinate system, the equivalent transformation of equation (10) is obtained, and the instantaneous power expression in the stationary coordinate system is obtained as follows:

among them:

ω is the rotational angular frequency in the synchronous rotating coordinate system, that is, the fundamental frequency of the power grid;

ψ _α , ψ _β are the components of the virtual flux linkage in the stationary coordinate system;

i _α , i _β are the components of the current in the stationary coordinate system.

The expressions of the virtual flux linkages _α and ψ _β in the stationary coordinate system are:

The expressions of the voltages v _α and v _β in the stationary coordinate system are

The relationship between the rotation coordinates and the stationary coordinates is

Grid Side Instantaneous Power Estimation In other embodiments, instantaneous power estimation with voltage sensors and grid voltage estimation may also be employed. In the specific calculation, the grid voltage sensor is usually used to detect the grid voltage, and then calculated with the grid current. But the system cost will be slightly higher.

Referring to the previous analysis, the motor side and the grid side power in the dual PWM converter are dynamically balanced. The power balance equation between the two can be established according to the physical relationship and power relationship between the grid side, the load side and the intermediate capacitor. The power balance equation is as follows:

p=p _m +p _c (15)

Where p is the instantaneous active power of the network side, p _m is the instantaneous active power of the load, and p _c is the instantaneous active power of the intermediate capacitor.

According to the instantaneous active power definition:

p _m =v _sa *i _sa +v _sb *i _sb +v _sc *i _sc (17)

The disturbance of the independent variable and the decoupling variable is applied to obtain the capacitance of the intermediate capacitor. The instantaneous active power small signal model is as shown in equation (18), and the load instantaneous active power small signal model on the load side is obtained as shown in equation (19). The small signal model is as follows:

p _m =v _sa *i _sa +v _sb *i _sb +v _sc *i _sc +v _sa *Δi _sa +v _sb *Δi _sb +v _sc *Δi _sc (19)

Combining the aforementioned power balance equation (15) with the capacitive instantaneous active power small signal model and the load instantaneous active power small signal model, equation (20) can be obtained.

p=f(v _dc , Δv _dc , v _si , i _si , Δi _si ) (20)

among them:

v _dc is the intermediate DC bus voltage value;

Δv _dc is the disturbance value applied to the intermediate DC bus voltage;

v _si is the phase voltage value of the permanent magnet synchronous motor;

i _si is the phase current value of the permanent magnet synchronous motor;

Δi _si is the disturbance value applied to the phase current of the permanent magnet synchronous motor.

So far, the DC power control inner loop power reference value based on the small signal model power feedforward is obtained, that is, p calculated here is taken as p ^{* in} FIG. When controlling the grid-side converter, p ^{* is} used as the final power reference value to obtain the switch control signals S _a , S _b , and S _c of the converter to control the converter. The grid side reference value includes DC bus voltage ripple and load status change information, which is more effective. At the same time, the regulation of the grid side converter takes into account the influence of load variation on the bus voltage and reduces the fluctuation of the DC bus voltage.

Referring to FIG. 3, a feedforward method is used to superimpose the small signal model of the motor and the instantaneous active power small signal model of the capacitor to obtain a reference p ^{* of the} final instantaneous active power.

The invention also provides a dual PWM converter control method, wherein the DC bus voltage fluctuation suppression method is adopted to suppress the DC bus voltage fluctuation by using the DC bus voltage fluctuation suppression method of the above-mentioned any dual PWM converter, and combined with the foregoing The converter side control mode on the motor side and the grid side controls the two converters in the system separately. A stable power supply is provided to the load by controlling the closing and opening of the power switches in the two side converters. Moreover, the control method can reduce the fluctuation of the DC bus voltage and make the overall performance of the system more stable.

The above-mentioned embodiments are merely illustrative of several embodiments of the present invention, and the description thereof is more specific and detailed, but is not to be construed as limiting the scope of the invention. It should be noted that a number of variations and modifications may be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of the invention should be determined by the appended claims.

Claims (10)

1. A dual PWM converter DC bus voltage fluctuation suppression method is characterized in that the method comprises the following steps:

   Establish a power balance equation between the grid side, the load side, and the intermediate capacitor;

   Establish a capacitor instantaneous power small signal model of the intermediate capacitor;

   Establish a load instantaneous active power small signal model on the load side;

   Calculating a reference power value of the network side instantaneous active power according to the capacitor instantaneous active power small signal model, the load instantaneous active power small signal model, and the power balance equation;

   The network side instantaneous active power reference value is used as a power reference to feedback control the grid side converter.
2. The dual-PWM converter DC bus voltage fluctuation suppression method according to claim 1, wherein the capacitor instantaneous active power small signal model includes a DC bus voltage disturbance signal, and

   The load instantaneous active power small signal model includes a phase current disturbance signal.
3. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein the power balance equation is:

   p=p _m +p _c ,

   Where p is the instantaneous active power of the network side, p _m is the instantaneous active power of the load, and p _c is the instantaneous active power of the intermediate capacitor.
4. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein the calculation function of the instantaneous active power reference value p ^{* of} the network side is as follows:

   p ^* = f(v _dc , Δv _dc , v _si , i _si , Δi _si ),

   Where v _dc is the intermediate DC bus voltage value;

   Δv _dc is the disturbance value applied to the intermediate DC bus voltage;

   v _si is the load phase voltage value;

   i _si is the load phase current value;

   Δi _si is the disturbance value applied to the load phase current;
5. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein the load instantaneous active power small signal model and the capacitor instantaneous active power small model are superposed by means of power feedforward. Obtaining the instantaneous active power reference value of the network side.
6. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein a direct power control method based on a virtual flux linkage and a space vector is adopted, and the network side converter is combined with the power reference. get on Feedback control.
7. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein:

   The capacitor instantaneous active power small signal model is:

   

   Where p _c is the instantaneous active power of the intermediate capacitor, C is the capacitance value of the intermediate capacitor, v _dc is the DC bus voltage, and Δv _dc is the disturbance value applied to the intermediate DC bus voltage.
8. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein:

   The load instantaneous active power small signal model is:

   p _m =v _sa *i _sa +v _sb *i _sb +v _sc *i _sc +v _sa *Δi _sa +v _sb *Δi _sb +v _sc *Δi _sc ,

   among them,

   p _m is the instantaneous active power of the load,

   v _sa , v _sb , v _sc are load phase voltage values;

   i _sa , i _sb , i _sc is the load phase current value;

   Δi _sa , Δi _sb , Δi _sc are the perturbation values applied to the load phase current.
9. The method for suppressing DC bus voltage fluctuation of a dual PWM converter according to claim 1, wherein a film capacitor is used as an intermediate capacitor in the dual PWM converter.
10. A dual PWM converter control method, characterized in that the DC bus voltage fluctuation suppression method of the dual PWM converter according to any one of claims 1 to 9 is used to perform DC bus voltage fluctuation suppression method for DC bus voltage fluctuation inhibition.

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