WO2017197745A1 - 显示面板及其驱动电路和驱动方法 - Google Patents

显示面板及其驱动电路和驱动方法 Download PDF

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Publication number
WO2017197745A1
WO2017197745A1 PCT/CN2016/089795 CN2016089795W WO2017197745A1 WO 2017197745 A1 WO2017197745 A1 WO 2017197745A1 CN 2016089795 W CN2016089795 W CN 2016089795W WO 2017197745 A1 WO2017197745 A1 WO 2017197745A1
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Prior art keywords
transistor
signal
control circuit
input
pixel
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Ceased
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PCT/CN2016/089795
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English (en)
French (fr)
Inventor
黄笑宇
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/128,985 priority Critical patent/US20180144694A1/en
Publication of WO2017197745A1 publication Critical patent/WO2017197745A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0213—Addressing of scan or signal lines controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/10—Special adaptations of display systems for operation with variable images
    • G09G2320/103—Detection of image changes, e.g. determination of an index representative of the image change
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

Definitions

  • the invention belongs to the technical field of liquid crystal display, and more particularly to a display panel, a driving circuit thereof and a driving method.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the main driving principle of TFT-LCD is: the system motherboard connects the R/G/B compression signal, control signal and power through the wire to the connector on the PCB, and the data passes through the TCON (Timing Controller, timing controller) on the PCB.
  • TCON Transmission Controller, timing controller
  • the integrated circuit (IC) is processed, it is connected to the display area through the PCB through S-COF (Source-Chip on Film) and G-COF (Gate-Chip on Film), so that the LCD obtains the required power and signal.
  • S-COF Source-Chip on Film
  • G-COF Gate-Chip on Film
  • the conventional display panel refresh rate is 60 Hz, that is, the screen is refreshed 60 times per second, and each refresh is a process of charging and discharging each display pixel of the display area.
  • This refresh rate is necessary when the picture is in a fast motion state (for example, playing video, games, scrolling, etc.); but if it is a static picture, it will continue to refresh, which will cause a lot of unnecessary power loss. .
  • an exemplary embodiment of the present invention provides a display panel, a driving circuit thereof, and a driving method capable of reducing power consumption of a display panel without adding additional cost.
  • an aspect of the present invention provides a driving circuit of a display panel, wherein the driving circuit includes: a scan driving circuit that supplies a gate driving signal to each pixel on the display panel; and a scan line connected to the display a respective pixel on the panel; a control circuit disposed between the scan driving circuit and the scan line, the first input end of the control circuit being connected to the scan drive circuit An output end of the control circuit is connected to the scan line, the control circuit is configured to: when the input signal of the second input end of the control circuit is the first control signal, the scan drive a gate driving signal provided by the circuit is output to the scan line to drive pixels of the display panel; when an input signal of the second input end of the control circuit is a second control signal, a gate of the pixel of the display panel is turned off A voltage signal is output to the scan line.
  • the control circuit includes a first transistor and a second transistor, a gate of the first transistor and a gate of the second transistor are both connected to a second input end of the control circuit, the a source of a transistor is connected to an output of the scan driving circuit, a drain of the first transistor is connected to a source of the second transistor, and a drain of the second transistor is connected to the scan line
  • the gate turn-off voltage signal is applied, and when the input signal of the second input of the control circuit is the first control signal, the first transistor is turned on, and the second transistor is turned off when When the input signal of the second input end of the control circuit is the second control signal, the first transistor is turned off, and the second transistor is turned on.
  • determining whether the input signal of the second input end of the control circuit is the first control signal or the second control signal by comparing the current frame with the previous frame according to the pixel row.
  • the input signal of the second input end of the control circuit is the first control signal
  • the input signal of the second input end of the control circuit is the second control signal
  • the first transistor is a PMOS transistor
  • the second transistor is an NMOS transistor
  • control circuit is disposed in a fan-out area on the display panel.
  • a driving method of a display panel including a scan driving circuit, a scan line, and a control circuit disposed between the scan driving circuit and the scan line,
  • the scan driving circuit provides a gate driving signal for each pixel on the display panel, the scan line is connected to each pixel on the display panel, and the first input end of the control circuit is connected to the scan driving circuit.
  • the control circuit includes a first transistor and a second transistor, a gate of the first transistor and a gate of the second transistor are both connected to a second input end of the control circuit, the a source of a transistor is connected to an output of the scan driving circuit, a drain of the first transistor is connected to a source of the second transistor, and a drain of the second transistor is connected to the scan line
  • the gate turn-off voltage signal is applied, and when the input signal of the second input of the control circuit is the first control signal, the first transistor is turned on, and the second transistor is turned off when When the input signal of the second input end of the control circuit is the second control signal, the first transistor is turned off, and the second transistor is turned on.
  • determining whether the input signal of the second input end of the control circuit is the first control signal or the second control signal by comparing the current frame with the previous frame according to the pixel row.
  • the input signal of the second input end of the control circuit is the first control signal
  • the input signal of the second input end of the control circuit is the second control signal
  • the first transistor is a PMOS transistor
  • the second transistor is an NMOS transistor
  • the display panel and its driving circuit and driving method provided according to an exemplary embodiment of the present invention can reduce power consumption of the display panel without adding additional cost.
  • FIG. 1 is a schematic view showing a driving architecture of a display panel according to an exemplary embodiment of the present invention
  • FIG. 2 is a schematic block diagram showing a driving circuit of a driving panel according to an exemplary embodiment of the present invention
  • FIG. 3 is a schematic block diagram showing a control circuit according to an exemplary embodiment of the present invention.
  • FIG. 4 is a flowchart illustrating a driving method of a display panel according to an exemplary embodiment of the present invention
  • FIG. 5 is a schematic view showing an embodiment of a driving method of a display panel according to an exemplary embodiment of the present invention.
  • a driving circuit of a display panel is provided in an exemplary embodiment of the present invention, where the display panel includes a pixel unit array (abbreviated as a pixel) composed of a plurality of pixel units arranged in an array, and the display panel It includes at least two regions, that is, a fan-out region and a display region.
  • a pixel unit array abbreviated as a pixel
  • the display panel and the driving structure of the display panel will be described in detail in conjunction with FIG. 1.
  • FIG. 1 is a schematic view showing a driving architecture of a display panel according to an exemplary embodiment of the present invention.
  • the driving structure of the display panel generally includes: a printed circuit board (PCB) and a source-chip on film (S-COF) (such as S- in FIG. 1).
  • COF1 to S-COF4, S-COF1 to S-COF4 are collectively referred to as S-COF
  • G-COF Gate-Chip on Film, G-COF
  • G-COF1 to G-COF4 are collectively referred to as G-COF
  • display panel 1 a printed circuit board
  • S-COF source-chip on film
  • the display panel 1 includes a plurality of arrays arranged in an array
  • the pixel unit array (abbreviated as a pixel) constituted by the pixel unit, and the display panel 1 includes two regions, that is, the fan-out region 10 and the display region 20 (which may also be referred to as an effective display region).
  • the main driving principle of the driving structure of the display panel shown in FIG. 1 is as follows: the system main board connects the R/G/B compression signal, the control signal and the power through the wire to the connector on the PCB, and the data After being processed by a TCON (Timing Controller) integrated circuit (IC) on the PCB, the S-COF and the G-COF are connected to the display area via the PCB, so that the display panel obtains the required power and signals.
  • TCON Transmission Controller
  • the system board provides a driving signal and a control signal to the display panel 1 through the G-COF, and the system board provides another control signal and a data signal to the display panel 1 through the S-COF, so that the pixels on the display panel 1 are normally displayed. .
  • the display panel 1 may be a TFT-LCD (Thin Film Transistor Liquid Crystal Display).
  • the core component of each pixel on the display panel 1 is a TFT (Thin Film Transistor).
  • FIG. 2 is a schematic block diagram showing a driving circuit of a driving panel according to an exemplary embodiment of the present invention.
  • a driving circuit of a display panel includes a scan driving circuit 100, a control circuit 200, and a scan line 300. Further, the scan driving circuit 100 supplies a gate driving signal to each pixel on the display panel 1. The scan line 300 is connected to each pixel on the display panel 1. The control circuit 200 is disposed between the scan driving circuit 100 and the scan line 300. The first input terminal 201 of the control circuit 200 is connected to the output terminal of the scan driving circuit 100, and the output terminal 203 of the control circuit 200 is connected to the scan line 300.
  • control circuit 200 is configured to: when the input signal of the second input terminal 202 of the control circuit 200 is the first control signal, output the gate driving signal provided by the scan driving circuit 100 to the scan line 300 to drive the display The pixel of the panel 1; when the input signal of the second input terminal 202 of the control circuit 200 is the second control signal, the gate off voltage signal is output to the scan line 300.
  • FIG. 3 is a schematic block diagram showing a control circuit 200 according to an exemplary embodiment of the present invention. As shown in FIG. 3, the first input of the control circuit 200 is indicated by the reference B, and the second input of the control circuit 200. The terminal is indicated by reference numeral A, and the output of the control circuit 200 is denoted by reference numeral C.
  • the control circuit 200 may include a first transistor A1 and a second transistor A2.
  • the gate of the first transistor A1 and the gate of the second transistor A2 are both connected to the second input terminal A of the control circuit 200, and the source of the first transistor A1 is connected to the output terminal of the scan driving circuit 100, the first transistor A1
  • the drain is connected to the source of the second transistor A2, the drain of the second transistor A2 is connected to the scan line 300 and a gate turn-off voltage signal VGL (such as, but not limited to, -9V) for the display panel pixel is applied.
  • VGL such as, but not limited to, -9V
  • the control circuit 200 when the input signal of the second input terminal A of the control circuit 200 is the first control signal, the first transistor A1 is turned on, the second transistor A2 is turned off, and the control circuit 200 will scan the driving circuit.
  • the gate driving signal supplied via the first input terminal B of the control circuit 200 is output to the scanning line 300 via the output terminal C of the control circuit 200 to drive the pixels of the display panel 1.
  • the input signal of the second input terminal A of the control circuit 200 is the second control signal
  • the first transistor A1 is turned off, the second transistor A2 is turned on, and the control circuit 200 controls the gate turn-off voltage signal VGL via the control.
  • the output C of the circuit 200 is output to the scan line 300, in which case the gate drive signal is not output to the scan line 300, and the scan line 300 applies the gate turn-off voltage signal VGL to the corresponding pixel of the display panel, such that The transistor in the pixel is turned off so that the pixel is not refreshed.
  • the first transistor A1 is a PMOS transistor and the second transistor A2 is an NMOS transistor.
  • the first control signal is a low level signal (such as but not limited to a 0V voltage signal) (the low level signal is the turn-on voltage of the PMOS transistor and the turn-off voltage of the NMOS transistor), when the second of the control circuit 200
  • the second control signal is a high level signal (such as but not limited to a 3.3V voltage signal) (high power)
  • the flat signal is the turn-on voltage of the NMOS transistor and the turn-off voltage of the PMOS transistor.
  • the first transistor A1 is an NMOS transistor and the second transistor A2 is a PMOS transistor.
  • the first control signal is a high level signal (such as but not limited to a 3.3V voltage signal), and when the input signal of the second input terminal A of the control circuit 200 is the high level signal, the NMOS transistor A1 Turned on, the PMOS transistor A2 is turned off; the second control signal is a low level signal (such as but not limited to a 0V voltage signal), when the input signal of the second input terminal A of the control circuit 200 is the low level signal , NMOS transistor A1 is turned off, PMOS transistor A2 is guided through.
  • whether the input signal of the second input terminal A of the control circuit 200 is the first control signal or the second control signal can be determined by comparing the current frame with the previous frame according to the pixel row.
  • the input signal of the second input terminal A of the control circuit 200 is the first control signal
  • the input signal of the second input terminal A of the control circuit 200 is the second control signal, where i is an integer and 1 ⁇ i ⁇ the maximum number of rows of pixel rows.
  • control circuit 200 as described above may be disposed in the fan-out area 10 on the display panel 1 as shown in FIG.
  • the control circuit 200 as described above may be disposed in the fan-out area 10 on the G-COF side of the display panel 1 as shown in FIG.
  • control circuit 200 can be connected to the output of TCON.
  • the driving circuit as described above may be a GOA type driving circuit.
  • a driving method of a display panel includes a scan driving circuit, a scan line, and a control circuit disposed between the scan driving circuit and the scan line.
  • the scan driving circuit provides a gate driving signal for each pixel on the display panel, and the scan line is connected to each pixel on the display panel, and the first input end of the control circuit is connected to the output end of the scan driving circuit, and the output end of the control circuit is connected to Scan line.
  • FIG. 4 is a flowchart illustrating a driving method of a display panel according to an exemplary embodiment of the present invention.
  • step S401 it is determined whether the input signal of the second input terminal of the control circuit is the first control signal or the second control signal. If the input signal of the second input terminal of the control circuit is the first control signal, then in step S402, the gate driving signal provided by the scan driving circuit is output to the scan line to drive the pixels of the display panel. If the input signal of the second input terminal of the control circuit is the second control signal, then at step S403, the gate turn-off voltage signal is output to the scan line.
  • control circuit can include a first transistor and a second transistor.
  • the gate of the first transistor and The gate of the second transistor is connected to the second input of the control circuit, the source of the first transistor is connected to the output of the scan driving circuit, the drain of the first transistor is connected to the source of the second transistor, and the second transistor The drain is connected to the scan line and a gate turn-off voltage signal is applied (such as, but not limited to, -9V).
  • the control circuit when the input signal of the second input terminal of the control circuit is the first control signal, the first transistor is turned on, the second transistor is turned off, and the control circuit scans the gate driving signal provided by the driving circuit. Output to the scan line to drive the pixels of the display panel.
  • the input signal of the second input terminal of the control circuit is the second control signal
  • the first transistor is turned off, the second transistor is turned on, and the control circuit outputs the gate turn-off voltage signal to the scan line, in which case
  • the gate drive signal is not output to the scan line, and the scan line applies a gate turn-off voltage signal to the corresponding pixel of the display panel such that the transistor in the pixel is turned off, so that the pixel is not refreshed.
  • the first transistor is a PMOS transistor and the second transistor is an NMOS transistor.
  • the first control signal is a low level signal (such as but not limited to a 0V voltage signal), and when the input signal of the second input of the control circuit is the low level signal, the PMOS transistor is turned on, NMOS The transistor is turned off;
  • the second control signal is a high level signal (such as but not limited to a 3.3V voltage signal), and when the input signal of the second input terminal of the control circuit is the high level signal, the PMOS transistor is turned off, the NMOS transistor Being turned on.
  • the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.
  • the first control signal is a high level signal (such as, but not limited to, a 3.3V voltage signal), and when the input signal of the second input terminal A of the control circuit is the high level signal, the NMOS transistor is guided The PMOS transistor is turned off; the second control signal is a low level signal (such as but not limited to a 0V voltage signal), and when the input signal of the second input terminal of the control circuit is the low level signal, the NMOS transistor is turned off. The PMOS transistor is turned on.
  • step S401 it may be determined whether the input signal of the second input end of the control circuit is the first control signal or the second control signal by comparing the current frame with the previous frame according to the pixel row.
  • the input signal of the second input end of the control circuit is the first control signal;
  • the input signal of the second input terminal of the control circuit is the second control signal, where i is an integer and 1 ⁇ i ⁇ pixel row The maximum number of rows.
  • FIG. 5 is a schematic view showing an embodiment of a driving method of a display panel according to an exemplary embodiment of the present invention.
  • the display area 20 of the display panel 1 includes three sub-areas, namely, a first area 21, a second area 22, and a third area 23.
  • the images displayed in the first area 21 and the third area 23 are changed, and the image displayed in the second area 22 is unchanged. That is, the image displayed by the current frame using the pixels of the pixel row in the first region 21 is different from the image displayed by the pixel of the pixel row corresponding to the previous frame 21 in the previous region, and the current frame is utilized in the second region.
  • the image displayed by the pixel of the pixel row in 22 is the same as the image displayed by the pixel of the pixel row corresponding to the previous frame in the second region 22, and the current frame uses the image displayed by the pixel of the pixel row in the third region 23
  • the previous frame is different in the image displayed by the pixels of the corresponding pixel row in the third region 23.
  • the number of rows of the pixel rows in the first region 21, the second region 22, and the third region 23 is greater than or equal to 1.
  • the image displayed by the current frame using each row of pixels in the first region 21 and the previous frame are displayed by using corresponding rows of pixels in the first region 21.
  • the image of the current frame is displayed using the image displayed by each row of pixels in the second region 22, and the previous frame is the same as the image displayed by the corresponding row of pixels in the second region 22, and the current frame is utilized in the third region 23.
  • the image displayed by each row of pixels is different from the previous frame by the image displayed by the corresponding row of pixels in the third region 23.
  • the display panel shown in FIG. 5 includes the drive circuit as shown above with reference to FIG.
  • the first input B of the control circuit is connected to the output of the G-COF (ie, the scan drive circuit), and the output C of the control circuit is connected to the scan line.
  • the first transistor A1 is a PMOS transistor
  • the second transistor A2 is an NMOS transistor
  • the first control signal is a low level signal (such as but not limited to a 0V voltage signal)
  • the second control signal is a high voltage.
  • Flat signal (such as but not limited to a 3.3V voltage signal).
  • the gate signal when the gate signal is scanned to the first region 21, the image displayed by the pixel of the pixel row in the first region 21 and the pixel of the corresponding pixel row in the first region 21 are used as the previous frame.
  • the displayed image is different, so the input signal of the second input A of the control circuit is the first control signal.
  • the PMOS transistor A1 is turned on due to the low level signal of the first control signal.
  • the NMOS transistor A2 is turned off.
  • the gate driving signal supplied from the G-COF is output to the scan line via the output terminal C of the control circuit to drive each pixel in the first region 21 (ie, in the first region 21) Each pixel is refreshed normally).
  • the input signal of the second input A of the control circuit is the second control signal. Due to the high level signal of the second control signal, the PMOS transistor A1 is turned off, and the NMOS transistor A2 is turned on. At this time, the gate driving signal provided by the G-COF cannot be output to the scan line via the output terminal C of the control circuit. Alternatively, the gate-off voltage signal VGL is output to the scan line via the output C of the control circuit, and each pixel in the second region 22 is not refreshed.
  • the image displayed by the pixel of the pixel row in the third region 23 corresponds to the previous frame in the third region 23
  • the pixels of the pixel row display different images, so the input signal of the second input A of the control circuit is the first control signal. Due to the low level signal of the first control signal, the PMOS transistor A1 is turned on, and the NMOS transistor A2 is turned off. At this time, the gate driving signal supplied from the G-COF is output to the scan line via the output terminal C of the control circuit. Each pixel in the third region 23 is driven (ie, each pixel in the first region 21 is normally refreshed).
  • the second input of the control circuit can be connected to the output of the TCON.
  • the TCON can store the image of the previous frame and compare the image of the current frame with the image of the previous frame in pixel rows.
  • the display panel and its driving circuit and driving method utilize a combined circuit between at least two transistors, realizing dynamic regioselective refresh, and can be added without adding additional cost. Reduce the power consumption of the display panel.

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Abstract

提供一种显示面板及其驱动电路和驱动方法。该显示面板的驱动电路包括：扫描驱动电路(100）；扫描线(300)；控制电路(200)，设置在扫描驱动电路(100)和扫描线(300)之间，控制电路(200)的第一输入端(201)连接到扫描驱动电路(200)的输出端(203)，控制电路(200)的输出端(203)连接到扫描线(300)，控制电路(200)被配置为：当控制电路(200)的第二输入端(202)的输入信号为第一控制信号时，将扫描驱动电路(100)提供的栅极驱动信号输出到扫描线(300)，以驱动显示面板的像素；当控制电路(200)的第二输入端(202)的输入信号为第二控制信号时，将针对显示面板像素的栅极关断电压信号输出到扫描线(300)。该显示面板及其驱动电路和驱动方法能够在不增加额外成本的同时，降低显示面板的功耗。

Description

显示面板及其驱动电路和驱动方法 技术领域
本发明属于液晶显示技术领域，更具体地说，涉及一种显示面板及其驱动电路和驱动方法。
背景技术
TFT-LCD(Thin Film Transistor Liquid Crystal Display，薄膜晶体管液晶显示器)是当前平板显示的主要品种之一，已经成为了现代IT、视讯产品中重要的显示平台。TFT-LCD主要驱动原理是：系统主板将R/G/B压缩信号、控制信号及动力通过线材与PCB上的连接器(connector)相连接，数据经过PCB上的TCON(Timing Controller，时序控制器)集成电路(IC)处理后，经PCB，通过S-COF(Source-Chip on Film)和G-COF(Gate-Chip on Film)与显示区连接，从而使得LCD获得所需的电源、信号。
传统的显示面板刷新频率为60Hz，也就是说，屏幕每秒被刷新60次，每一次刷新都是对显示区域的每一个显示像素进行充电和放电的过程。当画面处于快速运动的状态(例如，播放视频、游戏、滚动等)，这个刷新频率是有必要的；但如果是静态画面，仍然会不停的刷新，这将造成很多不必要的功耗损失。
发明内容
为克服现有技术的不足，本发明的示例性实施例提供一种能够在不增加额外成本的同时，降低显示面板的功耗的显示面板及其驱动电路和驱动方法。
根据本发明的示例性实施例一方面提供一种显示面板的驱动电路，其中，所述驱动电路包括：扫描驱动电路，为显示面板上的各个像素提供栅极驱动信号；扫描线，连接到显示面板上的各个像素；控制电路，设置在所述扫描驱动电路和所述扫描线之间，所述控制电路的第一输入端连接到所述扫描驱动电路 的输出端，所述控制电路的输出端连接到所述扫描线，所述控制电路被配置为：当所述控制电路的第二输入端的输入信号为第一控制信号时，将所述扫描驱动电路提供的栅极驱动信号输出到所述扫描线，以驱动显示面板的像素；当所述控制电路的第二输入端的输入信号为第二控制信号时，将针对显示面板像素的栅极关断电压信号输出到所述扫描线。
可选地，所述控制电路包括第一晶体管和第二晶体管，所述第一晶体管的栅极和所述第二晶体管的栅极均连接到所述控制电路的第二输入端，所述第一晶体管的源极连接到所述扫描驱动电路的输出端，所述第一晶体管的漏极连接到所述第二晶体管的源极，所述第二晶体管的漏极连接到所述扫描线并被施加所述栅极关断电压信号，并且，当所述控制电路的第二输入端的输入信号为第一控制信号时，所述第一晶体管被导通，所述第二晶体管被截止，当所述控制电路的第二输入端的输入信号为第二控制信号时，所述第一晶体管被截止，所述第二晶体管被导通。
可选地，通过将当前帧与前一帧按照像素行进行比较，来确定所述控制电路的第二输入端的输入信号是第一控制信号还是第二控制信号。
可选地，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像不同时，所述控制电路的第二输入端的输入信号为第一控制信号，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像相同时，所述控制电路的第二输入端的输入信号为第二控制信号，其中，i为整数，且1≤i≤像素行的最大行数。
可选地，所述第一晶体管为PMOS晶体管，所述第二晶体管为NMOS晶体管。
可选地，所述控制电路设置在显示面板上的扇出区域中。
根据本发明的示例性实施例另一方面提供一种显示面板的驱动方法，所述显示面板包括扫描驱动电路、扫描线以及设置在所述扫描驱动电路与所述扫描线之间的控制电路，其中，所述扫描驱动电路为显示面板上的各个像素提供栅极驱动信号，所述扫描线连接到显示面板上的各个像素，所述控制电路的第一输入端连接到所述扫描驱动电路的输出端，所述控制电路的输出端连接到所述 扫描线，所述驱动方法包括：当所述控制电路的第二输入端的输入信号为第一控制信号时，将所述扫描驱动电路提供的栅极驱动信号输出到所述扫描线，以驱动显示面板的像素；当所述控制电路的第二输入端的输入信号为第二控制信号时，将针对显示面板像素的栅极关断电压信号输出到所述扫描线。
可选地，所述控制电路包括第一晶体管和第二晶体管，所述第一晶体管的栅极和所述第二晶体管的栅极均连接到所述控制电路的第二输入端，所述第一晶体管的源极连接到所述扫描驱动电路的输出端，所述第一晶体管的漏极连接到所述第二晶体管的源极，所述第二晶体管的漏极连接到所述扫描线并被施加所述栅极关断电压信号，并且，当所述控制电路的第二输入端的输入信号为第一控制信号时，所述第一晶体管被导通，所述第二晶体管被截止，当所述控制电路的第二输入端的输入信号为第二控制信号时，所述第一晶体管被截止，所述第二晶体管被导通。
可选地，通过将当前帧与前一帧按照像素行进行比较，来确定所述控制电路的第二输入端的输入信号是第一控制信号还是第二控制信号。
可选地，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像不同时，所述控制电路的第二输入端的输入信号为第一控制信号，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像相同时，所述控制电路的第二输入端的输入信号为第二控制信号，其中，i为整数，且1≤i≤像素行的最大行数。
可选地，所述第一晶体管为PMOS晶体管，所述第二晶体管为NMOS晶体管。
根据本发明的示例性实施例提供的显示面板及其驱动电路和驱动方法，能够在不增加额外成本的同时，降低显示面板的功耗。
将在接下来的描述中部分阐述本发明另外的方面和/或优点，还有一部分通过描述将是清楚的，或者可以经过本发明的实施而得知。
附图说明
通过下面结合附图进行的对实施例的描述，本发明的上述和/或其它目的和 优点将会变得更加清楚，其中：
图1是示出根据本发明示例性实施例的显示面板的驱动架构的示意图；
图2是示出根据本发明示例性实施例的驱动面板的驱动电路的示意性框图；
图3是示出根据本发明示例性实施例的控制电路的示意性框图；
图4是示出根据本发明示例性实施例的显示面板的驱动方法的流程图；
图5是示出根据本发明示例性实施例的显示面板的驱动方法的实施例的示意图。
具体实施方式
现在将详细地描述本发明的示例性实施例，本发明的示例性实施例的示例示出在附图中。下面通过参照附图描述实施例来解释本发明。然而，本发明可以以许多不同的形式实施，而不应被解释为局限于在此阐述的示例性实施例。相反，提供这些实施例使得本公开将是彻底的和完整的，并且这些实施例将把本发明的范围充分地传达给本领域技术人员。
在本发明的示例性实施例中提出一种显示面板的驱动电路，这里，所述显示面板包括由多个呈阵列布置的像素单元构成的像素单元阵列(简称像素)，并且，所述显示面板包括至少两个区域，即，扇出区域和显示区域。下面，将结合图1对显示面板以及显示面板的驱动架构进行详细地阐述。
图1是示出根据本发明示例性实施例的显示面板的驱动架构的示意图。
如图1所示，显示面板的驱动架构总体上包括：PCB(Printed Circuit Board，印刷电路板)、源极覆晶薄膜(Source-Chip on Film，S-COF)(如图1中的S-COF1至S-COF4，S-COF1至S-COF4统称为S-COF)、栅极覆晶薄膜G-COF(Gate-Chip on Film，G-COF)(如图1中的G-COF1至G-COF4，G-COF1至G-COF4统称为G-COF)以及显示面板1。显示面板1包括由多个呈阵列布置 的像素单元构成的像素单元阵列(简称像素)，并且，显示面板1包括两个区域，即，扇出区域10和显示区域20(也可称作有效显示区)。
参照图1，图1所示的显示面板的驱动架构的主要驱动原理如下：系统主板将R/G/B压缩信号、控制信号及动力通过线材与PCB上的连接器(connector)相连接，数据经过PCB上的TCON(Timing Controller，时序控制器)集成电路(IC)处理后，经PCB，通过S-COF和G-COF与显示区连接，从而使得显示面板获得所需的电源、信号。
具体地讲，系统主板通过G-COF为显示面板1提供驱动信号和控制信号，系统主板通过S-COF为显示面板1提供另一控制信号和数据信号，使得显示面板1上的像素进行正常显示。
可选地，显示面板1可为TFT-LCD(Thin Film Transistor Liquid Crystal Display，薄膜晶体管液晶显示器)。在该示例中，显示面板1上的各个像素的核心组成部分为TFT(薄膜晶体管)。
图2是示出根据本发明示例性实施例的驱动面板的驱动电路的示意性框图。
如图2所示，根据本发明示例性实施例的显示面板的驱动电路包括：扫描驱动电路100、控制电路200和扫描线300。进一步地，扫描驱动电路100为显示面板1上的各个像素提供栅极驱动信号。扫描线300连接到显示面板1上的各个像素。控制电路200设置在扫描驱动电路100和扫描线300之间，控制电路200的第一输入端201连接到扫描驱动电路100的输出端，控制电路200的输出端203连接到扫描线300。
进一步地，控制电路200被配置为：当控制电路200的第二输入端202的输入信号为第一控制信号时，将扫描驱动电路100提供的栅极驱动信号输出到扫描线300，以驱动显示面板1的像素；当控制电路200的第二输入端202的输入信号为第二控制信号时，将栅极关断电压信号输出到扫描线300。
图3是示出根据本发明示例性实施例的控制电路200的示意性框图。如图3所示，控制电路200的第一输入端由标号B表示，控制电路200的第二输入 端由标号A表示，控制电路200的输出端由标号C表示。
参照图3，控制电路200可包括第一晶体管A1和第二晶体管A2。第一晶体管A1的栅极和第二晶体管A2的栅极均连接到控制电路200的第二输入端A，第一晶体管A1的源极连接到扫描驱动电路100的输出端，第一晶体管A1的漏极连接到第二晶体管A2的源极，第二晶体管A2的漏极连接到扫描线300并被施加针对显示面板像素的栅极关断电压信号VGL(例如但不限于-9V)。
在一个实施例中，当控制电路200的第二输入端A的输入信号为第一控制信号时，第一晶体管A1被导通，第二晶体管A2被截止，并且，控制电路200将扫描驱动电路100经由控制电路200的第一输入端B提供的栅极驱动信号经由控制电路200的输出端C输出到扫描线300，以驱动显示面板1的像素。当控制电路200的第二输入端A的输入信号为第二控制信号时，第一晶体管A1被截止，第二晶体管A2被导通，并且，控制电路200将栅极关断电压信号VGL经由控制电路200的输出端C输出到扫描线300，在这种情况下，栅极驱动信号不被输出到扫描线300，扫描线300将栅极关断电压信号VGL施加到显示面板的相应像素，使得像素中的晶体管被截止，从而该像素不进行刷新。
在一个示例中，第一晶体管A1是PMOS晶体管，第二晶体管A2是NMOS晶体管。在该示例中，第一控制信号是低电平信号(例如但不限于0V电压信号)(低电平信号是PMOS晶体管的开启电压以及NMOS晶体管的关断电压)，当控制电路200的第二输入端A的输入信号为所述低电平信号时，PMOS晶体管A1被导通，NMOS晶体管A2被截止；第二控制信号是高电平信号(例如但不限于3.3V电压信号)(高电平信号是NMOS晶体管的开启电压以及PMOS晶体管的关断电压)，当控制电路200的第二输入端A的输入信号为所述高电平信号时，PMOS晶体管A1被截止，NMOS晶体管A2被导通。
在另一示例中，第一晶体管A1是NMOS晶体管，第二晶体管A2是PMOS晶体管。在该示例中，第一控制信号是高电平信号(例如但不限于3.3V电压信号)，当控制电路200的第二输入端A的输入信号为所述高电平信号时，NMOS晶体管A1被导通，PMOS晶体管A2被截止；第二控制信号是低电平信号(例如但不限于0V电压信号)，当控制电路200的第二输入端A的输入信号为所述低电平信号时，NMOS晶体管A1被截止，PMOS晶体管A2被导 通。
可选地，可通过将当前帧与前一帧按照像素行进行比较，来确定控制电路200的第二输入端A的输入信号是第一控制信号还是第二控制信号。
可选地，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像不同时，控制电路200的第二输入端A的输入信号为第一控制信号，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像相同时，控制电路200的第二输入端A的输入信号为第二控制信号，其中，i为整数，且1≤i≤像素行的最大行数。
可选地，结合图1，如上所述的控制电路200可设置在如图1所示的显示面板1上的扇出区域10中。优选地，如上所述的控制电路200可设置在如图1所示的显示面板1上G-COF侧的扇出区域10中。
可选地，控制电路200的第二输入端可连接到TCON的输出端。
可选地，如上所述的驱动电路可为GOA式驱动电路。
根据本发明的示例性实施例另一方面提供一种显示面板的驱动方法。显示面板包括：扫描驱动电路、扫描线以及设置在扫描驱动电路与扫描线之间的控制电路。扫描驱动电路为显示面板上的各个像素提供栅极驱动信号，扫描线连接到显示面板上的各个像素，控制电路的第一输入端连接到扫描驱动电路的输出端，控制电路的输出端连接到扫描线。下面将结合图4来具体阐述根据本发明示例性实施例的显示面板的驱动方法。
图4是示出根据本发明示例性实施例的显示面板的驱动方法的流程图。
如图4所示，在步骤S401，判断控制电路的第二输入端的输入信号是第一控制信号还是第二控制信号。如果控制电路的第二输入端的输入信号为第一控制信号，则在步骤S402，将扫描驱动电路提供的栅极驱动信号输出到扫描线，以驱动显示面板的像素。如果控制电路的第二输入端的输入信号为第二控制信号，则在步骤S403，将栅极关断电压信号输出到扫描线。
可选地，控制电路可包括第一晶体管和第二晶体管。第一晶体管的栅极和 第二晶体管的栅极均连接到控制电路的第二输入端，第一晶体管的源极连接到扫描驱动电路的输出端，第一晶体管的漏极连接到第二晶体管的源极，第二晶体管的漏极连接到扫描线并被施加栅极关断电压信号(例如但不限于-9V)。
在一个实施例中，当控制电路的第二输入端的输入信号为第一控制信号时，第一晶体管被导通，第二晶体管被截止，并且，控制电路将扫描驱动电路提供的栅极驱动信号输出到扫描线，以驱动显示面板的像素。当控制电路的第二输入端的输入信号为第二控制信号时，第一晶体管被截止，第二晶体管被导通，并且，控制电路将栅极关断电压信号输出到扫描线，在这种情况下，栅极驱动信号不被输出到扫描线，扫描线将栅极关断电压信号施加到显示面板的相应像素，使得像素中的晶体管被截止，从而该像素不进行刷新。
在一个示例中，第一晶体管是PMOS晶体管，第二晶体管是NMOS晶体管。在该示例中，第一控制信号是低电平信号(例如但不限于0V电压信号)，当控制电路的第二输入端的输入信号为所述低电平信号时，PMOS晶体管被导通，NMOS晶体管被截止；第二控制信号是高电平信号(例如但不限于3.3V电压信号)，当控制电路的第二输入端的输入信号为所述高电平信号时，PMOS晶体管被截止，NMOS晶体管被导通。
在另一示例中，第一晶体管是NMOS晶体管，第二晶体管是PMOS晶体管。在该示例中，第一控制信号是高电平信号(例如但不限于3.3V电压信号)，当控制电路的第二输入端A的输入信号为所述高电平信号时，NMOS晶体管被导通，PMOS晶体管被截止；第二控制信号是低电平信号(例如但不限于0V电压信号)，当控制电路的第二输入端的输入信号为所述低电平信号时，NMOS晶体管被截止，PMOS晶体管被导通。
可选地，在步骤S401，可通过将当前帧与前一帧按照像素行进行比较，来确定控制电路的第二输入端的输入信号是第一控制信号还是第二控制信号。可选地，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像不同时，控制电路的第二输入端的输入信号为第一控制信号；当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像相同时，控制电路的第二输入端的输入信号为第二控制信号，其中，i为整数，且1≤i≤像素行的最大行数。
以下，将结合具体的实施例来更具体地示出上述显示面板的驱动方法。
图5是示出根据本发明示例性实施例的显示面板的驱动方法的实施例的示意图。
如图5所示，显示面板1的显示区域20包含三个子区域，即，第一区域21、第二区域22和第三区域23。在示例中，在进行图像或视频的显示时，在第一区域21和第三区域23中显示的图像发生变化，在第二区域22中显示的图像不变。也就是说，当前帧利用在第一区域21中的像素行的像素显示的图像与前一帧利用在第一区域21中对应的像素行的像素显示的图像不同，当前帧利用在第二区域22中的像素行的像素显示的图像与前一帧利用在第二区域22中对应的像素行的像素显示的图像相同，当前帧利用在第三区域23中的像素行的像素显示的图像与前一帧利用在第三区域23中对应的像素行的像素显示的图像不同。
进一步地，第一区域21、第二区域22和第三区域23中的像素行的行数大于等于1。可选地，假设上述三个区域中的像素行均大于1，则当前帧利用在第一区域21中的每行像素显示的图像与前一帧利用在第一区域21中对应的各行像素显示的图像不同，当前帧利用在第二区域22中的每行像素显示的图像与前一帧利用在第二区域22中对应的各行像素显示的图像相同，当前帧利用在第三区域23中的每行像素显示的图像与前一帧利用在第三区域23中对应的各行像素显示的图像不同。
参照图5，图5中示出的显示面板包括如上面参照图3示出的驱动电路。控制电路的第一输入端B连接到G-COF(即，扫描驱动电路)的输出端，控制电路的输出端C连接到扫描线。在该实施例中，假设第一晶体管A1是PMOS晶体管，第二晶体管A2是NMOS晶体管，且第一控制信号是低电平信号(例如但不限于0V电压信号)，第二控制信号是高电平信号(例如但不限于3.3V电压信号)。
进一步地，当栅极信号扫描到第一区域21时，由于当前帧利用在第一区域21中的像素行的像素显示的图像与前一帧利用在第一区域21中对应的像素行的像素显示的图像不同，所以控制电路的第二输入端A的输入信号为第一控制信号。由于第一控制信号的低电平信号，所以PMOS晶体管A1被导通， NMOS晶体管A2被截止，此时，G-COF提供的栅极驱动信号经由控制电路的输出端C被输出到扫描线，以驱动第一区域21中的各个像素(即，第一区域21中的各个像素正常刷新)。
当栅极信号扫描到第二区域22时，由于当前帧利用在第二区域22中的像素行的像素显示的图像与前一帧利用在第二区域22中对应的像素行的像素显示的图像相同，所以控制电路的第二输入端A的输入信号为第二控制信号。由于第二控制信号的高电平信号，所以PMOS晶体管A1被截止，NMOS晶体管A2被导通，此时，G-COF提供的栅极驱动信号无法经由控制电路的输出端C被输出到扫描线，替代地，栅极关断电压信号VGL经由控制电路的输出端C被输出到扫描线，第二区域22中的各个像素不刷新。
与第一区域21类似地，当栅极信号扫描到第三区域23时，由于当前帧利用在第三区域23中的像素行的像素显示的图像与前一帧在第三区域23中对应的像素行的像素显示的图像不同，所以控制电路的第二输入端A的输入信号为第一控制信号。由于第一控制信号的低电平信号，所以PMOS晶体管A1被导通，NMOS晶体管A2被截止，此时，G-COF提供的栅极驱动信号经由控制电路的输出端C被输出到扫描线，以驱动第三区域23中的各个像素(即，第一区域21中的各个像素正常刷新)。
可选地，控制电路的第二输入端可连接到TCON的输出端。TCON可存储前一帧的图像，并将当前帧的图像与前一帧的图像按像素行进行对比。
此外，根据本发明的示例性实施例的显示面板及其驱动电路和驱动方法利用至少两个晶体管之间的组合电路，实现了动态的区域选择性刷新，并且能够在不增加额外成本的同时，降低显示面板的功耗。
本发明的以上实施例仅仅是示例性的，而本发明并不受限于此。本领域技术人员应该理解：在不脱离本发明的原理和精神的情况下，可对这些实施例进行改变，其中，本发明的范围在权利要求及其等同物中限定。

Claims (12)

  1. 一种显示面板的驱动电路，其中，所述驱动电路包括：
    扫描驱动电路，为显示面板上的各个像素提供栅极驱动信号；
    扫描线，连接到显示面板上的各个像素；
    控制电路，设置在所述扫描驱动电路和所述扫描线之间，所述控制电路的第一输入端连接到所述扫描驱动电路的输出端，所述控制电路的输出端连接到所述扫描线，所述控制电路被配置为：
    当所述控制电路的第二输入端的输入信号为第一控制信号时，将所述扫描驱动电路提供的栅极驱动信号输出到所述扫描线，以驱动显示面板的像素；
    当所述控制电路的第二输入端的输入信号为第二控制信号时，将针对显示面板像素的栅极关断电压信号输出到所述扫描线。
  2. 根据权利要求1所述的驱动电路，其中，所述控制电路包括第一晶体管和第二晶体管，所述第一晶体管的栅极和所述第二晶体管的栅极均连接到所述控制电路的第二输入端，所述第一晶体管的源极连接到所述扫描驱动电路的输出端，所述第一晶体管的漏极连接到所述第二晶体管的源极，所述第二晶体管的漏极连接到所述扫描线并被施加所述栅极关断电压信号，并且，当所述控制电路的第二输入端的输入信号为第一控制信号时，所述第一晶体管被导通，所述第二晶体管被截止，当所述控制电路的第二输入端的输入信号为第二控制信号时，所述第一晶体管被截止，所述第二晶体管被导通。
  3. 根据权利要求1所述的驱动电路，其中，通过将当前帧与前一帧按照像素行进行比较，来确定所述控制电路的第二输入端的输入信号是第一控制信号还是第二控制信号。
  4. 根据权利要求3所述的驱动电路，其中，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像不同时，所述控制电路的第二输入端的输入信号为第一控制信号，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像相同时，所述控制电路的第二输入端的输入信号为 第二控制信号，其中，i为整数，且1≤i≤像素行的最大行数。
  5. 根据权利要求2所述的驱动电路，所述第一晶体管为PMOS晶体管，所述第二晶体管为NMOS晶体管。
  6. 根据权利要求3所述的驱动电路，所述第一晶体管为PMOS晶体管，所述第二晶体管为NMOS晶体管。
  7. 根据权利要求4所述的驱动电路，所述第一晶体管为PMOS晶体管，所述第二晶体管为NMOS晶体管。
  8. 一种显示面板，其中，所述显示面板包括驱动电路，其中，所述驱动电路包括：
    扫描驱动电路，为显示面板上的各个像素提供栅极驱动信号；
    扫描线，连接到显示面板上的各个像素；
    控制电路，设置在所述扫描驱动电路和所述扫描线之间，所述控制电路的第一输入端连接到所述扫描驱动电路的输出端，所述控制电路的输出端连接到所述扫描线，所述控制电路被配置为：
    当所述控制电路的第二输入端的输入信号为第一控制信号时，将所述扫描驱动电路提供的栅极驱动信号输出到所述扫描线，以驱动显示面板的像素；
    当所述控制电路的第二输入端的输入信号为第二控制信号时，将针对显示面板像素的栅极关断电压信号输出到所述扫描线。
  9. 一种显示面板的驱动方法，所述显示面板包括扫描驱动电路、扫描线以及设置在所述扫描驱动电路与所述扫描线之间的控制电路，其中，所述扫描驱动电路为显示面板上的各个像素提供栅极驱动信号，所述扫描线连接到显示面板上的各个像素，所述控制电路的第一输入端连接到所述扫描驱动电路的输出端，所述控制电路的输出端连接到所述扫描线，所述驱动方法包括：
    当所述控制电路的第二输入端的输入信号为第一控制信号时，将所述扫描驱动电路提供的栅极驱动信号输出到所述扫描线，以驱动显示面板的像素；
    当所述控制电路的第二输入端的输入信号为第二控制信号时，将针对显示面板像素的栅极关断电压信号输出到所述扫描线。
  10. 根据权利要求9所述的驱动方法，其中，所述控制电路包括第一晶体管和第二晶体管，所述第一晶体管的栅极和所述第二晶体管的栅极均连接到所述控制电路的第二输入端，所述第一晶体管的源极连接到所述扫描驱动电路的输出端，所述第一晶体管的漏极连接到所述第二晶体管的源极，所述第二晶体管的漏极连接到所述扫描线并被施加所述栅极关断电压信号，并且，当所述控制电路的第二输入端的输入信号为第一控制信号时，所述第一晶体管被导通，所述第二晶体管被截止，当所述控制电路的第二输入端的输入信号为第二控制信号时，所述第一晶体管被截止，所述第二晶体管被导通。
  11. 根据权利要求9所述的驱动方法，其中，通过将当前帧与前一帧按照像素行进行比较，来确定所述控制电路的第二输入端的输入信号是第一控制信号还是第二控制信号。
  12. 根据权利要求11所述的驱动方法，其中，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像不同时，所述控制电路的第二输入端的输入信号为第一控制信号，当当前帧利用第i行像素显示的图像与前一帧利用第i行像素显示的图像相同时，所述控制电路的第二输入端的输入信号为第二控制信号，其中，i为整数，且1≤i≤像素行的最大行数。
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CN114822401B (zh) * 2022-06-30 2022-09-27 惠科股份有限公司 显示装置、源极覆晶薄膜和驱动方法

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