WO2017185974A1 - 一种显示驱动电路、其驱动方法及显示装置 - Google Patents

一种显示驱动电路、其驱动方法及显示装置 Download PDF

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Publication number
WO2017185974A1
WO2017185974A1 PCT/CN2017/080077 CN2017080077W WO2017185974A1 WO 2017185974 A1 WO2017185974 A1 WO 2017185974A1 CN 2017080077 W CN2017080077 W CN 2017080077W WO 2017185974 A1 WO2017185974 A1 WO 2017185974A1
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Prior art keywords
circuit
signal
reference voltage
power management
output
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PCT/CN2017/080077
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English (en)
French (fr)
Inventor
郑亮亮
金婷婷
Original Assignee
京东方科技集团股份有限公司
合肥京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 合肥京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/735,976 priority Critical patent/US10380963B2/en
Publication of WO2017185974A1 publication Critical patent/WO2017185974A1/zh
Priority to US16/456,408 priority patent/US10643728B2/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0289—Details of voltage level shifters arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0294—Details of sampling or holding circuits arranged for use in a driver for data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Definitions

  • the present disclosure belongs to the field of display technologies, and in particular, to a display driving circuit, a driving method thereof, and a display device.
  • a flat panel display generally consists of a matrix of pixels arranged in both horizontal and vertical directions.
  • a gate input signal is generated by a shift register, and each row of pixels is sequentially scanned from the first row to the last row.
  • the shift register is composed of a series of multi-stage shift register units, and the output signal of the shift register unit of the previous stage is used as an input signal of the shift register unit of the subsequent stage.
  • the embodiments of the present disclosure provide a display driving circuit, a driving method thereof, and a display device, which are used to solve the problem that the existing display driving chip may output a gate driving control that does not match the voltage required by the GOA in the display panel.
  • the signal causes an abnormality in the product.
  • a display driving circuit provided by an embodiment of the present invention includes: a power management circuit, a logic circuit, and a voltage detecting circuit; wherein a first output end of the logic circuit is connected to a first input end of the power management circuit a second output terminal coupled to the first input of the voltage detection circuit; an output of the power management circuit coupled to a second input of the voltage detection circuit; an output of the voltage detection circuit and the The second input end of the power management circuit is connected;
  • the logic circuit is configured to output a standard reference voltage signal to the voltage detecting circuit, and output a control signal to the power management circuit, where the control signal is used to control the power management circuit to output a reference voltage signal;
  • the voltage detecting circuit is configured to control the power management circuit to stop when it is determined that the received reference voltage signal output by the power management circuit is abnormal according to the standard reference voltage signal output by the logic circuit The reference voltage signal is output.
  • an output end of the voltage detecting circuit is connected to an input end of the logic circuit
  • the voltage detecting circuit is further configured to determine, according to the standard reference voltage signal output by the logic circuit And when the received reference voltage signal output by the power management circuit has an abnormality, controlling the logic circuit to stop outputting the control signal.
  • the display driving circuit provided by the embodiment of the present invention further includes: a reset circuit, wherein the output end of the voltage detecting circuit is respectively connected to the second of the power management circuit by the reset circuit The input terminal is connected to the input end of the logic circuit;
  • the voltage detecting circuit is configured to send an alarm to the reset circuit when it is determined that the received reference voltage signal output by the power management circuit is abnormal according to the standard reference voltage signal output by the logic circuit signal;
  • the reset circuit is configured to, when receiving the alarm signal, send a static signal to the power management circuit and the logic circuit to control the power management circuit and the logic circuit to be in a stationary state.
  • the voltage detecting circuit includes: a sampling circuit connected to an output end of the power management circuit, and connected to the logic circuit Comparison circuit
  • the sampling circuit is configured to output a digital signal to the comparison circuit after receiving the reference voltage signal
  • the comparison circuit is configured to compare the digital signal with the received standard reference voltage signal, and when determining that the difference between the digital signal and the standard reference voltage signal is not within a threshold range, The reset circuit transmits the alarm signal.
  • the comparing circuit is further configured to: when determining that a difference between the digital signal and the standard reference voltage signal is within a threshold range Sending a normal signal different from the alarm signal to the reset circuit.
  • the alarm signal is a high level signal
  • the normal signal is a low level signal
  • the voltage detecting circuit includes: a sampling circuit connected to an output end of the power management circuit, and connected to the logic circuit Comparison circuit
  • the sampling circuit is configured to receive the reference voltage signal and convert it into a digital signal and output the signal to the comparison circuit;
  • the comparison circuit is configured to compare the digital signal with the received standard reference voltage signal, and when determining that a difference between the digital signal and the standard reference voltage signal is not within a threshold range, A power management circuit and the logic circuit transmit a stationary signal that controls the power management circuit and the logic circuit to be in a stationary state.
  • the comparing circuit is further configured to: when determining that a difference between the digital signal and the standard reference voltage signal is within a threshold range And transmitting, to the power management circuit and the logic circuit, a normal signal that controls the power management circuit and the logic circuit to be in an active state.
  • the method further includes: a conversion circuit; a first input end of the level conversion circuit is connected to an output end of the power management circuit, a second input end is connected to a third output end of the logic circuit, and an output end and a shift register signal output port Connected
  • the level conversion circuit is configured to generate a gate driving control signal according to the high voltage power signal sent by the logic circuit and the reference voltage signal sent by the power management circuit, and output the signal.
  • the reference power signal includes a low voltage reference voltage signal and a high voltage reference voltage signal.
  • the embodiment of the invention further provides a driving method for the above display driving circuit, comprising:
  • the logic circuit outputs a standard reference voltage signal to the voltage detecting circuit
  • the power management circuit outputs a reference voltage signal to the voltage detecting circuit
  • the voltage detecting circuit determines whether the received reference voltage signal has an abnormality according to the received standard reference voltage signal, and when the reference voltage signal has an abnormality, the voltage detecting circuit controls the power management circuit Stopping outputting the reference voltage signal, the power management circuit works normally when there is no abnormality in the reference voltage signal.
  • the driving method provided by the embodiment of the present invention further includes:
  • the voltage detecting circuit further controls the logic circuit to stop outputting the control signal when there is an abnormality in the reference voltage signal.
  • a display device includes a display panel with an integrated shift register, and any of the above display driving circuits provided by the embodiments of the present invention.
  • the display panel is a liquid crystal display panel or an electroluminescent display panel.
  • a display driving circuit, a driving method thereof and a display device are provided in some embodiments of the present disclosure.
  • a voltage detecting circuit is added, and the voltage detecting circuit can output a standard reference voltage signal according to the logic circuit. Determining whether there is an abnormality in the reference voltage signal outputted by the power management circuit, and determining that the reference voltage signal is abnormal, the control power management circuit stops outputting the reference voltage signal, so that the power management circuit is in the static mode, and the display panel is in a white state. Or the normally black mode, which eliminates the possibility that the gate drive control signal that does not match the voltage required by the shift register is input to the shift register of the display panel, thereby avoiding the display product output after the assembly. The product is abnormal due to a mismatch between the signal and the display panel.
  • FIG. 1 is a schematic structural view of a flat panel display in the prior art
  • FIG. 2 is a second schematic structural diagram of a flat panel display in the prior art
  • FIG. 3 is a schematic structural diagram of a display driving circuit according to an embodiment of the present invention.
  • FIG. 4 is a second schematic structural diagram of a display driving circuit according to an embodiment of the present invention.
  • FIG. 5 is a third schematic structural diagram of a display driving circuit according to an embodiment of the present invention.
  • FIG. 6 is a fourth schematic structural diagram of a display driving circuit according to an embodiment of the present invention.
  • FIG. 7 is a fifth schematic structural diagram of a display driving circuit according to an embodiment of the present invention.
  • the shift register can be placed in the gate driver chip (Gate IC).
  • TCON After the system transmits the image information to the timing controller (TCON), TCON outputs the STV/CPV/OE signal to the gate driver chip.
  • (Gate IC) controls it, and the gate driving chip controls each gate line G1, G2, G3, G4 in the display panel to be turned on line by line according to the above signal, and TCON outputs DATA/CLK/LOAD/POL signal to the source.
  • a source IC the source driver chip inputs a corresponding data signal to each of the data lines S1, S2, S3, S4, S5, S6, S7, ... in the display panel according to the above signal.
  • the manufacturer manufactures a multi-level amorphous silicon shift register directly on the base substrate of the display panel through the amorphous silicon process, thereby replacing the gate driving chip, thereby reducing the display panel manufacturing.
  • the purpose of the cost As shown in Figure 2, when the shift register is integrated on the display panel (GOA Array), the gate driver, TCON and Source IC can be integrated into one chip (1-Chip IC), which can be called a display driver chip.
  • the 1-Chip IC is used to supply a gate drive control signal (GIP Signal) to the GOA Array in addition to inputting corresponding data signals to the data lines S1 ... S7 in the display panel.
  • GIP Signal gate drive control signal
  • the voltage requirement for the gate drive control signal will be different, and the gate drive control signal of the 1-Chip IC output will appear in the display panel. If the required voltage of the GOA does not match, the product abnormality may occur after the 1-Chip IC and the display panel are assembled into a product. If the product flows out to the client, the product quality risk may occur.
  • a display driving circuit provided by the embodiment of the present invention specifically includes: a power management circuit 100, a logic circuit 200, and a voltage detecting circuit 300.
  • the first output end of the logic circuit 200 and the power management circuit 100 The first input end is connected, the second output end of the logic circuit 200 is connected to the first input end of the voltage detecting circuit 300; the output end of the power management circuit 100 is connected to the second input end of the voltage detecting circuit 300; the voltage detecting circuit 300 The output is connected to the second input of the power management circuit 100;
  • the logic circuit 200 is configured to output a standard reference voltage signal to the voltage detecting circuit 300, and output a control signal to the power management circuit 100, and the control signal is used to control the power management circuit 100 to output a reference voltage signal;
  • the voltage detecting circuit 300 is configured to control the power management circuit 100 to stop outputting the reference voltage signal when it is determined that there is an abnormality in the reference voltage signal output by the received power management circuit 100 according to the standard reference voltage signal output by the logic circuit 200.
  • a voltage detecting circuit 300 is added to the existing display driving circuit, and the voltage detecting circuit 300 determines the reference output by the power management circuit 100 according to the standard reference voltage signal output by the logic circuit 200. Whether the voltage signal is abnormal and determines that the reference voltage signal exists When abnormal, the control power management circuit 100 stops outputting the reference voltage signal, so that the power management circuit 100 is in a standby mode. At this time, the display panel is in a normally white or normally black mode, and the voltage required for the shift register may be eliminated. The case where the mismatched gate drive control signal is input to the shift register of the display panel, thereby avoiding product abnormality caused by the display product after the assembly is out of alignment with the display panel.
  • the display driving circuit provided by the embodiment of the present invention generally includes a level converting circuit 400; the first input end of the level converting circuit 400 and the output of the power management circuit 100.
  • the second input is connected to the third output of the logic circuit 200, and the output is connected to the shift register signal output port 500.
  • the level conversion circuit 400 is configured to transmit a high voltage power signal and power management according to the logic circuit 200.
  • the reference voltage signal sent by the circuit 100 generates a gate drive control signal and outputs it to the GOA circuit on the display panel to provide a control signal for the GOA circuit.
  • the power management circuit 100 receives various power signals transmitted from the system chip, such as the power supply VDD, the +5V power supply VSN, and the -5V power supply shown in FIG.
  • the VSP signal is then generated based on the control signal sent by the logic circuit 200 to generate all of the logic voltage signals required inside the display driver circuit, wherein the reference voltage signal is generated and sent to the level conversion circuit 400.
  • other circuits including the logic circuit 200, the voltage detecting circuit 300, and the level converting circuit 400
  • the power supply VCI signal which provides a power signal to the circuit to which it is connected.
  • the reference voltage signal generally includes a low voltage reference voltage signal VGL and a high voltage reference voltage signal VGH.
  • the standard reference voltage signal mentioned in the embodiment of the present invention may be a low voltage reference voltage generated from a low voltage power supply VCI signal, for example, may be a reference voltage such as 0.9V, 1.0V, 1.1V, and the reference voltage is generated.
  • the circuit can refer to the content in the prior art, and details are not described herein again. However, the present disclosure is not limited to this.
  • the level converting circuit 400 receives the reference voltage signal sent by the power management circuit 100, and also receives the logic circuit. 200 high voltage power signal sent. Therefore, when the voltage detecting circuit 300 determines that there is an abnormality in the reference voltage signal generated by the power management circuit 100, in order to ensure that the level switching circuit 400 does not generate the gate driving control signal, it transmits the signal to the shift register signal output port 500.
  • the voltage detecting circuit 300 can also be configured to determine, when the reference voltage signal outputted by the received power management circuit 100 is abnormal according to the standard reference voltage signal output by the logic circuit 200, the control logic circuit 200 stops outputting the control signal, so that the logic circuit 200 It is in the quiescent mode and the logic circuit 200 does not output a high voltage power signal.
  • the power management circuit 100 does not receive the control signal from the logic circuit 200, and therefore does not output the reference voltage signal to the level conversion circuit 400.
  • the level conversion circuit 400 does not receive the signal.
  • the reset circuit 600 includes an output terminal of the voltage detecting circuit 300 connected to the second input terminal of the power management circuit 100 and the first input terminal of the logic circuit 200 through the reset circuit 600, respectively.
  • the voltage detecting circuit 300 added in the display driving circuit detects the abnormality of the reference voltage signal
  • the power management circuit 100 and the logic circuit 200 may be controlled to be in the static mode by the reset circuit 600.
  • the voltage detecting circuit 300 is specifically configured to send an alarm signal to the reset circuit 600 when it is determined that there is an abnormality in the reference voltage signal output by the received power management circuit 100 according to the standard reference voltage signal output by the logic circuit 200.
  • the reset circuit 600 is configured to, when receiving the mute signal, send a standby signal to the power management circuit 100 and the logic circuit 200 to control the power management circuit 100 and the logic circuit 200 to be in a stationary state, the power management circuit 100 and the logic circuit. 200 is in a stationary state after receiving a still signal and will not send any signal to the outside.
  • the logic circuit 200 provided by the embodiment of the present invention may be a dual input port circuit, and may define a first input end thereof as an input port outputted from the reset circuit 600 to the logic circuit 200, and a low voltage power supply VCI signal connected to the second input end thereof.
  • the present disclosure is not limited to this.
  • the reset circuit 600 may further receive a reset (RST) signal input from the outside of the display driving circuit, and the RST signal may also trigger the reset circuit. 600 sends a still signal.
  • RST reset
  • the reset circuit is also connected to the VCI signal, and the VCI signal also supplies a power signal to the reset circuit.
  • the output terminal of the voltage detecting circuit 300 is respectively connected to the second input end of the power management circuit 300 and the first input end of the logic circuit 200 through the reset circuit 600.
  • the voltage detecting circuit 300 may specifically include: a sampling circuit 310 connected to the output end of the power management circuit 100, and a comparison circuit 320 connected to the second output end of the logic circuit 200; wherein, sampling The circuit 310 is configured to be converted into a digital signal output to the comparison circuit 320 after receiving the reference voltage signal, and the comparison circuit 320 is configured to compare the digital signal with the received standard reference voltage signal to determine the digital signal and the standard reference voltage. When the difference of the signals is not within the threshold range, the mute signal is sent to the reset circuit 600.
  • the sampling circuit 310 collects the high voltage reference voltage output by the power management circuit 100.
  • the sampling circuit 310 internally includes a voltage dividing network, which converts the high voltage reference signal into a low voltage signal.
  • the specific example is as follows: if the standard reference voltage output by the logic circuit 200 The signal is 1V. If the high-voltage reference voltage output by the power management circuit 100 is designed to be ⁇ 12V, that is, when the high-voltage reference voltage is higher than 12V, the voltage-divided network output voltage of the sampling circuit 310 is higher than 1V, and the voltage detection is high.
  • the circuit 300 outputs a low level, the reset circuit 600 does not operate, and the system operates normally; otherwise, the voltage detecting circuit 300 outputs a high level, the reset circuit 600 operates, and the system is turned off.
  • the comparison circuit 320 can also And when the difference between the digital signal and the standard reference voltage signal is determined to be within a threshold range, the normal signal different from the alarm signal is sent to the reset circuit 600, or no signal is transmitted.
  • the alarm signal is a high level signal and the normal signal is a low level signal.
  • the reset circuit 600 does not operate after receiving the low level signal.
  • the power management circuit 100 and the logic circuit 200 operate normally, and the level conversion circuit 400 normally transmits the gate drive control signal.
  • the reset circuit 600 operates after receiving the high level signal, and sends a stationary signal to the power management circuit 100 and the logic circuit 200.
  • the display panel displays a normally black state or a normally white state. It should be noted that the alarm signal and the normal signal may also be other types of signals, as long as the controllable reset signal can be normally operated.
  • the voltage detecting circuit 300 may specifically include: a sampling circuit 310 connected to an output end of the power management circuit 100, and a comparison circuit 320 connected to the logic circuit 200.
  • the sampling circuit 310 is configured to receive a reference voltage. The signal is converted into a digital signal and output to the comparison circuit 320.
  • the comparison circuit 320 is configured to compare the digital signal with the received standard reference voltage signal, and when determining that the difference between the digital signal and the standard reference voltage signal is not within a threshold range, A stationary signal that controls the power management circuit 100 and the logic circuit 200 to be in a stationary state is transmitted to the power management circuit 100 and the logic circuit 200.
  • the comparison circuit 320 may be further configured to: when determining that the difference between the digital signal and the standard reference voltage signal is within a threshold range, to the power management circuit 100 and the logic circuit
  • the 200 transmits a normal signal that controls the power management circuit 100 and the logic circuit 200 to be in an active state, or does not transmit any signal.
  • the stationary signal is a high level signal and the normal signal is a low level signal.
  • the comparison circuit outputs a normal signal or does not send any signal, the power management circuit and the logic circuit can maintain a normal working state.
  • the power management circuit 100 and the logic circuit 200 operate normally when a normal signal is received, and the level conversion circuit 400 normally transmits a gate drive control signal.
  • the power management circuit 100 and the logic circuit 200 receive a still signal, both of which are in the standby mode, and there is no output signal. If the level conversion circuit 400 has no signal output, the shift register of the display panel has no signal input, and the display panel displays normally black. State or normally white state. It should be noted that the above-mentioned static signal and normal signal may also be other types of signals, as long as the controllable power management circuit and the logic circuit can work normally.
  • the display driving circuit provided by the embodiment of the present invention may specifically set the level conversion circuit 400 and the number of the shift register signal output port 500 connected thereto according to the type of the shift register disposed in the display panel.
  • a set of level conversion circuit 400 and shift register signal output port 500 may be disposed in the display driving circuit;
  • the shift register driven display panel, as shown in FIG. 7, can be provided with two sets of level shifting circuits 400 and shift register signal output ports 500 in the display driving circuit.
  • an embodiment of the present invention further provides a display device, including the display driving circuit and the integrated shift register display panel provided by the embodiment of the present invention.
  • the display device may be: a mobile phone, Any product or component that has a display function, such as a tablet, TV, monitor, notebook, digital photo frame, navigator, etc.
  • a display driving circuit any product or component that has a display function, such as a tablet, TV, monitor, notebook, digital photo frame, navigator, etc.
  • the display panel may specifically be a liquid crystal display panel, or may be an electroluminescent display panel, or may be a shift integrated on the display panel in other forms of illumination.
  • the display panel for generating a gate scan signal is not limited herein.
  • the embodiment of the invention further provides a driving method for the display driving circuit, which specifically includes:
  • the logic circuit outputs a standard reference voltage signal to the voltage detecting circuit
  • the power management circuit outputs a reference voltage signal to the voltage detecting circuit
  • the voltage detecting circuit determines whether there is an abnormality in the received reference voltage signal according to the received standard reference voltage signal. When the reference voltage signal is abnormal, the voltage detecting circuit controls the power management circuit to stop outputting the reference voltage signal. The power management circuit operates normally when there is no abnormality in the reference voltage signal.
  • the driving method further includes: when the reference voltage signal has an abnormality, the voltage detecting circuit further controls the logic circuit to stop outputting the control signal.
  • the display driving circuit, the driving method thereof and the display device provided by the embodiment of the invention add a voltage detecting circuit to the existing display driving circuit, and the voltage detecting circuit can determine the power source according to the standard reference voltage signal output by the logic circuit. Whether there is an abnormality in the reference voltage signal output by the management circuit, and when it is determined that the reference voltage signal is abnormal, the control power management circuit stops outputting the reference voltage signal, so that the power management circuit is in the static mode, and the display panel is normally white or normally black.
  • the mode eliminates the possibility that the gate drive control signal that does not match the voltage required by the shift register is input to the shift register of the display panel, thereby avoiding the display product output signal and display after the assembly. Product anomalies caused by panel mismatch.

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Abstract

一种显示驱动电路、其驱动方法及显示装置，在现有的显示驱动电路中增加了电压检测电路（300），该电压检测电路（300）根据逻辑电路（200）输出的标准参考电压信号，确定电源管理电路（100）输出的参考电压信号是否存在异常，在确定该参考电压信号存在异常时，控制电源管理电路（100）停止输出参考电压信号，使电源管理电路（100）处于静止模式，此时显示面板处于常白或常黑模式，杜绝了可能存在的与移位寄存器所需电压不匹配的栅极驱动控制信号输入到显示面板的移位寄存器中的情况，进而避免了组装之后的显示器产品由于显示驱动电路输出信号与显示面板不匹配导致的产品异常。

Description

一种显示驱动电路、其驱动方法及显示装置
本公开要求申请日为2016年4月25日、申请号为CN201610262856.5、发明创造名称为一种显示驱动电路、其驱动方法及显示装置的发明专利申请的优先权。
技术领域
本公开属于显示技术领域，尤其涉及一种显示驱动电路、其驱动方法及显示装置。
背景技术
近年来，随着半导体科技的蓬勃发展，便携式电子产品及平面显示器产品也随之兴起。平板显示器一般由水平和垂直两个方向排列的像素矩阵构成，在平板显示器进行显示时，通过移位寄存器产生栅极输入信号，从第一行到最后一行依次扫描各行像素。在设计平板显示器时，需要设计适当的移位寄存器，以保证其稳定工作。通常，移位寄存器是由多级移位寄存器单元串联构成，而前一级移位寄存器单元的输出信号作为后一级移位寄存器单元的输入信号。
发明内容
有鉴于此，本公开实施例提供了一种显示驱动电路、其驱动方法及显示装置，用以解决现有的显示驱动芯片可能会输出与显示面板中GOA所需电压不匹配的栅极驱动控制信号而导致产品异常的问题。
因此，本发明实施例提供的一种显示驱动电路，包括：电源管理电路，逻辑电路和电压检测电路；其中，所述逻辑电路的第一输出端与所述电源管理电路的第一输入端相连，第二输出端与所述电压检测电路的第一输入端相连；所述电源管理电路的输出端与所述电压检测电路的第二输入端相连；所述电压检测电路的输出端与所述电源管理电路的第二输入端相连；
所述逻辑电路，用于对所述电压检测电路输出标准参考电压信号，对所述电源管理电路输出控制信号，所述控制信号用于控制所述电源管理电路输出参考电压信号；
所述电压检测电路，用于在根据所述逻辑电路输出的所述标准参考电压信号，确定接收到的所述电源管理电路输出的所述参考电压信号存在异常时，控制所述电源管理电路停止输出所述参考电压信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述电压检测电路的输出端与所述逻辑电路的输入端相连；
所述电压检测电路，还用于在根据所述逻辑电路输出的所述标准参考电压信号，确定 接收到的所述电源管理电路输出的所述参考电压信号存在异常时，控制所述逻辑电路停止输出所述控制信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，还包括：复位电路，所述电压检测电路的输出端通过所述复位电路分别与所述电源管理电路的第二输入端和所述逻辑电路的输入端相连接；
所述电压检测电路，用于在根据所述逻辑电路输出的所述标准参考电压信号，确定接收到的所述电源管理电路输出的所述参考电压信号存在异常时，向所述复位电路发送报警信号；
所述复位电路，用于在接收到所述报警信号时，向所述电源管理电路和所述逻辑电路发送控制所述电源管理电路和所述逻辑电路处于静止状态的静止信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述电压检测电路，包括：与所述电源管理电路的输出端相连的采样电路，以及与所述逻辑电路相连的比较电路；
所述采样电路，用于在接收到所述参考电压信号后转换为数字信号输出到所述比较电路；
所述比较电路，用于将所述数字信号与接收到的的所述标准参考电压信号进行比较，在确定所述数字信号与所述标准参考电压信号的差值不在阈值范围内时，向所述复位电路发送所述报警信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述比较电路，还用于在确定所述数字信号与所述标准参考电压信号的差值在阈值范围内时，向所述复位电路发送与所述报警信号不同的正常信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述报警信号为高电平信号，所述正常信号为低电平信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述电压检测电路，包括：与所述电源管理电路的输出端相连的采样电路，以及与所述逻辑电路相连的比较电路；
所述采样电路，用于接收所述参考电压信号后转换为数字信号输出到所述比较电路；
所述比较电路，用于将所述数字信号与接收到的所述标准参考电压信号进行比较，在确定所述数字信号与所述标准参考电压信号的差值不在阈值范围内时，向所述电源管理电路和所述逻辑电路发送控制所述电源管理电路和所述逻辑电路处于静止状态的静止信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述比较电路，还用于在确定所述数字信号与所述标准参考电压信号的差值在阈值范围内时，向所述电源管理电路和所述逻辑电路发送控制所述电源管理电路和所述逻辑电路处于工作状态的正常信号。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，还包括：电平 转换电路；所述电平转换电路的第一输入端与所述电源管理电路的输出端相连，第二输入端与所述逻辑电路的第三输出端相连，输出端与移位寄存器信号输出端口相连；
所述电平转换电路，用于根据所述逻辑电路发送的高压电源信号和所述电源管理电路发送的参考电压信号生成栅极驱动控制信号后输出。
在一个实施例中的方式，在本发明实施例提供的上述显示驱动电路中，所述参考电源信号包括低压参考电压信号和高压参考电压信号。
本发明实施例还提供了一种上述显示驱动电路的驱动方法，包括：
所述逻辑电路对所述电压检测电路输出标准参考电压信号；
所述电源管理电路向所述电压检测电路输出参考电压信号；
所述电压检测电路根据接收到的所述标准参考电压信号，确定接收到的所述参考电压信号是否存在异常，当所述参考电压信号存在异常时，所述电压检测电路控制所述电源管理电路停止输出所述参考电压信号，当所述参考电压信号不存在异常时，所述电源管理电路正常工作。
在一个实施例中的方式，在本发明实施例提供的上述驱动方法中，还包括：
当所述参考电压信号存在异常时，所述电压检测电路还控制所述逻辑电路停止输出所述控制信号。
本发明实施例提供的一种显示装置，包括集成移位寄存器的显示面板，以及本发明实施例提供的上述任一种显示驱动电路。
在一个实施例中的方式，在本发明实施例提供的上述显示装置中，所述显示面板为液晶显示面板或电致发光显示面板。
本公开某些实施例的有益效果包括：
本公开某些实施例中提供的一种显示驱动电路、其驱动方法及显示装置，在现有的显示驱动电路中增加了电压检测电路，该电压检测电路可以根据逻辑电路输出的标准参考电压信号，确定电源管理电路输出的参考电压信号是否存在异常，并在确定该参考电压信号存在异常时，控制电源管理电路停止输出参考电压信号，使电源管理电路处于静止模式，此时显示面板处于常白或常黑模式，杜绝了可能存在的与移位寄存器所需电压不匹配的栅极驱动控制信号输入到显示面板的移位寄存器中的情况，进而避免了组装之后的显示器产品由于显示驱动电路输出信号与显示面板不匹配导致的产品异常。
附图说明
图1为现有技术中平板显示器的结构示意图之一；
图2为现有技术中平板显示器的结构示意图之二；
图3为本发明实施例提供的显示驱动电路的结构示意图之一；
图4为本发明实施例提供的显示驱动电路的结构示意图之二；
图5为本发明实施例提供的显示驱动电路的结构示意图之三；
图6为本发明实施例提供的显示驱动电路的结构示意图之四；
图7为本发明实施例提供的显示驱动电路的结构示意图之五。
具体实施方式
下面结合附图，对本发明实施例提供的显示驱动电路、其驱动方法及显示装置的具体实施方式进行详细地说明。
如图1所示，移位寄存器可以设置在栅极驱动芯片(Gate IC)中，在系统将图像信息传给时序控制器(TCON)后，TCON输出STV/CPV/OE信号到栅极驱动芯片(Gate IC)对其进行控制，栅极驱动芯片根据上述信号控制显示面板中的各栅线G1、G2、G3、G4……逐行开启，TCON输出DATA/CLK/LOAD/POL信号到源极驱动芯片(Source IC)，源极驱动芯片根据上述信号向显示面板中的各数据线S1、S2、S3、S4、S5、S6、S7……输入相应的数据信号。
目前，为了降低平板显示器的制作成本，业内厂商通过非晶硅工艺直接在显示面板的衬底基板上制作多级非晶硅移位寄存器，借以取代上述栅极驱动芯片，从而达到降低显示面板制作成本的目的。如图2所示，在移位寄存器集成于显示面板上(GOA Array)时，栅极驱动、TCON和Source IC可以集成于一个芯片(1-Chip IC)，可称之为显示驱动芯片。该1-Chip IC除了向显示面板中的各数据线S1……S7输入相应的数据信号以外，还用于提供给GOA Array的栅极驱动控制信号(GIP Signal)。
由于各家面板厂商设计的显示面板中的GOA模型会有所不同，对于栅极驱动控制信号的电压需求也会有所不同，会出现1-Chip IC输出的栅极驱动控制信号与显示面板中的GOA所需电压不匹配的情况，在将1-Chip IC与显示面板组装成产品后会出现产品异常，若产品外流至客户端可能导致产品品质风险。
本发明实施例提供的一种显示驱动电路，如图3所示，具体包括：电源管理电路100，逻辑电路200和电压检测电路300；其中，逻辑电路200的第一输出端与电源管理电路100的第一输入端相连，逻辑电路200的第二输出端与电压检测电路300的第一输入端相连；电源管理电路100的输出端与电压检测电路300的第二输入端相连；电压检测电路300的输出端与电源管理电路100的第二输入端相连；
逻辑电路200，用于对电压检测电路300输出标准参考电压信号，对电源管理电路100输出控制信号，该控制信号用于控制电源管理电路100输出参考电压信号；
电压检测电路300，用于在根据逻辑电路200输出的标准参考电压信号，确定接收到的电源管理电路100输出的参考电压信号存在异常时，控制电源管理电路100停止输出参考电压信号。
本发明实施例提供的上述显示驱动电路，在现有的显示驱动电路中增加了电压检测电路300，该电压检测电路300根据逻辑电路200输出的标准参考电压信号，确定电源管理电路100输出的参考电压信号是否存在异常，并在确定该参考电压信号存在 异常时，控制电源管理电路100停止输出参考电压信号，使电源管理电路100处于静止(standby)模式，此时显示面板处于常白或常黑模式，杜绝了可能存在的与移位寄存器所需电压不匹配的栅极驱动控制信号输入到显示面板的移位寄存器中的情况，进而避免了组装之后的显示器产品由于显示驱动电路输出信号与显示面板不匹配导致的产品异常。
在具体实施时，本发明实施例提供的上述显示驱动电路中，如图3所示，一般还会包括电平转换电路400；电平转换电路400的第一输入端与电源管理电路100的输出端相连，第二输入端与逻辑电路200的第三输出端相连，输出端与移位寄存器信号输出端口500相连；电平转换电路400，用于根据逻辑电路200发送的高压电源信号和电源管理电路100发送的参考电压信号生成栅极驱动控制信号后输出给显示面板上的GOA电路，为GOA电路提供控制信号。
在具体实施时，本发明实施例提供的上述显示驱动电路中，电源管理电路100会接收从系统芯片发送的各种电源信号例如图3中所示的电源VDD、+5V电源VSN和-5V电源VSP信号，之后根据逻辑电路200发送的控制信号生成显示驱动电路内部所需要的所有逻辑电压信号，其中，会生成参考电压信号后发送给电平转换电路400。并且，如图3所示，在显示驱动电路中，除了电源管理电路100的其他电路(包括逻辑电路200、电压检测电路300、电平转换电路400)还会接收由显示驱动电路外部输入的低压电源VCI信号，VCI信号为与其连接的电路提供电源信号。具体地，该参考电压信号一般具体包括低压参考电压信号VGL和高压参考电压信号VGH。
在具体实施时，本发明实施例中提及的标准参考电压信号可以是从低压电源VCI信号产生的低压基准电压，例如可以是0.9V、1.0V、1.1V等基准电压，且该基准电压产生电路可以参考现有技术中的内容，在此不再赘述。但本公开并不限定于此。
在具体实施时，本发明实施例提供的上述显示驱动电路中，如图3所示，电平转换电路400除了会收到电源管理电路100发送的参考电压信号之外，还会收到逻辑电路200发送的高压电源信号。因此，在电压检测电路300确定电源管理电路100生成的参考电压信号存在异常时，为保证电平转换电路400不会生成栅极驱动控制信号后发送到移位寄存器信号输出端口500，进一步地，电压检测电路300还可以用于在根据逻辑电路200输出的标准参考电压信号，确定接收到的电源管理电路100输出的参考电压信号存在异常时，控制逻辑电路200停止输出控制信号，使逻辑电路200处于静止模式，并且逻辑电路200也不会输出高压电源信号。此时，一方面电源管理电路100不会收到来自逻辑电路200的控制信号，因此也不会向电平转换电路400输出参考电压信号，另一方面，电平转换电路400也不会收到来自逻辑电路200的高压电源信号，因此，电平转换电路400不会生成栅极驱动控制信号。
进一步地，在本发明实施例提供的上述显示驱动电路中，如图4所示，还可以包 括：复位电路600，电压检测电路300的输出端通过复位电路600分别与电源管理电路100的第二输入端和逻辑电路200的第一输入端相连接。在具体实施时，在显示驱动电路中增加的电压检测电路300在检测到参考电压信号的异常时，具体可以通过复位电路600控制电源管理电路100和逻辑电路200处于静止模式。具体地，电压检测电路300，具体用于在根据逻辑电路200输出的标准参考电压信号，确定接收到的电源管理电路100输出的参考电压信号存在异常时，向复位电路600发送报警(mute)信号；复位电路600，用于在接收到mute信号时，向电源管理电路100和逻辑电路200发送控制电源管理电路100和逻辑电路200处于静止状态的静止(standby)信号，电源管理电路100和逻辑电路200收到静止信号后处于静止状态，不会向外发送任何信号。
本发明实施例提供的上述逻辑电路200可以是双输入端口电路，可以定义其第一输入端为从复位电路600输出给逻辑电路200的输入端口，低压电源VCI信号连接的为其第二输入端，但本公开并不限定于此。
进一步地，在本发明实施例提供上述显示驱动电路中，如图4所示，复位电路600，还可能接收由显示驱动电路外部输入的复位(RST)信号，该RST信号也可出触发复位电路600发送静止信号。
进一步地，在图4中，复位电路还连接VCI信号，VCI信号也为复位电路提供电源信号。
具体地，在本发明实施例提供的上述显示驱动电路中，在电压检测电路300的输出端通过复位电路600分别与电源管理电路300的第二输入端和逻辑电路200的第一输入端相连接时，如图5所示，电压检测电路300，可以具体包括：与电源管理电路100的输出端相连的采样电路310，以及与逻辑电路200的第二输出端相连的比较电路320；其中，采样电路310，用于在接收到参考电压信号后转换为数字信号输出到比较电路320；比较电路320，用于将数字信号与接收到的标准参考电压信号进行比较，在确定数字信号与标准参考电压信号的差值不在阈值范围内时，向复位电路600发送mute信号。
具体地，采样电路310采集电源管理电路100输出的高压参考电压，其中采样电路310内部含有分压网络，其将高压参考信号转换成低压信号，具体示例如下：若逻辑电路200输出的标准参考电压信号为1V，若设计需求的电源管理电路100输出的高压参考电压需要≥12V，即当该高压参考电压高于12V时，采样电路310内部的分压网络输出低压参考电压高于1V，电压检测电路300输出低电平，复位电路600不工作，系统正常工作；反之，电压检测电路300输出高电平，复位电路600工作，系统关闭。
进一步地，在本发明实施例提供的上述显示驱动电路中，比较电路320，还可以 用于在确定数字信号与标准参考电压信号的差值在阈值范围内时，向复位电路600发送与报警信号不同的正常信号，或者不发送任何信号。一般地，报警信号为高电平信号，正常信号为低电平信号。复位电路600收到低电平信号之后不工作，此时电源管理电路100和逻辑电路200正常工作，电平转换电路400正常发送栅极驱动控制信号。复位电路600收到高电平信号之后工作，向电源管理电路100和逻辑电路200发送静止信号，两者处于standby模式，电平转换电路400无信号输出，则显示面板的移位寄存器无信号输入，显示面板显示常黑态或常白态。需要说明的是，报警信号和正常信号也可以是其他类型的信号，只要满足可控制复位信号能否正常工作即可。
具体地，在本发明实施例提供的上述显示驱动电路中，在电压检测电路300的输出端直接分别与电源管理电路100的第二输入端和逻辑电路200的第一输入端相连接时，如图6所示，电压检测电路300，可以具体包括：与电源管理电路100的输出端相连的采样电路310，以及与逻辑电路200相连的比较电路320；其中，采样电路310，用于接收参考电压信号后转换为数字信号输出到比较电路320；比较电路320，用于将数字信号与接收到的标准参考电压信号进行比较，在确定数字信号与标准参考电压信号的差值不在阈值范围内时，向电源管理电路100和逻辑电路200发送控制电源管理电路100和逻辑电路200处于静止状态的静止信号。
进一步地，在本发明实施例提供的上述显示驱动电路中，比较电路320，还可以用于在确定数字信号与标准参考电压信号的差值在阈值范围内时，向电源管理电路100和逻辑电路200发送控制电源管理电路100和逻辑电路200处于工作状态的正常信号，或者不发送任何信号。一般地，静止信号为高电平信号，正常信号为低电平信号。当比较电路输出正常信号或者不发送任何信号时，电源管理电路和逻辑电路都能保持正常工作状态。电源管理电路100和逻辑电路200在收到正常信号时正常工作，电平转换电路400正常发送栅极驱动控制信号。电源管理电路100和逻辑电路200收到静止信号，两者处于standby模式，两者无输出信号，电平转换电路400无信号输出，则显示面板的移位寄存器无信号输入，显示面板显示常黑态或常白态。需要说明的是，上述静止信号和正常信号也可以是其他类型的信号，只要满足可控制电源管理电路和逻辑电路能否正常工作即可。
在具体实施时，本发明实施例提供的上述显示驱动电路可以根据移位寄存器在显示面板中设置的类型，具体设置电平转换电路400和与其连接的移位寄存器信号输出端口500的数量，具体地，为适用于单边移位寄存器驱动的显示面板，如图3和图4所示，显示驱动电路中可设置一套电平转换电路400和移位寄存器信号输出端口500；为适用于双边移位寄存器驱动的显示面板，如图7所示，显示驱动电路中可设置两套电平转换电路400和移位寄存器信号输出端口500。
基于同一发明构思，本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述显示驱动电路以及集成移位寄存器的显示面板，该显示装置可以为：手机、 平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。该显示装置的实施可以参见上述显示驱动电路的实施例，重复之处不再赘述。
进一步地，在本发明实施例提供的上述显示装置中，该显示面板具体可以为液晶显示面板，也可以为电致发光显示面板，还可以为其他发光形式的采用集成于显示面板上的移位寄存器生成栅极扫描信号的显示面板，在此不做限定。
本发明实施例还提供了一种上述显示驱动电路的驱动方法，具体包括：
逻辑电路对电压检测电路输出标准参考电压信号；
电源管理电路向电压检测电路输出参考电压信号；
电压检测电路根据接收到的标准参考电压信号，确定接收到的参考电压信号是否存在异常，当参考电压信号存在异常时，所述电压检测电路控制所述电源管理电路停止输出所述参考电压信号，当所述参考电压信号不存在异常时，所述电源管理电路正常工作。
进一步地，上述驱动方法还包括：当所述参考电压信号存在异常时，所述电压检测电路还控制所述逻辑电路停止输出所述控制信号。
本发明实施例提供的一种显示驱动电路、其驱动方法及显示装置，在现有的显示驱动电路中增加了电压检测电路，该电压检测电路可以根据逻辑电路输出的标准参考电压信号，确定电源管理电路输出的参考电压信号是否存在异常，并在确定该参考电压信号存在异常时，控制电源管理电路停止输出参考电压信号，使电源管理电路处于静止模式，此时显示面板处于常白或常黑模式，杜绝了可能存在的与移位寄存器所需电压不匹配的栅极驱动控制信号输入到显示面板的移位寄存器中的情况，进而避免了组装之后的显示器产品由于显示驱动电路输出信号与显示面板不匹配导致的产品异常。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (14)

  1. 一种显示驱动电路，包括：电源管理电路，逻辑电路和电压检测电路；其中，所述逻辑电路的第一输出端与所述电源管理电路的第一输入端相连，所述逻辑电路的第二输出端与所述电压检测电路的第一输入端相连；所述电源管理电路的输出端与所述电压检测电路的第二输入端相连；所述电压检测电路的输出端与所述电源管理电路的第二输入端相连；
    所述逻辑电路，用于对所述电压检测电路输出标准参考电压信号，对所述电源管理电路输出控制信号，所述控制信号用于控制所述电源管理电路输出参考电压信号；
    所述电压检测电路，用于在根据所述逻辑电路输出的所述标准参考电压信号，确定接收到的所述电源管理电路输出的所述参考电压信号存在异常时，控制所述电源管理电路停止输出所述参考电压信号。
  2. 根据权利要求1所述的显示驱动电路，其中，所述电压检测电路的输出端与所述逻辑电路的第一输入端相连；
    所述电压检测电路，还用于在根据所述逻辑电路输出的所述标准参考电压信号，确定接收到的所述电源管理电路输出的所述参考电压信号存在异常时，控制所述逻辑电路停止输出所述控制信号。
  3. 如权利要求2所述的显示驱动电路，其中，还包括复位电路，所述电压检测电路的输出端通过所述复位电路分别与所述电源管理电路的第二输入端和所述逻辑电路的第一输入端相连接；
    所述电压检测电路，用于在根据所述逻辑电路输出的所述标准参考电压信号，确定接收到的所述电源管理电路输出的所述参考电压信号存在异常时，向所述复位电路发送报警信号；
    所述复位电路，用于在收到所述报警信号时，向所述电源管理电路和所述逻辑电路发送控制所述电源管理电路和所述逻辑电路处于静止状态的静止信号。
  4. 如权利要求3所述的显示驱动电路，其中，所述电压检测电路，包括：与所述电源管理电路的输出端相连的采样电路，以及与所述逻辑电路相连的比较电路；
    所述采样电路，用于在接收到所述参考电压信号后转换为数字信号输出到所述比较电路；
    所述比较电路，用于将所述数字信号与接收到的所述标准参考电压信号进行比较，在确定所述数字信号与所述标准参考电压信号的差值不在阈值范围内时，向所述复位电路发送 所述报警信号。
  5. 如权利要求4所述的显示驱动电路，其中，所述比较电路，还用于在确定所述数字信号与所述标准参考电压信号的差值在阈值范围内时，向所述复位电路发送与所述报警信号不同的正常信号。
  6. 如权利要求5所述的显示驱动电路，其中，所述报警信号为高电平信号，所述正常信号为低电平信号。
  7. 如权利要求2所述的显示驱动电路，其中，所述电压检测电路，包括：与所述电源管理电路的输出端相连的采样电路，以及与所述逻辑电路相连的比较电路；
    所述采样电路，用于接收所述参考电压信号后转换为数字信号输出到所述比较电路；
    所述比较电路，用于将所述数字信号与接收到的所述标准参考电压信号进行比较，在确定所述数字信号与所述标准参考电压信号的差值不在阈值范围内时，向所述电源管理电路和所述逻辑电路发送控制所述电源管理电路和所述逻辑电路处于静止状态的静止信号。
  8. 如权利要求7所述的显示驱动电路，其中，所述比较电路，还用于在确定所述数字信号与所述标准参考电压信号的差值在阈值范围内时，向所述电源管理电路和所述逻辑电路发送控制所述电源管理电路和所述逻辑电路处于工作状态的正常信号。
  9. 如权利要求1-8任一项所述的显示驱动电路，其中，还包括：电平转换电路；所述电平转换电路的第一输入端与所述电源管理电路的输出端相连，第二输入端与所述逻辑电路的第三输出端相连，输出端与移位寄存器信号输出端口相连；
    所述电平转换电路，用于根据所述逻辑电路发送的高压电源信号和所述电源管理电路发送的参考电压信号生成栅极驱动控制信号后输出。
  10. 如权利要求1-8任一项所述的显示驱动电路，其中，所述参考电压信号包括低压参考电压信号和高压参考电压信号。
  11. 一种如权利要求1-10任一项所述的显示驱动电路的驱动方法，包括：
    所述逻辑电路对所述电压检测电路输出标准参考电压信号；
    所述电源管理电路向所述电压检测电路输出参考电压信号；
    所述电压检测电路根据接收到的所述标准参考电压信号，确定接收到的所述参考电压信号是否存在异常，当所述参考电压信号存在异常时，所述电压检测电路控制所述电源管理电路停止输出所述参考电压信号，当所述参考电压信号不存在异常时，所述电源管理电路正常工作。
  12. 如权利要求11所述的方法，其中，还包括：
    当所述参考电压信号存在异常时，所述电压检测电路还控制所述逻辑电路停止输出所述控制信号。
  13. 一种显示装置，包括集成移位寄存器的显示面板，以及如权利要求1-10任一项所述的显示驱动电路。
  14. 如权利要求13所述的显示装置，所述显示面板为液晶显示面板或电致发光显示面板。
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Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105679230B (zh) 2016-04-25 2019-08-16 京东方科技集团股份有限公司 一种显示驱动电路、其驱动方法及显示装置
US10643728B2 (en) 2016-04-25 2020-05-05 Hefei Boe Optoelectronics Technology Co., Ltd. Display driving circuit, driving method thereof, and display device
CN106448582A (zh) * 2016-08-16 2017-02-22 深圳天珑无线科技有限公司 一种应用于液晶模组的供电电路及液晶模组
US10872576B2 (en) * 2016-10-05 2020-12-22 Rohm Co., Ltd. Display driver IC
KR102643154B1 (ko) * 2016-12-08 2024-03-05 삼성디스플레이 주식회사 표시 장치
CN107340415B (zh) 2017-07-07 2020-02-14 京东方科技集团股份有限公司 一种信号补偿器及其信号补偿方法、信号补偿系统
CN107424578A (zh) * 2017-08-15 2017-12-01 京东方科技集团股份有限公司 一种驱动电路、显示面板、显示装置及其控制方法
CN107633830B (zh) * 2017-09-28 2020-04-28 深圳市华星光电技术有限公司 一种GOA电路时序控制方法及Gate IC、显示装置
CN108062936B (zh) * 2017-12-08 2020-06-16 深圳市华星光电技术有限公司 驱动电路及驱动方法
WO2020087577A1 (zh) * 2018-11-01 2020-05-07 惠科股份有限公司 显示驱动装置以及显示装置、显示模组
WO2020206615A1 (zh) * 2019-04-09 2020-10-15 京东方科技集团股份有限公司 显示面板的驱动器件及其驱动方法、显示装置
CN110322855A (zh) * 2019-07-11 2019-10-11 深圳市华星光电技术有限公司 Goa驱动电路及显示装置
CN110767192B (zh) * 2019-11-07 2021-12-28 京东方科技集团股份有限公司 显示模组的控制装置、控制方法及显示装置
CN111816134B (zh) * 2020-07-31 2022-08-23 重庆惠科金渝光电科技有限公司 一种显示面板的驱动电路和显示面板
CN113450706B (zh) * 2021-06-25 2023-04-14 京东方科技集团股份有限公司 检测电路及其驱动方法、显示面板和显示装置
TWI829356B (zh) * 2021-12-13 2024-01-11 群創光電股份有限公司 電子裝置
CN114495860B (zh) * 2022-03-11 2023-04-07 深圳市华星光电半导体显示技术有限公司 显示驱动电路及显示驱动装置
CN115457901A (zh) * 2022-08-16 2022-12-09 华源智信半导体(深圳)有限公司 分布式驱动电路及控制方法、显示设备
CN116682338B (zh) * 2023-06-16 2023-12-22 昆山迈致治具科技有限公司 电压控制电路和通用屏幕测试板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101383129A (zh) * 2007-09-07 2009-03-11 北京京东方光电科技有限公司 液晶显示器电源开关控制方法及其装置
US20100141633A1 (en) * 2008-12-08 2010-06-10 Dimitry Goder Embedded Display Power Management
CN104093257A (zh) * 2014-07-31 2014-10-08 上海贝岭股份有限公司 用于线性led驱动电源的功率调整电路
CN104331141A (zh) * 2013-07-22 2015-02-04 纬创资通股份有限公司 过电流保护电路以及其服务器
CN105304050A (zh) * 2015-11-20 2016-02-03 深圳市华星光电技术有限公司 一种过流保护电路和过流保护方法
CN105679230A (zh) * 2016-04-25 2016-06-15 京东方科技集团股份有限公司 一种显示驱动电路、其驱动方法及显示装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100699997B1 (ko) 2004-09-21 2007-03-26 삼성에스디아이 주식회사 다수개의 구동 트랜지스터와 다수개의 애노드 또는캐소드전극을 갖는 유기 전계 발광 표시장치
US7995012B2 (en) 2005-12-27 2011-08-09 Semiconductor Energy Laboratory Co., Ltd. Light emitting device
CN100561552C (zh) 2007-03-28 2009-11-18 中国科学院微电子研究所 用于有机电致发光显示器或照明器件的容错电路
US9203248B2 (en) * 2009-09-28 2015-12-01 Hitachi, Ltd. Battery management system using non-volatile memory
KR20120013777A (ko) * 2010-08-06 2012-02-15 삼성모바일디스플레이주식회사 유기 발광 표시 장치 및 유기 발광 표시 장치의 전원 공급 방법
US9292853B2 (en) 2011-10-24 2016-03-22 Miguel A. Ascarrunz Automated market cart
CN103531156B (zh) * 2013-10-25 2016-06-29 深圳市华星光电技术有限公司 背光驱动电路以及液晶显示装置
TWI537919B (zh) 2014-05-23 2016-06-11 友達光電股份有限公司 顯示器及其子畫素驅動方法
KR102249807B1 (ko) * 2014-10-17 2021-05-10 엘지디스플레이 주식회사 표시장치 및 전원제어장치
CN105162077A (zh) * 2015-10-13 2015-12-16 深圳市华星光电技术有限公司 线路保护电路以及液晶显示器
CN106531071B (zh) 2016-12-29 2018-06-05 京东方科技集团股份有限公司 像素电路、像素电路的驱动方法和显示面板
CN206301580U (zh) 2016-12-29 2017-07-04 京东方科技集团股份有限公司 一种像素电路、显示装置
CN106531080B (zh) 2016-12-29 2018-06-22 京东方科技集团股份有限公司 一种像素电路、像素驱动方法、显示装置
CN206301579U (zh) 2016-12-29 2017-07-04 京东方科技集团股份有限公司 像素电路和显示面板
CN106486041B (zh) 2017-01-03 2019-04-02 京东方科技集团股份有限公司 一种像素电路、其驱动方法及相关显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101383129A (zh) * 2007-09-07 2009-03-11 北京京东方光电科技有限公司 液晶显示器电源开关控制方法及其装置
US20100141633A1 (en) * 2008-12-08 2010-06-10 Dimitry Goder Embedded Display Power Management
CN104331141A (zh) * 2013-07-22 2015-02-04 纬创资通股份有限公司 过电流保护电路以及其服务器
CN104093257A (zh) * 2014-07-31 2014-10-08 上海贝岭股份有限公司 用于线性led驱动电源的功率调整电路
CN105304050A (zh) * 2015-11-20 2016-02-03 深圳市华星光电技术有限公司 一种过流保护电路和过流保护方法
CN105679230A (zh) * 2016-04-25 2016-06-15 京东方科技集团股份有限公司 一种显示驱动电路、其驱动方法及显示装置

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