WO2017166429A1 - 一种电路板及其制作方法及一种终端 - Google Patents

一种电路板及其制作方法及一种终端 Download PDF

Info

Publication number
WO2017166429A1
WO2017166429A1 PCT/CN2016/084770 CN2016084770W WO2017166429A1 WO 2017166429 A1 WO2017166429 A1 WO 2017166429A1 CN 2016084770 W CN2016084770 W CN 2016084770W WO 2017166429 A1 WO2017166429 A1 WO 2017166429A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
electrode
thin film
solid
film battery
Prior art date
Application number
PCT/CN2016/084770
Other languages
English (en)
French (fr)
Inventor
宋斌
段顶柱
李九兴
张恒
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Publication of WO2017166429A1 publication Critical patent/WO2017166429A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M1/00—Substation equipment, e.g. for use by subscribers
    • H04M1/02—Constructional features of telephone sets
    • H04M1/0202—Portable telephone sets, e.g. cordless phones, mobile phones or bar type handsets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits

Definitions

  • the present application relates to, but is not limited to, the field of communications, and in particular, to a circuit board, a manufacturing method thereof, and a terminal.
  • the mobile phone includes a head 1 (ie, a mobile phone main body), a lithium ion battery module 2, and a mobile phone rear case 3.
  • the lithium ion battery module 2 is independently provided, and the independent lithium ion battery module 2 is occupied.
  • the large space of the equipment is also a technical bottleneck restricting the development of terminal thinning.
  • connection between the lithium ion battery module 2 and the head 1 independently set in the terminal is a reed contact connection.
  • the contact is poor, and the terminal is prone to power failure and restart. Poor reliability.
  • the lithium ion battery in the terminal supplies power to each hardware module in the head, it is powered by the single path of the reed. Since the power requirements and frequency characteristics of the power modules of different hardware modules are different, a single power supply path is also used. It is easy to cause mutual interference between different hardware modules, which increases the difficulty of hardware design and increases the cost.
  • the embodiment of the invention provides a circuit board, a manufacturing method thereof and a terminal, and solves the related art, wherein the portable terminal adopts an independent lithium ion battery module, which occupies a large terminal space, which is disadvantageous to the terminal thin and light.
  • Embodiments of the present invention provide a circuit board including: a signal layer, a solid thin film battery layer, and an isolation substrate layer between the signal layer and the solid thin film battery layer; the signal layer and the solid film respectively The positive and negative electrodes of the battery layer are electrically connected.
  • the solid thin film battery layer includes a positive electrode layer, a solid electrolyte layer, and a negative electrode layer which are sequentially stacked.
  • the circuit board includes a layer of the solid state thin film battery layer
  • the signal layer includes a positive electrode port and a negative electrode port
  • the positive electrode port and the negative electrode port respectively and the layer
  • the positive electrode layer and the negative electrode layer electrode of the solid thin film battery layer are electrically connected.
  • the circuit board includes at least two layers of the solid thin film battery layer, the at least two solid state thin film battery layers are connected in parallel to form a parallel battery pack;
  • the signal layer includes a positive electrode port and a negative An electrode port electrically connected to a positive electrode layer of any one of the parallel battery packs, wherein the negative electrode port and any one of the parallel battery packs are negative
  • the electrode layers are electrically connected.
  • the circuit board includes at least two layers of the solid-state thin film battery layer, and the at least two solid-state thin film battery layers are sequentially connected in series to form a series battery pack;
  • the signal layer includes a positive electrode a port and a negative electrode port electrically connected to a positive electrode layer of a first solid state thin film battery layer of the series battery pack, the negative electrode port and a last solid thin film battery layer of the series battery pack The negative electrode layer is electrically connected.
  • the circuit board includes at least three layers of the solid thin film battery layer, wherein at least two solid thin film battery layers are connected in parallel, and serially connected in parallel with other remaining solid state thin film battery layers a battery pack;
  • the signal layer includes a positive electrode port and a negative electrode port, the positive electrode port being electrically connected to a positive electrode layer of a first solid thin film battery layer in the series-parallel hybrid battery pack, the negative electrode port and The negative electrode layers of the last solid state thin film battery layer in the series-parallel hybrid battery pack are electrically connected.
  • a positive electrode through hole and a negative electrode through hole are respectively disposed between the signal layer and the positive electrode layer and the negative electrode layer electrically connected thereto, and the positive electrode through hole and the negative electrode are respectively provided
  • the via hole is filled with a conductive medium; the positive electrode port and the negative electrode port are electrically connected to the corresponding positive electrode layer and negative electrode layer through the positive electrode through hole and the negative electrode through hole, respectively. So, solved the related technology The problem of the terminal battery electrical connection is not reliable.
  • the solid thin film battery layer includes a first electrode layer, a first solid electrolyte layer, a second electrode layer, a second solid electrolyte layer, and a third electrode layer which are sequentially stacked;
  • An electrode layer and the third electrode layer are electrode layers of the same polarity and are electrically connected to each other, the second electrode layer is different from the polarity of the first electrode layer, and the second electrode layer is a positive electrode a layer or a negative electrode layer;
  • the signal layer includes a first electrode port and a second electrode port, the first electrode port being connected to the first electrode layer or the third electrode layer; the second electrode port and the The second electrode layer is electrically connected.
  • a first electrode through hole is disposed between the signal layer and the first electrode layer or the third electrode layer electrically connected thereto; and the second electrode layer electrically connected to the signal layer a second electrode through hole is disposed, and the first electrode through hole and the second electrode through hole are filled with a conductive medium; the first electrode port passes through the first electrode through hole and the first electrode layer or The third electrode layer is electrically connected; the second electrode port is electrically connected to the second electrode layer through the second electrode through hole.
  • the circuit board further includes a ground layer, and an isolation substrate layer is disposed between the ground layer and the solid thin film battery layer, and the ground layer and the negative electrode of the solid thin film battery layer are electrically connection.
  • An embodiment of the present invention further provides a terminal, including a terminal body and a circuit board as described above, where the circuit board is disposed on the terminal body.
  • the embodiment of the invention further provides a circuit board manufacturing method, comprising: providing a signal layer, a solid thin film battery layer; providing an isolation substrate layer between the signal layer and the solid state thin film battery layer, and the signal layer They are electrically connected to the positive and negative electrodes of the solid thin film battery layer, respectively.
  • the setting the solid thin film battery layer comprises: providing a positive electrode layer, a solid electrolyte layer and a negative electrode layer which are sequentially stacked to form a solid thin film battery layer.
  • the positive electrode port and the negative electrode port of the signal layer are respectively electrically connected to the positive electrode layer and the negative electrode layer of the solid thin film battery layer of the layer. connection.
  • the at least two solid-state thin film battery layers are connected in parallel to form a parallel battery pack; and the positive electrode port of the signal layer is Electrically connecting with a positive electrode layer of any one of the parallel battery packs, the negative electrode port of the signal layer and a negative electrode layer of any one of the parallel battery packs Electrical connection.
  • the at least two solid-state thin film battery layers are sequentially connected in series to form a series battery pack;
  • the positive electrode port of the signal layer is The positive electrode layer of the first solid state thin film battery layer of the series battery pack is electrically connected, and the negative electrode port of the signal layer is electrically connected to the negative electrode layer of the last solid thin film battery layer of the series battery pack.
  • a positive electrode through hole and a negative electrode through hole are respectively disposed between the signal layer and the positive electrode layer and the negative electrode layer electrically connected thereto, and the positive electrode through hole and the negative electrode are respectively provided
  • the via hole is filled with a conductive medium; the positive electrode port and the negative electrode port are electrically connected to the corresponding positive electrode layer and negative electrode layer through the positive electrode through hole and the negative electrode through hole, respectively.
  • the setting the solid-state thin film battery layer includes: providing a first electrode layer, a first solid electrolyte layer, a second electrode layer, a second solid electrolyte layer, and a third electrode layer which are sequentially stacked;
  • the first electrode layer and the third electrode layer are electrode layers of the same polarity and are electrically connected to each other, and the second electrode layer and the first electrode layer have different polarities, and the second electrode layer a positive electrode layer or a negative electrode layer;
  • the signal layer includes a first electrode port and a second electrode port, the first electrode port is connected to the first electrode layer or the third electrode layer;
  • the electrode port is electrically connected to the second electrode layer.
  • a first electrode through hole is disposed between the signal layer and the first electrode layer or the third electrode layer electrically connected thereto; and the second electrode layer electrically connected to the signal layer a second electrode through hole is disposed, and the first electrode through hole and the second electrode through hole are filled with a conductive medium; the first electrode port passes through the first electrode through hole and the first electrode layer or The third electrode layer is electrically connected; the second electrode port is electrically connected to the second electrode layer through the second electrode through hole.
  • the method for fabricating a circuit board further includes: providing a ground layer, providing a separation substrate layer between the ground layer and the solid thin film battery layer, and the ground layer and the solid state thin film battery The negative electrode of the layer is electrically connected.
  • the circuit board provided by the embodiment of the invention comprises a signal layer, a solid thin film battery layer, and an isolating substrate layer between the signal layer and the solid thin film battery layer; the signal layer is electrically connected to the positive and negative electrodes of the solid thin film battery layer, respectively. That is, the embodiment of the present invention utilizes a solid-state thin film battery with a large capacity, a light weight (a thickness of 1 um to 5 mm), and is integrated in a circuit board to serve as a part of a substrate layer of the circuit board, when the circuit board is used for various When the terminal is used, it is not necessary to additionally set a separate battery for the terminal.
  • the lithium ion battery is separately provided for the terminal, which can greatly save the space occupied by the terminal, reduce the hardware volume, and enhance the integration of the design. To the extent that the thinness of the terminal is no longer limited by the thickness of the battery.
  • the embodiment of the present invention integrates a solid thin film battery layer in a circuit board, and the solid thin film battery layer can provide a positive electrode layer and a negative electrode layer of a surface structure, and can be flexibly set for each signal layer or ground layer on the circuit board.
  • the electrical connection path with the solid-state thin film battery layer, different signal layers and power supply layers can be completely designed according to the traditional circuit board design method, compared with the single power supply path provided by the independent lithium ion battery in the related art, no longer subject to a single transmission path
  • the limitation is that each signal layer can be directly connected to the solid-state thin film battery in the circuit board according to the respective return paths, which can reduce the coupling between the power lines of different modules, and can avoid the influence of hardware with different power requirements and frequency characteristics on the battery. .
  • a through hole may be directly disposed between the signal layer and the corresponding positive electrode layer and the negative electrode layer of the solid thin film battery.
  • the conductive medium is disposed in the through hole, so that the signal layer can be directly connected to the solid-state thin film battery through the through hole, and since the solid-state thin film battery is integrated with the circuit board, even if the device is subjected to violent vibration in a scene such as dropping, it will not cause A power failure occurs due to poor contact.
  • FIG. 1 is a schematic diagram of assembly of a mobile phone terminal in the related art
  • FIG. 2 is a schematic structural diagram of a circuit board according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic structural view of a solid thin film battery layer according to Embodiment 1 of the present invention.
  • FIG. 4 is a schematic diagram of connection between a signal layer and a solid thin film battery layer according to Embodiment 1 of the present invention.
  • FIG. 5 is a schematic diagram of a parallel connection of a multilayer solid-state thin film battery layer according to Embodiment 2 of the present invention.
  • FIG. 6 is a schematic diagram of a series connection of a multilayer solid-state thin film battery layer according to Embodiment 2 of the present invention.
  • FIG. 7 is a schematic diagram of a series and parallel mixing of a multilayer solid-state thin film battery according to Embodiment 2 of the present invention.
  • FIG. 8 is a schematic structural view of a solid thin film battery layer according to Embodiment 3 of the present invention.
  • FIG. 9 is a schematic structural diagram of a circuit board including a ground layer according to Embodiment 4 of the present invention.
  • FIG. 10 is a flowchart of a method for fabricating a circuit board according to Embodiment 6 of the present invention.
  • the embodiment of the invention utilizes the characteristics of large capacity, lightness and thinness of the solid-state thin film battery to be integrated into the circuit board to serve as a part of the substrate layer of the circuit board.
  • the terminal may not be additionally provided independently.
  • the battery reduces the size of the hardware and enhances the integration of the design, so that the thin and light development of the terminal is no longer limited by the thickness of the battery.
  • the solid-state thin film battery layer in the circuit board can provide a positive electrode layer and a negative electrode layer of a planar structure, and each signal layer can be directly connected to the solid-state thin film battery in the circuit board according to respective return paths, which can reduce different module power lines.
  • the embodiment of the present invention electrically connects the signal layer and the electrode layer of the solid-state thin film battery through the through hole, and the reliability is better; since the solid-state thin film battery is integrated with the circuit board, even if the device is subjected to severe scenes such as dropping Concussion does not cause a power failure due to poor contact.
  • the circuit board provided in this embodiment includes a signal layer 11, a solid thin film battery layer 12, and an isolation substrate layer 13 between the signal layer 11 and the solid state thin film battery layer 12; the signal layer 11 and the solid state respectively
  • the positive and negative electrodes of the thin film battery layer 12 are electrically connected.
  • the signal layer 11 may be various signal layers according to the current application scenario, and the number of layers of the signal layer 11 may also be flexibly set according to the current application scenario, and the connection relationship between different signal layers 11 may also be specific. Application scenario Flexible settings.
  • the thickness of the solid thin film battery layer 12 in this embodiment may be 1 micrometer (um) to 5 millimeters (mm), and the thickness value of the fixed thin film battery layer 12 may be according to the plane area of the circuit board and the power supply required for the terminal device. Condition setting, optional 50um to 1.5mm.
  • the solid state thin film battery in this embodiment includes, but is not limited to, a solid state lithium ion thin film battery and a solid state semiconductor thin film battery.
  • the isolating substrate layer 13 in this embodiment may be made of various substrate materials, for example, may be an FR4 substrate layer, and its rigid characteristic serves as both a supporting function and a protective effect on the solid thin film battery layer 12.
  • the structure of the solid thin film battery layer 12 is shown in FIG. 3, and includes a positive electrode layer 121, a solid electrolyte layer 122, and a negative electrode layer 123 which are sequentially stacked.
  • the positions of the positive electrode layer 121 and the negative electrode layer 123 may be interchanged.
  • the electrode materials of the positive electrode layer 121 and the negative electrode layer 123 include, but are not limited to, a conductive metal, a conductive oxide, and a conductive polymer.
  • the type of material contained in the solid electrolyte layer 122 is flexibly set according to the type of the solid-state thin film battery layer 12 currently employed.
  • connection between the signal layer 11 and the positive and negative electrodes of the solid thin film battery layer 12 can be performed by various effective electrical connections, for example, by corresponding wires or other devices from the positive electrode of the solid thin film battery layer 12, respectively.
  • the layer and the negative electrode layer lead out positive and negative feed points, and then the corresponding positive electrode port and negative electrode port on the signal layer 11 are electrically connected to the positive and negative feed points.
  • a signal layer may include a pair of positive and negative electrode ports, and may also include multiple pairs of positive and negative electrode ports.
  • each module in order to facilitate the reasonable wiring of each signal layer according to the current actual demand plan, each module can be directly connected to the battery according to the respective return paths according to the needs, so as to reduce the coupling between the power lines of different modules and avoid The influence of the hardware of different power requirements and frequency characteristics on the battery, the positive electrode layer 121 and the negative electrode layer 123 of the solid-state thin film battery layer 12 are all features of the surface structure, and the positive electrode port and the negative electrode of the signal layer 11 are used. The ports are directly electrically connected to the positive electrode layer 121 and the negative electrode layer 123 electrodes of the solid thin film battery layer 12, respectively.
  • a through hole may be disposed between the signal layer 11 and the positive electrode layer 121 and the negative electrode layer 123 of the solid thin film battery layer 12, and the conductive medium is filled in the through hole.
  • a positive electrode through hole 21 is disposed between the upper signal layer 11 and the positive electrode layer 121 of the solid thin film battery layer 12 in FIG. 4, a conductive material is disposed in the positive electrode through hole 21, and the positive electrode through hole 21 is in the signal layer 11
  • the upper position may correspond to the positive electrode port on the signal layer 11, and the positive electrode port may also be connected to the positive electrode through hole 21 through a certain trace.
  • a negative electrode through hole 22 is disposed between the upper signal layer 11 and the negative electrode layer 123 of the solid thin film battery layer 12 in FIG. 4, and a conductive material is also disposed in the negative electrode through hole 22, and the negative electrode through hole 21 is provided therein.
  • the conductive material may be the same or different, and a conductive material having a small electrical resistance may be selected; the position of the negative electrode through hole 22 on the signal layer 11 may also correspond to the negative electrode port of the signal layer 11, and the negative electrode port may also pass through a certain A trace is connected to the negative electrode via 22 .
  • the through hole 23 on the right side of FIG. 4 penetrates each layer, and is available for flexible connection between different signal layers according to actual needs.
  • the solid thin film battery layer 12 integrated on the circuit board in this embodiment may include only one layer, or two or more layers may be disposed according to actual needs, and when two or more layers are included, each solid thin film battery layer 12 A battery having a larger capacity may be formed in parallel, or a battery of a higher voltage may be formed in series, or may be mixed in series or in parallel.
  • the respective electrode layers can be electrically connected through the through holes.
  • This embodiment illustrates several cases in which at least two layers of solid thin film battery layers are integrated in a circuit board.
  • the at least two solid-state thin film battery layers may be connected in parallel to form a parallel battery pack; the positive electrode port of the signal layer and the solid-state thin film battery layer of any one of the parallel battery packs
  • the positive electrode layer may be electrically connected
  • the negative electrode port may be electrically connected to the negative electrode layer of any one of the solid state thin film battery layers in the parallel battery pack.
  • FIG. 5 shows that on the basis of FIG. 4, a solid thin film battery layer 12 is added, and two solid thin film battery layers 12 are connected in parallel to form a parallel battery pack; in FIG. 5, the two solid thin film battery layers 12 are positively charged.
  • the pole layers 121 are electrically connected through the through holes 31; the negative electrode layers 123 of the two solid thin film battery layers 12 are electrically connected through the through holes 32; the upper signal layer 11 is respectively positive with the upper solid film battery layer 12
  • the electrode layer 121 and the negative electrode layer 123 are electrically connected to each other, or may be electrically connected to the positive electrode layer 121 and the negative electrode layer 123 of the underlying solid thin film battery layer 12, respectively, or to the positive electrode layer 121 of the upper solid thin film battery layer 12.
  • the electrical connection is simultaneously electrically connected to the negative electrode layer 123 of the underlying solid thin film battery layer 12.
  • the at least two solid-state thin film battery layers are sequentially connected in series to form a series battery pack; the positive electrode port of the signal layer and the first solid state thin film battery in the series battery pack The positive electrode layer of the layer is electrically connected, and the negative electrode port is electrically connected to the negative electrode layer of the last solid thin film battery layer in the series battery pack.
  • FIG. 6 shows that, on the basis of FIG. 4, a solid thin film battery layer 12 is also added, and two solid thin film battery layers 12 are connected in series to form a series battery pack; and the positive electrode layer of the upper solid thin film battery layer 12 in FIG. 121 is electrically connected to the negative electrode layer 123 of the solid-state thin film battery layer 12 through the through hole 33; the upper signal layer 11 is respectively connected to the positive electrode layer 121 of the upper solid thin film battery layer 12 and the solid thin film battery layer below.
  • the negative electrode layer 123 of 12 is electrically connected.
  • FIG. 7 is different from FIG. 6 in that a solid thin film battery layer 12 is added, and the lower two solid thin film battery layers 12 are connected in parallel through the through holes 31 and the through holes 32 to form a parallel battery pack; the uppermost solid thin film battery layer 12
  • the solid-state thin film battery layer 12 is formed in series with the intermediate solid-state thin film battery layer 12 to finally obtain a series-parallel hybrid battery pack; the upper signal layer 11 and the positive electrode layer 121 of the upper solid-state thin film battery layer 12 and the lowermost solid thin film battery, respectively.
  • the negative electrode layer 123 of the layer 12 is electrically connected.
  • the three-layer solid-state thin film battery layer 12 is exemplified in series-parallel hybrid mode, but it should be understood that the series-parallel method can be arbitrarily set according to actual needs, for example, when four-layer solid-state thin film battery layer 12 is included, it can be connected in parallel. Then connect in series, or three in parallel and then in series with the remaining one.
  • the layer structure of the solid thin film battery layer in the embodiment of the present invention can be flexibly changed.
  • the two solid-state thin film battery layers can be directly contacted without a signal layer or a substrate layer or a ground layer.
  • two layers of solid thin film battery layers can share one electrode and can be externally represented as a solid thin film battery layer. See Figure 8:
  • the solid thin film battery layer includes a first electrode layer 41, a first solid electrolyte layer 42, a second electrode layer 43, a second solid electrolyte layer 44, and a third electrode layer 45 which are sequentially stacked; a first electrode layer 41 and a third electrode layer 45 is an electrode layer of the same polarity and electrically connected to each other, and is electrically connected through the through hole 31 in FIG. 8, and the second electrode layer 43 is different in polarity from the first electrode layer 41, for example, the second electrode layer 43 is a positive electrode layer.
  • the first negative electrode layer 41 and the third electrode layer 45 are negative electrode layers, or the second electrode layer 43 is a negative electrode layer, and the first negative electrode layer 41 and the third electrode layer 45 are positive electrode layers.
  • the signal layer 11 includes a first electrode port and a second electrode port, the first electrode port is connected to the first electrode layer 41 or the third electrode layer 45, and the second electrode port is electrically connected to the second electrode layer 43.
  • a first electrode via 51 is disposed between the upper signal layer 11 and the first electrode layer 41 (which may also be the third electrode layer 45) electrically connected thereto; and the upper signal layer 11 is electrically connected thereto.
  • a second electrode through hole 52 is disposed between the electrode layers 43 , and the first electrode through hole 51 and the second electrode through hole 52 are filled with a conductive medium; the first electrode port passes through the first electrode through hole 51 and the first electrode layer 41 (The third electrode layer 45 may also be electrically connected; the second electrode port is electrically connected to the second electrode layer 43 through the second electrode via 52.
  • the second electrode layer 43 is a negative electrode layer
  • the second electrode through hole 52 is a negative electrode through hole
  • the first electrode through hole 51 is a positive electrode through hole.
  • the negative layer of the solid state thin film battery layer may be directly used as the formation.
  • at least one layer of the ground layer may be disposed on the circuit board shown in FIGS. 2 to 8. The following is an example of adding a layer on the basis of FIG. 4. Referring to FIG. 9, the ground layer 61 and the negative electrode layer 123 of the solid thin film battery layer 12 are electrically connected through the through hole 71.
  • the circuit board integrated with the solid thin film battery layer provided by the embodiment of the present invention is applicable to various terminals and can be disposed on various terminal bodies.
  • the terminal in this embodiment includes various portable mobile terminals, such as a mobile phone, an IPDA, an IPOD, various players, a reader, a notebook, etc., and can also be applied to various personal computers (PCs, Personal Computers) with their own power supplies. Terminals such as servers.
  • the number of layers of the solid-state thin film battery layer integrated on the circuit board can be flexibly set according to actual needs, and one layer can be set or multiple layers can be set; the number of layers of the signal layer generated on the circuit board is also mainly based on The requirements are flexible and can include only one signal layer or multiple signal layers.
  • the layer structure involved in the formation and other circuit board design can be increased on the basis of the above, as long as the circuit board is integrated with the solid thin film battery layer, it is within the protection scope of the present application.
  • the method includes: step 601: setting a signal layer, a solid thin film battery layer; step 602: disposing an isolation substrate layer between the signal layer and the solid thin film battery layer, and respectively separating the signal layer and the solid thin film battery layer
  • the positive and negative electrodes are electrically connected.
  • the signal layer may be various signal layers, and the number of layers of the signal layer may also be flexibly set according to the current application scenario, and the connection relationship between different signal layers may also be flexibly set according to specific application scenarios.
  • the solid thin film battery layer is composed of a positive electrode layer, a solid electrolyte layer, and a negative electrode layer which are sequentially stacked. And a solid thin film battery layer is disposed on the circuit board, and the positive electrode port and the negative electrode port of the signal layer are electrically connected to the positive electrode layer and the negative electrode layer of the solid thin film battery layer, respectively.
  • At least two layers of the solid-state thin film battery layer may be disposed on the circuit board, and the at least two solid-state thin film battery layers are connected in parallel to form a parallel battery pack; the positive electrode port of the signal layer and the parallel battery pack are The positive electrode layer of any one layer of the solid state thin film battery layer is electrically connected, and the negative electrode port is electrically connected to the negative electrode layer of any one of the solid state thin film battery layers of the parallel battery pack.
  • the at least two solid-state thin film battery layers may be sequentially connected in series to form a series battery pack; the positive electrode port of the signal layer and the serial battery pack The positive electrode layer of the first solid thin film battery layer is electrically connected, and the negative electrode port is electrically connected to the negative electrode layer of the last solid thin film battery layer in the series battery pack.
  • the solid thin film battery layers when three or more solid thin film battery layers are disposed on the circuit board, at least two of the solid thin film battery layers may be connected in parallel, and a series-parallel hybrid battery pack is formed in series with the remaining other solid thin film battery layers;
  • the positive electrode port of the signal layer is electrically connected to the positive electrode layer of the first solid thin film battery layer in the series-parallel hybrid battery pack, and the negative electrode port is electrically connected to the negative electrode layer of the last solid thin film battery layer in the series-parallel hybrid battery pack.
  • a positive electrode through hole and a negative electrode through hole may be respectively disposed between the positive electrode layer and the negative electrode layer electrically connected to the signal layer, and the positive electrode through hole and the negative electrode through hole are filled
  • the conductive medium; the positive electrode port and the negative electrode port of the signal layer are electrically connected to the corresponding positive electrode layer and negative electrode layer through the positive electrode through hole and the negative electrode through hole, respectively.
  • the solid thin film battery layer may be further composed of a first electrode layer, a first solid electrolyte layer, a second electrode layer, a second solid electrolyte layer and a third electrode layer which are sequentially stacked; the first electrode layer and The third electrode layer is an electrode layer having the same polarity and electrically connecting the two, the second electrode layer is different from the polarity of the first electrode layer, the second electrode layer is a positive electrode layer or a negative electrode layer; and the signal layer includes the first layer And an electrode port and a second electrode port, wherein the first electrode port is connected to the first electrode layer or the third electrode layer; and the second electrode port is electrically connected to the second electrode layer.
  • the hole and the second electrode through hole are filled with a conductive medium; the first electrode port is electrically connected to the first electrode layer or the third electrode layer through the first electrode through hole; the second electrode port passes through the second electrode through hole and the The second electrode layer is electrically connected.
  • the embodiment of the present invention provides a circuit board and a manufacturing method thereof, which can greatly save the space occupied by the terminal, reduce the hardware volume, and enhance the integration degree of the design, so that the development of the thinness and thinness of the terminal is no longer limited by the thickness of the battery.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Signal Processing (AREA)
  • Secondary Cells (AREA)
  • Connection Of Batteries Or Terminals (AREA)
  • Battery Mounting, Suspending (AREA)

Abstract

一种电路板包括信号层（11）、固态薄膜电池层（12）、以及信号层（11）与固态薄膜电池层（12）之间的隔离基板层（13）；信号层（11）分别与固态薄膜电池层（12）的正、负电极电连接。也即利用固态薄膜电池容量大、轻薄化的特点将其集成在电路板中充当电路板的一部分基板层，当将该电路板用于各种终端时，则可不用为终端额外设置独立的电池，相较于相关技术中为终端单独设置锂离子电池的方式，可以大大节约所占用终端的空间，减少硬件体积，增强了设计的一体化程度，使得终端的轻薄化发展不再受电池厚度的限制。

Description

一种电路板及其制作方法及一种终端 技术领域
本申请涉及但不限于通信领域，尤其涉及一种电路板及其制作方法及一种终端。
背景技术
随着技术的快速发展，微处理器的处理速度越来越快，芯片规模越来越大，平板电脑、手机、可穿戴设备等便携式终端大规模普及到人们的日常生活中。数据处理任务的复杂化和多样化使得系统功耗需求也越来越大。高速发展的软硬件技术与相对发展迟缓的电池技术形成了鲜明的对比。当前便携式终端都采用独立的锂离子电池，都是采用的电池模块与机头分离或简单组装为整体。如图1所示的手机，该手机包括机头1(也即手机主体)、锂离子电池模块2以及手机后壳3，锂离子电池模块2是独立设置的，独立的锂离子电池模块2占用了设备较大的空间，这也是限制终端轻薄化发展的一个技术瓶颈。
另外，目前终端中独立设置的锂离子电池模块2与机头1的连接为簧片接触式连接，当终端受到剧烈震荡时，容易导致接触不良，终端就易出现掉电重启现象，导致供电的可靠性差。且目前终端中锂离子电池为机头中的每个硬件模块供电时，都是通过簧片这一单一路径供电，由于不同硬件模块对电源的功率需求、频率特性也各异，单一的供电路径易使不同硬件模块之间产生相互干扰，提高了硬件设计的难度，增加了成本。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本发明实施例提供一种电路板及其制作方法及一种终端，解决相关技术中便携终端采用独立的锂离子电池模块，占用终端空间大，不利于终端轻薄 化发展的问题。
本发明实施例提供一种电路板，包括：信号层、固态薄膜电池层、以及位于所述信号层与所述固态薄膜电池层之间的隔离基板层；所述信号层分别与所述固态薄膜电池层的正、负电极电连接。
在本申请的一种实施例中，所述固态薄膜电池层包含依次叠加的正电极层、固态电解质层和负电极层。
在本申请的一种实施例中，所述电路板包括一层所述固态薄膜电池层，所述信号层包括正电极端口和负电极端口，所述正电极端口和负电极端口分别与该层固态薄膜电池层的正电极层和负电极层电极电连接。
在本申请的一种实施例中，所述电路板包括至少两层所述固态薄膜电池层，所述至少两层固态薄膜电池层并联形成并联电池组；所述信号层包括正电极端口和负电极端口，所述正电极端口与所述并联电池组中任意一层固态薄膜电池层的正电极层电连接，所述负电极端口与所述并联电池组中任意一层固态薄膜电池层的负电极层电连接。
在本申请的一种实施例中，所述电路板包括至少两层所述固态薄膜电池层，所述至少两层固态薄膜电池层之间依次串联形成串联电池组；所述信号层包括正电极端口和负电极端口，所述正电极端口与所述串联电池组中第一个固态薄膜电池层的正电极层电连接，所述负电极端口与所述串联电池组中最后一个固态薄膜电池层的负电极层电连接。
在本申请的一种实施例中，所述电路板包括至少三层所述固态薄膜电池层，其中至少两层固态薄膜电池层并联后，与剩下的其他固态薄膜电池层串联形成串并联混合电池组；所述信号层包括正电极端口和负电极端口，所述正电极端口与所述串并联混合电池组中第一个固态薄膜电池层的正电极层电连接，所述负电极端口与所述串并联混合电池组中最后一个固态薄膜电池层的负电极层电连接。
在本申请的一种实施例中，所述信号层与其电连接的正电极层和负电极层之间分别设有正电极通孔和负电极通孔，且所述正电极通孔和负电极通孔填充有导电介质；所述正电极端口和负电极端口分别通过所述正电极通孔和负电极通孔与相应的正电极层和负电极层电连接。如此，解决了相关技术中 的终端电池电连接不可靠的问题。
在本申请的一种实施例中，所述固态薄膜电池层包含依次叠加的第一电极层、第一固态电解质层、第二电极层、第二固态电解质层和第三电极层；所述第一电极层和所述第三电极层为极性相同的电极层且二者电连接，所述第二电极层与所述第一电极层的极性不同，所述第二电极层为正电极层或负电极层；所述信号层包括第一电极端口和第二电极端口，所述第一电极端口与所述第一电极层或第三电极层连接；所述第二电极端口与所述第二电极层电连接。
在本申请的一种实施例中，所述信号层与其电连接的第一电极层或第三电极层之间设有第一电极通孔；所述信号层与其电连接的第二电极层之间设有第二电极通孔，且所述第一电极通孔和第二电极通孔填充有导电介质；所述第一电极端口通过所述第一电极通孔与所述第一电极层或所述第三电极层电连接；所述第二电极端口通过所述第二电极通孔与所述第二电极层电连接。
在本申请的一种实施例中，所述电路板还包括地层，所述地层与所述固态薄膜电池层之间设有隔离基板层，所述地层与所述固态薄膜电池层的负电极电连接。
本发明实施例还提供了一种终端，包括终端主体和如上所述的电路板，所述电路板设置在所述终端主体上。
本发明实施例还提供了一种电路板制作方法，包括：设置信号层、固态薄膜电池层；在所述信号层与所述固态薄膜电池层之间设置隔离基板层，并将所述信号层分别与所述固态薄膜电池层的正、负电极电连接。
在本申请的一种实施例中，设置所述固态薄膜电池层包括：设置依次叠加的正电极层、固态电解质层和负电极层组成一层固态薄膜电池层。
在本申请的一种实施例中，当设置一层固态薄膜电池层时，将所述信号层的正电极端口和负电极端口分别与该层固态薄膜电池层的正电极层和负电极层电连接。
在本申请的一种实施例中，当设置至少两层固态薄膜电池层时，将所述至少两层固态薄膜电池层并联形成并联电池组；将所述信号层的正电极端口 与所述并联电池组中任意一层固态薄膜电池层的正电极层电连接，将所述信号层的所述负电极端口与所述并联电池组中任意一层固态薄膜电池层的负电极层电连接。
在本申请的一种实施例中，当设置至少两层固态薄膜电池层时，将所述至少两层固态薄膜电池层之间依次串联形成串联电池组；将所述信号层的正电极端口与所述串联电池组中第一个固态薄膜电池层的正电极层电连接，将所述信号层的负电极端口与所述串联电池组中最后一个固态薄膜电池层的负电极层电连接。
在本申请的一种实施例中，当设置至少三层固态薄膜电池层时，将其中至少两层固态薄膜电池层并联后，与剩下的其他固态薄膜电池层串联形成串并联混合电池组；将所述信号层的正电极端口与所述串并联混合电池组中第一个固态薄膜电池层的正电极层电连接，将所述信号层的负电极端口与所述串并联混合电池组中最后一个固态薄膜电池层的负电极层电连接。
在本申请的一种实施例中，所述信号层与其电连接的正电极层和负电极层之间分别设有正电极通孔和负电极通孔，且所述正电极通孔和负电极通孔填充有导电介质；所述正电极端口和负电极端口分别通过所述正电极通孔和负电极通孔与相应的正电极层和负电极层电连接。
在本申请的一种实施例中，设置所述固态薄膜电池层包括：设置依次叠加的第一电极层、第一固态电解质层、第二电极层、第二固态电解质层和第三电极层；所述第一电极层和所述第三电极层为极性相同的电极层且二者电连接，所述第二电极层与所述第一电极层的极性不同，所述第二电极层为正电极层或负电极层；所述信号层包括第一电极端口和第二电极端口，将所述第一电极端口与所述第一电极层或第三电极层连接；将所述第二电极端口与所述第二电极层电连接。
在本申请的一种实施例中，所述信号层与其电连接的第一电极层或第三电极层之间设有第一电极通孔；所述信号层与其电连接的第二电极层之间设有第二电极通孔，且所述第一电极通孔和第二电极通孔填充有导电介质；所述第一电极端口通过所述第一电极通孔与所述第一电极层或所述第三电极层电连接；所述第二电极端口通过所述第二电极通孔与所述第二电极层电连接。
在本申请的一种实施例中，上述电路板制作方法还包括设置地层，所设置的地层与所述固态薄膜电池层之间设有隔离基板层，并将所述地层与所述固态薄膜电池层的负电极电连接。
本发明实施例的有益效果是：
本发明实施例提供的电路板包括信号层、固态薄膜电池层、以及位于信号层与固态薄膜电池层之间的隔离基板层；信号层分别与固态薄膜电池层的正、负电极电连接。也即本发明实施例利用固态薄膜电池容量大、轻薄化(可做到1um至5mm厚)的特点将其集成在电路板中充当电路板的一部分基板层，当将该电路板用于各种终端时，则可不用为终端额外设置独立的电池，相较于相关技术中为终端单独设置锂离子电池的方式，可以大大节约所占用终端的空间，减少了硬件体积，增强了设计的一体化程度，使得终端的轻薄化发展不再受电池厚度的限制。
另外，本发明实施例将固态薄膜电池层集成在电路板中，固态薄膜电池层可以提供面结构的正电极层和负电极层，可供电路板上的每个信号层或地层等灵活设定与固态薄膜电池层的电连接路径，不同信号层和电源层完全可以按照传统电路板的设计方法进行设计，相较于相关技术中独立锂离子电池提供的单一供电途径，不再受单一传输路径的限制，每个信号层可按照各自回流路径直接连接到电路板中的固态薄膜电池，既可减小不同模块电源线路间的耦合，又能避免不同功率需求和频率特性的硬件对电池的影响。
而且，本发明实施例中的每个信号层或地层等与电路中固态薄膜电池进行电连接时，可直接在信号层与固态薄膜电池相应的正电极层和负电极层之间设置通孔，并在通孔中设置导电介质，使得信号层可直接通过通孔与固态薄膜电池连接，同时由于固态薄膜电池与电路板集成为一体，因此即使设备在跌落等场景受到剧烈震荡，也不会导致接触不良等而发生掉电故障。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
图1为相关技术中的手机终端装配示意图；
图2为本发明实施例一提供的电路板结构示意图；
图3为本发明实施例一提供的固态薄膜电池层的结构示意图；
图4为本发明实施例一提供的信号层与固态薄膜电池层的连接示意图；
图5为本发明实施例二提供的多层固态薄膜电池层并联示意图；
图6为本发明实施例二提供的多层固态薄膜电池层串联示意图；
图7为本发明实施例二提供的多层固态薄膜电池层串、并联混合示意图；
图8为本发明实施例三提供的固态薄膜电池层的结构示意图；
图9为本发明实施例四提供的包含地层的电路板结构示意图；
图10为本发明实施例六提供的电路板制作方法的流程图。
本发明的实施方式
本发明实施例利用固态薄膜电池容量大、轻薄化等特点将其集成在电路板中充当电路板的一部分基板层，当将该电路板用于各种终端时，则可不用为终端额外设置独立的电池，减少硬件体积，增强了设计的一体化程度，使得终端的轻薄化发展不再受电池厚度的限制。另外，电路板中的固态薄膜电池层可以提供面结构的正电极层和负电极层，每个信号层可按照各自回流路径直接连接到电路板中的固态薄膜电池，可减小不同模块电源线路间的耦合，又能避免不同功率需求和频率特性的硬件对电池的影响。而且，本发明实施例将信号层与固态薄膜电池的电极层之间通过通孔形成电连接，可靠性更好；由于固态薄膜电池与电路板集成为一体，因此即使设备在跌落等场景受到剧烈震荡，也不会导致接触不良等而发生掉电故障。下面通过具体实施方式结合附图对本申请作进一步详细说明。
实施例一
请参见图2所示，本实施例提供的电路板包括信号层11、固态薄膜电池层12、以及位于信号层11与固态薄膜电池层12之间的隔离基板层13；信号层11分别与固态薄膜电池层12的正、负电极电连接。本实施例中信号层11根据当前应用场景，可以是各种信号层，且信号层11的层数也可以根据当前应用场景灵活设定，不同信号层11之间的连接关系也都可根据具体应用场景 灵活设定。
本实施例中的固态薄膜电池层12的厚度可为1微米(um)至5毫米(mm)，固定薄膜电池层12的厚度值可以根据电路板的平面面积大小以及终端设备所需的供电电源情况设定，可选50um至1.5mm。本实施例中的固态薄膜电池包括但不限于固态锂离子薄膜电池和固态半导体薄膜电池。
本实施例中的隔离基板层13可以采用各种基板材料制成，例如可以是FR4基板层，其刚性特性既起到支撑作用，又能起到对固态薄膜电池层12的保护作用。
本实施例中，固态薄膜电池层12的结构请参见图3所示，包含：依次叠加的正电极层121、固态电解质层122和负电极层123。其中，应当理解的是，正电极层121和负电极层123的位置可以互换。本实施例中，正电极层121和负电极层123的电极材料包括但不限于导电金属、导电氧化物和导电聚合物。固态电解质层122所包含的材料种类则根据当前采用的固态薄膜电池层12的类型而灵活设定。
本实施例中，信号层11与固态薄膜电池层12的正、负电极的连接方式可以采用各种有效电连接方式，例如可以通过相应的导线或其他器件分别从固态薄膜电池层12的正电极层和负电极层引出正、负馈点，然后信号层11上相应的正电极端口和负电极端口则与该正、负馈点电连接即可。应当理解的是，一个信号层上可能包含一对正、负电极端口，也可能包含多对正、负电极端口。
本实施例中，为了更便于每个信号层根据当前实际需求规划进行合理布线，使得每个模块可根据需要按照各自的回流路径直接连接到电池，以减小不同模块电源线路间的耦合，避免不同功率需求和频率特征的硬件对电池的影响，本实施例利用固态薄膜电池层12的正电极层121和负电极层123都是面结构的特点，将信号层11的正电极端口和负电极端口直接分别与固态薄膜电池层12的正电极层121和负电极层123电极电连接。而且，为了进一步保证连接的可靠性，本实施例中可在信号层11与固态薄膜电池层12的正电极层121和负电极层123之间设置通孔，并在通孔中填充导电介质，让信号层11的正电极端口和负电极端口直接通过对应的通过分别与正电极层121和负 电极层123电极电连接。这样可以保证电连接的可靠性，同时固态薄膜电池层12又是直接集成于电路板中的，因此即使设备受到较大的震荡，也能避免电连接不可靠而导致断电、重启。下面以图4所示的结构进行说明。
图4中上面的信号层11与固态薄膜电池层12的正电极层121之间设有正电极通孔21，正电极通孔21内设有导电材料，且正电极通孔21在信号层11上的位置可以与信号层11上的正电极端口对应，正电极端口也可通过一定的走线连接至该正电极通孔21内。图4中上面的信号层11与固态薄膜电池层12的负电极层123之间设有负电极通孔22，负电极通孔22内也设有导电材料，且其与正电极通孔21内的导电材料可相同，也可不同，可选电阻小的导电材料；负电极通孔22在信号层11上的位置也可以与信号层11的负电极端口对应，负电极端口也可通过一定的走线连接至该负电极通孔22内。图4中右侧的通孔23贯通每个层，其可供不同信号层之间根据实际需求灵活选择连接。
应当理解的是，本实施例中集成在电路板上的固态薄膜电池层12可以仅包含一层，也可以根据实际需求设置两层以上，且包含两层以上时，每个固态薄膜电池层12可以并联形成容量更大的电池，也可以串联形成更高电压的电池，或者串、并联混合。本实施例中多个固态薄膜电池层12串、并联时，相应电极层之间可以通过通孔的方式进行电连接。
实施例二
本实施例以在电路板中集成至少两层固态薄膜电池层的几种情况进行说明。
当在电路板中集成至少两层固态薄膜电池层时，所述至少两层固态薄膜电池层可并联形成并联电池组；信号层的正电极端口与并联电池组中任意一层固态薄膜电池层的正电极层电连接即可，负电极端口与并联电池组中任意一层固态薄膜电池层的负电极层电连接即可。下面以电路板中集成两层固态薄膜电池层为例进行示例说明，对于三层及三层以上的情况则以此类推。请参见图5所示：
图5所示在图4的基础上，增加了一层固态薄膜电池层12，且两层固态薄膜电池层12并联形成并联电池组；图5中两层固态薄膜电池层12的正电 极层121之间通过通孔31电连接；两层固态薄膜电池层12的负电极层123之间通过通孔32电连接；上面的信号层11则分别与上面的固态薄膜电池层12的正电极层121和负电极层123分别电连接，也可以与下面的固态薄膜电池层12的正电极层121和负电极层123分别电连接，或者与上面的固态薄膜电池层12的正电极层121电连接，同时与下面的固态薄膜电池层12的负电极层123电连接。
当在电路板中集成至少两层固态薄膜电池层时，所述至少两层固态薄膜电池层之间依次串联形成串联电池组；信号层的正电极端口与串联电池组中第一个固态薄膜电池层的正电极层电连接，负电极端口与串联电池组中最后一个固态薄膜电池层的负电极层电连接。下面仍以电路板中集成两层固态薄膜电池层为例进行示例说明，对于三层及三层以上的情况则以此类推。请参见图6所示：
图6所示在图4的基础上，也增加了一层固态薄膜电池层12，且两层固态薄膜电池层12串联形成串联电池组；图6中上面的固态薄膜电池层12的正电极层121与下面的固态薄膜电池层12的负电极层123通过通孔33电连接形成串联；上面的信号层11则分别与上面的固态薄膜电池层12的正电极层121和下面的固态薄膜电池层12的负电极层123电连接。
当电路板中集成至少三层固态薄膜电池层时，除了上述串联、并联的方式，还可串并联混合，其中至少两层固态薄膜电池层并联后，与剩下的其他固态薄膜电池层串联形成串并联混合电池组；信号层的正电极端口与串并联混合电池组中第一个固态薄膜电池层的正电极层电连接，负电极端口与串并联混合电池组中最后一个固态薄膜电池层的负电极层电连接。下面以电路板中集成三层固态薄膜电池层为例进行示例说明，对于四层及四层以上的情况则以此类推。请参见图7所示：
图7与图6的区别在于增加了一层固态薄膜电池层12，且下面的两层固态薄膜电池层12通过通孔31和通孔32并联形成并联电池组；最上面的固态薄膜电池层12与中间的固态薄膜电池层12通过通孔33形成串联，最终得到串并联混合电池组；上面的信号层11则分别与上面的固态薄膜电池层12的正电极层121和最下面的固态薄膜电池层12的负电极层123电连接。以上仅 是以三层固态薄膜电池层12的串并联混合方式进行示例说明，但应当理解的是，串并联方式可以根据实际需求任意设置，例如当包含四层固态薄膜电池层12时，可以两两并联后再串联，或者三个并联后再与剩下的一个串联等等。
实施例三
应当理解的是，本发明实施例中固态薄膜电池层的层结构可以灵活进行变化。例如当在电路板中集成两层并联的固态薄膜电池层时，则该两层固态薄膜电池层之间可以直接接触，中间不间隔信号层或基板层或地层等。且此时两层固态薄膜电池层之间还可共用一个电极且对外可表现为一层固态薄膜电池层。请参见图8所示：
固态薄膜电池层包含依次叠加的第一电极层41、第一固态电解质层42、第二电极层43、第二固态电解质层44和第三电极层45；第一电极层41和第三电极层45为极性相同的电极层且二者电连接，图8中通过通孔31电连接，第二电极层43与第一电极层41的极性不同，例如第二电极层43为正电极层，此时第一负电极层41和第三电极层45为负电极层，或者第二电极层43为负电极层，此时第一负电极层41和第三电极层45为正电极层。
信号层11包括第一电极端口和第二电极端口，第一电极端口与第一电极层41或第三电极层45连接；第二电极端口与第二电极层43电连接。图8中，上面的信号层11与其电连接的第一电极层41(也可为第三电极层45)之间设有第一电极通孔51；上面的信号层11与其电连接的第二电极层43之间设有第二电极通孔52，且第一电极通孔51和第二电极通孔52填充有导电介质；第一电极端口通过第一电极通孔51与第一电极层41(也可为第三电极层45)电连接；第二电极端口通过第二电极通孔52与第二电极层43电连接。本实施例中，当第二电极层43为负电极层时，第二电极通孔52为负电极通孔，第一电极通孔51则为正电极通孔。
实施例四
应当理解的是，在一些应用场景中，可直接以固态薄膜电池层的负极层作为地层。但根据实际应用需要，也可在图2至图8所示的电路板上设置至少一层地层。下面以在图4的基础上增加一层地层为例进行说明，请参见图9所示，地层61与固态薄膜电池层12的负电极层123通过通孔71电连接。
实施例五
应当理解的是，本发明实施例提供的集成有固态薄膜电池层的电路板适用于各种终端，可以设置在各种终端主体上。本实施例中的终端包括各种便携移动终端，例如手机、IPDA、IPOD、各种播放器以及阅读器、笔记本等，也可适用于各种自带电源的个人电脑(PC，Personal Computer)、服务器等终端。在具体应用时，电路板上集成的固态薄膜电池层的层数则可根据实际需求灵活设定，可以设置一层，也可以设置多层；电路板上生成的信号层的层数也主要根据需求灵活设定，可以仅包含一层信号层，也可以包含多路信号层。另外，地层以及其他电路板设计中涉及的层结构都可在上述基础上进行增加，只要电路板集成有固态薄膜电池层的，都在本申请的保护范围内。
实施例六
本实施例提供了一种电路板制作方法。如图10所示，所述方法包括：步骤601：设置信号层、固态薄膜电池层；步骤602：在信号层与固态薄膜电池层之间设置隔离基板层，将信号层分别与固态薄膜电池层的正、负电极电连接。本实施例中信号层可以是各种信号层，且信号层的层数也可以根据当前应用场景灵活设定，不同信号层之间的连接关系也都可根据具体应用场景灵活设定。
在一种实现方法中，设置固态薄膜电池层由依次叠加的正电极层、固态电解质层和负电极层组成。且为电路板设置一层固态薄膜电池层，将信号层的正电极端口和负电极端口分别与该层固态薄膜电池层的正电极层和负电极层电连接。
在其他实现方法中，还可为电路板设置至少两层所述固态薄膜电池层，将所述至少两层固态薄膜电池层并联形成并联电池组；将信号层的正电极端口与并联电池组中任意一层固态薄膜电池层的正电极层电连接，负电极端口与并联电池组中任意一层固态薄膜电池层的负电极层电连接。
在其他实现方法中，为电路板设置至少两层所述固态薄膜电池层时，可将所述至少两层固态薄膜电池层依次串联形成串联电池组；将信号层的正电极端口与串联电池组中第一个固态薄膜电池层的正电极层电连接，负电极端口与串联电池组中最后一个固态薄膜电池层的负电极层电连接。
本实施例中，为电路板设置三层以上的固态薄膜电池层时，可将其中至少两层固态薄膜电池层并联后，与剩下的其他固态薄膜电池层串联形成串并联混合电池组；然后将信号层的正电极端口与串并联混合电池组中第一个固态薄膜电池层的正电极层电连接，负电极端口与串并联混合电池组中最后一个固态薄膜电池层的负电极层电连接。
在本实施例中，还可在信号层与其电连接的正电极层和负电极层之间分别设置正电极通孔和负电极通孔，且设置的正电极通孔和负电极通孔填充有导电介质；信号层的正电极端口和负电极端口分别通过正电极通孔和负电极通孔与相应的正电极层和负电极层电连接。
在本实施例中，还可设置固态薄膜电池层由依次叠加的第一电极层、第一固态电解质层、第二电极层、第二固态电解质层和第三电极层组成；第一电极层和第三电极层为极性相同的电极层且将二者电连接，第二电极层与第一电极层的极性不同，第二电极层为正电极层或负电极层；信号层包括第一电极端口和第二电极端口，第一电极端口与第一电极层或第三电极层连接；第二电极端口与第二电极层电连接。在信号层与其电连接的第一电极层或第三电极层之间设置第一电极通孔；信号层与其电连接的第二电极层之间设置第二电极通孔，且在第一电极通孔和第二电极通孔中填充导电介质；第一电极端口通过第一电极通孔与第一电极层或所述第三电极层电连接；第二电极端口通过第二电极通孔与所述第二电极层电连接。
以上内容是结合具体的实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。
工业实用性
本申请实施例提供一种电路板及其制作方法，可以大大节约所占用终端的空间，减少了硬件体积，增强了设计的一体化程度，使得终端的轻薄化发展不再受电池厚度的限制。

Claims (21)

  1. 一种电路板，包括：信号层、固态薄膜电池层、以及位于所述信号层与所述固态薄膜电池层之间的隔离基板层；所述信号层分别与所述固态薄膜电池层的正、负电极电连接。
  2. 如权利要求1所述的电路板，其中，所述固态薄膜电池层包含依次叠加的正电极层、固态电解质层和负电极层。
  3. 如权利要求2所述的电路板，其中，所述电路板包括一层所述固态薄膜电池层，所述信号层包括正电极端口和负电极端口，所述正电极端口和负电极端口分别与该层固态薄膜电池层的正电极层和负电极层电极电连接。
  4. 如权利要求2所述的电路板，其中，所述电路板包括至少两层所述固态薄膜电池层，所述至少两层固态薄膜电池层并联形成并联电池组；所述信号层包括正电极端口和负电极端口，所述正电极端口与所述并联电池组中任意一层固态薄膜电池层的正电极层电连接，所述负电极端口与所述并联电池组中任意一层固态薄膜电池层的负电极层电连接。
  5. 如权利要求2所述的电路板，其中，所述电路板包括至少两层所述固态薄膜电池层，所述至少两层固态薄膜电池层之间依次串联形成串联电池组；所述信号层包括正电极端口和负电极端口，所述正电极端口与所述串联电池组中第一个固态薄膜电池层的正电极层电连接，所述负电极端口与所述串联电池组中最后一个固态薄膜电池层的负电极层电连接。
  6. 如权利要求2所述的电路板，其中，所述电路板包括至少三层所述固态薄膜电池层，其中至少两层固态薄膜电池层并联后，与剩下的其他固态薄膜电池层串联形成串并联混合电池组；所述信号层包括正电极端口和负电极端口，所述正电极端口与所述串并联混合电池组中第一个固态薄膜电池层的正电极层电连接，所述负电极端口与所述串并联混合电池组中最后一个固态薄膜电池层的负电极层电连接。
  7. 如权利要求2至6任一项所述的电路板，其中，所述信号层与其电连接的正电极层和负电极层之间分别设有正电极通孔和负电极通孔，且所述正电极通孔和负电极通孔填充有导电介质；所述正电极端口和负电极端口分 别通过所述正电极通孔和负电极通孔与相应的正电极层和负电极层电连接。
  8. 如权利要求1所述的电路板，其中，所述固态薄膜电池层包含依次叠加的第一电极层、第一固态电解质层、第二电极层、第二固态电解质层和第三电极层；所述第一电极层和所述第三电极层为极性相同的电极层且二者电连接，所述第二电极层与所述第一电极层的极性不同，所述第二电极层为正电极层或负电极层；所述信号层包括第一电极端口和第二电极端口，所述第一电极端口与所述第一电极层或第三电极层连接；所述第二电极端口与所述第二电极层电连接。
  9. 如权利要求8所述的电路板，其中，所述信号层与其电连接的第一电极层或第三电极层之间设有第一电极通孔；所述信号层与其电连接的第二电极层之间设有第二电极通孔，且所述第一电极通孔和第二电极通孔填充有导电介质；所述第一电极端口通过所述第一电极通孔与所述第一电极层或所述第三电极层电连接；所述第二电极端口通过所述第二电极通孔与所述第二电极层电连接。
  10. 如权利要求1至6任一项所述的电路板，所述电路板还包括地层，所述地层与所述固态薄膜电池层之间设有隔离基板层，所述地层与所述固态薄膜电池层的负电极电连接。
  11. 一种终端，包括终端主体和如权利要求1至10任一项所述的电路板，所述电路板设置在所述终端主体上。
  12. 一种电路板制作方法，包括：
    设置信号层、固态薄膜电池层；
    在所述信号层与所述固态薄膜电池层之间设置隔离基板层，并将所述信号层分别与所述固态薄膜电池层的正、负电极电连接。
  13. 如权利要求12所述的电路板制作方法，其中，设置所述固态薄膜电池层包括：设置依次叠加的正电极层、固态电解质层和负电极层组成一层固态薄膜电池层。
  14. 如权利要求13所述的电路板制作方法，其中，当设置一层固态薄膜电池层时，将所述信号层的正电极端口和负电极端口分别与该层固态薄膜 电池层的正电极层和负电极层电连接。
  15. 如权利要求13所述的电路板制作方法，其中，当设置至少两层固态薄膜电池层时，将所述至少两层固态薄膜电池层并联形成并联电池组；将所述信号层的正电极端口与所述并联电池组中任意一层固态薄膜电池层的正电极层电连接，将所述信号层的所述负电极端口与所述并联电池组中任意一层固态薄膜电池层的负电极层电连接。
  16. 如权利要求13所述的电路板制作方法，其中，当设置至少两层固态薄膜电池层时，将所述至少两层固态薄膜电池层之间依次串联形成串联电池组；将所述信号层的正电极端口与所述串联电池组中第一个固态薄膜电池层的正电极层电连接，将所述信号层的负电极端口与所述串联电池组中最后一个固态薄膜电池层的负电极层电连接。
  17. 如权利要求13所述的电路板制作方法，其中，当设置至少三层固态薄膜电池层时，将其中至少两层固态薄膜电池层并联后，与剩下的其他固态薄膜电池层串联形成串并联混合电池组；将所述信号层的正电极端口与所述串并联混合电池组中第一个固态薄膜电池层的正电极层电连接，将所述信号层的负电极端口与所述串并联混合电池组中最后一个固态薄膜电池层的负电极层电连接。
  18. 如权利要求13至17任一项所述的电路板制作方法，其中，所述信号层与其电连接的正电极层和负电极层之间分别设有正电极通孔和负电极通孔，且所述正电极通孔和负电极通孔填充有导电介质；所述正电极端口和负电极端口分别通过所述正电极通孔和负电极通孔与相应的正电极层和负电极层电连接。
  19. 如权利要求12所述的电路板制作方法，其中，设置所述固态薄膜电池层包括：设置依次叠加的第一电极层、第一固态电解质层、第二电极层、第二固态电解质层和第三电极层；所述第一电极层和所述第三电极层为极性相同的电极层且二者电连接，所述第二电极层与所述第一电极层的极性不同，所述第二电极层为正电极层或负电极层；所述信号层包括第一电极端口和第二电极端口，将所述第一电极端口与所述第一电极层或第三电极层连接；将所述第二电极端口与所述第二电极层电连接。
  20. 如权利要求19所述的电路板制作方法，其中，所述信号层与其电连接的第一电极层或第三电极层之间设有第一电极通孔；所述信号层与其电连接的第二电极层之间设有第二电极通孔，且所述第一电极通孔和第二电极通孔填充有导电介质；所述第一电极端口通过所述第一电极通孔与所述第一电极层或所述第三电极层电连接；所述第二电极端口通过所述第二电极通孔与所述第二电极层电连接。
  21. 如权利要求12至17任一项所述的电路板制作方法，所述方法还包括设置地层，所设置的地层与所述固态薄膜电池层之间设有隔离基板层，并将所述地层与所述固态薄膜电池层的负电极电连接。
PCT/CN2016/084770 2016-03-29 2016-06-03 一种电路板及其制作方法及一种终端 WO2017166429A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610185776.4 2016-03-29
CN201610185776.4A CN107241850A (zh) 2016-03-29 2016-03-29 一种电路板及终端

Publications (1)

Publication Number Publication Date
WO2017166429A1 true WO2017166429A1 (zh) 2017-10-05

Family

ID=59963352

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/084770 WO2017166429A1 (zh) 2016-03-29 2016-06-03 一种电路板及其制作方法及一种终端

Country Status (2)

Country Link
CN (1) CN107241850A (zh)
WO (1) WO2017166429A1 (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101248650A (zh) * 2005-08-29 2008-08-20 京瓷无线公司 具有频率调谐的接地面的电连接器
JP2009176901A (ja) * 2008-01-23 2009-08-06 Casio Hitachi Mobile Communications Co Ltd フレキシブル基板、および、電子機器
CN102576828A (zh) * 2009-09-01 2012-07-11 无穷动力解决方案股份有限公司 具有集成薄膜电池的印刷电路板
CN102695365A (zh) * 2011-03-25 2012-09-26 Lg电子株式会社 用于移动终端的印刷电路板组件及其制造方法
US20150077945A1 (en) * 2013-09-17 2015-03-19 Samsung Electronics Co., Ltd. Portable electronic device and battery pack for the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2255450A (en) * 1991-04-16 1992-11-04 Dowty Electronic Components Electrical power supply
JP6144058B2 (ja) * 2013-01-31 2017-06-07 新光電気工業株式会社 配線基板及び配線基板の製造方法
CN104423655A (zh) * 2013-08-20 2015-03-18 鸿富锦精密工业（深圳）有限公司 可挠式触控结构及采用该可挠式触控结构的手表及首饰

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101248650A (zh) * 2005-08-29 2008-08-20 京瓷无线公司 具有频率调谐的接地面的电连接器
JP2009176901A (ja) * 2008-01-23 2009-08-06 Casio Hitachi Mobile Communications Co Ltd フレキシブル基板、および、電子機器
CN102576828A (zh) * 2009-09-01 2012-07-11 无穷动力解决方案股份有限公司 具有集成薄膜电池的印刷电路板
CN102695365A (zh) * 2011-03-25 2012-09-26 Lg电子株式会社 用于移动终端的印刷电路板组件及其制造方法
US20150077945A1 (en) * 2013-09-17 2015-03-19 Samsung Electronics Co., Ltd. Portable electronic device and battery pack for the same

Also Published As

Publication number Publication date
CN107241850A (zh) 2017-10-10

Similar Documents

Publication Publication Date Title
CN106098971B (zh) 柔性电池组
US5367431A (en) Thin power supply unit
KR101483133B1 (ko) 이차 전지
JP2018504737A (ja) 表面実装電池、及び集積電池セルを有するポータブル電子機器
KR102134120B1 (ko) 저 프로파일 센서 및 이를 포함하는 전기화학 전지
WO2020145737A1 (ko) 이차전지 및 그 제조방법
JPH11345604A (ja) リチウム２次電池及び電池モジュール
KR20200017370A (ko) 수평 복합 전기 공급 요소 그룹
KR20140097731A (ko) 전지 팩
US20210267063A1 (en) Method of Direct Embedding a Lithium Ion Battery on a Flexible Printed Circuit Board
CN211455731U (zh) 电池模组以及电子设备
TWI565190B (zh) 電池保護電路封裝體
CN106505160B (zh) 电池封装方法
WO2017166429A1 (zh) 一种电路板及其制作方法及一种终端
JP2020522145A (ja) 電源を備えた回路基板、回路基板を備えた電気部品、及び回路基板の製造方法
CN108701835B (zh) 无封装电池单元装置以及用于形成该无封装电池单元装置的方法
US9455539B1 (en) Connector having printed circuit with embedded die
KR102621551B1 (ko) 음극이 갖는 전기 전도도의 속성이 다른 복수의 단위 셀을 포함하는 배터리 및 그를 포함하는 전자 장치
US20230129190A1 (en) Cell balancing module
KR20130027918A (ko) 전지의 전극 제조 시스템 및 제조 방법
KR102252329B1 (ko) 수평방향으로 배열된 전극들을 포함하는 캐패시터
JP3019341B2 (ja) 印刷全固体二次電池付プリント配線板
KR101690367B1 (ko) 이차전지
CN112805871A (zh) 发电元件安装基板、电池组、电子设备以及电动车辆
KR20150087470A (ko) 배터리 보호회로 모듈 패키지 및 그 제조방법

Legal Events

Date Code Title Description
NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16896203

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16896203

Country of ref document: EP

Kind code of ref document: A1