WO2017156945A1 - 一种像素驱动电路、显示设备和像素驱动方法 - Google Patents

一种像素驱动电路、显示设备和像素驱动方法 Download PDF

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Publication number
WO2017156945A1
WO2017156945A1 PCT/CN2016/089922 CN2016089922W WO2017156945A1 WO 2017156945 A1 WO2017156945 A1 WO 2017156945A1 CN 2016089922 W CN2016089922 W CN 2016089922W WO 2017156945 A1 WO2017156945 A1 WO 2017156945A1
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Prior art keywords
current
charging
phase
transistor
source
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PCT/CN2016/089922
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English (en)
French (fr)
Inventor
胡祖权
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Priority to US15/514,678 priority Critical patent/US10311784B2/en
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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Definitions

  • the degree of opening of the driving transistor is generally controlled by the capacitance structure in the display phase. After the gray level of the sub-pixel is determined, the current intensity I target of the target current flowing through the driving transistor is determined; however, the current intensity of the current generated by the current source and the I target are equal during the charging phase. In this way, the above driving circuit cannot be applied to a high-resolution display panel, and when applied to a lower-resolution display panel, the effective display time is also reduced, and the display effect is reduced.
  • an embodiment of the present disclosure provides a pixel driving circuit for driving a light emitting device in a pixel structure, the pixel driving circuit including:
  • a driving transistor T1 connected in series with the light emitting device, and a drain connected to the first power signal input terminal (VDD);
  • a capacitor structure C the first end is connected to the gate of the driving transistor T1, and the second end is connected to the source of the driving transistor T1;
  • the current intensity of the charging current for charging the capacitor structure C is greater than the current intensity of the target current, and after the charging phase ends, the voltage difference across the capacitor structure C is the target voltage difference;
  • the target voltage difference is: a gate-source voltage difference of the driving transistor T1 when the light-emitting device emits light at a set brightness in an illuminating phase;
  • the target current is a current flowing through the driving transistor T1 when the light emitting device emits light at a set luminance in an emission phase.
  • the above pixel driving circuit wherein the charging circuit comprises:
  • At least one current control transistor T2 connected in parallel with the driving transistor T1, a gate of the current control transistor T2 is connected to a first end of the capacitor structure C, and a source is connected to a second end of the capacitor structure C;
  • control unit specifically includes:
  • the first switching unit is turned on during the charging phase, and turns on the first power signal input terminal VDD and the gate, the drain of the current control transistor T2 and the first end of the capacitor structure C, and is turned off during the light emitting phase;
  • the second switching unit is disposed between the second power signal input terminal VSS and the first common node N1, and is connected in series with the current source, and the second switching unit is configured to be turned on during the charging phase. Turn off during the lighting phase.
  • the first switching unit specifically includes:
  • the charging phase is turned on, the first thin film transistor M1 that is turned off during the light emitting phase, the drain is connected to the first power signal input terminal VDD, the source and the drain, the gate and the capacitor of the current control transistor T2
  • the second common node N2 to which the first end of the structure C is simultaneously connected is connected.
  • the first switching unit specifically includes:
  • the charging phase is turned on, the second thin film transistor M2 is turned off in the light emitting phase, the drain is connected to the first power signal input terminal VDD, and the source is connected to the drain of the current control transistor T2;
  • a charging phase is turned on, a second thin film transistor M3 that is turned off in the light emitting phase, a drain connected to the first power signal input terminal VDD, a source and a gate of the current control transistor T2 and the capacitor structure C
  • the third common node N3 that is connected at the first end is connected.
  • the third switching unit is disposed between the second power signal input terminal VSS and the first common node N1, is connected in series with the light emitting device, is turned off during the charging phase, and is turned on during the light emitting phase.
  • an embodiment of the present disclosure further provides a display device including at least one pixel structure, the pixel structure including a light emitting device, wherein each pixel structure further includes any of the above pixels And a driving circuit, wherein the light emitting device is connected to a source or a drain of the driving transistor in the pixel driving circuit.
  • an embodiment of the present disclosure further provides a pixel driving method for driving a light emitting device in a pixel structure in series with a driving transistor T1, the pixel driving method comprising:
  • the current intensity of the charging current for charging the capacitor structure C is greater than the current intensity of the target current during at least a period of the charging phase, and the voltage across the capacitor structure C after the charging phase ends
  • the difference is the target voltage difference
  • the target voltage difference is: a gate-source voltage difference of the driving transistor T1 when the light-emitting device emits light at a set brightness in an illuminating phase;
  • a controlling step of controlling at least one current control transistor T2 connected in parallel with the driving transistor T1 and between the second power signal input terminal VSS and the first common node N1 in the charging phase The current source charges the capacitor structure C, and controls the current control transistor T2 and the current source to stop charging the capacitor structure C during a display phase; the current source generates a current whose current intensity is greater than a current intensity of the target current;
  • the first common node N1 is simultaneously connected to a source of the driving transistor T1, a source of the current control transistor T2, and a second end of the capacitor structure C.
  • controlling step specifically includes:
  • the second control step is controlled to be disposed between the second power signal input terminal VSS and the first common node N1, and the second switch unit connected in series with the current source is turned on during the charging phase and turned off during the light emitting phase.
  • the control drain is connected to the first power signal input terminal VDD, and the first thin film transistor M1 whose source is connected to the second common node N2 is turned on during the charging phase, and is turned off during the light emitting phase;
  • the second common node N2 is simultaneously connected to the drain, the gate of the current control transistor T2 and the first end of the capacitor structure C.
  • the charging circuit can make the voltage difference across the charged capacitor structure a target voltage difference, it can be ensured that the light emitting device emits light with the correct brightness.
  • the charging current in the related art is equal to the operating current
  • the charging current is greater than the operating current for at least a period of the charging phase, and thus the embodiment of the present disclosure increases the charging current with respect to the related art. It can increase the charging speed so that it can be applied to high-resolution panels. When applied to a lower resolution product, the charging time is shortened, so that it can be applied to the display time more, and the display effect can be improved.
  • FIG. 1 is a circuit configuration diagram of a driving circuit in the related art
  • FIG. 2 is a block diagram showing the structure of a pixel driving circuit of at least some embodiments of the present disclosure
  • FIG. 4 is a block diagram showing the structure of a control unit in a pixel driving circuit of at least some embodiments of the present disclosure
  • FIG. 6 is a schematic diagram showing another implementation manner of a first switching unit in at least some embodiments of the present disclosure
  • FIG. 7 is a block diagram showing the structure of a pixel driving circuit of at least some embodiments of the present disclosure.
  • Fig. 1 is a view showing the circuit configuration of a drive circuit in the related art.
  • the degree of opening of the driving transistor T1 is controlled by the capacitance structure C in the display phase.
  • the current intensity I target of the target current flowing through the driving transistor is determined, and the current and the non-adjustable parameters of the driving transistor (including ⁇ , W/L, and Vth) and the adjustable Vgs satisfies the following formula:
  • I target 0.5 ⁇ *(W/L)*(V gs -V th ) 2
  • ⁇ is the product of the carrier mobility and the equivalent capacitance of the driving transistor
  • W/L is the width to length ratio of the driving transistor
  • Vgs is the gate-to-source voltage difference of the driving transistor
  • Vth is the threshold voltage of the driving transistor.
  • the capacitor structure C needs to be charged so that the voltage difference across the capacitor is:
  • the first end of the capacitor structure is connected to the gate of the driving transistor T1, and the second end is connected to the source of T1.
  • the current source is used to generate the target current
  • the circuit current is designed to make the target current flow through the driving transistor after the state is stabilized.
  • the gate-source voltage difference of the driving transistor is used to charge the capacitor structure, so that the voltage difference between the charged capacitor structures is the target voltage difference:
  • the operation of the driving circuit in the related art in the charging phase is as follows.
  • the first control node S1 outputs a low level signal
  • the second control node S2 outputs a high level signal
  • the transistor controlled by the first control node S1 is turned off
  • the transistor controlled by the second control node S2 is turned on.
  • T1 After charging for a period of time, when the voltage difference across the capacitor structure reaches the threshold voltage of T1, T1 forms a channel at this time, and the path where T1 is located will shunt a part of the current generated by the current source, so that the current flowing through the path where C is located Decrease, its current intensity is less than the I target . As time passes, the current intensity of the current flowing through the path in which C is located gradually decreases.
  • the charging phase can be divided into three phases:
  • the charging circuit shown in FIG. 1 changes the current intensity of the charging current of the capacitor structure as follows: the maximum value (I target ) is maintained for a period of time, then gradually decreases from the maximum value, and finally enters a steady state. The current intensity is close to zero.
  • the charging efficiency of the capacitor structure depends on both the voltage and current intensity of the charging signal, and in the charging circuit shown in Fig. 1, the current intensity of the charging signal is gradually decreased from the I target .
  • the current intensity of the charging signal is smaller, making the charging speed too slow.
  • the charging time allocated to each pixel is very limited, so the above method cannot meet the requirements of the high-resolution display panel. Even in a display panel that satisfies the requirements, the effective display time is reduced and the display effect is reduced.
  • the embodiments of the present disclosure provide a pixel driving circuit, a display device, and a pixel driving method to satisfy the voltage difference between the two ends of the capacitor structure.
  • charging can be performed with a larger charging current, and the charging time is shortened, so that the embodiment of the present disclosure can be applied to a high-resolution panel.
  • it can improve the display.
  • At least some embodiments of the present disclosure provide a pixel driving circuit for driving a light emitting device in a pixel structure, and a partial structure of the pixel driving circuit is as shown in FIG. 2, including: a driving transistor T1 connected in series with the light emitting device, and a capacitor Structure C, and a charging circuit including at least one current source.
  • the light-emitting device uses a broken line frame to indicate a possible position of the light emitting device, instead of representing two light emitting devices.
  • the light emitting device is disposed between the drain of T1 and the second power supply signal input terminal VSS.
  • the first end of the capacitor structure C is connected to the gate of the driving transistor T1, and the second end is connected to the source of the driving transistor T1.
  • the current intensity I of the charging current that charges the capacitor structure C is greater than the current intensity I target of the target current, and after the charging phase ends, the voltage difference across the capacitor structure C is the target voltage. difference.
  • the target voltage difference is: a difference in a gate-source voltage of the driving transistor T1 when the light-emitting device emits light at a set luminance in an emission phase.
  • the target current is a current flowing through the driving transistor T1 when the light emitting device emits light at a set luminance in an emission phase.
  • the charging speed of the capacitor structure C is closely related to the charging current.
  • the current intensity of the charging current is smaller than the current intensity I target of the target current.
  • I target for example, when the target gray level corresponding to the pixel structure is small
  • the required charging time is very long, it cannot be applied to products with higher resolution, or it can reduce the effective display time.
  • the voltage difference across the capacitor structure is the target voltage difference, which ensures that the light emitting device emits light with the correct brightness.
  • the charging current is greater than the current intensity I target of the target current for a period of time in the charging phase, that is,
  • the current intensity of the charging current starts to decrease from the current intensity greater than the I target , and the current intensity of the charging current is increased, so that the charging time can be shortened, so that it can be applied to a high-resolution panel.
  • the charging time is shortened, more time can be used for display in one frame time, and the display effect is improved.
  • the current generated by the current source is distributed to two branches, namely, the branch where T1 is located, and the branch where C is located.
  • the current generated by the current source will flow through the branch where T1 is located.
  • the current intensity of the current generated by the current source can only be the I target .
  • the current intensity of the current generated by the current source is set to be greater than the I target , and a current control transistor T2 in parallel with T1 is provided.
  • the current control transistor T2 is connected to the capacitor structure in the same manner as the drive transistor is connected to the capacitor structure. In the second half of the charging phase, the current control transistor T2 shares the portion of the current generated by the current source that is greater than the I target .
  • both T1 and T2 are in the off state.
  • the current intensity generated by the current source is greater than the current of the I target all flowing through the branch where C is located, so as to be larger. The current charges the capacitor structure.
  • At least some embodiments of the present disclosure provide a pixel driving circuit for driving a light emitting device in a pixel structure, the pixel driving circuit including: a driving transistor T1, a capacitor structure C, and a charging circuit in series with the light emitting device.
  • the drain of the driving transistor T1 is connected to the first power signal input terminal (VDD).
  • the first end of the capacitor structure C is connected to the gate of the driving transistor T1, and the second end is connected to the source of the driving transistor T1.
  • the charging circuit includes at least one current control transistor T2 connected in parallel with the driving transistor T1 for generating a current source having a current intensity greater than an I target and a control unit (not shown).
  • the gate of the current control transistor T2 is connected to the first end of the capacitor structure C, and the source is connected to the second end of the capacitor structure C.
  • the current source is disposed at the second power signal input terminal VSS and the first common node N1 connected to the source of the driving transistor T1, the source of the current controlling transistor T2, and the second end of the capacitor structure C between.
  • the control unit is configured to control the current control transistor T2 and the current source to charge the capacitor structure C during the charging phase, and control the current control transistor T2 and the current source to stop charging the capacitor structure C during the display phase.
  • the voltage difference across the capacitor structure C is very small, so that the driving transistor T1 and the current controlling transistor T2 are in an off state.
  • the current generated by the current source flows through the path where C is located.
  • a larger current (current intensity greater than the I target ) charges C.
  • T1 and / or T2 After charging for a period of time, when the voltage difference across the capacitor structure reaches the threshold voltage of T1 and / or T2, T1 and / or T2 form a channel, and the path where T1 and / or T2 is located will shunt the current generated by the current source. In part, the current flowing through the path in which C is located is reduced, and as time passes, the current intensity of the current flowing through the path in which C is located is gradually reduced.
  • the steady state is reached.
  • the voltage difference across the capacitor structure is maintained at the target voltage difference.
  • the current generated by the current source flows through T1 and T2 during the charging phase, and the current intensity of the current flowing through the path where C is located is 0. .
  • the charging phase can also be divided into three phases:
  • the voltage difference between the two ends of the capacitor structure C is small, and the current intensity of the charging current is equal to the current intensity of the current generated by the current source, but greater than the I target ;
  • the voltage difference across the capacitor structure C gradually increases, and the current intensity of the charging current is gradually decreased from the maximum value (the current intensity of the current generated by the current source);
  • the voltage difference across the capacitor structure C is stabilized at the target voltage difference, and the current intensity of the charging current is close to zero.
  • the technical solutions of the related art and the technical solutions of the embodiments of the present disclosure are all processes in which the current intensity of the charging current is gradually decreased, but the technical solution of the embodiment of the present disclosure is generated from a relatively high starting point (current source).
  • the current intensity of the current begins to decrease, so in the intermediate stage, the charging circuit of the embodiment of the present disclosure can also provide a charging current with a large average current intensity, and can also shorten the duration of the intermediate phase.
  • the technical solution of the embodiment of the present disclosure greatly shortens the duration of the initial phase and the intermediate phase in the charging phase, thereby shortening the charging time so that it can be applied to a high resolution panel.
  • the charging time is shortened, more time can be used for display in one frame time, and the display effect is improved.
  • control unit needs to control the current control transistor T2 and the current source to charge the capacitor structure C during the charging phase, and control the current control transistor T2 and the current source to stop the capacitor structure during the display phase. C charging.
  • two switch units are respectively disposed to correspondingly control the current control transistor T2 and the current source.
  • the control unit specifically includes: a first switch unit and a second switch unit.
  • the first switching unit is turned on during the charging phase to turn on the first power signal input terminal VDD and the gate, the drain of the current control transistor T2 and the first end of the capacitor structure C.
  • the first switching unit is turned off during the lighting phase.
  • the second switch unit uses a broken line frame to indicate that the second switch unit can be set to
  • the current source is near the end of VSS, and can also be placed at the end of the current source away from VSS.
  • the first switching unit when the first switching unit is implemented by a thin film transistor, the first switching unit specifically includes: a first thin film transistor M1.
  • the first thin film transistor M1 is turned on during the charging phase and turned off during the light emitting phase.
  • a drain of the first thin film transistor M1 is connected to the first power signal input terminal VDD, and a source and a first terminal connected to the drain, the gate of the current control transistor T2 and the first end of the capacitor structure C
  • Two public nodes N2 are connected.
  • the first switching unit when the first switching unit is implemented by two thin film transistors, the first switching unit specifically includes: a second thin film transistor M2 and a third thin film transistor M3.
  • the second thin film transistor M2 is turned on during the charging phase and turned off during the light emitting phase.
  • the drain of the second thin film transistor M2 is connected to the first power supply signal input terminal VDD, and the source is connected to the drain of the current control transistor T2.
  • the third thin film transistor M3 is turned on during the charging phase and turned off during the light emitting phase.
  • a drain of the third thin film transistor M3 is connected to the first power signal input terminal VDD, and a source and a third common node simultaneously connected to a gate of the current control transistor T2 and a first end of the capacitor structure C N3 connection.
  • the light emitting device may be disposed between the drain of T1 and VDD, or may be disposed between the source of T1 and VSS.
  • the pixel driving circuit of at least some embodiments of the present disclosure As shown in FIG. 7, the method further includes: a third switching unit.
  • the third switching unit is disposed between the second power signal input terminal VSS and the first common node N1 in series with the light emitting device.
  • the third switching unit is turned off during the charging phase and turned on during the lighting phase.
  • the third switching unit uses a broken line frame to indicate that the third switching unit can be disposed at one end of the light emitting device near VSS or at one end of the light emitting device away from VSS.
  • a fourth switching unit which is connected in parallel with the light emitting device, is turned on during the charging phase, and is in the light emitting stage.
  • the segment can be turned off.
  • the first, second, and third switching units are all taken as an example of a specific circuit when the N-type thin film transistor is implemented, and the operation of the driving circuit of the embodiment of the present disclosure is described in detail below.
  • T1 and T2 are also turned off. Therefore, the current generated by the current source flows through C, and C is charged with a larger charging current until the voltage difference across C turns on T1 and/or T2. .
  • T1 and T2 form channels sequentially, and when the threshold voltages of T1 and T2 are the same, T1 and T2 form communication at the same time.
  • I 1 0.5 ⁇ 1 *(W 1 /L 1 )*(V gs -V th1 ) 2
  • I 2 0.5 ⁇ 2 *(W 2 /L 2 )*(V gs -V th2 ) 2
  • ⁇ 1 is the product of the T1 carrier mobility and the T1 equivalent capacitance
  • ⁇ 2 is the product of the T2 carrier mobility and the T2 equivalent capacitance
  • W 1 /L 1 is a T1 width to length ratio
  • W 2 /L 2 is a T2 width to length ratio
  • V gs is the gate-to-source voltage difference between T1 and T2, that is, the voltage difference across C;
  • V th1 is a threshold voltage of T1;
  • V th2 is the threshold voltage of T2.
  • I 1 0.5 ⁇ 1 *(W 1 /L 1 )*(V target -V th1 ) 2
  • I 2 0.5 ⁇ 2 * (W 2 / L 2 ) * (V target - V th2 ) 2
  • the first control node S1 After entering the illuminating phase, the first control node S1 outputs a low level signal, and the second control node S2 outputs a high level signal, then the second thin film transistor M2 and the third thin film transistor M3 controlled by the first control node S1.
  • the fourth thin film transistor M4 is turned off, and the fifth thin film transistor M5 controlled by the second control node S2 is turned on.
  • T1 and T2 remain unchanged, but since M2 is turned off, no current flows through T2, and T1 turns on, and the current flowing through it is:
  • the current source starting from a current source, at the beginning of the charging phase, the current source generates a current having a current intensity greater than the I target , and in the intermediate phase of charging, ie, the voltage difference across the capacitive structure is greater than After driving the threshold voltage of the transistor, the current source generates a current whose current intensity is equal to the I target .
  • the embodiment of the present disclosure can greatly shorten the duration of the initial stage with respect to the technical solutions of the related art, thus shortening the charging time so that it can be applied to a high-resolution panel.
  • the charging time is shortened, more time can be used for display in one frame time, and the display effect is improved.
  • an embodiment of the present disclosure further provides a display device including at least one pixel structure, the pixel structure including a light emitting device, wherein each pixel structure further includes any of the above pixels a driving circuit, the light emitting device and the pixel driving electricity The source or drain of the drive transistor in the path is connected.
  • an embodiment of the present disclosure further provides a pixel driving method for driving a light emitting device in a pixel structure in series with a driving transistor T1, the pixel driving method comprising:
  • the current intensity of the charging current for charging the capacitor structure C is greater than the current intensity of the target current during at least a period of the charging phase, and the voltage across the capacitor structure C after the charging phase ends The difference is the target voltage difference.
  • the display phase controls the current control transistor T2 and the current source to stop charging the capacitive structure C; the current source generates a current having a current intensity greater than a current intensity of the target current.
  • the second control step controls the second switching unit disposed between the second power signal input terminal VSS and the first common node N1 and connected in series with the current source to be turned on during the charging phase, and turned off during the lighting phase.
  • the first control step is specifically:
  • the control drain is connected to the first power signal input terminal VDD, and the first thin film transistor M1 whose source is connected to the second common node N2 is turned on during the charging phase and turned off during the light emitting phase.
  • the second common node N2 is simultaneously connected to the drain, the gate of the current control transistor T2 and the first end of the capacitor structure C.
  • the transistor used in the embodiment of the present disclosure may be a thin film transistor or a field effect transistor or the same diode of other characteristics. Since the source and the drain of the transistor used are symmetrical, the source and the drain are indistinguishable. .
  • the description is made with an N-type transistor.
  • the gate input is at a high level, the source and drain are turned on, and the P-type transistor is reversed. It is conceivable that the implementation using a P-type transistor is easily conceivable by those skilled in the art without any creative effort, and is therefore within the scope of protection of the embodiments of the present disclosure.

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Abstract

一种像素驱动电路、显示设备和像素驱动方法，该像素驱动电路包括：与发光器件串联的驱动晶体管（T1）；电容结构（C），第一端和所述驱动晶体管（T1）的栅极连接，第二端和所述驱动晶体管（T1）的源极连接；至少包括一电流源的充电电路，用于在充电阶段对电容结构（C）进行充电；充电阶段的至少一段时间内，对电容结构（C）进行充电的充电电流的电流强度大于目标电流的电流强度，且充电阶段结束后，电容结构（C）两端的电压差为目标电压差；所述目标电压差为：发光器件在发光阶段以设定亮度发光时，驱动晶体管（T1）的栅源电压差，目标电流为：发光器件在发光阶段以设定亮度发光时，流过驱动晶体管（T1）的电流。

Description

一种像素驱动电路、显示设备和像素驱动方法
相关申请的交叉引用
本申请主张在2016年3月18日在中国提交的中国专利申请号No.201610157872.8的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及像素驱动技术，特别是一种像素驱动电路、显示设备和像素驱动方法。
背景技术
相关技术中，在通过电流源控制工作电流的像素电路中，在显示阶段，驱动晶体管的开启程度通常受电容结构的控制。当亚像素的灰阶确定之后，流过驱动晶体管的目标电流的电流强度I目标是确定的；然而，在充电阶段电流源产生的电流的电流强度和I目标是相等的。这种方式将导致上述驱动电路无法应用于高分辨率的显示面板，同时在应用于较低分辨率的显示面板时，也会减小有效显示时间，降低显示效果。
发明内容
本公开实施例的目的在于提供一种像素驱动电路、显示设备和像素驱动方法，提高显示效果。
为了实现上述目的，本公开实施例提供了一种像素驱动电路，用于驱动像素结构中的发光器件，所述像素驱动电路包括：
与发光器件串联的驱动晶体管T1，漏极与第一电源信号输入端子(VDD)连接；
电容结构C，第一端和所述驱动晶体管T1的栅极连接，第二端和所述驱动晶体管T1的源极连接；
至少包括一电流源的充电电路，用于在充电阶段对所述电容结构C进行充电；
所述充电阶段的至少一段时间内，对所述电容结构C进行充电的充电电流的电流强度大于目标电流的电流强度，且充电阶段结束后，电容结构C两端的电压差为目标电压差；
所述目标电压差为：所述发光器件在发光阶段以设定亮度发光时，所述驱动晶体管T1的栅源电压差；
所述目标电流为：所述发光器件在发光阶段以设定亮度发光时，流过所述驱动晶体管T1的电流。
上述的像素驱动电路，其中，所述充电电路包括：
至少一个和所述驱动晶体管T1并联的电流控制晶体管T2，所述电流控制晶体管T2的栅极和所述电容结构C的第一端连接，源极和所述电容结构C的第二端连接；
生成电流强度大于目标电流的电流强度的电流的电流源，设置于第二电源信号输入端子VSS和与所述驱动晶体管T1的源极、所述电流控制晶体管T2的源极和所述电容结构C的第二端同时连接的第一公共节点N1之间；
控制单元，用于在充电阶段控制所述电流控制晶体管T2和电流源对所述电容结构C充电，在显示阶段控制所述电流控制晶体管T2和电流源停止对所述电容结构C充电。
上述的像素驱动电路，其中，所述控制单元具体包括：
第一开关单元，在充电阶段导通，导通第一电源信号输入端子VDD和所述电流控制晶体管T2的栅极、漏极和所述电容结构C的第一端，在发光阶段关断；
第二开关单元，所述第二开关单元设置于第二电源信号输入端子VSS和所述第一公共节点N1之间，与所述电流源串联，第二开关单元用于在充电阶段导通，在发光阶段关断。
上述的像素驱动电路，其中，所述第一开关单元具体包括：
充电阶段导通，发光阶段关断的第一薄膜晶体管M1，漏极与所述第一电源信号输入端子VDD连接，源极和与所述电流控制晶体管T2的漏极、栅极和所述电容结构C的第一端同时连接的第二公共节点N2连接。
上述的像素驱动电路，其中，所述第一开关单元具体包括：
充电阶段导通，发光阶段关断的第二薄膜晶体管M2，漏极与所述第一电源信号输入端子VDD连接，源极和所述电流控制晶体管T2的漏极连接；
充电阶段导通，发光阶段关断的第二薄膜晶体管M3，漏极与所述第一电源信号输入端子VDD连接，源极和与所述电流控制晶体管T2的栅极和所述电容结构C的第一端同时连接的第三公共节点N3连接。
上述的像素驱动电路，其中，所述发光器件设置于第二电源信号输入端子VSS和所述第一公共节点N1之间，所述像素驱动电路还包括：
第三开关单元，设置于所述第二电源信号输入端子VSS和所述第一公共节点N1之间，与所述发光器件串联，在充电阶段关断，在发光阶段导通。
为了更好地实现本公开实施例的目的，本公开实施例还提供了一种显示设备，包括至少一个像素结构，所述像素结构包括发光器件，其中，每一个像素结构还包括上述任意的像素驱动电路，所述发光器件与所述像素驱动电路中的驱动晶体管的源极或者漏极连接。
为了更好地实现本公开实施例的目的，本公开实施例还提供了一种像素驱动方法，用于驱动像素结构中和驱动晶体管T1串联的发光器件，所述像素驱动方法包括：
充电步骤，在充电阶段对第一端和所述驱动晶体管T1的栅极连接，第二端和所述驱动晶体管T1的源极连接的电容结构C进行充电；所述驱动晶体管(T1)的漏极与第一电源信号输入端子(VDD)连接；
所述充电步骤中，在所述充电阶段的至少一段时间内，对所述电容结构C进行充电的充电电流的电流强度大于目标电流的电流强度，且充电阶段结束后，电容结构C两端的电压差为目标电压差；
所述目标电压差为：所述发光器件在发光阶段以设定亮度发光时，所述驱动晶体管T1的栅源电压差；
所述目标电流为：所述发光器件在发光阶段以设定亮度发光时，流过所述驱动晶体管T1的电流。
上述的像素驱动方法，其中，所述充电步骤具体为：
控制步骤，在充电阶段控制至少一个和所述驱动晶体管T1并联的电流控制晶体管T2和设置于第二电源信号输入端子VSS和第一公共节点N1之间电 流源对所述电容结构C充电，在显示阶段控制所述电流控制晶体管T2和所述电流源停止对所述电容结构C充电；所述电流源生成电流强度大于目标电流的电流强度的电流；
所述第一公共节点N1与所述驱动晶体管T1的源极、所述电流控制晶体管T2的源极和所述电容结构C的第二端同时连接。
上述的像素驱动方法，其中，所述控制步骤具体包括：
第一控制步骤，控制设置于第一电源信号输入端子VDD和所述电流控制晶体管T2的栅极、源极和所述电容结构C的第一端之间的第一开关单元在充电阶段导通，在发光阶段关断；
第二控制步骤，控制设置于第二电源信号输入端子VSS和所述第一公共节点N1之间，与所述电流源串联的第二开关单元在充电阶段导通，在发光阶段关断。
上述的像素驱动方法，其中，所述第一控制步骤具体为：
控制漏极与所述第一电源信号输入端子VDD连接，源极与第二公共节点N2连接的第一薄膜晶体管M1在充电阶段导通，在发光阶段关断；
所述第二公共节点N2与所述电流控制晶体管T2的漏极、栅极和所述电容结构C的第一端同时连接。
本公开实施例中，由于充电电路能够使得充电后的电容结构两端的电压差为目标电压差，能够确保发光器件以正确的亮度发光。而相对于相关技术中的充电电流等于工作电流的方式而言，在充电阶段的至少一段时间内，充电电流是大于工作电流的，因此相对于相关技术，本公开实施例加大了充电电流，能够提高充电速度，使之可以应用于高分辨率面板。而在应用于较低分辨率的产品时，由于缩短了充电时间，因此可以应用于显示的时间就会更多，能够提高显示效果。
附图说明
图1表示相关技术中驱动电路的电路结构图；
图2表示本公开至少一些实施例的像素驱动电路的结构示意图；
图3表示本公开至少一些实施例的像素驱动电路的充电电路的结构示意 图；
图4表示本公开至少一些实施例的像素驱动电路中的控制单元的结构示意图；
图5表示本公开至少一些实施例中第一开关单元的一种实现方式示意图；
图6表示本公开至少一些实施例中第一开关单元的另一种实现方式示意图；
图7表示本公开至少一些实施例的像素驱动电路的结构示意图；
图8表示本公开至少一些实施例中使用N型薄膜晶体管实现开关单元的结构示意图。
具体实施方式
在对本公开实施例进行详细说明之前，先对发明人在实现本公开实施例的过程中发现相关技术中所存在的问题说明如下。
图1表示相关技术中驱动电路的电路结构图。如图1所示，在通过电流源控制工作电流的像素电路中，在显示阶段，驱动晶体管T1的开启程度受电容结构C的控制。当亚像素的灰阶确定之后，流过驱动晶体管的目标电流的电流强度I目标是确定的，而该电流与驱动晶体管的不可调的参数(包括μ、W/L以及Vth)和可调的Vgs满足下面的公式：
I目标＝0.5μ*(W/L)*(Vgs-Vth)2
其中：μ为载流子迁移率与驱动晶体管等效电容的乘积，W/L为驱动晶体管的宽长比，Vgs为驱动晶体管的栅源电压差，Vth为驱动晶体管的阈值电压。
因此，要保证OLED在发光阶段按要求亮度发光，则需要为电容结构C充电，使得电容两端的电压差为：
Figure PCTCN2016089922-appb-000001
如图1所示，电容结构的第一端连接到驱动晶体管T1的栅极，第二端连接到T1的源极。同时，利用电流源生成目标电流，并通过电路设计使得状态稳定后该目标电流能够全部流过驱动晶体管。此时，利用驱动晶体管的栅源电压差为电容结构充电，使得充电后的电容结构两端的电压差为目标电压差：
Figure PCTCN2016089922-appb-000002
上述的方式中，可以发现，充电阶段电流源产生的电流的电流强度和I目 标是相等的。
结合图1所示，相关技术中的驱动电路在充电阶段的工作过程如下所述。
在充电阶段，第一控制节点S1输出低电平信号，第二控制节点S2输出高电平信号，则第一控制节点S1控制的晶体管关断，而第二控制节点S2控制的晶体管导通。
而在充电阶段刚开始时，电容结构C两端压差非常小，使得驱动晶体管T1处于关断状态，此时电流源产生的电流全部流过C所在的通路，此时以相对较大的电流(电流强度等于I目标)对C进行充电。
充电一段时间后，当电容结构两端的电压差达到T1的阈值电压时，此时T1形成沟道，T1所在的通路会分流电流源产生的电流中的一部分，使得流过C所在的通路的电流减小，其电流强度小于I目标。而随着时间的推移，流过C所在的通路的电流的电流强度逐步减小。
而继续充电一段时间之后会达到稳定状态，电容结构两端的电压差维持在目标电压差，充电阶段电流源产生的电流全部流过驱动晶体管，流过C所在的通路的电流的电流强度为0。
通过以上过程可以发现，充电阶段可以分为3个阶段：
起始阶段，电容结构C两端压差小于阈值电压，此时充电电流的电流强度等于工作电流的电流强度I目标；
中间阶段，电容结构C两端压差大于或等于阈值电压，此时充电电流的电流强度从最大值(I目标)逐步降低；
稳定阶段，电容结构C两端压差稳定在目标电压差，充电电流的电流强度接近0。
可以发现，图1所示的充电电路从整个充电阶段来看，电容结构的充电电流的电流强度的变化如下：维持最大值(I目标)一段时间，然后从最大值逐步降低，最后进入稳定状态，电流强度接近0。
电容结构的充电效率同时取决于充电信号的电压和电流强度，而图1所示的充电电路中，充电信号的电流强度是从I目标逐步下降的。当I目标较小时， 充电信号的电流强度更小，使得充电速度太慢。而高分辨率显示面板中，分配给每一个像素的充电时间是非常有限的，因此上述的方式无法满足高分辨率显示面板的要求。即使在能够满足要求的显示面板中，也会减小有效显示时间，降低显示效果。
发明人通过创造性劳动发现相关技术中的驱动电路存在上述的问题，为解决上述问题，本公开实施例提供一种像素驱动电路、显示设备和像素驱动方法，以在满足电容结构的两端电压差需求的同时，可以较大的充电电流进行充电，缩短了充电时间，使得本公开实施例可以应用于高分辨率面板。而在应用于较低分辨率的产品时，能够提高显示效果。
为使本公开的实施例要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
本公开至少一些实施例提供了一种像素驱动电路，用于驱动像素结构中的发光器件，所述像素驱动电路的部分结构如图2所示，包括：与发光器件串联的驱动晶体管T1、电容结构C、以及至少包括一电流源的充电电路。
所述驱动晶体管T1的漏极与第一电源信号输入端子VDD连接。在此，应当理解的是，连接可以是直接连接，可以是间接连接，如图2中，T1的漏极可以是直接连接到第一电源信号输入端子VDD，也可以是通过发光器件连接到VDD。
在图2中，发光器件使用虚线框是表示发光器件的可能位置，而不是表示两个发光器件。在后续的附图及说明中，如果无特别说明，以发光器件设置于T1的漏极和第二电源信号输入端子VSS之间为例进行说明。
电容结构C的第一端和所述驱动晶体管T1的栅极连接，第二端和所述驱动晶体管T1的源极连接。
充电电路用于在充电阶段对所述电容结构C进行充电。
所述充电阶段的至少一段时间内，对所述电容结构C进行充电的充电电流的电流强度I大于目标电流的电流强度I目标，且充电阶段结束后，电容结构C两端的电压差为目标电压差。
所述目标电压差为：所述发光器件在发光阶段以设定亮度发光时，所述驱动晶体管T1的栅源电压差。
所述目标电流为：所述发光器件在发光阶段以设定亮度发光时，流过所述驱动晶体管T1的电流。
电容结构C的充电速度和充电电流密切相关，相关技术中，充电电流的电流强度小于目标电流的电流强度I目标，当I目标很小时(如像素结构对应的目标灰度很小的时候)，需要的充电时间非常长，无法适用于分辨率较高的产品，或者会减小有效显示时间。
本公开至少一些实施例中，利用充电电路进行充电后，电容结构两端的电压差为目标电压差，能够确保发光器件以正确的亮度发光。而相对于相关技术中的充电电流的电流强度从I目标开始下降的方式而言，本公开实施例中，充电电路在充电阶段的一段时间内充电电流大于目标电流的电流强度I目标，也就是说，本公开具体实施例中，充电电流的电流强度从大于I目标的电流强度开始下降，加大了充电电流的电流强度，因此能够缩短充电时间，使之可以应用于高分辨率面板。而在应用于较低分辨率的产品时，由于缩短了充电时间，因此可以在一帧时间内可以有更多的时间用于显示，提高了显示效果。
参考图1可以发现，相关技术中，在充电阶段，电流源产生的电流会分配给两条支路，即：T1所在的支路，以及C所在的支路。
而最终电流源产生的电流会全部流过T1所在的支路，考虑到电容充电，所以电流源产生的电流的电流强度只能是I目标。
本公开至少一些实施例中，设置电流源产生的电流的电流强度大于I目标，同时设置一个与T1并联的电流控制晶体管T2。电流控制晶体管T2与电容结构的连接方式和驱动晶体管与电容结构的连接方式相同。在充电阶段的后半段，由该电流控制晶体管T2分担电流源产生的电流中大于I目标的部分。
而在充电初期，由于电容结构两端的压差较小，T1和T2均处于关断状态，此时电流源产生的电流强度大于I目标的电流全部流过C所在的支路，以较大的电流对电容结构进行充电。
本公开至少一些实施例提供了一种像素驱动电路，用于驱动像素结构中的发光器件，所述像素驱动电路包括：与发光器件串联的驱动晶体管T1、电容结构C和充电电路。
驱动晶体管T1的漏极与第一电源信号输入端子(VDD)连接。
电容结构C的第一端和所述驱动晶体管T1的栅极连接，第二端和所述驱动晶体管T1的源极连接。
所述充电电路如图3所示，包括：至少一个和所述驱动晶体管T1并联的电流控制晶体管T2、用于生成电流强度大于I目标的电流源和控制单元(图中未示出)。
电流控制晶体管T2的栅极和所述电容结构C的第一端连接，源极和所述电容结构C的第二端连接。
电流源设置于第二电源信号输入端子VSS和与所述驱动晶体管T1的源极、所述电流控制晶体管T2的源极和所述电容结构C的第二端同时连接的第一公共节点N1之间。
控制单元用于在充电阶段控制所述电流控制晶体管T2和电流源对所述电容结构C充电，在显示阶段控制所述电流控制晶体管T2和电流源停止对所述电容结构C充电。
结合图3对本公开实施例的充电电路的工作过程描述如下。
在充电阶段刚开始时，电容结构C两端压差非常小，使得驱动晶体管T1和电流控制晶体管T2处于关断状态，此时电流源产生的电流全部流过C所在的通路，此时以相对较大的电流(电流强度大于I目标)对C进行充电。
充电一段时间后，当电容结构两端的电压差达到T1和/或T2的阈值电压时，此时T1和/或T2形成沟道，T1和/或T2所在的通路会分流电流源产生的电流中的一部分，使得流过C所在的通路的电流减小，而随着时间的推移，流过C所在的通路的电流的电流强度逐步减小。
而继续充电一段时间之后会达到稳定状态，电容结构两端的电压差维持在目标电压差，充电阶段电流源产生的电流全部流过T1和T2，流过C所在的通路的电流的电流强度为0。
通过以上过程可以发现，充电阶段可以也分为3个阶段：
起始阶段，电容结构C两端压差较小，此时充电电流的电流强度等于电流源产生的电流的电流强度，但大于I目标；
中间阶段，电容结构C两端压差逐渐增大，此时充电电流的电流强度从最大值(电流源产生的电流的电流强度)逐步降低；
稳定阶段，电容结构C两端压差稳定在目标电压差，充电电流的电流强度接近0。
与相关技术相比，本公开实施例的驱动电路在起始阶段以电流强度相对较大的充电电流对电容结构进行充电，缩短了起始阶段的持续时间。
而在中间阶段，相关技术的技术方案和本公开实施例的技术方案都是一个充电电流的电流强度逐步下降的过程，但本公开实施例的技术方案是从相对较高的起点(电流源产生的电流的电流强度)开始下降，因此在中间阶段，本公开实施例的充电电路也能够提供平均电流强度较大的充电电流，也能够缩短中间阶段的持续时间。
所以，综合以上比较来看，本公开实施例的技术方案大大缩短了充电阶段中的起始阶段和中间阶段的持续时间，因此缩短了充电时间，使之可以应用于高分辨率面板。而在应用于较低分辨率的产品时，由于缩短了充电时间，因此可以在一帧时间内可以有更多的时间用于显示，提高了显示效果。
在以上的说明中，是以一个电流控制晶体管T2为例进行的说明，当应当理解的是，电流控制晶体管越多，则电流源可以输出更大的电流，从而加快充电速度。
本公开具体实施例中，控制单元需要在充电阶段控制所述电流控制晶体管T2和电流源对所述电容结构C充电，在显示阶段控制所述电流控制晶体管T2和电流源停止对所述电容结构C充电。
在本公开具体实施例中，分别设置两个开关单元来对应控制电流控制晶体管T2和电流源，如图4所示，所述控制单元具体包括：第一开关单元和第二开关单元。
第一开关单元在充电阶段导通，以导通第一电源信号输入端子VDD和所述电流控制晶体管T2的栅极、漏极和所述电容结构C的第一端。第一开关单元在发光阶段关断。
第二开关单元设置于第二电源信号输入端子VSS和所述第一公共节点N1之间，并和所述电流源串联。第二开关单元在充电阶段导通，并在发光阶段关断。
如图4所示，第二开关单元使用虚线框表示第二开关单元既可以设置于 电流源靠近VSS的一端，也可以设置于电流源远离VSS的一端。
本公开具体实施例中，可以通过一个薄膜晶体管实现第一开关单元，也可以使用两个薄膜晶体管来实现第一开关单元。
如图5所示，通过一个薄膜晶体管来实现第一开关单元时，所述第一开关单元具体包括：第一薄膜晶体管M1。第一薄膜晶体管M1在充电阶段导通，并在发光阶段关断。第一薄膜晶体管M1的漏极与所述第一电源信号输入端子VDD连接，源极和与所述电流控制晶体管T2的漏极、栅极和所述电容结构C的第一端同时连接的第二公共节点N2连接。
如图6所示，通过两个薄膜晶体管来实现第一开关单元时，所述第一开关单元具体包括：第二薄膜晶体管M2和第三薄膜晶体管M3。
第二薄膜晶体管M2在充电阶段导通，并在发光阶段关断。第二薄膜晶体管M2的漏极与所述第一电源信号输入端子VDD连接，源极和所述电流控制晶体管T2的漏极连接。
第三薄膜晶体管M3在充电阶段导通，并在发光阶段关断。第三薄膜晶体管M3的漏极与所述第一电源信号输入端子VDD连接，源极和与所述电流控制晶体管T2的栅极和所述电容结构C的第一端同时连接的第三公共节点N3连接。
在本公开具体实施例中，发光器件既可以设置于T1的漏极和VDD之间，也可以设置于T1的源极和VSS之间。
当所述发光器件设置于第二电源信号输入端子VSS和所述第一公共节点N1之间，为了避免充电阶段发光器件以不正确的亮度发光，本公开至少一些实施例的所述像素驱动电路如图7所示，还包括：第三开关单元。
第三开关单元设置于所述第二电源信号输入端子VSS和所述第一公共节点N1之间，与发光器件串联。所述第三开关单元在充电阶段关断，在发光阶段导通。
如图7所示，第三开关单元使用虚线框表示第三开关单元既可以设置于发光器件靠近VSS的一端，也可以设置于发光器件远离VSS的一端。
而当发光器件设置于T1的漏极和VDD之间时，需要额外增加一个第四开关单元，该第四开关单元与发光器件并联，在充电阶段导通，而在发光阶 段关断即可。
以下对本公开具体实施例中，第一、第二和第三开关单元均以N型薄膜晶体管实现时的具体电路为例，对本公开实施例的驱动电路的工作进行详细描述如下。
如图8所示，在充电阶段，第一控制节点S1输出高电平信号，第二控制节点S2输出低电平信号，则第一控制节点S1控制的第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4导通，而第二控制节点S2控制的第五薄膜晶体管M5关断。
在充电的起始阶段，T1和T2也是关断的，因此，电流源生成的电流全部流过C，以较大充电电流对C进行充电，直至C两端的压差导通T1和/或T2。
当T1和T2的阈值电压不同时，T1和T2会先后形成沟道，而当T1和T2的阈值电压相同时，T1和T2会同时形成沟通。
当T1和T2形成沟道之后，C两端的电压差继续增大，此时，流过T1的电流的电流强度I1和流过T2的电流的电流强度I2如下：
I1＝0.5μ1*(W1/L1)*(Vgs-Vth1)2
I2＝0.5μ2*(W2/L2)*(Vgs-Vth2)2
其中：
μ1为T1载流子迁移率与T1等效电容的乘积；
μ2为T2载流子迁移率与T2等效电容的乘积；
W1/L1为T1宽长比；
W2/L2为T2宽长比；
Vgs为T1和T2的栅源电压差，即C两端的电压差；
Vth1为T1的阈值电压；
Vth2为T2的阈值电压。
当C两端的电压差继续增大到目标电压差V目标，进入稳定状态，流过T1的电流的电流强度I1和流过T2的电流的电流强度I2如下：
I1＝0.5μ1*(W1/L1)*(V目标-Vth1)2
I2＝0.5μ2*(W2/L2)*(V目标-Vth2)2
当T2选定之后，即可计算出处于稳定状态的I2，而I1由发光器件当前帧的显示亮度决定，因此可以决定当前帧的电流源产生的电流的电流强度为稳定状态的I1和I2之和。
而进入到发光阶段之后，第一控制节点S1输出低电平信号，第二控制节点S2输出高电平信号，则第一控制节点S1控制的第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4关断，而第二控制节点S2控制的第五薄膜晶体管M5导通。
由于C的维持能力，T1和T2维持状态不变，但由于M2关断，因此T2上无电流流过，而T1开启，流过其电流为：
I1＝0.5μ1*(W1/L1)*(V目标-Vth1)2
在下一帧到来之前，维持上述状态，使发光器件以持续稳定发光。
在本公开具体实施例中，上述的发光器件可以是包括OLED在内的任意电流驱动的发光单元。
同时，本公开上述实施例中，以电路并联的方式进行电流分担，确保最终流过驱动晶体管的电流为目标电流。但从之前的描述来看，不管初期的电流多大，这些电流在电容结构充电到一定程度(电容结构两端的电压差等于驱动晶体管的阈值电压)之前，电流都不会流向驱动晶体管所在的分支。
因此，在本公开的一些实施例中，从电流源着手，在充电阶段的起始阶段，电流源生成电流强度大于I目标的电流，而在充电的中间阶段，即电容结构两端的电压差大于驱动晶体管的阈值电压之后，电流源生成电流强度等于I目标的电流。
这种情况下，相对相关技术的技术方案，本公开实施例能够大大缩短起始阶段的持续时间，因此缩短了充电时间，使之可以应用于高分辨率面板。而在应用于较低分辨率的产品时，由于缩短了充电时间，因此可以在一帧时间内可以有更多的时间用于显示，提高了显示效果。
为了更好地实现本公开实施例的目的，本公开实施例还提供了一种显示设备，包括至少一个像素结构，所述像素结构包括发光器件，其中，每一个像素结构还包括上述任意的像素驱动电路，所述发光器件与所述像素驱动电 路中的驱动晶体管的源极或者漏极连接。
为了更好地实现本公开实施例的目的，本公开实施例还提供了一种像素驱动方法，用于驱动像素结构中和驱动晶体管T1串联的发光器件，所述像素驱动方法包括：
充电步骤，在充电阶段控制至少包括一电流源的充电电路对第一端和所述驱动晶体管(T1)的栅极连接，第二端和所述驱动晶体管(T1)的源极连接的电容结构(C)进行充电。
所述充电步骤中，在所述充电阶段的至少一段时间内，对所述电容结构C进行充电的充电电流的电流强度大于目标电流的电流强度，且充电阶段结束后，电容结构C两端的电压差为目标电压差。
所述目标电压差为：所述发光器件在发光阶段以设定亮度发光时，所述驱动晶体管T1的栅源电压差。
所述目标电流为：所述发光器件在发光阶段以设定亮度发光时，流过所述驱动晶体管T1的电流。
上述的像素驱动方法，其中，所述充电步骤具体为：
控制步骤，在充电阶段控制至少一个和所述驱动晶体管T1并联的电流控制晶体管T2和设置于第二电源信号输入端子VSS和第一公共节点N1之间电流源对所述电容结构C充电，在显示阶段控制所述电流控制晶体管T2和所述电流源停止对所述电容结构C充电；所述电流源生成电流强度大于目标电流的电流强度的电流。
所述第一公共节点N1与所述驱动晶体管T1的源极、所述电流控制晶体管T2的源极和所述电容结构C的第二端同时连接。
上述的像素驱动方法，所述控制步骤具体包括：
第一控制步骤，控制设置于第一电源信号输入端子VDD和所述电流控制晶体管T2的栅极、漏极和所述电容结构C的第一端之间的第一开关单元在充电阶段导通，在发光阶段关断；
第二控制步骤，控制设置于第二电源信号输入端子VSS和所述第一公共节点N1之间、与电流源串联的第二开关单元在充电阶段导通，在发光阶段关断。
上述的像素驱动方法，所述第一控制步骤具体为：
控制漏极与所述第一电源信号输入端子VDD连接，源极与第二公共节点N2连接的第一薄膜晶体管M1在充电阶段导通，在发光阶段关断。
所述第二公共节点N2与所述电流控制晶体管T2的漏极、栅极和所述电容结构C的第一端同时连接。
本公开实施例中的所采用的晶体管可以为薄膜晶体管或场效应管或其他特性的相同二极管，由于采用的晶体管的源极和漏极是对称的，所以其源极、漏极是没有区别的。
以上实施例中是以N型晶体管进行说明的，栅极输入高电平时，源漏极导通，P型晶体管相反。可以想到的是采用P型晶体管实现是本领域技术人员可以在不付出创造性劳动前提下轻易想到的，因此也是在本公开实施例的保护范围内的。
以上所述仅为本公开的较佳实施例而已，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (11)

  1. 一种像素驱动电路，用于驱动像素结构中的发光器件，所述像素驱动电路包括：
    与发光器件串联的驱动晶体管(T1)，漏极与第一电源信号输入端子(VDD)连接；
    电容结构(C)，第一端和所述驱动晶体管(T1)的栅极连接，第二端和所述驱动晶体管(T1)的源极连接；
    至少包括一电流源的充电电路，用于在充电阶段对所述电容结构(C)进行充电；
    所述充电阶段的至少一段时间内，对所述电容结构(C)进行充电的充电电流的电流强度大于目标电流的电流强度，且充电阶段结束后，所述电容结构(C)两端的电压差为目标电压差；
    所述目标电压差为：所述发光器件在发光阶段以设定亮度发光时，所述驱动晶体管(T1)的栅源电压差；
    所述目标电流为：所述发光器件在发光阶段以设定亮度发光时，流过所述驱动晶体管(T1)的电流。
  2. 根据权利要求1所述的像素驱动电路，其中，所述充电电路包括：
    至少一个和所述驱动晶体管(T1)并联的电流控制晶体管(T2)，所述电流控制晶体管(T2)的栅极和所述电容结构(C)的第一端连接，源极和所述电容结构(C)的第二端连接；
    用于生成电流强度大于目标电流的电流强度的所述电流源，设置于第二电源信号输入端子(VSS)和与所述驱动晶体管(T1)的源极、所述电流控制晶体管(T2)的源极和所述电容结构(C)的第二端同时连接的第一公共节点(N1)之间；
    控制单元，用于在充电阶段控制所述电流控制晶体管(T2)和所述电流源对所述电容结构(C)充电，在显示阶段控制所述电流控制晶体管(T2)和所述电流源停止对所述电容结构(C)充电。
  3. 根据权利要求2所述的像素驱动电路，其中，所述控制单元具体包括： 第一开关单元和第二开关单元；
    所述第一开关单元在充电阶段导通，导通第一电源信号输入端子(VDD)和所述电流控制晶体管(T2)的栅极、漏极和所述电容结构(C)的第一端；所述第一开关单元在发光阶段关断；
    所述第二开关单元设置于第二电源信号输入端子(VSS)和所述第一公共节点(N1)之间，和所述电流源串联；所述第二开关单元用于在充电阶段导通，在发光阶段关断。
  4. 根据权利要求3所述的像素驱动电路，其中，所述第一开关单元具体包括：第一薄膜晶体管(M1)；
    所述第一薄膜晶体管(M1)的漏极与所述第一电源信号输入端子(VDD)连接，所述第一薄膜晶体管(M1)的源极和与所述电流控制晶体管(T2)的漏极、栅极和所述电容结构(C)的第一端同时连接的第二公共节点(N2)连接，所述第一薄膜晶体管(M1)用于在充电阶段导通，发光阶段关断。
  5. 根据权利要求3所述的像素驱动电路，其中，所述第一开关单元具体包括：第二薄膜晶体管(M2)和第三薄膜晶体管(M3)；
    所述第二薄膜晶体管(M2)的漏极与所述第一电源信号输入端子(VDD)连接，所述第二薄膜晶体管(M2)的源极和所述电流控制晶体管(T2)的漏极连接；所述第二薄膜晶体管(M2)用于在充电阶段导通，发光阶段关断；
    所述第三薄膜晶体管(M3)的漏极与所述第一电源信号输入端子(VDD)连接，所述第三薄膜晶体管(M3)的源极和与所述电流控制晶体管(T2)的栅极和所述电容结构(C)的第一端同时连接的第三公共节点(N3)连接，所述第三薄膜晶体管(M3)用于在充电阶段导通，发光阶段关断。
  6. 根据权利要求1-5中任意一项所述的像素驱动电路，其中，所述发光器件设置于第二电源信号输入端子(VSS)和所述第一公共节点(N1)之间，所述像素驱动电路还包括：第三开关单元；
    所述第三开关单元设置于所述第二电源信号输入端子(VSS)和与所述驱动晶体管(T1)的源极、所述电流控制晶体管(T2)的源极和所述电容结构(C)的第二端同时连接的第一公共节点(N1)之间，与发光器件串联，所述第三开关单元用于在充电阶段关断，在发光阶段导通。
  7. 一种显示设备，包括至少一个像素结构，所述像素结构包括发光器件，其中，每一个像素结构还包括权利要求1-6中任意一项所述的像素驱动电路，所述发光器件与所述像素驱动电路中的驱动晶体管的源极或者漏极连接。
  8. 一种像素驱动方法，用于驱动像素结构中和驱动晶体管(T1)串联的发光器件，其中，所述像素驱动方法包括：
    充电步骤，在充电阶段控制至少包括一电流源的充电电路对第一端和所述驱动晶体管(T1)的栅极连接，第二端和所述驱动晶体管(T1)的源极连接的电容结构(C)进行充电；所述驱动晶体管(T1)的漏极与第一电源信号输入端子(VDD)连接；
    所述充电步骤中，在所述充电阶段的至少一段时间内，对所述电容结构(C)进行充电的充电电流的电流强度大于目标电流的电流强度，且充电阶段结束后，电容结构(C)两端的电压差为目标电压差；
    所述目标电压差为：所述发光器件在发光阶段以设定亮度发光时，所述驱动晶体管(T1)的栅源电压差；
    所述目标电流为：所述发光器件在发光阶段以设定亮度发光时，流过所述驱动晶体管(T1)的电流。
  9. 根据权利要求8所述的像素驱动方法，其中，所述充电步骤具体为：
    控制步骤，在充电阶段控制至少一个和所述驱动晶体管(T1)并联的电流控制晶体管(T2)和设置于第二电源信号输入端子(VSS)和第一公共节点(N1)之间电流源对所述电容结构(C)充电，在显示阶段控制所述电流控制晶体管(T2)和所述电流源停止对所述电容结构(C)充电；所述电流源生成电流强度大于目标电流的电流强度的电流；
    所述第一公共节点(N1)与所述驱动晶体管(T1)的源极、所述电流控制晶体管(T2)的源极和所述电容结构(C)的第二端同时连接。
  10. 根据权利要求9所述的像素驱动方法，其中，所述控制步骤具体包括：
    第一控制步骤，控制设置于第一电源信号输入端子(VDD)和所述电流控制晶体管(T2)的栅极、漏极和所述电容结构(C)的第一端之间的第一开关单元在充电阶段导通，在发光阶段关断；
    第二控制步骤，控制设置于第二电源信号输入端子(VSS)和所述第一公共节点(N1)之间、与所述电流源串联的第二开关单元在充电阶段导通，在发光阶段关断。
  11. 根据权利要求10所述的像素驱动方法，其中，所述第一控制步骤具体为：
    控制漏极与所述第一电源信号输入端子(VDD)连接，源极与第二公共节点(N2)连接的第一薄膜晶体管(M1)在充电阶段导通，在发光阶段关断；
    所述第二公共节点(N2)与所述电流控制晶体管(T2)的漏极、栅极和所述电容结构(C)的第一端同时连接。
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Families Citing this family (5)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1606057A (zh) * 2004-11-15 2005-04-13 友达光电股份有限公司 显示器的像素
KR20070000831A (ko) * 2005-06-28 2007-01-03 엘지.필립스 엘시디 주식회사 발광 표시장치
CN102708787A (zh) * 2011-08-25 2012-10-03 京东方科技集团股份有限公司 Amoled像素单元驱动电路和方法、像素单元以及显示装置
CN102708786A (zh) * 2011-08-25 2012-10-03 京东方科技集团股份有限公司 Amoled像素单元驱动电路和方法、像素单元以及显示装置
CN102708798A (zh) * 2012-04-28 2012-10-03 京东方科技集团股份有限公司 一种像素单元驱动电路、驱动方法、像素单元和显示装置
CN103280183A (zh) * 2013-05-31 2013-09-04 京东方科技集团股份有限公司 一种amoled像素电路及驱动方法
CN105632405A (zh) * 2016-03-18 2016-06-01 京东方科技集团股份有限公司 一种像素驱动电路、显示设备和像素驱动方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6859193B1 (en) 1999-07-14 2005-02-22 Sony Corporation Current drive circuit and display device using the same, pixel circuit, and drive method
KR100327374B1 (ko) * 2000-03-06 2002-03-06 구자홍 액티브 구동 회로
JP2004004788A (ja) * 2002-04-24 2004-01-08 Seiko Epson Corp 電子素子の制御回路、電子回路、電気光学装置、電気光学装置の駆動方法、及び電子機器、並びに電子素子の制御方法
TWI230914B (en) * 2003-03-12 2005-04-11 Au Optronics Corp Circuit of current driving active matrix organic light emitting diode pixel and driving method thereof
US20080225022A1 (en) * 2007-03-15 2008-09-18 Keum-Nam Kim Organic light emitting display, and driving method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1606057A (zh) * 2004-11-15 2005-04-13 友达光电股份有限公司 显示器的像素
KR20070000831A (ko) * 2005-06-28 2007-01-03 엘지.필립스 엘시디 주식회사 발광 표시장치
CN102708787A (zh) * 2011-08-25 2012-10-03 京东方科技集团股份有限公司 Amoled像素单元驱动电路和方法、像素单元以及显示装置
CN102708786A (zh) * 2011-08-25 2012-10-03 京东方科技集团股份有限公司 Amoled像素单元驱动电路和方法、像素单元以及显示装置
CN102708798A (zh) * 2012-04-28 2012-10-03 京东方科技集团股份有限公司 一种像素单元驱动电路、驱动方法、像素单元和显示装置
CN103280183A (zh) * 2013-05-31 2013-09-04 京东方科技集团股份有限公司 一种amoled像素电路及驱动方法
CN105632405A (zh) * 2016-03-18 2016-06-01 京东方科技集团股份有限公司 一种像素驱动电路、显示设备和像素驱动方法

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