WO2017152812A1

WO2017152812A1 - Optical chip for optical communications, and authentication device

Info

Publication number: WO2017152812A1
Application number: PCT/CN2017/075623
Authority: WO
Inventors: 刘若鹏; 许伟成; 范林勇; 肖光锦
Original assignee: 深圳光启智能光子技术有限公司
Priority date: 2016-03-08
Filing date: 2017-03-03
Publication date: 2017-09-14
Also published as: CN107171737B; CN107171737A

Abstract

An optical chip, and an authentication device comprising the optical chip. The optical chip comprises: an optical-to-electrical conversion unit, used for receiving an optical signal and generating an electrical signal by means of optical-to-electrical conversion; an optical noise removal unit, coupled to the optical-to-electrical conversion unit and used for removing an optical noise among the electrical signals to output a digital level signal; and a decoding unit, coupled to the optical noise removal unit and used for decoding the digital noise signal.

Description

Optical chip and authentication device for optical communication

Technical field

The present invention relates to the field of optical communications, and in particular, to an optical chip and an authentication device.

Background technique

Visible light communication technology is a new type of wireless optical communication technology developed on LED technology. Communication is carried out by high-frequency flickering of the LED light source, and the transmission rate of visible light communication is up to gigabits per second. Visible light communication has a very rich spectrum of resources, which is unmatched by general wireless communication including microwave communication. At the same time, visible light communication can be applied to any communication protocol, suitable for any environment, and the device for visible light communication is flexible and convenient to install, and low in cost, and is suitable for mass popularization applications.

The visible light communication system uses visible light for short-range communication, and the visible light has high directivity and cannot penetrate obstacles, and has higher security than wireless communication. At present, some visible light communication systems have begun to be applied, such as photon access control systems and photon payment in photonics Internet of Things. With the increasing popularity of portable devices such as mobile phones, the mobile phone's flash function can be used as a photonic client, which greatly reduces the application threshold of visible light communication, and since the mobile phone is originally carried by the user, it is not It puts an extra burden on the user.

However, the daily visible light communication using a portable photonic client such as a mobile phone is generally in an environment with ambient light. The photon receiving end converts the optical signal into a meaningful electrical signal by photoelectric conversion when receiving the optical signal emitted by the photonic client. However, under the illumination of ambient light, the photon receiving end will still convert the unquestioned ambient light into a useless electrical signal. These useless electrical signals are noise signals that interfere with the photon receiver correctly receiving the photon client. Optical signal.

In addition, in the current optical communication, due to the limitation of the coding mode, the data transmission rate (that is, the amount of information transmitted per unit time) is still small, and there is room for further improvement.

Summary of the invention

A brief overview of one or more aspects is provided below to provide a basic understanding of these aspects. This summary is not an extensive overview of all aspects that are conceived, and is not intended to identify key or critical elements in all aspects. Its sole purpose is to give one or more in a simplified form. Some aspects of the aspects are in the order of a more detailed description given later.

An aspect of the present invention provides an optical chip including: a photoelectric conversion unit for receiving an optical signal and generating an electrical signal by photoelectric conversion; and a photo noise removing unit coupled to the optical noise removing unit a photoelectric conversion unit for removing optical noise in the electrical signal to output a digital level signal; and a decoding unit coupled to the optical noise removing unit for performing the following steps to decode the digital level signal: When a level jump is detected, it is determined that the start of an electrical signal unit starts timing; when the detected level duration is greater than the first threshold and less than or equal to the second threshold, the number of times the level jumps is recorded; When the detected level duration is greater than the second threshold and less than or equal to the third threshold, determining that the electrical signal unit ends; when the detected level duration is greater than the third threshold, determining that the signal is received; Each of the received electrical signal units is converted into a data unit; and the plurality of data units are combined into data.

In one example, the transition of this level changes to a low to high transition or a sum to a high to low transition.

In an example, the decoding unit is further configured to perform the following steps: converting the received electrical signal units into data units: determining, according to a preset correspondence table, a number of times of level jumps in the recorded electrical signal unit Data unit.

In an example, the first threshold is equal to the desired first level duration minus the previously obtained flicker delay value of the light emitting unit.

In an example, the second threshold is equal to the desired second level duration minus the previously obtained flicker delay value of the light emitting unit.

In an example, the photo noise removing unit includes: a noise filtering unit, the input end of the noise filtering unit receives an electrical signal from the photoelectric conversion unit, and the noise filtering unit is configured to filter out the electrical signal generated by the ambient light a noise electrical signal and outputting a target pulse signal at the output; and a comparison unit, the first input end of the comparison unit being coupled to the output of the noise filter unit to receive the target pulse signal, the comparison unit being used according to the target The digital signal is output by comparison between the pulse signal and the reference voltage.

In one example, the noise filtering unit includes a diode, an anode of the diode is coupled to the photoelectric conversion unit, and a cathode of the diode is coupled to the first input end of the comparison unit.

In an example, the photo-noise removal unit further includes: a clamp resistor connected in series with the photoelectric conversion unit, the first end of the clamp resistor is coupled to one end of the photoelectric conversion unit and the anode of the diode The second end of the clamp resistor is grounded, and the other end of the photoelectric conversion unit is connected to a power supply voltage, and the clamp resistor clamps the voltage on the positive pole of the diode to be smaller than the guide of the diode when the signal source is not illuminated. A voltage level that is greater than a voltage level of the turn-on voltage of the diode when illuminated by a signal source.

In one example, the photo noise removing unit further includes: a reference voltage generating unit, the reference voltage generating unit includes a resistor and a capacitor to form a low pass filter, one end of the resistor is coupled to the cathode of the diode, and the other end is coupled To one end of the capacitor and the second input of the comparison unit to provide the reference voltage, and the other end of the capacitor is grounded.

In one example, the noise filtering unit includes a coupling capacitor, a first end of the coupling capacitor coupled to the photoelectric conversion unit, and a second end coupled to the first input of the comparison unit.

In an example, the photo noise removing unit further includes: a first voltage dividing resistor, the first node of the first voltage dividing resistor is coupled to the power voltage, the second node is grounded, and the intermediate node is coupled to the coupling capacitor The second end and the first input end of the comparison unit, the voltage at the intermediate node is smaller than the reference voltage without the signal source illumination, and greater than the reference voltage if the signal source is illuminated.

In an example, the comparison unit includes a comparator having a positive input terminal that is the first input of the comparison unit and a negative input terminal that receives the reference voltage.

In an example, the photo noise removing unit further includes: a reference voltage generating unit coupled to the negative input terminal of the comparator to provide the reference voltage.

In one example, the reference voltage generating unit includes: a second voltage dividing resistor, the first node of the second voltage dividing resistor is coupled to the power voltage, the second node is grounded, and the intermediate node is coupled to the comparator A negative input terminal to provide the reference voltage.

In one example, the comparison unit includes a triode whose base is the first input of the comparison unit and is coupled to the output of the noise filter unit, the emitter of the triode is grounded, and the collector passes The resistor is coupled to the power supply voltage, and the collector is configured to output the digital level signal, wherein the reference voltage is a turn-on voltage of the transistor.

Another aspect of the present invention also provides an authentication device comprising the above-described optical chip.

The optical chip and the authentication device embodying the present invention have the following beneficial effects: the optical signal is detected by means of optical denoising and detecting hopping, the interference is greatly reduced, and the detection accuracy is improved.

DRAWINGS

The above features and advantages of the present invention will be better understood from the following description of the appended claims. In the figures, components are not necessarily drawn to scale, and components having similar related features or features may have the same or similar reference numerals.

1 is a simplified block diagram showing a visible light communication system in which the present invention may be practiced;

2 is a flow chart showing an encoding process of a coding unit according to an aspect of the present invention;

3 is a flow chart showing a decoding process of a decoding unit according to an aspect of the present invention;

4 is a diagram showing an exemplary encoded electrical signal in accordance with an aspect of the present invention;

5 is a flow chart showing access control performed by a photonic client in an access control system in accordance with a first embodiment of the present invention;

6 is a flow chart showing access control performed by an optical chip in an access control system according to a first embodiment of the present invention;

7 is a flow chart showing photon lock control performed by a photonic client in a photonic lock system in accordance with a second embodiment of the present invention;

8 is a flow chart showing photon lock control performed by an optical chip in a photonic lock system according to a second embodiment of the present invention;

Figure 9 is a diagram showing an exemplary encoded electrical signal in accordance with a second embodiment of the present invention;

FIG. 10 is a block diagram showing a light receiving unit according to another aspect of the present invention; FIG.

Figure 11 is a block diagram showing components of an optical receiver in accordance with a first embodiment of the present invention;

12 is a schematic view showing a target electric signal generated by a photoelectric conversion unit in the absence of ambient light;

Figure 13 is a schematic diagram showing a noise electric signal generated by a photoelectric conversion unit under the condition that there is ambient light and no signal light source;

14 is a schematic diagram showing an electrical signal generated by a photoelectric conversion unit under the condition that there is ambient light and a signal light source;

15 is a schematic diagram showing a target pulse signal output by a light noise filtering unit;

Figure 16 is a diagram showing a filtered signal of a target pulse signal;

Figure 17 is a diagram showing a digital level signal output by a comparator;

Figure 18 is a block diagram showing components of an optical receiver in accordance with a second embodiment of the present invention;

Figure 19 is a block diagram showing components of an optical receiver in accordance with a third embodiment of the present invention.

detailed description

The invention is described in detail below with reference to the drawings and specific embodiments. It is to be noted that the aspects described below in conjunction with the drawings and the specific embodiments are merely exemplary and are not to be construed as limiting the scope of the invention.

1 shows a simplified block diagram of a visible light communication system in which the present invention may be practiced. The visible light communication system 100 includes a photonic client 110 and a photon receiving end 120. The photonic client 110 includes an encoding unit 111. The encoding unit 111 receives the original communication data. The raw communication data can be communicated to the photonic client 110 to the light Any information data at the sub-receiver, such as user identity (ID) information, operational instructions, and the like.

The encoding unit 111 can encode the original communication data in any encoding manner. The encoding unit 111 outputs the encoded signal to the light emitting unit 113. The light emitting unit 113 may transmit the received encoded signal in the form of visible light by, for example, indicating a logic high with illumination, and a logic low (or vice versa) with no illumination. The light emitting unit 113 may be an LED or other element having a light emitting function. The photonic client 110 can be a photonic Internet of Things, such as a portable device in a photonic access system, such as a cell phone, tablet, PDA, and optical key. The light key is a key that can realize the opening of the door lock based on visible light communication, and can also be called a photon key. At this time, the light emitting unit 113 may be a flash on the mobile phone or an element having a light emitting function externally connected to the mobile phone.

The processing unit 112 can control the operations of the encoding unit 111 and the light emitting unit 113. Processing unit 112 may be a general purpose processor, a digital signal processor (DSP), or the like. A general purpose processor may be a microprocessor, but in the alternative, the processing unit 112 may be any conventional processor, controller, microcontroller, or state machine. Processing unit 112 may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in cooperation with a DSP core, or any other such configuration.

The photon receiving end 120 includes a light receiving unit 123 for receiving a visible light signal emitted by the client 110 and converting the visible light signal into a digital signal. For example, for high frequency flicker produced by an LED lamp, light may represent a logic high, no light may represent a logic low, or vice versa, such that the received visible light signal may be converted to an electrical signal. The light receiving unit 123 may include a photosensitive device such as a phototransistor or a photodiode. The electrical pulse signal is formed by photoelectric conversion by utilizing the characteristics of the electrical signal and the optical signal of the phototransistor and the photodiode.

The decoding unit 121 receives the electric signal output by the light receiving unit 123 and decodes it to recover the original communication data. The processing unit 122 can control the operations of the decoding unit 121 and the light receiving unit 123. Processing unit 122 may be a general purpose processor, a digital signal processor (DSP), or the like. The general purpose processor may be a microprocessor, but in the alternative, the processing unit 122 may be any conventional processor, controller, microcontroller, or state machine. Processing unit 122 may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in cooperation with a DSP core, or any other such configuration.

The photon receiving end 120, particularly the decoding unit 121 and the light receiving unit 123 in the photon receiving end 120, may be integrated in the optical chip. The optical chip can be used for the access control end in the photon access control system, the photon lock controlled end in the photon lock system, and the like.

The photonic client and photon receiving end in the visible light communication system are described above. It will be readily understood by those skilled in the art that in other optical communication systems other than visible light, the photonic client and the photon receiving end can also be used. Communicate using other forms of light, such as infrared light, ultraviolet light, and the like.

It has been found through research that one of the reasons for the small transmission rate of visible light communication, such as LED lamps, based on light-emitting units is that there is a delay in the flicker control of the LED lamps, ie the duration of the bright and dark states is always better than expected. The setting value is long. The direct result of this phenomenon is that in order to spread the same length of data, the time required for the LED lamp is always longer than expected. More seriously, the delay of the flicker control makes it difficult to synchronize between the sender and the signal. According to the conventional coding technique, communication is performed at a high frequency of the LED lamp, with light representing binary 1 and no light representing binary 0. However, due to the lack of accurate synchronization, there is an erroneous bit reception if the binary 1 and 0 are respectively represented by light and no light, respectively. For example, when the duration of the matte state representing 1-bit binary 0 exceeds the set value, the additional duration is recognized as another 1-bit binary zero.

One aspect of the present invention proposes a new encoding and decoding scheme due to the above-mentioned drawbacks of LED lamps. According to an embodiment of the invention, from the perspective of the optical signal, the information is represented by a change from a state of light to no light, rather than a state of light or no light itself. From the point of view of the electrical signal, the information is represented by a level transition rather than a level continuous state itself.

To this end, at the time of encoding, the data to be transmitted (ie, the original communication data) may be divided into a plurality of data units, each of which contains one or more bits. These data units are then converted into a plurality of electrical signal units, each of which represents the bits of the corresponding data unit by the number of hops of the level. The interval between adjacent electrical signal units is represented by a fixed level. Level transitions can only contain low-to-high transitions, or only low-to-high transitions, and can also include low-to-high transitions and low-power transitions. A flat to high transition.

The level duration (herein referred to as the first level duration) within each electrical signal unit and the level duration between adjacent electrical signal units (referred to herein as the second level duration) may be preset. The second level duration may be greater than the first level duration. This size relationship will be significant so that the receiving end can recognize it without errors.

In the embodiment of the present invention, in consideration of the flicker delay of the LED lamp, when the first level duration is set, the adjustment can be made with the flicker delay value of the light emitting diode as the emission source. Typically, the flicker delay value is subtracted based on the desired level duration. For example, if the desired level duration is 3 ms and the flicker delay value is 2 ms, the set level duration is 1 ms. The flicker delay value of the LED can be determined experimentally in advance.

It will be appreciated that the flicker delay value has less effect on the duration of the second level. Alternatively, when the second level duration is set, the adjustment may also be made with the flicker delay value of the light emitting diode as the transmission source.

After the desired electrical signal is obtained, the light-emitting diode is controlled by an electrical signal, which is visible by the light-emitting diode The optical signal is sent in the form of.

At the receiving end, the decoding process is reversed. When the level jump is detected, it is determined as the start of an electrical signal unit; when the detected level duration is greater than the first threshold and less than or equal to the second threshold, the number of times the level jumps is recorded; when detected When the level duration is greater than the second threshold and less than or equal to the third threshold, it is determined that an electrical signal unit ends. When the detected level duration is greater than the third threshold, the determination signal is received. The third threshold is greater than the second threshold by more than the first threshold. It will be appreciated that the settings of the first threshold, the second threshold, and the third threshold will refer to the aforementioned first level duration and second level duration.

After the reception is completed, the received electrical signal units are converted into data units, and then the plurality of data units are combined into data. The information characterized by the visible light signal is thus obtained.

It can be understood that the level jump will occur at least once. Therefore, even if all the bit values of an electrical signal unit are 0, it will be represented by a level transition instead of a level continuous state.

The invention is now described with reference to the drawings, in which the same reference numerals are used to refer to the same parts or steps. In the following description, numerous specific details are set forth However, it will be apparent that the invention may be practiced without these specific details.

Referring to FIG. 2, a flowchart of an encoding process of a coding unit of an aspect of the present invention. The coding unit may be the coding unit 111 in FIG. The coding unit can encode the original communication data to be generated by the following steps:

In step 201, the data to be transmitted is divided into a plurality of data units, and each data unit includes one or more bits. These data to be sent can be text, pictures, audio and/or video.

Step 202: Convert the plurality of data units into a plurality of electrical signal units, each of the electrical signal units representing the one or more bits of the corresponding data unit by a number of hops of the level, and having between the adjacent electrical signal units The interval expressed in fixed levels. In this embodiment, the rising or falling edge of the level can be used as the start of the transition.

For example, the duration of a high (or low) level within an electrical signal unit is 2 ms. Each electrical signal unit has four slave level transitions, including low to high transition and high to low transition, each electrical signal unit representing 2 bits of information, and four electrical signal units. Make up a byte. When the number of transitions from low level to high level and high level to low level in an electrical signal unit is 1, it represents information 00; when from low level to high level and high level to low level When the number of transformations is 2, it represents information 01; when the number of transformations from low level to high level and high level to low level is 3, it represents information 10; when from low level to high level and high level When the number of times of low level conversion is 4, it represents information 11. The correspondence between the number of transitions from low level to high level and high level to low level and the information it represents is shown in Table 1.

Table 1

Therefore, the level combination of the electrical signal units corresponding to the information unit can be determined according to the foregoing correspondence table set in advance.

Of course, each electrical signal unit can represent 1 bit of information, which requires a maximum of 2 hops. By analogy, each electrical signal unit can represent 3-bit information, which requires up to 8 hops.

It can also be seen from the above table that even if the bit value is 00, there will be a level jump.

Here, the first level duration can be adjusted by a previously obtained flicker delay value of the light emitting diode as the emission source. The adjustment is made by subtracting the desired first level duration from the flicker delay value to obtain the set first level duration. For example, it is desirable that the duration of the high (or low) level within an electrical signal unit is 2 ms. However, after the flicker delay value is adjusted, the set optical signal duration will be less than 2ms, or even 0.

In addition, the second level duration of the high (or low) level between two adjacent electrical signal units is greater than the first level duration, which may be set to 25 ms, which may pass the flicker delay value. Adjustments can also be made without adjustment.

In step 203, each electrical signal unit is combined to obtain an encoded electrical signal. 4 is an exemplary encoded electrical signal showing a relationship between bit values and levels, and the four electrical signal units in the figure have jumps of 2, 4, 1 and 3 levels, respectively. Variable, representing 01, 11, 00, and 10, where the level transition refers to a low to high level and a high to low transition, the height between two adjacent electrical signal units ( The duration of the low or low level is 27ms, the combined signal is one byte, its binary representation is 01110010, and the corresponding hexadecimal signal is 0x72.

In the following, the encoded electrical signal can be transmitted in the form of visible light, for example, light indicates a high level, and no light indicates a low level.

Referring to FIG. 3, a flowchart of a decoding process of a decoding unit of an aspect of the present invention. The decoding unit may be the decoding unit 121 in FIG. The decoding unit can be decoded by the following steps:

In step 301, when a level jump is detected, it is determined that the start of an electrical signal unit starts timing. The level jump can be from low level to high level, or vice versa from high level to low level.

Step 302, when the detected level duration is greater than the first threshold and less than or equal to the second threshold, indicating that the electrical signal unit is still continuing, during which the number of level jumps is recorded. The sustained level can be high or Low level. In the present embodiment, the rising or falling edge of the level can be used as the start of the jump recording.

Step 303, when the detected level duration is greater than the second threshold and less than or equal to the third threshold, determining that the electrical signal unit ends.

Step 304: When the detected level duration is greater than the third threshold, the determination signal is received.

Wherein, the third threshold>the second threshold>the first threshold. Moreover, corresponding to the adjustment of the first level duration of the transmitting end, the first threshold value is also adjusted by the same flicker delay value so that the representative level can be correctly discriminated. In addition, the second threshold and the third threshold may be adjusted by the flicker delay value or may not be adjusted by the flicker delay value.

For example, setting the first, second, and third thresholds to 0, 25 ms, and 60 ms, respectively, when a rising edge (or falling edge) is detected, timing is started, when the detected high (or low) level duration is greater than 0, and less than or equal to 25ms, record the number of transitions from low level to high level and high level to low level; when the detected high (or low) level duration is greater than 25ms, and less than or equal to 60ms It is considered to be the end mark of an electrical signal unit; when the detected high (or low) level duration is greater than 60 ms, the signal reception is considered complete.

In another case, the duration of the high (or low) level being greater than the third threshold may also represent a signal reception interruption, restarting the detection signal.

Step 305: Convert each received electrical signal unit into a data unit.

Step 306, combining a plurality of data units into data to obtain information characterized by visible light signals.

According to the coding unit provided by the invention of the present aspect, the data is divided into a plurality of electrical signal units, each of which is distinguished by a duration of a level, and in an electrical signal unit, the information is represented by the number of times of level conversion. . This encoding scheme allows the receiving end to correctly decode the data even if there is a synchronization problem caused by the flicker delay of the LED lamp. Moreover, the flicker delay value is used to adjust the level duration so that the level duration is effectively shortened, thereby increasing the amount of information transmission per unit time.

Although the above process is illustrated and described as a series of acts for simplicity of the explanation, it should be understood and appreciated that the process is not limited by the order of the acts, as some acts may occur in different orders in accordance with one or more embodiments. And/or concurrently with other acts from what is illustrated and described herein or that are not illustrated and described herein, but are understood by those skilled in the art.

Two embodiments of the application of the optical chip comprising the above described decoding unit in the access control system and the photonic lock system, respectively, are described below in connection with Figures 5-6 and 7-9.

First embodiment

5 and 6 are flow charts respectively showing access control performed by a photonic client and an optical chip in a photonic access control system according to a first embodiment of the present invention.

This embodiment is implemented in a photonic access control system, wherein the photonic client can be a mobile phone, and the optical chip can be a photon access control controlled end. In addition to decoding the signal, the photon access control terminal can further use the signal to match to determine whether to open the door.

Referring to FIG. 5, the mobile phone can perform the access control by the following steps:

Step 501: Divide the identification data to be sent into a plurality of data units in the mobile phone, and each data unit includes one or more bits.

Step 502: Convert the plurality of data units into a plurality of electrical signal units, each of the electrical signal units representing the one or more bits of the corresponding data unit by a number of hop times of the level, and between the adjacent electrical signal units The interval expressed in fixed levels. In this embodiment, the rising or falling edge of the level can be used as the start of the transition.

For example, the duration of a high (or low) level within an electrical signal unit is 2 ms. Each electrical signal unit has four levels of transformation, including low-to-high transitions and high-to-low transitions. Each electrical signal unit represents 2-bit information and four electrical signals. The units make up one byte. When the number of transitions from low level to high level and high level to low level in an electrical signal unit is 1, it represents information 00; when from low level to high level and high level to low level When the number of transformations is 2, it represents information 01; when the number of transformations from low level to high level and high level to low level is 3, it represents information 10; when from low level to high level and high level When the number of times of low level conversion is 4, it represents information 11. The correspondence between the number of transitions from low level to high level and high level to low level and the information it represents is shown in Table 1.

Here, the first level duration can be adjusted by a previously obtained flicker delay value of the light emitting diode as the emission source. The adjustment is made by subtracting the desired first level duration from the flicker delay value to obtain the set first level duration. For example, a first level duration of a high (or low) level within an electrical signal unit is desired to be 2 ms. However, after the flicker delay value is adjusted, the set optical signal duration will be less than 2ms, or even 0.

In addition, the second level duration of the high (or low) level between adjacent two electrical signal units can be set to 25 ms, which can be adjusted either by the flicker delay value or without adjustment.

In step 503, each electrical signal unit is combined to obtain an encoded electrical signal. 4 is an exemplary encoded electrical signal showing a relationship between bit values and levels, and the four electrical signal units in the figure have jumps of 2, 4, 1 and 3 levels, respectively. Variable, representing 01, 11, 00, and 10, respectively, where the level transition refers to a low to high level and a transition from a high level to a low level, between adjacent two electrical signal units The duration of the high (or low) level is 27ms, the combined signal is one byte, and its binary representation is 01110010, the corresponding hexadecimal signal is 0x72.

Step 504, transmitting the encoded electrical signal in the form of a visible light signal. When sending, it is necessary to align the LED emission source of the mobile phone with the controlled end of the receiving photon access control.

Referring to Figure 6, the photon access control controlled end can perform access control by the following steps:

Step 601: The photon access control controlled end receives the visible light signal and converts it into an electrical signal.

Step 602, when a level jump is detected, it is determined to be the start of an electrical signal unit, and timing is started. The level jump can be from low level to high level, or vice versa from high level to low level.

Step 603, when the detected level duration is greater than the first threshold and less than or equal to the second threshold, indicating that the electrical signal unit is still continuing, during which the number of level jumps is recorded. The sustained level can be high or low. In the present embodiment, the rising or falling edge of the level can be used as the start of the jump recording.

Step 604, when the detected level duration is greater than the second threshold and less than or equal to the third threshold, determining that the electrical signal unit ends.

Step 605: When the detected level duration is greater than the third threshold, the determination signal is received.

The third threshold is greater than the second threshold by more than the first threshold.

Step 606: Convert each received electrical signal unit into a data unit.

Step 607: The photon access control controlled end combines the plurality of data units into the identification data, thereby obtaining information characterized by the visible light signal.

Step 608: The photon access control controlled end compares the identification data with a preset condition, and if the identification data matches the preset condition, controls the door actuator connected thereto to open the door.

In this embodiment, the identification data matches the preset condition, including the identification data being the same as the preset condition; or there is a correspondence between the identification data and the preset condition.

In this embodiment, the mobile phone is used as the transmitting end of the photon access control system, and the encoded identification data is transmitted as a visible light signal through the LED light of the mobile phone. The photon access control controlled end decodes the visible light signal received from the mobile phone, and then performs authentication according to the identification data obtained by decoding. If the authentication is passed, the control is connected thereto. The door actuator is opened to open the door and improve the user experience.

Second embodiment

7 and 8 are flow diagrams showing photon lock control performed by a photonic client and an optical chip in a photonic lock system, respectively, in accordance with a second embodiment of the present invention.

This embodiment is implemented in a photonic lock system in which the photonic client can be a photonic key and the optical chip can be a photonic lock controlled end. In addition to decoding the signal, the photon lock controlled end can further use the signal to match, thereby determining whether to unlock.

Referring to Figure 7, the photonic key can perform photon lock control by the following steps:

Step 701: Divide the identification data to be transmitted into a plurality of data units in the photonic key, each data unit comprising one or more bits.

Step 703, converting the plurality of data units into a plurality of electrical signal units, each of the electrical signal units representing the one or more bits of the corresponding data unit by a number of hops of the level, and having between the adjacent electrical signal units The interval expressed in fixed levels. In this embodiment, the rising or falling edge of the level can be used as the start of the transition.

For example, the duration of a high (or low) level within an electrical signal unit is 2 ms. Each electrical signal unit has four levels of transformation, including a low to high transition, each electrical signal unit representing 2 bits of information and four electrical signal units forming one byte. When the number of transitions from low level to high level in an electrical signal unit is 1, it represents information 00; when the number of transitions from low level to high level is 2, it represents information 01; when from low power When the number of transitions from flat to high level is 3, it represents information 10; when the number of transitions from low level to high level is 4, it represents information 11. The correspondence between the number of transitions from low level to high level and the information it represents is shown in Table 1.

Of course, each electrical signal unit can represent N-bit information, and N is a natural number, such as 1-bit information, which requires a maximum of 2 hops. By analogy, each electrical signal unit can represent 3-bit information, which requires up to 8 transitions, such as low to high or / and high to low in an electrical signal unit. When the number of transformations is 1, it represents information 000; when the number of transitions from low level to high level or / and high level to low level is 2, it represents information 001; when from low level to high level or / When the number of transitions from high level to low level is 3, it represents information 010; when the number of transitions from low level to high level or / and high level to low level is 4, it represents information 011, When the number of transitions from low level to high level or / and high level to low level in an electrical signal unit is 5, it represents information 100; when from low level to high level or / and high power When the number of transitions from flat to low level is 6, it represents information 101; when the number of transitions from low level to high level or / and high level to low level is 7, it represents information 110; when from low power When the number of transitions from flat to high or/and high to low is 8, it represents information 111. The information corresponding to the number of times of the above hopping can be flexibly set according to user needs and habits.

In step 703, each electrical signal unit is combined to obtain an encoded electrical signal. Figure 9 is an exemplary encoded electrical signal showing a relationship between bit values and levels. The four electrical signal units in the figure have 2, 4, 1 and 3 low levels, respectively. The high level transitions represent 01, 11, 00, and 10, respectively. The duration of the high or low level between two adjacent electrical signal units is 27 ms, and the combined signal is one byte, and its binary representation For 01110010, the corresponding hexadecimal signal is 0x72.

Step 704, transmitting the encoded electrical signal in the form of a visible light signal. The LED source of the photonic key needs to be aligned with the receiving photon lock controlled end when transmitting.

Referring to Figure 8, the photon lock controlled end can perform photon lock control by the following steps:

In step 801, the photon lock controlled end receives the visible light signal and converts it into an electrical signal.

Step 802, when a level jump is detected, it is determined to be the start of an electrical signal unit, and timing is started. The level jump can be from low level to high level, or vice versa from high level to low level.

Step 803, when the detected level duration is greater than the first threshold and less than or equal to the second threshold, indicating that the electrical signal unit is still continuing, during which the number of level jumps is recorded. The sustained level can be high or low. In the present embodiment, the rising or falling edge of the level can be used as the start of the jump recording.

Step 804, when the detected level duration is greater than the second threshold and less than or equal to the third threshold, determining that the electrical signal unit ends.

Step 805: When the detected level duration is greater than the third threshold, the determination signal is received.

For example, the first, second, and third thresholds are set to 0, 25 ms, and 60 ms, respectively, and when a rising edge is detected, timing is started, and when the detected high level duration is greater than 0 and less than or equal to 25 ms, recording is performed. The number of transitions from low to high; when the detected low level is greater than 25ms and less than or equal to 60ms, it is considered to be the end of an electrical signal unit; when the detected low level continues When the time is longer than 60ms, the signal is considered to have been received.

In another case, the duration of the low level being greater than the third threshold may also represent a signal reception interruption, restarting the detection signal.

Step 806: Convert each received electrical signal unit into a data unit.

Step 807: The photon lock controlled end combines the plurality of data units into the identification data, thereby obtaining information characterized by the visible light signal.

Step 808: The photon lock controlled end compares the identification data with a preset condition, and if the identification data matches the preset condition, controls the electric lock connected thereto to unlock.

In this embodiment, the photon key is used as the transmitting end of the photon lock control system, and the encoded identification data is transmitted as a visible light signal through the LED lamp of the photon key. The photon lock controlled end decodes the visible light signal received from the photon key, and then performs authentication according to the identification data obtained by decoding. If the authentication is performed, the electric lock connected to the control is unlocked, thereby unlocking the photon key and improving the user experience. .

The present invention also provides an authentication device that can be used in an access control system, a subway system, a payment system, or a consumption management system. The authentication device can include an optical chip. Taking the access control system as an example, in this embodiment, the mobile phone is used as the transmitting end, and the encoded identification data is transmitted as a visible light signal through the LED light. The optical chip decodes the visible light signal received from the mobile phone, and then performs authentication according to the identification data obtained by decoding. If the authentication is performed, the gate actuator connected thereto is controlled, thereby opening the door and improving the user experience.

After further research, it is found that the existence of ambient light during the use of the optical chip causes the ability of the optical chip to correctly receive and decode the optical signal to be greatly reduced. Accordingly, another aspect of the present invention is directed to providing an optical chip capable of reducing the influence of noise of ambient light.

FIG. 10 is a block diagram showing a light receiving unit 1000 in accordance with an aspect of the present invention. As shown in FIG. 10, the light receiving unit 1000 may include a photoelectric conversion unit 1010. The photoelectric conversion unit 1010 can be configured to receive an optical signal and convert the received optical signal into an electrical signal by photoelectric conversion. The photoelectric conversion unit 1010 may include a phototransistor, a photodiode, or the like.

The optical signal received by the photoelectric conversion unit 1010 may include a target optical signal with communication data emitted by a signal light source (for example, a light emitting unit of a photonic client), but may also include ambient light as noise. Therefore, the electrical signal generated by the photoelectric conversion unit 1010 may include a target electrical signal derived from the signal light source, and may also include a noise electrical signal derived from ambient light.

Ambient light seriously affects the correct reception of the target optical signal, reducing the throughput of optical communication, and even May cause communication to fail. To this end, the light receiving unit 1000 according to an aspect of the present invention may further include a light noise removing unit 1020 to remove the influence of ambient light noise.

The electrical signal generated by the photoelectric conversion unit 1010 may include a target electrical signal derived from the signal light source, and may also include a noise electrical signal derived from ambient light. As described above, the signal source emits an optical signal that is flashed at a high frequency according to a certain rule, for example, light may represent a logic high, and no light may represent a logic low. Through photoelectric conversion, the corresponding target electrical signal obtained by the photoelectric conversion unit 1010 is correspondingly a high-low level pulse sequence. For example, a high level corresponds to the signal source light emission, and a low level corresponds to the signal light source does not emit light. However, ambient light is generally invariant or negligible. Therefore, corresponding to the ambient light, the noise electrical signal generated by the photoelectric conversion unit 1010 can be approximated as a direct current signal, or an alternating current signal having a small amplitude and a slow change. Therefore, in the presence of ambient light, the electrical signal generated by the photoelectric conversion unit 1010 after receiving the target optical signal of the signal light source is a pulse signal superimposed with a noise electrical signal.

In view of this, the photo noise removing unit 1020 may include a noise filtering unit 1021. The noise filtering unit 1021 is coupled to the photoelectric conversion unit 1010 to receive an electrical signal generated by the photoelectric conversion unit 1010. The noise filtering unit 1021 can filter out a noise electric signal generated in the electric signal due to ambient light, thereby generating a target pulse signal. The pulse sequence of the target pulse signal can approximate the target electrical signal, for example, having a pulse sequence that is consistent with the change in the target electrical signal.

The light noise removing unit 1020 may further include a comparing unit 1022. The first input of the comparison unit 1022 can be coupled to the output of the noise filtering unit 1021 to receive the target pulse signal. The comparison unit 1022 can output a digital level signal based on a comparison of the target pulse signal and a reference voltage.

The target pulse signal outputted by the noise filtering unit 1021 has a pulse sequence that is consistent with the change of the target electrical signal, but the pulse amplitude of the target pulse signal is generally small, and is difficult to be used as a logic level signal of the digital circuit, and the comparing unit 1022 can The logic level signal is output by comparing the target pulse signal with the reference voltage, for example, depending on the power supply voltage, the high level can reach 3-5V. The magnitude of the reference voltage can be between the peak and valley of the pulse sequence of the target pulse signal. For example, when the level of the target pulse signal is higher than the reference voltage (corresponding to the pulse of the target pulse signal), the comparison unit 1022 can output a logic high level when the level of the target pulse signal is lower than the reference voltage (corresponding to The comparison unit 1022 can output a logic low level. Thereby, a logic level signal of the digital logic that accurately reflects the target optical signal emitted by the signal source can be obtained.

In this case, the object decoded by the decoding unit is the digital level signal output by the comparison unit 1022. Since the digital level signal is a clean signal that eliminates optical noise, the decoding efficiency of the decoding unit can be improved, and the optical communication throughput can be further improved.

FIG. 11 is a block diagram showing components of the light receiving unit 1100 according to the first embodiment of the present invention. As shown in FIG. 11, the light receiving unit 1100 may include a phototransistor Q1 to convert an optical signal into an electrical signal. Alternatively, other photosensitive devices such as photodiodes may be used as the photoelectric conversion unit.

The light receiving unit 1100 may further include a diode D1 and a resistor R1. The collector of the phototransistor Q1 is coupled to the power supply voltage Vcc (for example, 5V), the emitter of the phototransistor Q1 is coupled to one end of the resistor R1 and the anode of the diode D1, and the other end of the resistor R1 is grounded, where the resistor R1 serves The role of the clamp resistor.

The light receiving unit 1100 may further include a resistor R2 and a capacitor C1, and an operation comparator CMP. One end of the resistor R2 is coupled to the cathode of the diode D1, the other end is coupled to one end of the capacitor C1 and the negative input terminal of the comparator CMP, and the other end of the capacitor C1 is grounded. In addition, the positive input terminal of the comparator CMP is coupled to the negative terminal of the diode D1. The output of the comparator CMP can output a digital level signal Vout and is coupled to the power supply voltage Vcc through a resistor R3.

When no light (including signal light source and ambient light) illuminates the phototransistor Q1, the phototransistor Q1 is in an off state, no current flows, and the voltage at the node S1 is zero. Accordingly, the diode D1 is also in an off state.

When light is irradiated to the phototransistor Q1 (for example, a signal light source, an ambient light source, or both), a current passing through the phototransistor Q1 is generated due to the photoelectric effect, thereby causing voltage fluctuations at the node S1. This voltage fluctuation on node S1 represents the corresponding electrical signal generated from the photoelectric conversion.

The target light signal of the signal source is high frequency flashing. In an ideal case, that is, without ambient light, the generated electrical signal on S1 is a target electrical signal corresponding to the target optical signal, and the target electrical signal is a high and low level pulse sequence. Fig. 12 is a schematic view showing a target electric signal generated by a photoelectric conversion unit in the absence of ambient light. The amplitude of the pulse of the target electrical signal is V1.

In the presence of ambient light but no signal source, the electrical signal generated at node S1 is a noisy electrical signal corresponding to ambient light when illuminated by ambient light. Fig. 13 is a schematic diagram showing a noise electric signal generated by a photoelectric conversion unit under the condition that there is ambient light and no signal light source. In general, the ambient light can be regarded as constant or slower. Therefore, the corresponding noise electrical signal can be approximated as a DC signal with a size of V2, as shown in FIG.

Under the condition that there is a signal light source and ambient light, an electrical signal including both the target electrical signal and the noise electrical signal can be generated on the node S1. Fig. 14 is a schematic view showing an electric signal generated by a photoelectric conversion unit under the condition that there is ambient light and a signal light source. As shown in FIG. 14, the electric signal at this time is a pulse signal on which a DC noise electric signal is superimposed on the basis of the target electric signal, and the amplitude of the pulse is V3=V1+V2, and the level at the pulse interval is V2.

The voltage at node S1 is determined by the current through resistor R1 (determined by the light intensity) caused by the photoelectric conversion and the resistance of R1. The stronger the light, the larger the resistance R1, the larger the voltage at the node S1. In general, the intensity of ambient light is less than the intensity of a signal source (eg, a flash). Therefore, in relative size, V1 > V2.

Assume that the turn-on voltage of the diode D1 is V _T . By selecting the appropriate R1 resistance, it is possible to make V1 > V _T ≥ V2. That is, under the condition of only ambient light, the DC noise electrical signal is insufficient to turn on the diode D1. D1 is always in the off state, and the voltage on node S2 is always 0. However, in the case of only the signal source, or both the existing signal source and the ambient light, the generated electrical signals (including the target electrical signal and the noise electrical signal) can cause the diode D1 to be regularly guided according to the pulse sequence of the target electrical signal. And off, thereby generating a target pulse signal corresponding to the target electrical signal at the node S2. The target pulse signal has a pulse sequence that is consistent with the change of the target electrical signal, and the pulse amplitude:

V4=V1-V _T , only the signal source but no ambient light; and

V4=V3-V _T =V1+V2-V _T , both the signal source and the ambient light illumination conditions.

Fig. 15 is a schematic diagram showing the target pulse signal. As shown in FIG. 15, the target pulse signal has a pulse sequence that coincides with the change of the target electrical signal, except that the pulse amplitude V4 ≤ V1.

Here, the diode D1 functions to filter the light noise, and may correspond to the noise filter unit 1021 of FIG. In some cases, the ambient light also changes at a certain frequency, such as a fluorescent lamp, which is negligible compared to the flicker frequency of the signal source. Therefore, the noise electric signal is thus approximated as a DC signal. However, at this time, the generated noise electrical signal may still affect the final logic output. Therefore, the noise electric signal is filtered out by the diode D1, and the receiving accuracy is greatly improved.

The cathode of the diode D1 is coupled to the positive input terminal of the comparator CMP, that is, the target pulse signal is sent to the comparator CMP as its positive input. The comparator CMP has two input terminals, a positive input terminal and a negative input terminal. When the positive input of the comparator CMP is greater than the negative input, the output logic is high, such as a TTL level of 3V, depending on the supply voltage Vcc, otherwise the output logic is low, such as a TTL level of 0V.

The negative input terminal of the comparator CMP is coupled to the connection point S3 of the resistor R2 and the capacitor C1. Here, the resistors R2 and C1 may constitute a low pass filter to filter the target pulse signal. For any signal f(t) you can use Fourier series expansion:

Therefore, after filtering through the low-pass filter, ideally only the DC component passes. For RC filters, the transfer function is

ω is the input signal frequency,

When ω = 0, |H(jω)|=1, when ω≠0, the gain 0<|H(jω)|<1. In the actual circuit, the RC low-pass filter does not filter out all frequency components except DC. Therefore, after low-pass filtering, the approximate DC component in the target pulse signal is output at node S3, and the amplitude is between 0 and Between V4, depending on the R2 and C1 values. Figure 16 is a diagram showing the filtered signal of the target pulse signal.

The filtered signal at node S3 is input to the negative input of comparator CMP. The comparator CMP can output a digital level signal that is a logic level signal, such as a logic 1 being a TTL high level (such as 3V) and a logic 0 being a TTL low level (such as 0V). Figure 17 is a diagram showing a digital level signal output by a comparator.

The comparator CMP herein may correspond to the comparison unit 1022 of FIG. The low pass filter composed of R2 and C1 improves the reference voltage for comparison by the comparator CMP, and thus can be regarded as a reference voltage generating unit.

FIG. 18 is a circuit configuration diagram showing components of the light receiving unit 1800 according to the second embodiment of the present invention. Similar to FIG. 11, the light receiving unit 1800 may include a phototransistor Q1 to convert an optical signal into an electrical signal. Alternatively, other photosensitive devices such as photodiodes may be used as the photoelectric conversion unit.

The light receiving unit 1800 may further include a capacitor C1 and a resistor R1. The collector of the phototransistor Q1 is coupled to a power supply voltage Vcc (for example, 5V). The emitter of the phototransistor Q1 is coupled to one end of the resistor R1 and one end of the capacitor C1, and the other end of the resistor R1 is grounded.

The light receiving unit 1800 may further include a voltage dividing resistor and a transistor Q2. The other end of the capacitor C1 is coupled to the intermediate node of the voltage dividing resistor. The voltage dividing resistor includes resistors R2 and R3. The intermediate nodes of R2 and R3 are also coupled to the base of transistor Q2. The other ends of R2 and R3 are respectively coupled to a power supply voltage Vcc and a ground. The emitter of transistor Q2 is grounded, and its collector is coupled to the supply voltage through resistor R4, which is also used to output a digital level signal Vout.

Similar to that described above with reference to FIG. 11, when any light (including signal light source and ambient light) is irradiated to the phototransistor Q1, the phototransistor Q1 is in an off state, no current is passed, and the voltage at the node S1 is zero.

The resistance of the voltage dividing resistors R2 and R3 determines the base voltage at node S4.

It is easy to understand that the base voltage is the bias voltage of the transistor Q2 when there is no light to illuminate the phototransistor Q1.

The target light signal of the signal source is high frequency flashing. In an ideal case, that is, without ambient light, the electrical signal generated on S1 is a target electrical signal corresponding to the target optical signal, and the target electrical signal is a high and low level pulse sequence.

In the presence of ambient light but no signal source, the electrical signal generated at node S1 is a noisy electrical signal corresponding to ambient light when illuminated by ambient light. In general, ambient light can be considered to be constant or change slowly, so the corresponding noise electrical signal can be approximated as a direct current signal.

Under the condition that there is a signal light source and ambient light, an electrical signal including both the target electrical signal and the noise electrical signal can be generated on the node S1. The electrical signal at this time is a pulse signal on which a DC noise electrical signal is superimposed on the basis of the target electrical signal.

Capacitor C1 acts as an AC and DC. That is, the DC component in the electrical signal cannot reach node S4. As mentioned above, the noisy electrical signal is a direct current signal, or an approximately direct current signal. Thus, the capacitor C1 can effectively filter out the noise electrical signal. Therefore, C1 functions to filter the noise electric signal, corresponding to the noise filtering unit 1021 of FIG. The target pulse signal arriving at node S4 then approximates the target electrical signal, for example having a pulse sequence that is consistent with the change in the target electrical signal.

By setting the voltage dividing resistor, the base voltage V _base can be set to be lower than the turn-on voltage of Q2, and after the voltage of the target pulse signal is superimposed, it is larger than the turn-on voltage of Q2. Thus, the transistor Q2 can be turned on and off regularly in accordance with the pulse sequence of the target electrical signal. By turning on and off the transistor Q2, a corresponding digital level signal Vout can be output at the collector.

In the present embodiment, the transistor Q2 outputs a digital level signal by comparing the voltage at the node S4 with its own turn-on voltage, which may correspond to the comparing unit 1022 of FIG. Since the reference voltage is the turn-on voltage of the transistor Q2 itself, the comparison unit 222 can be regarded as itself including the reference voltage generating unit, or the reference voltage generating unit is a part of the comparing unit.

FIG. 19 is a block diagram showing components of the light receiving unit 1900 according to the third embodiment of the present invention. Similar to FIG. 18, the light receiving unit 1900 may include a phototransistor Q1 to convert an optical signal into an electrical signal. Alternatively, other photosensitive devices such as photodiodes may be used as the photoelectric conversion unit.

The light receiving unit 1900 may further include a capacitor C1 and a resistor R1. The collector of the phototransistor Q1 is coupled to a power supply voltage Vcc (for example, 5V). The emitter of the phototransistor Q1 is coupled to one end of the resistor R1 and one end of the capacitor C1, and the other end of the resistor R1 is grounded.

The light receiving unit 1900 may further include a first voltage dividing resistor and a comparator CMP. The other end of the capacitor C1 is coupled to the intermediate node of the voltage dividing resistor. The first voltage dividing resistor includes resistors R2 and R3. The intermediate node of R2 and R3 is also coupled to the positive input terminal of the comparator CMP. The other ends of R2 and R3 are respectively coupled to the power supply voltage Vcc. And grounding.

The light receiving unit 1900 may further include a second voltage dividing resistor including resistors R4 and R5. The negative input terminal of the comparator CMP can be coupled to the intermediate node of the second voltage dividing resistor, that is, the connection point of R4 and R5, and the other ends of R4 and R5 are respectively coupled to the power supply voltage Vcc and the ground.

The circuits of Figures 19 and 18 are the same from the left until node S4, i.e., a target pulse signal can be generated at node S4. The difference is that the comparison and output are performed using the comparator CMP as a comparison unit in FIG. That is, the target pulse signal is input to the positive input terminal of the comparator CMP. The negative input terminal of the comparator CMP is coupled to an intermediate node of the second voltage dividing resistor to receive a reference voltage for comparison. In this sense, the second voltage dividing resistor can be regarded as a reference voltage generating unit.

It will be readily appreciated that the reference voltage input to the negative input terminal of the comparator CMP can be between the peak and valley of the pulse sequence of the target pulse signal. Thus, the CMP can output a logic level signal that reflects the digital logic of the target optical signal emitted by the signal source.

Although a particular embodiment has been described for purposes of illustration, it is readily understood that aspects of the invention are not limited to the specific embodiments. Some of the components described with reference to a particular embodiment may not be required, may have replacement components, or may have additional components. For example, the comparator in the first embodiment described with reference to FIG. 11 can be implemented with a triode or other comparison means.

Those skilled in the art will appreciate that the various illustrative logical blocks, modules, circuits, and algorithms described in connection with the embodiments disclosed herein can be implemented as electronic hardware, stored in a memory, or in another computer readable medium and An instruction executed by a processor or other processor device, or a combination thereof. The memory disclosed herein can be any type and size of memory and can be configured to store any type of information as desired. To clearly illustrate this interchangeability, various illustrative components, blocks, modules, circuits, and steps have been described above in the form of their function. How such functions are implemented depends on the specific application, design choices, and/or design constraints imposed on the overall system. A person skilled in the art can implement the described functions in different ways for each specific application, but such implementation decisions should not be interpreted as causing the scope of the disclosure.

The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be a processor, DSP, application specific integrated circuit (ASIC), FPGA, or other programmable logic device, designed to perform the functions described herein, Discrete or transistor logic, discrete hardware components, or any combination thereof, are implemented or executed. The processor can be a microprocessor, but in the alternative, the processor can be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

Embodiments disclosed herein may be implemented as hardware and instructions stored in hardware, examples of which may be Such as resident in random access memory (RAM), flash memory, read only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, hard disk, removable disk, CD-ROM Or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor to enable the processor to read/write information from/to the storage medium. Alternatively, the storage medium can be integrated into the processor. The processor and the storage medium can reside in an ASIC.

It is also noted that the operational steps described in any of the exemplary embodiments herein are described to provide examples and discussion. The described operations may be performed in a variety of different sequences than those shown. Moreover, the operations described in a single operational step can be performed in a number of different steps. Additionally, one or more of the operational steps discussed in the exemplary embodiments can be combined. It will be appreciated that various modifications may be made to the operational steps illustrated in the flowcharts, as apparent to those skilled in the art. Those skilled in the art will also appreciate that information and signals may be represented using any of a variety of different techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips referred to throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or magnetic particles, light or light particles, or any combination thereof. .

The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the present disclosure will be obvious to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. The present disclosure is not intended to be limited to the examples and designs described herein, but rather the broadest scope of the principles and novel features disclosed herein.

Claims

An optical chip comprising:

a photoelectric conversion unit for receiving an optical signal and generating an electrical signal by photoelectric conversion;

a photo noise removing unit coupled to the photoelectric conversion unit for removing optical noise in the electrical signal to output a digital level signal;

a decoding unit coupled to the optical noise removing unit for performing the following steps to decode the digital level signal:

When a level jump is detected, it is determined to be the start of an electrical signal unit, and timing is started;

Recording the number of times the level jumps when the detected level duration is greater than the first threshold and less than or equal to the second threshold;

Determining that the electrical signal unit ends when the detected level duration is greater than the second threshold and less than or equal to the third threshold;

When the detected level duration is greater than the third threshold, the determination signal is received;

Converting each received electrical signal unit into a data unit;

Combine multiple data units into data.
The optical chip according to claim 1, wherein the jump of the level changes to a low level to a high level transition or/and a high level to a low level transition.
The optical chip according to claim 1, wherein the decoding unit is further configured to perform the following steps to convert the received electrical signal units into data units:

A data unit corresponding to the number of times of level jump in the recorded electrical signal unit is determined according to a correspondence table set in advance.
The optical chip according to claim 1, wherein said first threshold is equal to a desired first level duration minus a previously obtained flicker delay value of the light emitting unit.
The optical chip of claim 1 wherein said second threshold is equal to a desired second power The flat duration is subtracted from the flicker delay value of the previously obtained light emitting unit.
The optical chip according to claim 1, wherein the photo noise removing unit comprises:

a noise filtering unit, the input end of the noise filtering unit receives an electrical signal from the photoelectric conversion unit, and the noise filtering unit is configured to filter out a noise electrical signal generated by the ambient light in the electrical signal and at the output end Output target pulse signal;

a comparison unit, a first input end of the comparison unit is coupled to an output end of the noise filter unit to receive the target pulse signal, and the comparison unit is configured to compare the reference pulse signal with a reference voltage To output the digital level signal.
The optical chip according to claim 6, wherein the noise filtering unit comprises:

a diode, an anode of the diode is coupled to the photoelectric conversion unit, and a cathode of the diode is coupled to the first input end of the comparison unit.
The optical chip according to claim 7, wherein the light noise removing unit further comprises:

a clamp resistor, the clamp resistor is connected in series with the photoelectric conversion unit, a first end of the clamp resistor is coupled to one end of the photoelectric conversion unit and a positive pole of the diode, and the clamp resistor is The two ends are grounded, and the other end of the photoelectric conversion unit is connected to a power supply voltage, and the clamp resistor clamps a voltage on a positive pole of the diode to be smaller than a turn-on voltage of the diode when the signal source is not illuminated, In the case of illumination with a signal source, it is greater than a voltage level of the on-voltage of the diode.
The optical chip according to claim 7, wherein the light noise removing unit further comprises:

a reference voltage generating unit, the reference voltage generating unit includes a resistor and a capacitor to form a low pass filter, one end of the resistor is coupled to a cathode of the diode, the other end is coupled to one end of the capacitor, and the comparison A second input of the unit provides the reference voltage and the other end of the capacitor is grounded.
The optical chip according to claim 6, wherein the noise filtering unit comprises:

a coupling capacitor, a first end of the coupling capacitor coupled to the photoelectric conversion unit, and a second end coupled to the first input end of the comparison unit.
The optical chip according to claim 10, wherein the light noise removing unit further comprises:

a first voltage dividing resistor, the first node of the first voltage dividing resistor is coupled to the power voltage, the second node is grounded, and the intermediate node is coupled to the second end of the coupling capacitor and the comparing unit The first input end, the voltage at the intermediate node is smaller than the reference voltage without the signal source illumination, and greater than the reference voltage when the signal source is illuminated.
The optical chip according to claim 6, wherein the comparing unit comprises:

a comparator, a positive input terminal of the comparator being the first input of the comparison unit, and a negative input terminal receiving the reference voltage.
The optical chip according to claim 12, wherein the light noise removing unit further comprises:

a reference voltage generating unit coupled to the negative input terminal of the comparator to provide the reference voltage.
The optical chip according to claim 13, wherein the reference voltage generating unit comprises:

a second voltage dividing resistor, a first node of the second voltage dividing resistor coupled to the power voltage, a second node ground, and an intermediate node coupled to the negative input terminal of the comparator to provide the reference voltage .
The optical chip according to claim 6, wherein the comparing unit comprises:

a transistor, the base of the transistor is the first input end of the comparison unit and coupled to an output end of the noise filter unit, the emitter of the transistor is grounded, and the collector is coupled to the power source through a resistor a voltage, the collector is for outputting the digital level signal, wherein the reference voltage is a turn-on voltage of the transistor.
An authentication device comprising the optical chip of claims 1-15.