CN107171734B - Optical chip for optical communication - Google Patents

Optical chip for optical communication Download PDF

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Publication number
CN107171734B
CN107171734B CN201610131707.5A CN201610131707A CN107171734B CN 107171734 B CN107171734 B CN 107171734B CN 201610131707 A CN201610131707 A CN 201610131707A CN 107171734 B CN107171734 B CN 107171734B
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signal
coupled
optical
voltage
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CN107171734A (en
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不公告发明人
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Kuang Chi Intelligent Photonic Technology Ltd
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Kuang Chi Intelligent Photonic Technology Ltd
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Priority to CN201610131707.5A priority Critical patent/CN107171734B/en
Priority to PCT/CN2017/075622 priority patent/WO2017152811A1/en
Priority to KR1020187026169A priority patent/KR102057726B1/en
Priority to JP2018547393A priority patent/JP6955505B2/en
Priority to EP17762497.0A priority patent/EP3429097B1/en
Publication of CN107171734A publication Critical patent/CN107171734A/en
Priority to US16/122,884 priority patent/US10567088B2/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/11—Arrangements specific to free-space transmission, i.e. transmission through air or vacuum
    • H04B10/114—Indoor or close-range type systems
    • H04B10/116—Visible light communication
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H04B10/697—Arrangements for reducing noise and distortion
    • H04B10/6972—Arrangements for reducing noise and distortion using passive filtering

Abstract

The present invention provides an optical chip, comprising: a photoelectric conversion unit for receiving an optical signal and generating an electrical signal by photoelectric conversion; an optical noise removing unit coupled to the photoelectric conversion unit for removing optical noise in the electrical signal to output a digital level signal; and a decoding unit for outputting information bits according to a level-reversal condition of the digital level signal to obtain transmission data.

Description

Optical chip for optical communication
Technical Field
The present invention relates to optical communications, and more particularly, to an optical chip for optical communications.
Background
The visible light communication technology is a novel wireless light communication technology developed on the LED technology. The communication is performed by high frequency flashing of the LED light source, and the transmission rate of visible light communication is up to giga per second. Visible light communication has a considerable abundance of spectrum resources, which is incomparable with general wireless communication including microwave communication. Meanwhile, the visible light communication can be suitable for any communication protocol and any environment, and the visible light communication equipment is flexible, convenient and low in cost and is suitable for large-scale popularization and application.
The visible light communication system performs near field communication using visible light, has high directivity of visible light, cannot penetrate obstacles, and has higher safety than a wireless communication system. At present, some visible light communication systems begin to be applied, such as photon access control systems and photon payment in photon internet of things. With the increasing popularity of portable devices such as mobile phones, the mobile phone can be used as a photonic client by using the flash function of the mobile phone, which greatly lowers the application threshold of visible light communication, and since the mobile phone is originally carried by a user, no extra burden is caused to the user.
However, visible light communication by portable photonic clients such as mobile phones is generally performed in an environment with ambient light. When receiving the optical signal sent by the photon client, the photon receiving end converts the optical signal into a meaningful electrical signal through photoelectric conversion. However, under the irradiation of the ambient light, the photon receiving end still converts the unambiguous ambient light into useless electrical signals, which are noise signals, and interfere with the photon receiver to correctly receive the optical signals emitted by the photon client.
In addition, in the current optical communication, due to the limitation of the encoding method, the data transmission rate (i.e., the amount of information transmitted per unit time) is still small, and there is room for further improvement.
Disclosure of Invention
The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.
According to an aspect of the present invention, there is provided an optical chip including: a photoelectric conversion unit for receiving an optical signal and generating an electrical signal by photoelectric conversion; an optical noise removing unit coupled to the photoelectric conversion unit for removing optical noise in the electrical signal to output a digital level signal; and a decoding unit for outputting information bits according to a level-reversal condition of the digital level signal to obtain transmission data.
In one example, the decoding unit includes: a decision unit outputting an information bit 1 in response to the level inversion and outputting an information bit 0 in response to the level maintenance; alternatively, the decision unit outputs an information bit 0 in response to the level inversion and outputs an information bit 1 in response to the level maintenance.
In one example, the level flip includes both a low to high flip and a high to low flip.
In one example, the optical noise removing unit includes: a noise filtering unit, an input end of which receives the electrical signal from the photoelectric conversion unit, the noise filtering unit being configured to filter out a noise electrical signal generated due to ambient light in the electrical signal and output a target pulse signal at an output end; and a comparison unit, a first input end of the comparison unit is coupled to the output end of the noise filtering unit to receive the target pulse signal, and the comparison unit is used for outputting the digital level signal according to the comparison between the target pulse signal and a reference voltage.
In one example, the noise filtering unit includes: a diode, an anode of which is coupled to the photoelectric conversion unit and a cathode of which is coupled to the first input terminal of the comparison unit.
In one example, the optical noise removing unit further includes: a clamping resistor connected in series with the photoelectric conversion unit, a first end of the clamping resistor being coupled to one end of the photoelectric conversion unit and an anode of the diode, a second end of the clamping resistor being grounded, and another end of the photoelectric conversion unit being connected to a power supply voltage, the clamping resistor clamping a voltage at the anode of the diode to a voltage level that is less than a turn-on voltage of the diode in the absence of illumination by the signal light source and greater than the turn-on voltage of the diode in the presence of illumination by the signal light source.
In one example, the optical noise removing unit further includes: and the reference voltage generating unit comprises a resistor and a capacitor to form a low-pass filter, one end of the resistor is coupled to the cathode of the diode, the other end of the resistor is coupled to one end of the capacitor and the second input end of the comparing unit to provide the reference voltage, and the other end of the capacitor is grounded.
In one example, the noise filtering unit includes: a first end of the coupling capacitor is coupled to the photoelectric conversion unit, and a second end of the coupling capacitor is coupled to the first input end of the comparison unit.
In one example, the optical noise removing unit further includes: a first voltage dividing resistor, a first node of which is coupled to a power voltage, a second node is grounded, and an intermediate node is coupled to the second end of the coupling capacitor and the first input end of the comparing unit, wherein the voltage at the intermediate node is less than the reference voltage under the condition of no irradiation of the signal light source and greater than the reference voltage under the condition of irradiation of the signal light source.
In one example, the comparison unit includes: a comparator, a positive input terminal of which is the first input terminal of the comparing unit, and a negative input terminal of which receives the reference voltage.
In one example, the optical noise removing unit further includes: a reference voltage generation unit coupled to the negative input terminal of the comparator to provide the reference voltage.
In one example, the reference voltage generating unit includes: a second voltage divider resistor having a first node coupled to a power voltage, a second node coupled to ground, and an intermediate node coupled to the negative input terminal of the comparator to provide the reference voltage.
In one example, the comparison unit includes: the base electrode of the triode is the first input end of the comparison unit so as to be coupled to the output end of the noise filtering unit, the emitting electrode of the triode is grounded, the collecting electrode of the triode is coupled to a power voltage through a resistor, the collecting electrode of the triode is used for outputting the digital level signal, and the reference voltage is the conducting voltage of the triode.
The optical chip of the invention has the following beneficial effects: the optical chip reduces the noise influence of ambient light and improves the capability of receiving and decoding optical signals.
Drawings
The above features and advantages of the present disclosure will be better understood upon reading the detailed description of embodiments of the disclosure in conjunction with the following drawings. In the drawings, components are not necessarily drawn to scale, and components having similar associated characteristics or features may have the same or similar reference numerals.
FIG. 1 is a simplified block diagram illustrating a visible light communication system in which the present invention may be practiced;
FIG. 2 is a simplified block diagram illustrating a decoding unit according to an aspect of the present invention;
fig. 3 is a diagram illustrating a decoding result of a decoding unit according to an aspect of the present invention;
fig. 4 is a block diagram showing a light receiving unit according to another aspect of the present invention;
FIG. 5 is a block diagram showing components of an optical receiver according to a first embodiment of the present invention;
fig. 6 is a schematic diagram showing a target electric signal generated by the photoelectric conversion unit under a condition of no ambient light;
fig. 7 is a schematic diagram showing a noise electric signal generated by the photoelectric conversion unit under the condition of ambient light and no signal light source;
fig. 8 is a schematic diagram showing an electrical signal generated by the photoelectric conversion unit under the condition of ambient light and a signal light source;
fig. 9 is a schematic diagram showing a target pulse signal output from the optical noise filtering unit;
FIG. 10 is a signal diagram showing a filtered target pulse signal;
FIG. 11 is a schematic diagram showing a digital level signal output by a comparator;
fig. 12 is a block diagram showing components of an optical receiver according to a second embodiment of the present invention;
fig. 13 is a block diagram showing components of an optical receiver according to a third embodiment of the present invention.
Detailed Description
The invention is described in detail below with reference to the figures and specific embodiments. It is noted that the aspects described below in connection with the figures and the specific embodiments are only exemplary and should not be construed as imposing any limitation on the scope of the present invention.
Fig. 1 shows a simplified block diagram of a visible light communication system in which the present invention may be practiced. The visible light communication system 100 includes a photon client 110 and a photon receiving end 120. The photon client 110 includes an encoding unit 111. The encoding unit 111 receives original communication data. The raw communication data may be any information data to be communicated to the photon receiving end with the photon client 110, such as user Identity (ID) information, operational instructions, and so forth.
The encoding unit 111 may encode the original communication data in any encoding manner. The encoding unit 111 outputs the encoded signal to the light emitting unit 113. The light emitting unit 113 may transmit the received encoded signal out in the form of visible light, for example, by representing a logic high with light emission and a logic low with no light emission (or vice versa). The light emitting unit 113 may be an LED or other element having a light emitting function. The photon client 110 may be a photon internet of things, for example, a portable device in a photon access control system, such as a mobile phone, a tablet computer, a PDA, a light key, and the like. The light key is a key capable of unlocking a door lock based on visible light communication, and may also be called a photon key. At this time, the light emitting unit 113 may be a flash on the mobile phone or an element having a light emitting function externally connected to the mobile phone.
The processing unit 112 may control the operations of the encoding unit 111 and the light emitting unit 113. The processing unit 112 may be a general purpose processor, a Digital Signal Processor (DSP), or the like. A general purpose processor may be a microprocessor, but in the alternative, the processing unit 112 may be any conventional processor, controller, microcontroller, or state machine. The processing unit 112 may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The photon receiving end 120 includes a light receiving unit 123 for receiving the visible light signal emitted from the client 110 and converting the visible light signal into a digital signal. For example, for high frequency flicker generated by an LED lamp, the presence of light may represent a logic high, the absence of light may represent a logic low, or vice versa, such that a received visible light signal may be converted into an electrical signal. The light receiving unit 123 may include a photosensitive device, such as a phototransistor, a photodiode. Electric pulse signals are formed through photoelectric conversion by utilizing the characteristics of electric signals and optical signals of the phototriodes and the photodiodes.
The decoding unit 121 receives and decodes the electrical signal output by the light receiving unit 123 to restore the original communication data. The processing unit 122 may control the operations of the decoding unit 121 and the light receiving unit 123. The processing unit 122 may be a general purpose processor, a Digital Signal Processor (DSP), or the like. A general purpose processor may be a microprocessor, but in the alternative, the processing unit 122 may be any conventional processor, controller, microcontroller, or state machine. The processing unit 122 may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The photon receiving end 120, in particular, the decoding unit 121 and the light receiving unit 123 in the photon receiving end 120 may be integrated in an optical chip. The optical chip can be used for an access terminal in a photon access control system, a photon lock controlled terminal in a photon lock system and the like.
Fig. 2 shows a simplified block diagram of a decoding unit 200 according to an aspect of the invention. According to an aspect of the present invention, the decoding unit 200 may output information bits according to a level inversion condition of the digital level signal to obtain transmission data.
Specifically, according to this aspect of the present invention, the signal level is inverted once to represent the bit 1, and the signal level is unchanged to represent the bit 0, that is, the bit 1 is represented by one transition of the signal from the high level to the low level, or the bit 1 is represented by one transition of the signal from the low level to the high level, instead of the bit 1 being represented by the high level itself. Therefore, level transition occurs every time bit 1 is transmitted, 5 level transitions are caused by transmitting a group of signals by 5 bits 1, the receiving party can resynchronize and adjust the clock of the receiving party according to the actual arrival of the signals by the level transitions every time, and the synchronization mechanism of the transmitting party and the receiving party can obviously improve the transmission efficiency of the signals.
As shown in fig. 2, the decoding unit 200 may include a decision unit 210. The decision unit 210 may output the information bit 1 in response to the level-flipping and output the information bit 0 in response to the level-maintaining, or the decision unit 210 may output the information bit 0 in response to the level-flipping and output the information bit 1 in response to the level-maintaining. The decision unit 210 may be implemented by hardware such as a decision device and a decision circuit composed of logic devices, or implemented by software.
Fig. 3 is a schematic diagram showing the decoding result of the decoding section of the present invention, and as can be seen from fig. 3, since bit 1 is represented when the signal transitions between a high level and a low level, the signal transmitted in the diagram is 01100001.
Through further research, it is found that, during the use of the optical chip, the existence of ambient light causes the optical chip to have a greatly reduced capability of correctly receiving and decoding optical signals. Accordingly, another aspect of the present invention is directed to providing an optical chip capable of reducing the noise influence of ambient light.
Fig. 4 is a block diagram illustrating a light receiving unit 400 according to an aspect of the present invention. As shown in fig. 4, the light receiving unit 400 may include a photoelectric conversion unit 410. The photoelectric conversion unit 410 may be configured to receive an optical signal and convert the received optical signal into an electrical signal through photoelectric conversion. The photoelectric conversion unit 410 may include a phototransistor, a photodiode, and the like.
The optical signal received by the photoelectric conversion unit 410 may include a target optical signal with communication data emitted by a signal light source (e.g., a light emitting unit of a photonic client), but may also include ambient light as noise. Therefore, the electrical signal generated by the photoelectric conversion unit 410 may include a target electrical signal derived from the signal light source, and may also include a noise electrical signal derived from ambient light.
The ambient light seriously affects the correct reception of the target optical signal, reducing the throughput of optical communication and possibly even causing communication failure. To this end, the light receiving unit 400 according to an aspect of the present invention may further include an optical noise removing unit 420 to remove the influence of the ambient optical noise.
The electrical signal generated by the photoelectric conversion unit 410 may include a target electrical signal originating from a signal light source and may also include a noise electrical signal originating from ambient light. As mentioned above, the signal light source emits a light signal that flashes at a high frequency and a certain rule, for example, presence of light may represent a logic high, and absence of light may represent a logic low. Through photoelectric conversion, the corresponding target electrical signal obtained by the photoelectric conversion unit 410 is a high-low level pulse sequence, for example, a high level corresponds to the signal light source emitting light, and a low level corresponds to the signal light source not emitting light. However, ambient light is generally constant or varies negligibly. Therefore, the noise electrical signal generated by the photoelectric conversion unit 410 may be approximated to a direct current signal or an alternating current signal having a small amplitude and a slow change, corresponding to the ambient light. Therefore, in the presence of ambient light, the electrical signal generated by the photoelectric conversion unit 410 after receiving the target optical signal of the signal light source is a pulse signal superimposed with a noise electrical signal.
In view of this, the optical noise removing unit 420 may include a noise filtering unit 421. The noise filtering unit 421 is coupled to the photoelectric conversion unit 410 to receive the electrical signal generated by the photoelectric conversion unit 410. The noise filtering unit 421 may filter out a noise electrical signal generated due to the ambient light from the electrical signal, thereby generating a target pulse signal. The pulse train of the target pulse signal may approximate the target electrical signal, e.g., have a pulse train that is consistent with the target electrical signal variations.
The optical noise removing unit 420 may further include a comparing unit 422. A first input terminal of the comparing unit 422 may be coupled to the output terminal of the noise filtering unit 421 to receive the target pulse signal. The comparison unit 422 may output a digital level signal based on a comparison of the target pulse signal and a reference voltage.
Although the target pulse signal output from the noise filtering unit 421 has a pulse sequence in accordance with the variation of the target electric signal, the pulse amplitude of the target pulse signal is generally small and is difficult to be used as a logic level signal of a digital circuit, and the comparing unit 422 can output a logic level signal by comparing the target pulse signal with a reference voltage, for example, the high level can reach 3-5V depending on the power supply voltage. The reference voltage may have a magnitude between a peak and a valley of a pulse train of the target pulse signal. For example, the comparison unit 422 may output a logic high level when the level of the target pulse signal is higher than a reference voltage (corresponding to a pulse of the target pulse signal), and the comparison unit 422 may output a logic low level when the level of the target pulse signal is lower than the reference voltage (corresponding to a pulse interval of the target pulse signal). Therefore, the logic level signal of the digital logic of the target optical signal emitted by the signal light source can be accurately reflected.
In this case, the decoding unit decodes the digital level signal outputted from the comparing unit 422. Since the digital level signal is a clean signal from which optical noise is removed, the decoding efficiency of the decoding unit can be improved, and the optical communication throughput can be further improved.
Fig. 5 is a block diagram showing components of a light receiving unit 500 according to the first embodiment of the present invention. As shown in fig. 5, the light receiving unit 500 may include a phototransistor Q1 to convert an optical signal into an electrical signal. Alternatively, other photosensitive devices such as photodiodes may be used as the photoelectric conversion units.
The light receiving unit 500 may further include a diode D1 and a resistor R1. The collector of the phototransistor Q1 is coupled to a power supply voltage Vcc (e.g., 5V), the emitter of the phototransistor Q1 is coupled to one terminal of a resistor R1 and the anode of a diode D1, the other terminal of the resistor R1 is grounded, and the resistor R1 plays a role of clamping.
The light receiving unit 500 may further include a resistor R2 and a capacitor C1, and an operational comparator CMP. One end of the resistor R2 is coupled to the cathode of the diode D1, the other end is coupled to one end of the capacitor C1 and the negative input terminal of the comparator CMP, and the other end of the capacitor C1 is grounded. In addition, the positive input terminal of the comparator CMP is coupled to the cathode of the diode D1. The output terminal of the comparator CMP can output a digital level signal Vout and is coupled to the power supply voltage Vcc through a resistor R3.
When no light (including signal light source and ambient light) illuminates the phototransistor Q1, the phototransistor Q1 is off, no current flows, and the voltage at node S1 is 0. Accordingly, the diode D1 is also in the off state.
When light strikes the phototransistor Q1 (e.g., a signal light source, an ambient light source, or both), a current is generated through the phototransistor Q1 due to the photoelectric effect, which in turn causes the voltage at node S1 to fluctuate. This voltage fluctuation at node S1 represents the corresponding electrical signal generated as a result of the photoelectric conversion.
The target light signal of the signal light source is high frequency flickering. In an ideal case, i.e., in the absence of ambient light, the generated electrical signal at S1 is the target electrical signal corresponding to the target optical signal, which is a pulse sequence of high and low levels. Fig. 6 is a schematic diagram showing a target electric signal generated by the photoelectric conversion unit under the condition of no ambient light. The amplitude of the pulse of the target electrical signal is V1.
In the presence of ambient light but without a signal light source, the electrical signal generated at node S1 is a noise electrical signal corresponding to the ambient light when illuminated by the ambient light. Fig. 7 is a schematic diagram showing a noise electric signal generated by the photoelectric conversion unit under the condition of ambient light and no signal light source. In general, ambient light can be considered constant or slowly varying, and thus, the corresponding noise electrical signal can be approximated as a dc signal with a magnitude of V2, as shown in fig. 7.
Under conditions of illumination by the signal light source and ambient light, an electrical signal containing both the target electrical signal and the noise electrical signal may be generated at node S1. Fig. 8 is a schematic diagram showing an electrical signal generated by the photoelectric conversion unit under the condition of ambient light and a signal light source. As shown in fig. 8, the electrical signal at this time is a pulse signal obtained by superimposing a dc noise electrical signal on the target electrical signal, and the amplitude of the pulse is V3 ═ V1+ V2, and the level at the pulse interval is V2.
The voltage at the node S1 is determined by the current through the resistor R1 (determined by the light intensity) due to photoelectric conversion and the resistance of R1. The stronger the light, the larger the resistance R1, the larger the voltage at node S1. Generally, the intensity of the ambient light is less than the intensity of the signal light source (e.g., flash). Thus, in relative size, V1> V2.
Assume that the turn-on voltage of diode D1 is VT. By selecting an appropriate R1 resistance value, the voltage can be controlled to be V1>VTAnd the value is more than or equal to V2. That is, under ambient light only conditions, the dc noise electrical signal is insufficient to turn on diode D1. D1 is always in the OFF state, and the voltage at node S2 is always 0. However, in the case of only the signal light source, or in the case of both the signal light source and the ambient light, the generated electrical signals (including the target electrical signal and the noise electrical signal) may cause the diode D1 to be turned on and off regularly according to the pulse sequence of the target electrical signal, so as to generate the target pulse signal corresponding to the target electrical signal on the node S2. The target pulse signal has a pulse train in accordance with the target electric signal variation, and the pulse amplitude:
V4＝V1-VTonly a signal light source but no ambient light; and
V4＝V3-VT＝V1+V2-VTthere are both signal light sources and ambient light illumination conditions.
Fig. 9 is a schematic diagram showing the target pulse signal. As shown in FIG. 9, the target pulse signal has a pulse train in accordance with the variation of the target electric signal, differing only in the pulse amplitude V4 ≦ V1.
Here, the diode D1 functions to filter optical noise, and may correspond to the noise filtering unit 421 of fig. 4. In some cases, ambient light is also varied at a frequency, such as a fluorescent lamp, which is negligible compared to the flicker frequency of the signal light source, and thus the noise electrical signal is approximated herein as a dc signal. But at this point the resulting noisy electrical signal may still affect the final logic output. Therefore, the noise electric signal is filtered out by the diode D1, and the reception accuracy is greatly improved.
The cathode of the diode D1 is coupled to the positive input terminal of the comparator CMP, i.e. the target pulse signal is sent to the comparator CMP as its positive input. The comparator CMP has two input terminals, a positive input terminal and a negative input terminal. When the positive input of the comparator CMP is larger than the negative input, a logic high is output, e.g. TTL level 3V, depending on the supply voltage VccOtherwise, a logic low is output, e.g., TTL level 0V.
The negative input terminal of the comparator CMP is coupled to the connection point S3 of the resistor R2 and the capacitor C1. Here, the resistors R2 and C1 may constitute a low pass filter to filter the target pulse signal. A fourier series expansion may be used for any signal f (t):
Figure 828350DEST_PATH_GDA0001010704350000101
therefore, after being filtered by the low-pass filter, only the direct current component passes through ideally. For an RC filter, the transfer function is
Figure 745491DEST_PATH_GDA0001010704350000102
Figure 525228DEST_PATH_GDA0001010704350000103
Omega is the frequency of the input signal,
Figure 920437DEST_PATH_GDA0001010704350000104
when ω is 0, | H (j ω) | is 1, and when ω ≠ 0, gain 0 < | H (j ω) | < 1. In practical circuits, the RC low-pass filter does not filter out all frequency components except dc, so that, after low-pass filtering, an approximate dc component in the target pulse signal is output at the node S3, and the amplitude thereof is between 0 and V4, depending on the R2 and C1 values. Fig. 10 is a diagram showing a filtered signal of the target pulse signal, i.e., V5.
The filtered signal at node S3 is input to the negative input of comparator CMP. The comparator CMP may output a digital level signal which is a logic level signal, for example, logic 1 is TTL high level (such as 3V) and logic 0 is TTL low level (such as 0V). Fig. 11 is a schematic diagram showing a digital level signal output from the comparator.
The comparator CMP here may correspond to the comparison unit 422 of fig. 4. The low pass filter formed by R2 and C1 raises the reference voltage for comparison for the comparator CMP, and thus can be regarded as a reference voltage generating unit.
Fig. 12 is a block diagram showing components of a light receiving unit 1200 according to a second embodiment of the present invention. Similar to fig. 5, the light receiving unit 1200 may include a phototransistor Q1 to convert an optical signal into an electrical signal. Alternatively, other photosensitive devices such as photodiodes may be used as the photoelectric conversion units.
The light receiving unit 1200 may further include a capacitor C1 and a resistor R1. The collector of the phototransistor Q1 is coupled to a power supply voltage Vcc (e.g., 5V), the emitter of the phototransistor Q1 is coupled to one terminal of a resistor R1 and one terminal of a capacitor C1, and the other terminal of the resistor R1 is grounded.
The light receiving unit 1200 may further include a voltage dividing resistor and a transistor Q2. The other end of the capacitor C1 is coupled to the divider resistor intermediate node. The voltage dividing resistor includes resistors R2 and R3. The intermediate node of R2 and R3 is also coupled to the base of transistor Q2. The other ends of R2 and R3 are coupled to the supply voltage Vcc and ground, respectively. The emitter of the transistor Q2 is grounded, and the collector thereof is coupled to the power supply voltage through a resistor R4 and is also used for outputting the digital level signal Vout.
Similar to that described above with reference to fig. 5, when none of the light (including the signal light source and ambient light) illuminates the phototransistor Q1, the phototransistor Q1 is in the off state, no current passes, and the voltage at node S1 is 0.
When light strikes the phototransistor Q1 (e.g., a signal light source, an ambient light source, or both), a current is generated through the phototransistor Q1 due to the photoelectric effect, which in turn causes the voltage at node S1 to fluctuate. This voltage fluctuation at node S1 represents the corresponding electrical signal generated as a result of the photoelectric conversion.
The values of the voltage dividing resistors R2, R3 determine the base voltage at the node S4
Figure 111640DEST_PATH_GDA0001010704350000111
It will be readily appreciated that in the absence of light illuminating phototransistor Q1, the base voltage is the bias voltage for transistor Q2.
The target light signal of the signal light source is high frequency flickering. In an ideal case, i.e., in the absence of ambient light, the generated electrical signal at S1 is the target electrical signal corresponding to the target optical signal, which is a pulse sequence of high and low levels.
In the presence of ambient light but without a signal light source, the electrical signal generated at node S1 is a noise electrical signal corresponding to the ambient light when illuminated by the ambient light. In general, ambient light may be considered to be constant or vary slowly, and thus, the corresponding noise electrical signal may approximate a dc signal.
Under conditions of illumination by the signal light source and ambient light, an electrical signal containing both the target electrical signal and the noise electrical signal may be generated at node S1. The electric signal at this time is a pulse signal obtained by superimposing a dc noise electric signal on the target electric signal.
The capacitor C1 plays the roles of alternating current and direct current. That is, the dc component in the electrical signal cannot reach the node S4. As described above, the noise electric signal is a direct current signal, or an approximately direct current signal. Thus, the capacitor C1 can effectively filter out the noise electrical signal. Therefore, C1 functions to filter the noise electrical signal, corresponding to noise filtering unit 421 of fig. 4. The target pulse signal arriving at node S4 approximates the target electrical signal, e.g., having a pulse sequence that is consistent with the target electrical signal variations.
By setting a voltage dividing resistor, the basic voltage V can be setBase ofThe on voltage is set to be smaller than Q2 and larger than Q2 after superimposing the voltage of the target pulse signal. Thus, the transistor Q2 may be turned on and off regularly according to a pulse sequence of the target electrical signal. By turning on and off the transistor Q2, a corresponding digital level signal Vout is output at the collector.
In the present embodiment, the transistor Q2 outputs a digital level signal by comparing the voltage at the node S4 with the self-turn-on voltage, which may correspond to the comparing unit 422 of fig. 4. Since the reference voltage is the turn-on voltage of the transistor Q2 itself, the comparing unit 222 can be regarded as including the reference voltage generating unit itself or as a part of the comparing unit.
Fig. 13 is a block diagram showing components of a light receiving unit 1300 according to a third embodiment of the present invention. Similar to fig. 12, the light receiving unit 1300 may include a phototransistor Q1 to convert an optical signal into an electrical signal. Alternatively, other photosensitive devices such as photodiodes may be used as the photoelectric conversion units.
The light receiving unit 1300 may further include a capacitor C1 and a resistor R1. The collector of the phototransistor Q1 is coupled to a power supply voltage Vcc (e.g., 5V), the emitter of the phototransistor Q1 is coupled to one terminal of a resistor R1 and one terminal of a capacitor C1, and the other terminal of the resistor R1 is grounded.
The light receiving unit 1300 may further include a first voltage dividing resistor and a comparator CMP. The other end of the capacitor C1 is coupled to the divider resistor intermediate node. The first divider resistor includes resistors R2 and R3. The intermediate node of R2 and R3 is also coupled to the positive input terminal of the comparator CMP. The other ends of R2 and R3 are coupled to the supply voltage Vcc and ground, respectively.
The light receiving unit 1300 may further include a second voltage dividing resistor including resistors R4 and R5. The negative input terminal of the comparator CMP may be coupled to the middle node of the second voltage-dividing resistor, and the other ends of R4 and R5 are coupled to the power supply voltage Vcc and ground, respectively.
The circuits of fig. 13 and 12 are the same from the left side up to the node S4, i.e., the target pulse signal may be generated at the node S4. The difference is that the comparison and output are performed using the comparator CMP as the comparison unit in fig. 13. That is, the target pulse signal is input to the positive input terminal of the comparator CMP. The negative input terminal of the comparator CMP is coupled to the middle node of the second divider resistor, i.e. the junction of R4 and R5, to receive a reference voltage for comparison. In this sense, the second voltage-dividing resistor may be regarded as a reference voltage generating unit.
It is easily understood that the reference voltage input to the negative input terminal of the comparator CMP may be between the peak and the valley of the pulse train of the target pulse signal. Thus, the CMP may output a logic level signal reflecting the digital logic of the target optical signal emitted by the signal light source.
Although specific embodiments have been described herein for purposes of illustration, it will be readily understood that the aspects of the present invention are not limited to such specific embodiments. Some components described with reference to particular embodiments may not be required, may have alternative components, or may have additional components. For example, the comparator in the first embodiment described with reference to fig. 5 may be implemented by a triode or other comparison means.
Those of skill in the art will appreciate that the various illustrative logical blocks, modules, circuits, and algorithms described in connection with the embodiments disclosed herein may be implemented as electronic hardware, instructions stored in a memory or another computer-readable medium and executed by a processor or other processor device, or combinations thereof. The memory disclosed herein may be any type and size of memory and may be configured to store any type of information as desired. To clearly illustrate this interchangeability, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. How such functionality is implemented depends upon the particular application, design choices, and/or design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a processor, a DSP, an Application Specific Integrated Circuit (ASIC), an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
Embodiments disclosed herein may be implemented as hardware and instructions stored in hardware, which may reside, for example, in Random Access Memory (RAM), flash memory, read-only memory (ROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC.
The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (14)

1. An optical chip, comprising:
a photoelectric conversion unit for receiving an optical signal and generating an electrical signal by photoelectric conversion;
an optical noise removing unit coupled to the photoelectric conversion unit for removing optical noise in the electrical signal to output a digital level signal, wherein the optical noise removing unit includes a noise filtering unit and a clamping resistor,
the input end of the noise filtering unit receives the electric signal from the photoelectric conversion unit, the noise filtering unit is used for filtering out a noise electric signal generated by ambient light in the electric signal and outputting a target pulse signal at the output end, the noise filtering unit comprises a diode,
the clamping resistor clamps the voltage on the anode of the diode to a voltage level which is less than the conduction voltage of the diode under the condition of no signal light source irradiation and is more than the conduction voltage of the diode under the condition of signal light source irradiation; and
and the decoding unit is used for outputting information bits according to the level inversion condition of the digital level signal so as to obtain transmission data.
2. The optical chip of claim 1, wherein the decoding unit comprises:
a decision unit outputting an information bit 1 in response to the level inversion and outputting an information bit 0 in response to the level maintenance; alternatively, the first and second electrodes may be,
the decision unit outputs an information bit 0 in response to the level inversion and outputs an information bit 1 in response to the level maintenance.
3. The optical chip of claim 2, wherein the level flip includes both a low to high flip and a high to low flip.
4. The optical chip of claim 1, wherein the optical noise removal unit further comprises:
a comparison unit, a first input end of the comparison unit is coupled to an output end of the noise filtering unit to receive the target pulse signal, and the comparison unit is used for outputting the digital level signal according to comparison between the target pulse signal and a reference voltage.
5. The optical chip of claim 4, wherein an anode of the diode is coupled to the photoelectric conversion unit and a cathode of the diode is coupled to the first input terminal of the comparison unit.
6. The optical chip of claim 5, wherein the clamping resistor is connected in series with the photoelectric conversion unit, a first terminal of the clamping resistor is coupled to one terminal of the photoelectric conversion unit and the anode of the diode, a second terminal of the clamping resistor is connected to ground, and another terminal of the photoelectric conversion unit is connected to a power supply voltage.
7. The optical chip of claim 5, wherein the optical noise removal unit further comprises:
a reference voltage generating unit including a resistor and a capacitor to constitute a low pass filter, one end of the resistor being coupled to a cathode of the diode, the other end being coupled to one end of the capacitor and a second input terminal of the comparing unit to provide the reference voltage, and the other end of the capacitor being grounded.
8. The optical chip of claim 4, wherein the noise filtering unit comprises:
a coupling capacitor having a first terminal coupled to the photoelectric conversion unit and a second terminal coupled to the first input terminal of the comparison unit.
9. The optical chip of claim 8, wherein the optical noise removal unit further comprises:
a first voltage dividing resistor, a first node of the first voltage dividing resistor is coupled to a power supply voltage, a second node is coupled to ground, and an intermediate node is coupled to the second terminal of the coupling capacitor and the first input terminal of the comparing unit, wherein a voltage at the intermediate node is less than the reference voltage in the absence of the signal light source and greater than the reference voltage in the presence of the signal light source.
10. The optical chip of claim 4, wherein the comparison unit comprises:
a comparator having a positive input terminal that is the first input of the comparison unit and a negative input terminal that receives the reference voltage.
11. The optical chip of claim 10, wherein the optical noise removal unit further comprises:
a reference voltage generation unit coupled to the negative input terminal of the comparator to provide the reference voltage.
12. The optical chip of claim 11, wherein the reference voltage generation unit comprises:
a second voltage-dividing resistor having a first node coupled to a supply voltage, a second node coupled to ground, and an intermediate node coupled to the negative input terminal of the comparator to provide the reference voltage.
13. The optical chip of claim 4, wherein the comparison unit comprises:
a triode, a base of which is the first input terminal of the comparing unit and is coupled to an output terminal of the noise filtering unit, an emitter of which is grounded, and a collector of which is coupled to a power voltage through a resistor, the collector being used for outputting the digital level signal, wherein the reference voltage is a turn-on voltage of the triode.
14. An optical chip, comprising:
a photoelectric conversion unit for receiving an optical signal and generating an electrical signal by photoelectric conversion;
an optical noise removing unit coupled to the photoelectric conversion unit for removing optical noise in the electrical signal to output a digital level signal, wherein the optical noise removing unit includes:
the noise filtering unit is used for filtering a noise electric signal generated due to ambient light in the electric signal and outputting a target pulse signal at an output end, and comprises a coupling capacitor, and a first end of the coupling capacitor is coupled to the photoelectric conversion unit;
a comparison unit, a first input end of the comparison unit is coupled to an output end of the noise filtering unit to receive the target pulse signal, a second end of the coupling capacitor is coupled to the first input end of the comparison unit, and the comparison unit is used for outputting the digital level signal according to comparison between the target pulse signal and a reference voltage; and
a first voltage dividing resistor, a first node of the first voltage dividing resistor being coupled to a power supply voltage, a second node being coupled to ground, and an intermediate node being coupled to the second terminal of the coupling capacitor and the first input terminal of the comparing unit, a voltage at the intermediate node being less than the reference voltage in the absence of illumination by the signal light source and greater than the reference voltage in the presence of illumination by the signal light source; and
and the decoding unit is used for outputting information bits according to the level inversion condition of the digital level signal so as to obtain transmission data.
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PCT/CN2017/075622 WO2017152811A1 (en) 2016-03-08 2017-03-03 Optical noise removal circuit, optical receiver, and optical chip
KR1020187026169A KR102057726B1 (en) 2016-03-08 2017-03-03 Lighting Noise Reduction Circuit, Receiver, and Lighting Chip
JP2018547393A JP6955505B2 (en) 2016-03-08 2017-03-03 Optical noise elimination electric circuit, optical receiver and optical chip
EP17762497.0A EP3429097B1 (en) 2016-03-08 2017-03-03 Optical noise removal circuit, optical receiver, and optical chip
US16/122,884 US10567088B2 (en) 2016-03-08 2018-09-06 Optical noise removal circuit, optical receiver, and optical chip

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