WO2017084243A1 - 悬空led光波导光电探测器单片集成器件及其制备方法 - Google Patents

悬空led光波导光电探测器单片集成器件及其制备方法 Download PDF

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WO2017084243A1
WO2017084243A1 PCT/CN2016/080091 CN2016080091W WO2017084243A1 WO 2017084243 A1 WO2017084243 A1 WO 2017084243A1 CN 2016080091 W CN2016080091 W CN 2016080091W WO 2017084243 A1 WO2017084243 A1 WO 2017084243A1
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electrode
optical waveguide
region
photodetector
layer
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王永进
朱桂遐
白丹
袁佳磊
许银
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Nanjing University of Posts and Telecommunications
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    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122Basic optical elements, e.g. light-guiding paths
    • HELECTRICITY
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    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
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    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
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    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/811Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • H10H20/812Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
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    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/815Bodies having stress relaxation structures, e.g. buffer layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035Materials
    • G02B2006/12061Silicon
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24Coupling light guides
    • G02B6/42Coupling light guides with opto-electronic elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/032Manufacture or treatment of electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/832Electrodes characterised by their material

Definitions

  • the invention belongs to the field of information materials and devices, and relates to a monolithic integrated device for a suspended LED optical waveguide photodetector and a preparation technique thereof.
  • Nitride materials can simultaneously have the functions of illuminating, transmitting and detecting. Therefore, the development of monolithically integrated planar photonic devices based on silicon substrate nitride materials has become a possibility.
  • the silicon waveguide substrate is peeled off, and an optical waveguide device having high light confinement characteristics can be realized by utilizing the high refractive index property of the nitride material.
  • the performance of suspended nitride LEDs and photodetectors will also be greatly improved.
  • the light emitted by the LED device is laterally coupled into the optical waveguide, transmitted through the optical waveguide, and detected by the photodetector at the other end of the waveguide, realizing a planar photonic monolithic integrated device for the development of nitride photons for optical communication and optical sensing. And the foundation of optical MEMS devices.
  • the present invention provides a monolithic integrated device for a suspended LED optical waveguide photodetector, which integrates a light source, an optical waveguide and a photodetector on the same chip, and the light emitted by the LED device is laterally coupled into the optical waveguide and passes through the light.
  • the waveguide transmission is detected by the photodetector at the other end of the waveguide to realize a planar photonic monolithic integrated device.
  • the invention also provides a method of preparing the device.
  • the monolithic integrated device of the suspended LED optical waveguide photodetector of the present invention comprises a silicon-based nitride wafer as a carrier, a silicon substrate layer, an epitaxial buffer layer disposed on the silicon substrate layer, and the epitaxial buffer layer disposed on the epitaxial buffer layer
  • the LED device and the photodetector are each composed of a pn junction, a p-electrode and an n-electrode,
  • the pn junction includes an n-GaN layer, an InGaN/GaN quantum well, and a p-GaN layer which are sequentially connected from bottom to top, and the p-electrode is disposed on the p-GaN layer, and the surface of the n-GaN layer is engraved on the surface
  • An etched stepped mesa comprising
  • the p-electrode, the n-electrode, and the optical waveguide are positioned opposite each other and penetrate the cavity of the silicon substrate layer, the epitaxial buffer layer, and the bottom surface of the n-GaN layer, so that the LED device, the photodetector, and the optical waveguide are suspended.
  • the p-electrode is composed of a suspended p-electrode region, a p-electrode conductive region and a p-electrode lead region which are sequentially connected;
  • the electrode consists of an interconnected n-electrode conducting region and an n-electrode lead region, the cavity being below the optical waveguide and the two suspended p-electrode regions.
  • the LED device, the optical waveguide and the photodetector are all realized on the nitride layer of the silicon-based nitride wafer.
  • the isolation trench is formed by etching the optical waveguide from the p-GaN layer to the n-GaN layer.
  • the p-electrode and the n-electrode are both Ni/Au electrodes, that is, the deposited metal material is Ni/Au.
  • the method for preparing the above-mentioned suspended LED optical waveguide photodetector monolithic integrated device of the present invention comprises the following steps:
  • Step (1) thinning and polishing the silicon substrate layer behind the silicon-based nitride wafer
  • Step (2) uniformly coating a surface of the silicon-based nitride wafer with a photoresist, and defining an optical waveguide region and an n-GaN step region on the photoresist layer by an exposure technique, wherein the n-GaN step region includes Countertop and upper deck;
  • Step (3) etching the n-GaN step region and the optical waveguide region by using a reactive ion beam
  • Step (4) removing the residual photoresist to obtain a stepped mesa, an optical waveguide, a p-GaN layer of the LED device on the upper mesa, a p-GaN layer of the photodetector, an InGaN/GaN quantum well of the LED device, and photodetection InGaN/GaN quantum wells;
  • Step (5) uniformly coating a surface of the silicon-based nitride wafer with a layer of photoresist, and lithography defines a p-electrode window region of the LED device on the upper mesa and a p-electrode window region of the photodetector, located under The n-electrode window region of the mesa of the LED device and the n-electrode window region of the photodetector are then vapor-deposited Ni/Au in the p-electrode window region and the n-electrode window region respectively to form an ohmic contact, thereby realizing p- After the electrode and the n-electrode are removed, the LED device and the photodetector are obtained after removing the residual photoresist;
  • Step (6) uniformly coating a surface of the silicon-based nitride wafer with a photoresist, and lithographically defining an isolation trench window region between the LED device and the photodetector and dividing the optical waveguide region in the optical waveguide region ;
  • Step (7) using a reactive ion beam to etch the nitride layer from top to bottom to the n-GaN layer to obtain an isolation trench;
  • Step (8) is coated on the top of the silicon-based nitride wafer to prevent damage to the surface device during the etching process, and a layer of photoresist is spin-coated on the lower surface of the silicon substrate layer of the silicon-based nitride wafer, using back alignment technology Defining an etched window behind the suspended p-electrode region of the optical waveguide, the suspended p-electrode region of the LED device, and the photodetector;
  • Step (10) adopting a nitride back thinning etching technique to perform a nitride thinning treatment on the epitaxial buffer layer and the n-GaN layer from bottom to top;
  • Step (11) removes the residual photoresist, thereby obtaining a monolithically integrated device of the suspended LED optical waveguide photodetector.
  • the vapor deposition Ni/Au in the step (5) is realized by a stripping process and a nitrogen annealing technique at a temperature control of 500 ⁇ 5° C.
  • the nitride back thinning etching technique is an ion beam bombardment or a reactive ion beam etching technique.
  • the p-electrode window region defined in the step (5) includes a suspended p-electrode region window, a p-electrode conductive region window, and a p-electrode lead region window, which are sequentially connected
  • the n-electrode window region includes an n-electrode conductive region window and an n-electrode lead region window that are connected to each other.
  • the invention transfers the LED, the optical waveguide and the photodetector to the top nitride device layer through the exposure technology and the nitride etching process.
  • the isolation trench is defined, and the isolation trench is in the isolation trench region.
  • the optical waveguide is etched up and down to the n-GaN layer.
  • the anisotropic silicon etching technique is used to strip and remove the silicon substrate layer and the epitaxial buffer layer under the device structure, and further use the nitride back thinning etching technology to obtain ultra-thin silicon substrate floating LED, optical waveguide and photodetector Chip integrated device.
  • the silicon substrate of the invention suspends the LED, the optical waveguide and the photodetector monolithic integrated device, and integrates the LED, the optical waveguide and the photodetector with the separate LED, optical waveguide and photodetector integrated with different materials.
  • the LED device emits light
  • the planar waveguide transmission of photons and the perception of the photodetector are integrated on the same wafer, which simplifies the manufacturing process, reduces the difficulty, and solves the problem of planar photonic monolithic integration.
  • the device of the invention integrates the light source, the optical waveguide and the photodetector on the same chip, and the light emitted by the LED device is laterally coupled into the optical waveguide, transmitted through the optical waveguide, and detected by the photodetector at the other end of the waveguide to realize planar photons.
  • Monolithic integrated device
  • the single-chip integrated device of the suspended LED optical waveguide photodetector of the invention uses the isolation trench to isolate the LED light source device and the photodetector in a plane, thereby reducing mutual interference between the devices.
  • the single-chip integrated device of the suspended LED optical waveguide photodetector of the invention can be compatible with the silicon processing technology, and can realize the planar photonic integrated device for the optical communication and optical sensing in the visible light band.
  • FIG. 1 is a schematic view showing the structure of a monolithic integrated device of a silicon substrate floating LED, an optical waveguide, and a photodetector according to the present invention.
  • FIG. 2 is a top plan view of a monolithically integrated device of a silicon substrate suspended LED, an optical waveguide, and a photodetector of the present invention.
  • FIG. 3 is a flow chart showing the fabrication of a monolithic integrated device of a silicon substrate floating LED, an optical waveguide, and a photodetector according to the present invention.
  • the figure includes: 1-silicon substrate layer: 2-epitaxial buffer layer; 3-n-GaN; 4-n-electrode; 5-InGaN/GaN quantum well; 6-p-GaN layer; 7-p-electrode; 8-optical waveguide; 9-suspended p-electrode region; 10-p-electrode conductive region; 11-p-electrode lead region; 12-n-electrode conductive region; 13-n-electrode lead region.
  • FIG. 1 and 2 are schematic views showing the structure of a monolithic integrated device of a silicon substrate floating LED, an optical waveguide and a photodetector according to the present invention.
  • the monolithically integrated device is supported by a silicon-based nitride wafer, comprising a silicon substrate layer 1, an epitaxial buffer layer 2 disposed on the silicon substrate layer 1, an LED device disposed on the epitaxial buffer layer 2, and photodetection
  • the LED device and the photodetector are connected by an optical waveguide 8; the LED device and the photodetector are each composed of a pn junction, a p-electrode 7 and an n-electrode 4, the pn junction including from bottom to top
  • the n-GaN layer 3, the InGaN/GaN quantum well 5, and the p-GaN layer 6 are sequentially connected, and the p-electrode 7 is disposed on the p-GaN layer 6, and the surface of the n-Ga
  • An etched stepped mesa comprising a lower mesa and an upper mesa on the lower mesa, the upper mesa being connected to a bottom surface of the InGaN/GaN quantum well 5, the n-electrode 4 being disposed on the lower mesa;
  • the optical waveguide 8 is provided with an isolation trench divided into two parts, one part is connected to the LED device, and the other part is connected to the photodetector, and the p-electrode 7 is disposed under the n-GaN layer 3.
  • the n-electrode 4 and the optical waveguide 8 are positioned opposite each other and penetrate through the silicon substrate layer 1, the epitaxial buffer layer 2, and the bottom surface of the n-GaN layer 3 , So that the LED, the photodetector and the optical waveguide 8 vacant.
  • the p-electrode 7 is composed of a suspended p-electrode region 9, a p-electrode conductive region 10 and a p-electrode lead region 11 which are sequentially connected.
  • the n-electrode 4 is connected to the n-electrode conductive region 12 It consists of an n-electrode lead region 13 which is below the optical waveguide 8 and the two suspended p-electrode regions 9.
  • the suspended LED optical waveguide photodetector monolithic integrated device of the present invention in the InGaN/GaN quantum well 5, indium gallium nitride InGaN and gallium nitride GaN are deposited to form a quantum well layer.
  • the floating LED optical waveguide photodetector monolithic integrated device of the invention is realized on the nitride layer of the silicon-based nitride wafer, and the optical waveguide is connected with the LED and the photodetector .
  • the floating LED optical waveguide photodetector monolithic integrated device of the present invention is formed by the optical waveguide 8 being etched downward from the p-GaN layer 6 to the n-GaN layer 3, and the broken optical waveguide 8 is respectively Connected to LEDs and photodetectors.
  • the p-electrode and the n-electrode of the LED device are both Ni/Au electrodes, that is, the deposited metal material is a nickel-gold alloy Ni/Au.
  • the method for preparing the above-mentioned silicon substrate floating LED, optical waveguide and photodetector monolithic integrated device of the invention comprises the following steps:
  • n-GaN step region includes a lower mesa and On the countertop;
  • n-electrode window region of the LED device on the upper mesa and a p-electrode window region of the photodetector, and a lower mesa
  • the n-electrode window region of the LED device and the n-electrode window region of the photodetector are then vapor-deposited Ni/Au respectively in the p-electrode window region and the n-electrode window region to form an ohmic contact, thereby realizing the p-electrode 7 And the n-electrode 4, after removing the residual photoresist, the LED device and the photodetector are obtained;

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Abstract

一种悬空LED光波导光电探测器单片集成器件及其制备方法,该器件利用各向异性硅刻蚀技术,剥离去除器件结构下硅衬底层(1),得到悬空氮化物薄膜LED光波导探测器单片集成器件,进一步采用氮化物背后减薄刻蚀技术,获得超薄的硅衬底悬空LED光波导探测器单片集成器件。将光源、光波导(8)和光电探测器集成在同一芯片上,LED器件发出的光,侧向耦合进光波导(8),通过光波导(8)传输,在波导(8)另一端被光电探测器检测到,实现平面光子单片集成器件,应用于光通信和光传感领域。

Description

悬空LED光波导光电探测器单片集成器件及其制备方法 技术领域
本发明属于信息材料与器件领域,涉及一种悬空LED光波导光电探测器单片集成器件及其制备技术。
背景技术
氮化物材料特别是GaN材料可以同时具备发光、传输及探测的功能。因此,基于硅衬底氮化物材料发展单片集成的平面光子器件成为一种可能。剥离硅衬底,利用氮化物材料的高折射率特性,可以实现高光限制特性的光波导器件。同时,悬空氮化物LED和光电探测器的性能也会得到大幅度提升。基于硅衬底的氮化物材料,利用的硅刻蚀加工技术,进行硅衬底剥离,进一步减薄悬空氮化物薄膜,获得超薄氮化物单片集成器件,将LED、光波导和光电探测器集成于同一芯片上。LED器件发出的光,侧向耦合进光波导,通过光波导传输,在波导另一端被光电探测器检测到,实现平面光子单片集成器件,为发展面向光通信、光传感的氮化物光子及光学微机电器件奠定了基础。
发明内容
技术问题:本发明提供一种悬空LED光波导光电探测器单片集成器件,将光源、光波导和光电探测器集成在同一芯片上,LED器件发出的光,侧向耦合进光波导,通过光波导传输,在波导另一端被光电探测器检测到,实现平面光子单片集成器件。本发明同时提供一种该器件的制备方法。
技术方案:本发明的悬空LED光波导光电探测器单片集成器件,以硅基氮化物晶片为载体,包括硅衬底层、设置在所述硅衬底层上的外延缓冲层、设置在所述外延缓冲层上的LED器件和光电探测器,所述LED器件和光电探测器之间通过光波导相连;所述LED器件和光电探测器均由p-n结、p-电极和n-电极组成,所述p-n结包括从下至上依次连接设置的n-GaN层、InGaN/GaN量子阱和p-GaN层,所述p-电极设置在p-GaN层上,在所述n-GaN层上表面有刻蚀出的阶梯状台面,所述阶梯状台面包括下台面和位于下台面上的上台面,所述上台面与InGaN/GaN量子阱的底面连接,所述n- 电极设置在下台面上;在所述光波导上设置有一个将其分割为两部分的隔离槽,一部分与LED器件连接,另一部分与光电探测器连接,在所述n-GaN层下方设置有与p-电极、n-电极和光波导的位置正对且贯穿硅衬底层、外延缓冲层至n-GaN层底面的空腔,使得LED器件、光电探测器和光波导悬空。
进一步的,本发明的悬空LED光波导光电探测器单片集成器件中,所述p-电极由依次连接的悬空p-电极区、p-电极导电区和p-电极引线区组成;所述n-电极由相互连接的n-电极导电区和n-电极引线区组成,所述空腔处于光波导和两个悬空p-电极区的下方。
进一步的,本发明的悬空LED光波导光电探测器单片集成器件中,所述LED器件、光波导和光电探测器均在硅基氮化物晶片的氮化物层上实现。
进一步的,本发明的悬空LED光波导光电探测器单片集成器件中,所述隔离槽是将光波导从p-GaN层向下刻蚀至n-GaN层形成的。
进一步的,本发明的悬空LED光波导光电探测器单片集成器件中,所述p-电极和n-电极均为Ni/Au电极,即沉积的金属材料为Ni/Au。
本发明的制备上述悬空LED光波导光电探测器单片集成器件的方法,包括以下步骤:
步骤(1)在硅基氮化物晶片背后对硅衬底层进行减薄抛光;
步骤(2)在硅基氮化物晶片上表面均匀涂上一层光刻胶,采用曝光技术在光刻胶层上定义出光波导区域和n-GaN台阶区域,所述n-GaN台阶区域包括下台面和上台面;
步骤(3)采用反应离子束刻蚀n-GaN台阶区域和光波导区域;
步骤(4)去除残余光刻胶,得到阶梯状台面、光波导、位于上台面的LED器件的p-GaN层、光电探测器的p-GaN层、LED器件的InGaN/GaN量子阱和光电探测器的InGaN/GaN量子阱;
步骤(5)在硅基氮化物晶片上表面均匀涂上一层光刻胶,光刻定义出位于上台面的LED器件的p-电极窗口区域和光电探测器的p-电极窗口区域、位于下台面的LED器件的n-电极窗口区域和光电探测器的n-电极窗口区域,然后在所述p-电极窗口区域与n-电极窗口区域分别蒸镀Ni/Au,形成欧姆接触,实现p-电极与n-电极,去除残余光刻胶后,即得到LED器件和光电探测器;
步骤(6)在硅基氮化物晶片上表面均匀涂上一层光刻胶,在光波导区域光刻定义出位于LED器件和光电探测器之间、并将光波导区域分割的隔离槽窗口区域;
步骤(7)采用反应离子束从上向下刻蚀氮化物层至n-GaN层,得到隔离槽;
步骤(8)在硅基氮化物晶片顶层涂胶保护,防止刻蚀过程中损伤表面器件,在硅基氮化物晶片的硅衬底层下表面旋涂一层光刻胶层,利用背后对准技术,定义出一个对准并覆盖光波导、LED器件的悬空p-电极区和光电探测器的悬空p-电极区的背后刻蚀窗口;
步骤(9)将外延缓冲层作为刻蚀阻挡层,利用背后深硅刻蚀技术,通过背后刻蚀窗口将所述硅衬底层贯穿刻蚀至外延缓冲层的下表面,形成一个空腔;
步骤(10)采用氮化物背后减薄刻蚀技术,从下往上对外延缓冲层和n-GaN层进行氮化物减薄处理;
步骤(11)去除残余光刻胶,即获得悬空LED光波导光电探测器单片集成器件。
进一步的,本发明制备方法中,所述步骤(5)中的蒸镀Ni/Au,采用剥离工艺和温度控制在500±5℃的氮气退火技术实现。
进一步的,本发明制备方法中,所述步骤(10)中,所述氮化物背后减薄刻蚀技术为离子束轰击或反应离子束刻蚀技术。
进一步的,本发明制备方式中,所述步骤(5)中定义的p-电极窗口区域包括依次连接的悬空p-电极区窗口、p-电极导电区窗口和p-电极引线区窗口,所述n-电极窗口区域包括相互连接的n-电极导电区窗口和n-电极引线区窗口。
本发明通过曝光技术和氮化物刻蚀工艺,将LED、光波导和光电探测器转移到顶层氮化物器件层,为了防止LED器件和光电探测器的互相干扰,定义隔离槽,在隔离槽区域从上向下刻蚀光波导至n-GaN层。利用各向异性硅刻蚀技术,剥离去除器件结构下硅衬底层和外延缓冲层,进一步采用氮化物背后减薄刻蚀技术,获得超薄的硅衬底悬空LED、光波导和光电探测器单片集成器件。
有益效果:本发明与现有技术相比,具有以下优点:
本发明的硅衬底悬空LED、光波导和光电探测器单片集成器件,相较于其他不同材质的分离的LED、光波导和光电探测器集成,将LED、光波导和光电探测器集成于同一芯片上,LED器件发光、光子的平面波导传输及光电探测器的感知集成于同一片晶圆上,简化了制作工艺,降低了难度,解决了平面光子单片集成的难题。
本发明器件将光源、光波导和光电探测器集成在同一芯片上,LED器件发出的光,侧向耦合进光波导,通过光波导传输,在波导另一端被光电探测器检测到,实现平面光子单片集成器件
本发明的悬空LED光波导光电探测器单片集成器件,使用隔离槽使LED光源器件和光电探测器在平面内隔离,降低器件之间的相互干扰。
本发明的悬空LED光波导光电探测器单片集成器件,其制备技术可以与硅加工技术兼容,可实现面向可见光波段光通信、光传感的平面光子集成器件。
附图说明
图1是本发明硅衬底悬空LED、光波导和光电探测器单片集成器件结构示意图。
图2是本发明硅衬底悬空LED、光波导和光电探测器单片集成器件俯视图。
图3是本发明硅衬底悬空LED、光波导和光电探测器单片集成器件的制造流程图。
图中有:1-硅衬底层:;2-外延缓冲层;3-n-GaN;4-n-电极;5-InGaN/GaN量子阱;6-p-GaN层;7-p-电极;8-光波导;9-悬空p-电极区;10-p-电极导电区;11-p-电极引线区;12-n-电极导电区;13-n-电极引线区。
具体实施方式
下面结合实施例和说明书附图对本发明作进一步的说明。
图1、图2给出了本发明的硅衬底悬空LED、光波导和光电探测器单片集成器件的结构示意图。该单片集成器件以硅基氮化物晶片为载体,包括硅衬底层1、设置在所述硅衬底层1上的外延缓冲层2、设置在所述外延缓冲层2上的LED器件和光电探测器,所述LED器件和光电探测器之间通过光波导8相连;所述LED器件和光电探测器均由p-n结、p-电极7和n-电极4组成,所述p-n结包括从下至上依次连接设置的n-GaN层3、InGaN/GaN量子阱5和p-GaN层6,所述p-电极7设置在p-GaN层6上,在所述n-GaN层3上表面有刻蚀出的阶梯状台面,所述阶梯状台面包括下台面和位于下台面上的上台面,所述上台面与InGaN/GaN量子阱5的底面连接,所述n-电极4设置在下台面上;在所述光波导8上设置有一个将其分割为两部分的隔离槽,一部分与LED器件连接,另一部分与光电探测器连接,在所述n-GaN层3下方设置有与p-电极7、n-电极4和光波导8的位置正对且贯穿硅衬底层1、外延缓冲层2至n-GaN层3底面的空腔,使得LED、光电探测器和光波导8悬空。进一步的,本发明的悬空LED光波导光电探测器单片集成器件中,所述p-电极7由依次连接的悬空p-电极区9、p-电极导电区10和p-电极引线区11组成;所述n-电极4由相互连接的n-电极导电区12 和n-电极引线区13组成,所述空腔处于光波导8和两个悬空p-电极区9的下方。
本发明的悬空LED光波导光电探测器单片集成器件,所述的InGaN/GaN量子阱5中,铟氮化镓InGaN与氮化镓GaN间隔沉积形成量子阱层。
本发明的悬空LED光波导光电探测器单片集成器件,所述LED器件、光波导和光电探测器均在硅基氮化物晶片的氮化物层上实现,光波导与LED及光电探测器均连接。
本发明的悬空LED光波导光电探测器单片集成器件,所述隔离槽是光波导8从p-GaN层6向下刻蚀至n-GaN层3形成的,被断开的光波导8分别与LED和光电探测器相连。
本发明的另一个优选实施例中,LED器件的p-电极和n-电极均为Ni/Au电极,即沉积的金属材料为镍-金合金Ni/Au。
本发明的制备上述硅衬底悬空LED、光波导和光电探测器单片集成器件的方法,包括以下步骤:
1)在硅基氮化物晶片背后对硅衬底层1进行减薄抛光;
2)在硅基氮化物晶片上表面均匀涂上一层光刻胶,采用曝光技术在光刻胶层上定义出光波导区域和n-GaN台阶区域,所述n-GaN台阶区域包括下台面和上台面;
3)采用反应离子束刻蚀n-GaN台阶区域和光波导区域;
4)去除残余光刻胶,得到阶梯状台面、光波导8、位于上台面的LED器件的p-GaN层6、光电探测器的p-GaN层6、LED器件的InGaN/GaN量子阱5和光电探测器的InGaN/GaN量子阱5;
5)在硅基氮化物晶片上表面均匀涂上一层光刻胶,光刻定义出位于上台面的LED器件的p-电极窗口区域和光电探测器的p-电极窗口区域、位于下台面的LED器件的n-电极窗口区域和光电探测器的n-电极窗口区域,然后在所述p-电极窗口区域与n-电极窗口区域分别蒸镀Ni/Au,形成欧姆接触,实现p-电极7与n-电极4,去除残余光刻胶后,即得到LED器件和光电探测器;
6)在硅基氮化物晶片上表面均匀涂上一层光刻胶,在光波导区域光刻定义出位于LED器件和光电探测器之间、并将光波导区域分割的隔离槽窗口区域;
7)采用反应离子束从上向下刻蚀氮化物层至n-GaN层3,得到隔离槽;
8)在硅基氮化物晶片顶层涂胶保护,防止刻蚀过程中损伤表面器件,在硅基氮化物晶片的硅衬底层1下表面旋涂一层光刻胶层,利用背后对准技术,定义出一个对准 并覆盖光波导8、LED器件的悬空p-电极区9和光电探测器的悬空p-电极区9的背后刻蚀窗口;
9)将外延缓冲层2作为刻蚀阻挡层,利用背后深硅刻蚀技术,通过背后刻蚀窗口将所述硅衬底层1贯穿刻蚀至外延缓冲层2的下表面,形成一个空腔;
10)采用氮化物背后减薄刻蚀技术,从下往上对外延缓冲层2和n-GaN层3进行氮化物减薄处理;
11)去除残余光刻胶,即获得硅衬底悬空LED、光波导和光电探测器单片集成器件。
上述实施例仅是本发明的优选实施方式,应当指出:对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和等同替换,这些对本发明权利要求进行改进和等同替换后的技术方案,均落入本发明的保护范围。

Claims (9)

  1. 一种悬空LED光波导光电探测器单片集成器件,其特征在于,该器件以硅基氮化物晶片为载体,包括硅衬底层(1)、设置在所述硅衬底层(1)上的外延缓冲层(2)、设置在所述外延缓冲层(2)上的LED器件和光电探测器,所述LED器件和光电探测器之间通过光波导(8)相连;所述LED器件和光电探测器均由p-n结、p-电极(7)和n-电极(4)组成,所述p-n结包括从下至上依次连接设置的n-GaN层(3)、InGaN/GaN量子阱(5)和p-GaN层(6),所述p-电极(7)设置在p-GaN层(6)上,在所述n-GaN层(3)上表面有刻蚀出的阶梯状台面,所述阶梯状台面包括下台面和位于下台面上的上台面,所述上台面与InGaN/GaN量子阱(5)的底面连接,所述n-电极(4)设置在下台面上;
    在所述光波导(8)上设置有一个将其分割为两部分的隔离槽,一部分与LED器件连接,另一部分与光电探测器连接,在所述n-GaN层(3)下方设置有与p-电极(7)、n-电极(4)和光波导(8)的位置正对且贯穿硅衬底层(1)、外延缓冲层(2)至n-GaN层(3)底面的空腔,使得LED器件、光电探测器和光波导(8)悬空。
  2. 根据权利要求1所述的悬空LED光波导光电探测器单片集成器件,其特征在于,所述p-电极(7)由依次连接的悬空p-电极区(9)、p-电极导电区(10)和p-电极引线区(11)组成;所述n-电极(4)由相互连接的n-电极导电区(12)和n-电极引线区(13)组成,所述空腔处于光波导(8)和两个悬空p-电极区(9)的下方。
  3. 根据权利要求1所述的悬空LED光波导光电探测器单片集成器件,其特征在于,所述LED器件、光波导(8)和光电探测器均在硅基氮化物晶片的氮化物层上实现。
  4. 根据权利要求1所述的悬空LED光波导光电探测器单片集成器件,其特征在于,所述隔离槽是将光波导(8)从p-GaN层(6)向下刻蚀至n-GaN层(3)形成的。
  5. 根据权利要求1、2、3或4所述的悬空LED光波导光电探测器单片集成器件,其特征在于,所述p-电极(7)和n-电极(4)均为Ni/Au电极,即沉积的金属材料为Ni/Au。
  6. 一种制备权利要求1至5所述悬空LED光波导光电探测器单片集成器件的方法,其特征在于,该方法包括以下步骤:
    步骤(1)在硅基氮化物晶片背后对硅衬底层(1)进行减薄抛光;
    步骤(2)在硅基氮化物晶片上表面均匀涂上一层光刻胶,采用曝光技术在光刻胶层上定义出光波导区域和n-GaN台阶区域,所述n-GaN台阶区域包括下台面和上台面;
    步骤(3)采用反应离子束刻蚀n-GaN台阶区域和光波导区域;
    步骤(4)去除残余光刻胶,得到阶梯状台面、光波导(8)、位于上台面的LED器件的p-GaN层(6)、光电探测器的p-GaN层(6)、LED器件的InGaN/GaN量子阱(5)和光电探测器的InGaN/GaN量子阱(5);
    步骤(5)在硅基氮化物晶片上表面均匀涂上一层光刻胶,光刻定义出位于上台面的LED器件的p-电极窗口区域和光电探测器的p-电极窗口区域、位于下台面的LED器件的n-电极窗口区域和光电探测器的n-电极窗口区域,然后在所述p-电极窗口区域与n-电极窗口区域分别蒸镀Ni/Au,形成欧姆接触,实现p-电极(7)与n-电极(4),去除残余光刻胶后,即得到LED器件和光电探测器;
    步骤(6)在硅基氮化物晶片上表面均匀涂上一层光刻胶,在光波导区域光刻定义出位于LED器件和光电探测器之间、并将光波导区域分割的隔离槽窗口区域;
    步骤(7)采用反应离子束从上向下刻蚀氮化物层至n-GaN层(3),得到隔离槽;
    步骤(8)在硅基氮化物晶片顶层涂胶保护,防止刻蚀过程中损伤表面器件,在硅基氮化物晶片的硅衬底层(1)下表面旋涂一层光刻胶层,利用背后对准技术,定义出一个对准并覆盖光波导(8)、LED器件的悬空p-电极区(9)和光电探测器的悬空p-电极区(9)的背后刻蚀窗口;
    步骤(9)将外延缓冲层(2)作为刻蚀阻挡层,利用背后深硅刻蚀技术,通过背后刻蚀窗口将所述硅衬底层(1)贯穿刻蚀至外延缓冲层(2)的下表面,形成一个空腔;
    步骤(10)采用氮化物背后减薄刻蚀技术,从下往上对外延缓冲层(2)和n-GaN层(3)进行氮化物减薄处理;
    步骤(11)去除残余光刻胶,即获得悬空LED光波导光电探测器单片集成器件。
  7. 根据权利要求6所述的制备悬空LED光波导光电探测器单片集成器件的方法,其特征在于,所述步骤(5)中的蒸镀Ni/Au,采用剥离工艺和温度控制在500±5℃的氮气退火技术实现。
  8. 根据权利要求6所述的制备悬空LED光波导光电探测器单片集成器件的方法,其特征在于,所述步骤(10)中,所述氮化物背后减薄刻蚀技术为离子束轰击或反应离子束刻蚀技术。
  9. 根据权利要求6、7或8所述的制备悬空LED光波导光电探测器单片集成器件 的方法,其特征在于,所述步骤(5)中定义的p-电极窗口区域包括依次连接的悬空p-电极区窗口、p-电极导电区窗口和p-电极引线区窗口,所述n-电极窗口区域包括相互连接的n-电极导电区窗口和n-电极引线区窗口。
PCT/CN2016/080091 2015-11-20 2016-04-23 悬空led光波导光电探测器单片集成器件及其制备方法 Ceased WO2017084243A1 (zh)

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