WO2017076118A1 - 一种用于iii-v族化合物器件的键合结构 - Google Patents

一种用于iii-v族化合物器件的键合结构 Download PDF

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WO2017076118A1
WO2017076118A1 PCT/CN2016/097804 CN2016097804W WO2017076118A1 WO 2017076118 A1 WO2017076118 A1 WO 2017076118A1 CN 2016097804 W CN2016097804 W CN 2016097804W WO 2017076118 A1 WO2017076118 A1 WO 2017076118A1
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layer
bonding layer
bonding
nano
metal
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PCT/CN2016/097804
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蒙成
吴俊毅
陶青山
王笃祥
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天津三安光电有限公司
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Priority to US15/967,604 priority Critical patent/US20180248095A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/641Heat extraction or cooling elements characterized by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system

Definitions

  • the present invention relates to a rapid heat dissipation bonding structure for a ⁇ - ⁇ compound device, and a light emitting diode using the same.
  • the GaN-based light-emitting diode mainly uses a sapphire substrate as a growth substrate, and the AlGalnP-based light-emitting diode mainly grows a substrate with GaAs, but the thermal conductivity of sapphire and GaAs are neither it is good.
  • a flip-chip structure (shown in Figure 1) is proposed in the prior art. This type of LED structure bonds the epitaxial wafer and the conductive substrate together by a metal bonding layer. In the flip-chip structure described above, an Au-Au structure is generally used. If the bonding temperature is too high, the mirror structure such as an A1 mirror or an Ag mirror is destroyed, which affects the specular reflectance.
  • Chinese patent document CN 101604714A proposes to improve this problem by using Au-In low temperature bonding.
  • the thermal conductivity of In is very low (82-86W/mk), which is not conducive to the heat dissipation of the device from the bonded structure.
  • the present invention provides a bonding structure for a III-V compound device, which has the same characteristics of low temperature bonding and rapid heat dissipation.
  • a bonding structure for a III-V compound device comprising a first metal bonding layer and a second metal bonding layer. Implanting a nano-guide inside the second metal bonding layer a thermal film, the nano-thermally conductive film is wrapped by the second metal-bonding layer, the thermal conductivity of which is greater than the thermal conductivity of the second metallic bonding layer, and the material of the second bonding layer has a sufficiently low hardness In order to completely infiltrate the nano-thermally conductive film and reduce the interface contact resistance.
  • the second metal bonding layer has a melting point of less than 350 °C.
  • the second metal bonding layer is an indium bonding layer, a tin bonding layer or a lead bonding layer.
  • the first metal bonding layer is a gold bonding layer
  • the second metal bonding layer is an indium bonding layer
  • the nano-thermally conductive film is a carbon nanotube layer or a graphene film layer.
  • the nano-thermally conductive film is a layer of carbon nanotubes or a plurality of layers of carbon nanotubes.
  • the nano-thermally conductive film is a single-layer graphene film layer or a multi-layer graphene film layer stack.
  • the nano-thermally conductive film is an alternating stack of a carbon nanotube layer and a graphene film layer, wherein the topmost layer and the lowest layer are graphene film layers.
  • the present invention also provides a light emitting diode using the above bonding structure, comprising a light emitting epitaxial layer stack and a conductive substrate, wherein the light emitting epitaxial layer is bonded to the conductive substrate through a bonding structure.
  • the thermal conductivity of the nano-film layer implanted in the second metal bonding layer is much greater than the thermal conductivity of the second metal bonding layer material, and is completely contained in the film layer, and must not be in direct contact with the substrate or the epitaxial laminate.
  • 1 is a side cross-sectional view showing a conventional flip-chip LED structure.
  • FIG. 2 is a side cross-sectional view showing a light emitting diode structure of the first embodiment.
  • FIG 3 is a side cross-sectional view showing a bonding structure for a III-V compound device disclosed in the second embodiment.
  • FIG. 4 is a side cross-sectional view showing a bonding structure for a III-V compound device disclosed in the third embodiment.
  • ODR omnidirectional mirror
  • the following embodiments disclose a rapid heat dissipation bonding structure for a III-V compound device and a light emitting diode using the same.
  • a low melting point material is used as the bonding layer, and a nano thermal conductive film having a thermal conductivity much larger than the bonding layer is implanted inside the low melting point bonding layer, thereby achieving two characteristics of low temperature bonding and rapid heat dissipation.
  • the material of the bonding layer is made of a low-hardness material (such as indium, tin or lead), and the nano-thermally conductive film is easily infiltrated and the interface contact resistance is reduced.
  • a light emitting diode includes a conductive substrate 210, a bonding structure 220, an omnidirectional mirror 230, and a light emitting epitaxial stack 240.
  • the conductive substrate 210 is made of a material having a high thermal conductivity, and generally a Si substrate is used.
  • the bonding structure 220 is composed of a first metal bonding layer 221 and a second metal bonding layer; the omnidirectional mirror 230 is composed of a metal reflective layer 231.
  • the light-emitting epitaxial stack 24 includes, but is not limited to, a first semiconductor layer 241, an active layer 242, and a second semiconductor layer 243. The specific structure of the bonding structure 220 will be described in detail below.
  • the bonding structure 220 is an Au-In structure, wherein the first metal bonding layer 221 is an Au bonding layer, and the second metal bonding layer 222 is an In bonding layer, which is implanted in the In bonding layer.
  • a carbon nanotube layer is used as the heat conductive film, which is a single layer structure which is completely covered in the In bonding layer.
  • the In melting point is low for low-temperature bonding
  • the graphene film layer having a thermal conductivity much larger than In is encapsulated in the In bonding layer (In the thermal conductivity of 82 to 86, The thermal conductivity of graphene is 4400-5780)
  • In is very soft (hardness is 1.2), it is easier to completely infiltrate the graphene film layer, which not only reduces the interface contact resistance, but also can quickly conduct heat.
  • the nano-thermally conductive film is arranged in the longitudinal direction of the multi-walled carbon nanotube layer 2221, and the heat dissipation function of the carbon nanotubes is arranged in an anisotropy and a length direction, and the heat is arranged.
  • the exchange performance is good.
  • the nano-thermally conductive film is a carbon nanotube layer 2221 and a graphene film layer 222.

Abstract

一种用于III-V族化合物器件的键合结构(220)及采用该键合结构的发光二极管。键合结构包括第一金属粘结层(221)和第二金属粘结层(222),其特征在于:第二金属粘结层内部植入纳米导热膜,纳米导热膜由第二金属粘结层完全包裹,其导热系数大于第二金属粘结层的导热系数,以达到低温键合的同时快速散热。

Description

一种用于 III- V族化合物器件的键合结构 技术领域
[0001] 本发明涉及一种用于 πι-ν族化合物器件的快速散热键合结构, 和一种采用该键 合结构的发光二极管。
背景技术
[0002] 随着 III_V族化合物半导体光电器件的发展, 散热特性成为影响器件特性的主 要要素之一。 在发光二极管中, 当外加电流通入红光 LED后, 部分电能会变成热 育 , 芯片温度会由原先的室温升到 85°C以上, 亮度对温度的衰减率约为 -0.87%/d egC, 同吋发光波长会随着温度升高而往长波长漂移 (以红光 LED为例, 红光波 段波长每增加 lnm, 亮度衰减 4%左右) 。 因此如果芯粒产生的热能及吋散掉, 那么芯片就会一直保持室温, 波长不会漂移, 亮度也就不会衰减。
[0003] 在现有的发光二极管的生长衬底中, GaN基发光二极管主要以蓝宝石衬底作为 生长衬底, AlGalnP系发光二极管主要以 GaAs生长衬底, 然而蓝宝石和 GaAs的 导热导电性均不好。 现有技术中提出一种倒装结构 (如图 1所示) , 该类型 LED 结构靠金属粘结层将外延晶片和导电基板粘合在一起。 在上述倒装结构中一般 采用 Au-Au结构, 该键合温度过高会破坏 A1镜或 Ag镜等镜面结构, 影响镜面反 射率。 中国专利文献 CN 101604714A提出一通过采用 Au-In低温键合改善这一问 题。 但是 In的热导率很低 (82-86W/mk) , 不利于器件的热量快散从键合结构 中导出。
技术问题
问题的解决方案
技术解决方案
[0004] 针对上述问题, 本发明提供了一种用于 III-V族化合物器件的键合结构, 其同吋 具备低温键合和快速散热两大特性。
[0005] 本发明解决上述问题的技术方案为: 一种用于 III- V族化合物器件的键合结构, 包括第一金属粘结层和第二金属粘结层。 所述第二金属粘结层内部植入纳米导 热膜, 所述纳米导热膜由所述第二金属合层完合包裹, 其导热系数大于所述第 二金属粘结层的导热系数, 所述第二粘结层的材料具有足够低的硬度, 以将所 述纳米导热膜完全浸润, 减小界面接触电阻。
[0006] 优选的, 所述第二金属粘结层的熔点低于 350°C。
[0007] 优选地, 所述第二金属粘结层为铟粘结层、 锡粘结层或铅粘结层。
[0008] 优选地, 所述第一金属粘结层为金粘结层, 所述第二金属粘结层为铟粘结层。
[0009] 优选地, 所述纳米导热膜为碳纳米管层或石墨烯膜层。
[0010] 优选地, 所述纳米导热膜为一层碳纳米管层或是多层碳纳米管叠加。
[0011] 优选地, 所述纳米导热膜为单层石墨烯膜层或多层石墨烯膜层叠加。
[0012] 优选地, 所述纳米导热膜为碳纳米管层和石墨烯膜层的交替叠加, 其中最顶层 和最低层为石墨烯膜层。
[0013] 本发明还提供一种采用上述键合结构的发光二极管, 其包括发光外延叠层和导 电基板, 其中所述发光外延叠层通过一键合结构连结所述导电基板。 其中植入 第二金属粘结层的纳米膜层热导率远大于第二金属粘结层材料的导热性, 且完 全包含在其膜层内, 不得与基板或是外延叠层直接接触。
发明的有益效果
对附图的简要说明
附图说明
[0014] 附图用来提供对本发明的进一步理解, 并且构成说明书的一部分, 与本发明的 实施例一起用于解释本发明, 并不构成对本发明的限制。 此外, 附图数据是描 述概要, 不是按比例绘制。
[0015] 图 1为现有一种倒装发光二极管结构的侧面剖视图。
[0016] 图 2为第一个实施例公幵的一种发光二极管结构的侧面剖视图。
[0017] 图 3为第二个实施例公幵的一种用于 III-V族化合物器件的键合结构的侧面剖视 图。
[0018] 图 4为第三个实施例公幵的一种用于 III-V族化合物器件的键合结构的侧面剖视 图。
[0019] 图中标号: [0020] 110、 210: 导电基板; 120、 220: 键合结构; 130: 全方位反射镜 (ODR) 131 、 231: 金属反射层; 132、 232: 介电层; 141、 241: 第一半导体层; 142、 242 : 有源层; 133、 233: 第二半导体层; 221 : 第一金属粘结层; 222: 第二金属 粘结层; 2221 : 碳纳米管层; 2222: 石墨烯膜层。
本发明的实施方式
[0021] 面结合示意图对本发明的键合结构进行详细的描述, 借此对本发明如何应用技 术手段来解决技术问题, 并达成技术效果的实现过程能充分理解并据以实施。 需要说明的是, 只要不构成冲突, 本发明中的各个实施例以及各实施例中的各 个特征可以相互结合, 所形成的技术方案均在本发明的保护范围之内。
[0022] 下面各实施例公幵一种用于 III-V族化合物器件的快速散热键合结构及采用该键 合结构的发光二极管。 采用低熔点的材料作为粘结层, 并在该低熔点粘结层内 部植入导热系数远大于该粘结层的纳米导热膜, 从而实现低温键合和快速散热 两大特性。 其中粘结层的材料选用低硬度材料 (如铟、 锡或铅等, ) , 比较容 易将纳米导热膜完全浸润, 减小界面接触电阻。
[0023] 实施例 1
[0024] 请参看附图 2, 一种发光二极管, 包括导电基板 210、 键合结构 220、 全方位反 射镜 230和发光外延叠层 240。 其中, 导电基板 210采用导热系数高的材料, 一般 采用 Si基板即可; 键合结构 220由第一金属粘结层 221和第二金属粘结层组成; 全 方位反射镜 230由金属反射层 231和低折射底的介电层 232构成; 发光外延叠层 24 0—般包括但不限于第一半导体层 241、 有源层 242和第二半导体层 243。 下面对 键合结构 220的具体结构作详细说明。
[0025] 具体地, 键合结构 220为 Au-In结构, 其中第一金属粘结层 221为 Au粘结层, 第 二金属粘结层 222为 In粘结层, 在 In粘结层中植入高热导率纳米膜层, 该纳米膜 层热导率越大越好且必须大于铟金属。 在本例中, 采用碳纳米管层作为导热膜 , 其为单层结构, 其完合包覆于 In粘结层内。
[0026] 在上述键合结构中, In熔点低适合低温键合, 同吋将热导率远大于 In的石墨烯 膜层包裹在 In粘结层内 (In的热导率为 82~86, 石墨烯的热导率为 4400-5780) ) , In非常软 (硬度为 1.2) , 比较容易将石墨烯膜层完全浸润, 既减小界面接触 电阻, 又能快速导热。
[0027] 实施例 2
[0028] 请参看附图 3, 在本实施例中, 纳米导热膜为多层碳纳米管层 2221沿长度方向 排布, 由碳纳米管散热功能各向异性, 延长度方向排布, 其热交换性能好。
[0029] 实施例 3
[0030] 请参看附图 4, 在本实施例中, 纳米导热膜为碳纳米管层 2221和石墨烯膜层 222
2的交替叠加, 其中最顶层和最低层为石墨烯膜层。 采用此种结构, 可以使靠近 发光外延叠层的热量以最快的速度从外延导出, 同吋靠近外侧的高热导率膜层 可使底部热量快速从芯粒导出。

Claims

权利要求书
一种用于 III- V族化合物器件的键合结构, 包括第一金属粘结层和第二 金属粘结层, 其特征在于: 所述第二金属粘结层内部植入纳米导热膜 , 所述纳米导热膜由所述第二金属合层完全包裹, 其导热系数大于所 述第二金属粘结层的导热系数, 所述第二粘结层的材料具有足够低的 硬度, 以将所述纳米导热膜完全浸润, 减小界面接触电阻。
根据权利要求 1所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述第二金属粘结层的熔点低于 350°C。
根据权利要求 2所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述第二金属粘结层为铟粘结层、 锡粘结层或铅粘结层。 根据权利要求 1所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述第一金属粘结层为金粘结层, 所述第二金属粘结层为铟 粘结层。
根据权利要求 1所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述纳米导热膜为碳纳米管层或石墨烯膜层。
根据权利要求 1所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述纳米导热膜为一层碳纳米管层或是多层碳纳米管叠加。 根据权利要求 6所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述纳米管层沿延长度方向排布。
根据权利要求 1所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述纳米导热膜为单层石墨烯膜层或多层石墨烯膜层叠加。 根据权利要求 1所述的一种用于 III-V族化合物器件的键合结构, 其特 征在于: 所述纳米导热膜为碳纳米管层和石墨烯膜层的交替叠加, 其 中最顶层和最低层为石墨烯膜层。
一种发光二极管, 包括发光外延叠层和导电基板, 其中所述发光外延 叠层通过一键合结构连结所述导电基板, 其特征在于: 所述键合结构 , 包括第一金属粘结层和第二金属粘结层, 所述第二金属粘结层内部 植入纳米导热膜, 所述纳米导热膜由所述第二金属合层完合包裹, 其 导热系数大于所述第二金属粘结层的导热系数, 所述第二粘结层的材 料具有足够低的硬度, 以将所述纳米导热膜完全浸润, 减小界面接触 电阻。
[权利要求 11] 根据权利要求 10所述的发光二极管, 其特征在于: 所述第一金属粘结 层为金粘结层, 所述第二金属粘结层为铟粘结层。
[权利要求 12] 根据权利要求 10所述的发光二极管, 其特征在于: 所述纳米导热膜为 碳纳米管层和石墨烯膜层的交替叠加, 其中石墨烯膜层紧靠所述发光 外延叠层和导电基板。
PCT/CN2016/097804 2015-11-06 2016-09-01 一种用于iii-v族化合物器件的键合结构 WO2017076118A1 (zh)

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