WO2017074315A1

WO2017074315A1 - Detection of device connection

Info

Publication number: WO2017074315A1
Application number: PCT/US2015/057589
Authority: WO
Inventors: Chien-Lung LIAO; Chun-hua HUANG; Chih-Chieh Wang; Te-Yuan Li; Vincent Nguyen
Original assignee: Hewlett Packard Enterprise Development Lp
Priority date: 2015-10-27
Filing date: 2015-10-27
Publication date: 2017-05-04

Abstract

A server system may comprise a mainboard and a riser card. The mainboard may include a computing unit, a riser slot connected with the computing unit, and a reference resistor. The reference resistor may connect with a sense pin of the riser slot at one end and may be applied a voltage at another end. The riser card may connect with the riser slot through an interface. The riser card may include a grounding resistor connected with a sense terminal of the interface, and the sense terminal may be connected with the sense pin.

Description

DETECTION OF DEVICE CONNECTION BACKGROUND

[0001] In computer industry, riser cards are often used to allow adding expansion devices to a server system in an orientation that is parallel to a mainboard of the server system. A riser card may be inserted into a riser slot of the mainboard and can provide additional Peripheral Component Interconnect Express (PCIe) slots for connection of expansion devices, such as, PCIe cards.

BRIEF DESCRIPTION OF THE DRAWINGS

[0002] FIG. 1 is a diagram illustrating an example system architecture.

[0003] FIG. 2A is a diagram illustrating an example detection of device connection according to the present disclosure.

[0004] FIG. 2B is a diagram illustrating an example detection of device connection according to the present disclosure.

[0005] FIG. 3 is a diagram illustrating an example detection of device connection according to the present disclosure.

[0006] FIG. 4 is a diagram illustrating an example detection of device connection according to the present disclosure.

DETAILED DESCRIPTION

[0007] FIG. 1 illustrates an example system architecture which may include a server system 100. The server system 100 may include a mainboard 1 10 and one or more riser card, such as, a riser card A 120. A computing unit 1 12 may be installed on the mainboard 1 10. The computing unit 1 12 may be a chip, a processor, a Field Programmable Gate Array (FPGA), a Main Control Unit (MCU), etc. The mainboard 1 10 may further include one or more riser slots, such as a riser slot 1 14. A riser card can be inserted into a riser slot so as to electrically connect to a mainboard. For example, the riser card A 120 may be inserted into the riser slot 1 14 via an interface 122 which may include a plurality of terminals. A riser card may include one or more PCIe slots. A PCIe card may be inserted into a PCIe slot of a riser card so as to electrically connect to the riser card. For example, PCIe cards 142, 144 and 146 may be inserted into PCIe slots 124, 126 and 128 of the riser card A 120 respectively. The server system 100 shown in FIG. 1 is only an example. According to practical requirements, the server system may include more than one riser slot and more than one riser card, and a riser card may include different number of PCIe slots.

[0008] The server system 100 may need to detect what riser cards and what PCIe cards are connecting when these devices are inserted into respective slots.

[0009] The example system architecture in FIG. 1 may implement a conventional scheme for detection of device connection. In a general design, X+Y physical pins of a computing unit on a mainboard need to be assigned for detecting connections of a riser card and its relevant PCIe cards. The X physical pins of the computing unit may be used for detecting 2^X kinds of riser cards that can be supported by a riser slot. For example, if a riser slot can support two kinds of riser cards, X may be set to 1 , and if a riser slot can support four kinds of riser cards, X may be set to 2. The Y physical pins of the computing unit may be used for detecting a total number of Y PCIe cards that a riser card can support. As shown in FIG. 1 , one pin, P1 1 , of the computing unit 1 12 may be used for detecting connections of two kinds of riser cards, here X=1 . As an example, FIG. 1 shows that the riser card A 120 is connecting. Three pins, P12, P13 and P14, of the computing unit 1 12 may be used for detecting connections of the PCIe cards 142, 144 and 146 respectively, here Y=3. Thus, a total number of four pins of the computing unit 1 12 are occupied for detection of device connection relevant to the riser slot 1 14.

[0010] According to a general design, X physical pins of a riser slot on a mainboard need to be assigned for detecting connection of 2^X kinds of riser cards, and Y physical pins of the riser slot need to be assigned for detecting connections of Y PCIe cards respectively, here Y is also the number of PCIe slots in the riser card. For example, in FIG. 1 , a total number of four pins of the riser slot 1 14 are occupied for detection of device connection, wherein one pin, P21 , is used for detecting connection of the riser card A 120, and three pins, P22, P23 and P24, are used for detecting connections of the PCIe cards 142, 144 and 146 respectively. [001 1] The server system in FIG.1 may include more than one riser slot, such as a riser slot 1 16, and the above design for detection of device connection described in connection with the riser slot 1 14 could also be applied on the riser slot 1 16 or any other riser slot in a similar way (not shown).

[0012] The present disclosure proposes examples for detection of device connection utilizing only one sense pin of a riser slot and accordingly only one pin of a computing unit to detect connections of a riser card and related PCIe cards. For example, different voltages at the sense pin of the riser slot could be used by the computing unit for determining different connections of the riser card and the PCIe cards. Thus, the present disclosure could save more pin counts on the computing unit and the riser slot. This could avoid cost burden in manufacturing of a server system, achieve simple signal routing arrangement on Printed Circuit Board (PCB) of a server system, and improve signal integrity.

[0013] FIG. 2A illustrates an example detection of device connection according to the present disclosure.

[0014] As shown in FIG. 2A, a server system 200 may include a mainboard 210. The mainboard 210 may include a computing unit 212, a riser slot 214 connected with the computing unit 212, and a reference resistor R0. The riser slot 214 may include at least one pin. The reference resistor R0 may connect with a sense pin among the at least one pin of the riser slot 214 at one end. The reference resistor R0 may connect with a voltage source, such as a VCC voltage source, at another end, and thus may be applied a voltage 216.

[0015] The riser card A 220 may include an interface 222. When the interface 222 is inserted into the riser slot 214, the riser card A 220 can electrically connect with the riser slot 214. The interface 222 may include at least one connecting terminal. One terminal among the at least one connecting terminal may be assigned as a sense terminal. The riser card A 220 may include a grounding resistor R1 connected with the sense terminal. Specifically, the grounding resistor R1 may connect with the sense terminal at one end, and connect with the ground at another end. When the riser card A 220 connects with the riser slot 214, the sense terminal in the riser card A 220 may be connected with the sense pin in the riser slot 214. [0016] The computing unit 212 may detect connection of the riser card A 220 with the riser slot 214 by use of a divided voltage at the sense pin generated through voltage dividing between the reference resistor R0 and the grounding resistor R1 . Specifically, if the riser card A 220 is inserted into the riser slot 214 via the interface 222, the sense terminal in the riser card A 220 may be connected with the sense pin in the riser slot 214, and accordingly a circuit line is formed by the voltage 216, the reference resistor R0, the grounding resistor R1 and the ground. The serially connected reference resistor R0 and grounding resistor R1 may cause resistor voltage dividing. For example, the divided voltage at the sense pin in the riser slot 214 is a voltage divided by the grounding resistor R1 from the voltage 216. The divided voltage at the sense pin may be calculated as follows:

Vs=P X R1/(R1 +R0)

Equation (1 )

where Vs is the divided voltage, P is a value of the voltage 216, R1 is a resistance value of the grounding resistor R1 , and R0 is a resistance value of the reference resistor R0.

[0017] When the riser card A 220 is inserted into the riser slot 214, the divided voltage Vs may be generated at the sense pin of the riser slot 214. Since the divided voltage is caused by the riser card A 220, this voltage could be used by the computing unit 212 for detecting that the riser card A 220 is connecting.

[0018] According to the above example, only one pin of the computing unit 212 and only one sense pin of the riser slot 214 are occupied for obtaining the divided voltage at the sense pin of the riser slot 214 and further detecting the connection of the riser card A 220.

[0019] According to an example, as shown in FIG. 2B, the server system 200 may further include a riser slot 218. The riser slot 218 may include at least one pin. A reference resistor R0' may connect with a sense pin among the at least one pin of the riser slot 218 at one end, and may connect with the voltage source at another end and thus may be applied the voltage 216. [0020] A riser card B 230 may be inserted into the riser slot 218 via an interface 232, and thus electrically connect with the riser slot 218. One terminal among at least one connecting terminal of the interface 232 may be assigned as a sense terminal of the interface 232. The riser card B 230 may include a grounding resistor R2 connected with the sense terminal of the interface 232. When the riser card B 230 connects with the riser slot 218, the sense terminal in the riser card B 230 may be connected with the sense pin in the riser slot 218.

[0021] The computing unit 212 may detect connection of the riser card B 230 with the riser slot 218 by use of a second divided voltage at the sense pin in the riser slot 218 generated through voltage dividing between the reference resistor R0' and the grounding resistor R2. The resistance values of the reference resistor R0' and the grounding resistor R2 may be set such that the second divided voltage is different from the divided voltage at the sense pin in the riser slot 214. That is, the divided voltage at the sense pin in the riser slot 214 is unique to the riser card A 220, and the divided voltage at the sense pin in the riser slot 218 is unique to the riser card B 230. Thus, since the connection of the riser card A 220 and the connection of the riser card B 230 cause different divided voltages at the sense pin in the riser slot 214 and the sense pin in the riser slot 218 respectively, the computing unit 212 may detect which one of the riser card A 220 and the riser card B 230 is connecting based on a voltage obtained at the sense pins of the riser slot 214 and the riser slot 218. Here, only one another pin of the computing unit 212 and only one sense pin of the riser slot 218 are occupied for obtaining the second divided voltage at the sense pin of the riser slot 218.

[0022] According to an example, detection of device connection may further include detecting connections of PCIe cards. FIG. 3 illustrates an example detection of device connection according to the present disclosure.

[0023] As shown in FIG. 3, the server system 300 may include a mainboard 310 and a riser card A 320. The mainboard 310 may include a computing unit 312, a riser slot 314 connected with the computing unit 312, and a reference resistor R0. The riser slot 314 may include at least one pin. The reference resistor R0 may connect with a sense pin among the at least one pin of the riser slot 314 at one end, and may connect with a voltage source at another end and thus may be applied a voltage 316. The riser card A 320 may be inserted into the riser slot 314 via an interface 322, and thus electrically connect with the riser slot 314. One terminal among at least one connecting terminal of the interface 322 may be assigned as a sense terminal of the interface 322. The riser card A 320 may include a grounding resistor R1 connected with the sense terminal of the interface 322. When the riser card A 320 connects with the riser slot 314, the sense terminal in the riser card A 320 may be connected with the sense pin in the riser slot 314.

[0024] According to an example, the riser card A 320 may include at least one PCIe slot. For example, FIG. 3 shows that PCIe slots 324, 326 and 328 may be included in the riser card A 320. The riser card A 320 may further include at least one resistor, wherein each of the at least one resistor may be connected between the sense terminal and one of the at least one PCIe slot. The at least one resistor and the grounding resistor R1 have different resistances from each other. For example, a resistor R1 1 may be connected between the sense terminal and the PCIe slot 324, a resistor R12 may be connected between the sense terminal and the PCIe slot 326, and a resistor R13 may be connected between the sense terminal and the PCIe slot 328.

[0025] A PCIe card can be inserted into a PCIe slot of a riser card so as to electrically connect to the riser card. For example, PCIe cards 332, 334 and 336 may be inserted into the PCIe slots 324, 326 and 328 of the riser card A 320 respectively. Connection of a PCIe card may cause a corresponding resistor in the riser card to be grounded. For example, connection of the PCIe card 332 may cause the resistor R1 1 to be grounded, and similarly, connections of the PCIe cards 334 and 336 may cause the resistors R12 and R13 to be grounded respectively.

[0026] The computing unit 312 may detect connection of one or more PCIe card respectively with one or more PCIe slot by use of a divided voltage at the sense pin. For example, the computing unit 312 may utilize a divided voltage at the sense pin of the riser slot 314 to detect connection of the PCIe card 332 with the PCIe slot 324. The divided voltage may be generated through voltage dividing between the reference resistor RO and a combination of the grounding resistor R1 and one or more resistor in the riser card A 320 corresponding to the one or more PCIe slot.

[0027] Taking the connection of the PCIe card 332 as an example. When the riser card A 320 is inserted into the riser slot 314 and the PCIe card 332 is inserted into the PCIe slot 324, a circuit line is formed by the voltage 316, the reference resistor R0, the grounding resistor R1 , the resistor R1 1 and the ground. The grounding resistor R1 and the resistor R1 1 are connected in parallel, and the combination of the grounding resistor R1 and the resistor R1 1 is serially connected with the reference resistor R0. The serially connected reference resistor R0 and the combination of R1 and R1 1 may cause resistor voltage dividing. For example, the divided voltage at the sense pin in the riser slot 314 is a voltage divided by the combination of R1 and R1 1 from the voltage 316. The divided voltage at the sense pin may be calculated as follows:

Vs=P X Re/(Re+R0)

Equation (2)

where Vs is the divided voltage, P is a value of the voltage 316, Re is a equivalent resistance value of the combination of R1 and R1 1 , and R0 is a resistance value of the reference resistor R0. The value of Re is equal to a resistance value of the parallelly connected R1 and R1 1 , where 1/Re=1 /R1 +1 /R1 1 .

[0028] When the riser card A 320 is inserted into the riser slot 314 and the PCIe card 332 is inserted into the PCIe slot 324, the divided voltage Vs may be generated at the sense pin of the riser slot 314. Since the divided voltage is caused by the connections of the riser card A 320 and the PCIe card 332, this voltage could be used by the computing unit 312 for detecting that both the riser card A 320 and the PCIe card 332 are connecting.

[0029] Moreover, taking the connections of the PCIe card 332 and the PCIe card 334 as another example. When the riser card A 320 is inserted into the riser slot 314, the PCIe card 332 is inserted into the PCIe slot 324 and the PCIe card 334 is inserted into the PCIe slot 326, a circuit line is formed by the voltage 316, the reference resistor R0, the grounding resistor R1 , the resistor R1 1 , the resistor R12 and the ground. The grounding resistor R1 , the resistor R1 1 and the resistor R12 are connected in parallel, and the combination of the grounding resistor R1 , the resistor R1 1 and the resistor R12 is serially connected with the reference resistor R0. The serially connected reference resistor R0 and the combination of R1 , R1 1 and R12 may cause resistor voltage dividing. For example, the divided voltage at the sense pin in the riser slot 314 is a voltage divided by the combination of R1 , R1 1 and R12 from the voltage 316. The divided voltage at the sense pin may also be calculated according to the above Equation (2) except that Re becomes an equivalent resistance value of the parallelly connected R1 , R1 1 and R12, where 1/Re=1/R1 +1 /R1 1 +1/R12.

[0030] When the riser card A 320 is inserted into the riser slot 314, the PCIe card 332 is inserted into the PCIe slot 324 and the PCIe card 334 is inserted into the PCIe slot 326, the divided voltage Vs may be generated at the sense pin of the riser slot 314. Since the divided voltage is caused by the connections of the riser card A 320, the PCIe card 332 and the PCIe card 334, this voltage could be used by the computing unit 312 for detecting that the riser card A 320, the PCIe card 332 and the PCIe card 334 are connecting.

[0031] The present disclosure is not limited to the above examples. Similar detection approach could also be applied for any connection combinations of the PCIe cards 332, 334, 336 with the riser card A 320. The resistance values of R1 , R1 1 , R12 and R13 may be set such that different connection combinations of the riser card and the PCIe cards cause different divided voltages at the sense pin of the riser slot 314. Table 1 shows an example parameter setting for the server system 300 in FIG. 3.

Table 1

[0032] As shown in Table 1 , each of the connection statuses may correspond to a unique divided voltage, and thus this divided voltage could be used for uniquely detecting the corresponding connection status. Thus, according to an example, the computing unit 312 may detect connections of riser card and PCIe cards through a reference voltage table, such as Table 1 , which may indicate correspondences between different connection combinations and divided voltages. All the values in Table 1 are examples, and these values might be changed according to practical requirements.

[0033] Moreover, according to an example, the mainboard 310 may include one or more additional riser slots, and accordingly one or more additional riser cards might connect with the mainboard through the one or more additional riser slots. The above detection approach for the riser card A 320 and its corresponding PCIe cards could also be applied for these additional riser slots, riser cards and their respective PCIe cards in a similar way.

[0034] According to the above examples, only one pin of the computing unit and only one sense pin of a riser slot are occupied for obtaining a divided voltage at the sense pin of the riser slot and further detecting connections of the corresponding riser card and PCIe cards.

[0035] FIG. 4 illustrates an example detection of device connection according to the present disclosure.

[0036] As shown in FIG. 4, the server system 400 may include a mainboard 410 and a riser card A 420. The mainboard 410 may include a computing unit 412, a riser slot 414 connected with the computing unit 412, and a reference resistor R0. The riser slot 414 may include at least one pin. The reference resistor R0 may connect with a sense pin among the at least one pin of the riser slot 414 at one end, and may connect with a voltage source at another end and thus may be applied a voltage 416. The riser card A 420 may be inserted into the riser slot 414 via an interface 422, and thus electrically connect with the riser slot 414. One terminal among at least one connecting terminal of the interface 422 may be assigned as a sense terminal of the interface 422. When the riser card A 420 connects with the riser slot 414, the sense terminal in the riser card A 420 may be connected with the sense pin in the riser slot 414. The riser card A 420 may include at least one PCIe slot. For example, FIG. 4 shows that PCIe slots 424 and 426 may be included in the riser card A 420.

[0037] According to an example, the riser card A 420 may include a multiplexer 428. The multiplexer 428 may be a general digital multiplexer. It is well known that a general digital multiplexer may include one output terminal, one or more input terminals and one or more select terminals, wherein a signal from one of the input terminals may be selected based on a selecting signal from the select terminals and sent to the output terminal. In other words, a different selecting signal may cause a respective input signal to be outputted. For example, if a multiplexer has n select terminals, a selecting signal from these n select terminals could be used for selecting a signal from one of 2" input terminals.

[0038] As shown in FIG. 4, the sense terminal of the interface 422 may connect with an output terminal of the multiplexer 428. The at least one PCIe slot may connect with at least one select terminal of the multiplexer 428 respectively. For example, the PCIe slots 424 and 426 may connect with two select terminals of the multiplexer 428 respectively. Based on whether there is a PCIe card inserted into the PCIe slot 424 and/or the PCIe slot 426, the two select terminals of the multiplexer 428 can provide four different selecting signals. According to an example, the output terminal of the multiplexer 428 may result in different resistor connections based on selecting signals from the at least one select terminal.

[0039] PCIe cards 432 and 434 may be inserted into the PCIe slots 424 and 426 of the riser card A 420 respectively. The computing unit 412 may detect connection of one or more of the PCIe cards 432 and 434 respectively with one or more of the PCIe slots 424 and 426 by use of a divided voltage at the sense pin. The divided voltage may be generated through voltage dividing between the reference resistor R0 and a resistor connection resulted by the output terminal of the multiplexer 428.

[0040] According to an example, the riser card A 420 may include at least one grounding resistor connecting with at least one input terminal of the multiplexer respectively. For example, FIG. 4 shows that four grounding resistors R1 , R1 1 , R12, R13 are connected with four input terminals of the multiplexer 428. A certain status of the selecting signal from the select terminals may enable a corresponding grounding resistor connecting with an input terminal to further connect to the output terminal of the multiplexer 428. For example, if no PCIe card is connecting, the grounding resistor R1 may be enabled to further connect to the output terminal of the multiplexer 428; if the PCIe card 432 is connecting with the PCIe slot 424, the resistor R1 1 may be enabled to further connect to the output terminal of the multiplexer 428; if the PCIe card 434 is connecting with the PCIe slot 426, the resistor R12 may be enabled to further connect to the output terminal of the multiplexer 428; and if the PCIe cards 432 and 434 are connecting with the PCIe slots 424 and 426 respectively, the resistor R13 may be enabled to further connect to the output terminal of the multiplexer 428.

[0041] Taking no connection of both the PCIe card 432 and the PCIe card 434 as an example. When the riser card A 420 is inserted into the riser slot 414 while none of the PCIe card 432 and the PCIe card 434 is connected, the multiplexer 428 may enable the grounding resistor R1 to further connect to the output terminal of the multiplexer 428, thus a circuit line is formed by the voltage 416, the reference resistor R0, and the grounding resistor R1 . The serially connected resistors R0 and R1 may cause resistor voltage dividing. For example, the divided voltage at the sense pin in the riser slot 414 is a voltage divided by the R1 from the voltage 416. The divided voltage Vs at the sense pin may be calculated according to the above Equation (1 ).

[0042] When the riser card A 420 is inserted into the riser slot 414, the divided voltage Vs may be generated at the sense pin of the riser slot 414. Since the divided voltage is caused by the connection of the riser card A 420, this voltage could be used by the computing unit 412 for detecting that the riser card A 420 is connecting.

[0043] Moreover, taking the connection of the PCIe card 432 as an example. When the riser card A 420 is inserted into the riser slot 414 and the PCIe card 432 is inserted into the PCIe slot 424, the multiplexer 428 may enable the grounding resistor R1 1 to further connect to the output terminal of the multiplexer 428, thus a circuit line is formed by the voltage 416, the reference resistor R0, and the grounding resistor R1 1 . The serially connected resistors R0 and R1 1 may cause resistor voltage dividing. For example, the divided voltage at the sense pin in the riser slot 414 is a voltage divided by the R1 1 from the voltage 416. The divided voltage Vs at the sense pin may be calculated according to the above Equation (1 ).

[0044] When the riser card A 420 is inserted into the riser slot 414 and the PCIe card 432 is inserted into the PCIe slot 424, the divided voltage Vs may be generated at the sense pin of the riser slot 414. Since the divided voltage is caused by the connections of the riser card A 420 and the PCIe card 432, this voltage could be used by the computing unit 412 for detecting that both the riser card A 420 and the PCIe card 432 are connecting.

[0045] The present disclosure is not limited to the above examples. Similar detection approach could also be applied for any connection combinations of the PCIe cards 432, 434 with the riser card A 420. The resistance values of R1 , R1 1 , R12 and R13 may be set such that different connection combinations of the riser card and the PCIe cards cause different divided voltages at the sense pin of the riser slot 414.

[0046] According to the above examples, only one pin of the computing unit and only one sense pin of a riser slot are occupied for obtaining a divided voltage at the sense pin of the riser slot and further detecting connections of the corresponding riser card and PCIe cards.

[0047] Although the present disclosure has disclosed some examples in connection with FIGs. 2A, 2B, 3 and 4 in the above, the present disclosure is not limited to any specific approaches for detection of device connection based on a divided voltage. [0048] According to an example, a server system may include a mainboard and a riser card. The mainboard may include a computing unit, a riser slot connected with the computing unit, and a reference resistor. The reference resistor may connect with a sense pin of the riser slot at one end and connect with a voltage source at another end. The riser card may connect with the riser slot through an interface, and may include at least one PCIe slot into which at least one PCIe card can be inserted. The riser card may provide an equivalent resistor corresponding to a connection combination of the riser card and the at least one PCIe card. The computing unit may detect the connection combination of the riser card and the at least one PCIe card by use of a divided voltage at the sense pin generated through voltage dividing between the reference resistor and the equivalent resistor. Besides the examples for generating the divided voltage shown in FIGs. 2A, 2B, 3 and 4, the present disclosure could utilize any equivalent or variant approaches for generating the divided voltage. All these approaches for generating the divided voltage could be adopted by the present disclosure to detect device connection, such as connections of riser cards and PCIe cards.

[0049] According to an example, a mainboard in a server system may include a computing unit, a riser slot connected with the computing unit, and a reference resistor. The reference resistor may connect with a sense pin of the riser slot at one end and connect with a voltage source at another end. The computing unit may detect a connection combination of a riser card connected with the riser slot and at least one PCIe card connected with the riser card by use of a divided voltage at the sense pin generated through voltage dividing between the reference resistor and an equivalent resistor corresponding to the connection combination.

[0050] According to an example, a riser card may include an interface and at least one PCIe slot. The riser card can connect with a mainboard in a server system through the interface. At least one PCIe card can connect with the riser card through the at least one PCIe slot. A connection combination of the riser card connected with the mainboard and the at least one PCIe card connected with the riser card may result in an equivalent resistor connected with a sense terminal of the interface, and the equivalent resistor may cause a divided voltage at the sense terminal corresponding to the connection combination.

[0051] The equivalent resistor in the riser card may be of any forms that could generate resistor voltage dividing with the reference resistor in the mainboard. For example, the equivalent resistor may be any of the R1 in the Equation (1 ) and the Re in the Equation (2).

[0052] According to an example, a server system may include a riser card. The riser card may include: an interface, through which the riser card can connect with a mainboard in the server system; at least one PCIe slot, through which at least one PCIe card can connect with the riser card; and a multiplexer. An output terminal of the multiplexer may connect with a sense terminal of the interface, and the at least one PCIe slot may connect with at least one select terminal of the multiplexer respectively. The output terminal of the multiplexer may result in different resistor connections based on selecting signals from the at least one select terminal. The server system may further include the mainboard. The mainboard may include: a computing unit; a riser slot connected with the computing unit; and a reference resistor connected with a sense pin of the riser slot at one end and connected with a voltage source at another end. The sense terminal of the interface may be connected with the sense pin. The computing unit may detect a connection combination of the riser card connected with the mainboard and one or more PCIe card of the at least one PCIe card connected with the riser card by use of a divided voltage at the sense pin. The divided voltage may be generated through voltage dividing between the reference resistor and a resistor connection resulted by the output terminal of the multiplexer.

[0053] According to an example, a server system may include a mainboard. The mainboard may include: a computing unit; a riser slot connected with the computing unit; and a reference resistor connected with a sense pin of the riser slot at one end and connected with a voltage source at another end. The computing unit may detect a connection combination of a riser card connected with the riser slot and at least one PCIe card connected with the riser card by use of a divided voltage at the sense pin generated through voltage dividing between the reference resistor and an equivalent resistor corresponding to the connection combination. The server system may further include the riser card. The riser card may include: an interface, through which the riser card can connect with the riser slot; and at least one PCIe slot, into which the at least one PCIe card can be inserted. The equivalent resistor may be provided by the riser card and may cause the divided voltage at the sense pin.

[0054] Any of the above examples involving only one riser card connected with a mainboard or only a certain number of PCIe cards connected with a certain number of PCIe slots could be extended to scenarios where there is more than one riser card or different numbers of PCIe slots in a server system and there is different numbers of PCIe cards.

[0055] All the above examples are not intended to limit the present disclosure. Any changes, equivalent replacements and improvements made within the spirit and scope of the present disclosure should be included in the scope of the present disclosure.

Claims

What is claimed is:

1 . A server system, comprising:

a mainboard, including:

a computing unit,

a riser slot connected with the computing unit, and

a reference resistor connected with a sense pin of the riser slot at one end and connected with a voltage source at another end; and a riser card connected with the riser slot through an interface, wherein the riser card includes a grounding resistor connected with a sense terminal of the interface, and the sense terminal is connected with the sense pin.

2. The server system in accordance with claim 1 , wherein

the computing unit is to detect connection of the riser card with the riser slot by use of a divided voltage at the sense pin generated through voltage dividing between the reference resistor and the grounding resistor.

3. The server system in accordance with claim 1 , wherein

the mainboard includes:

a second riser slot connected with the computing unit, and a second reference resistor connected with a second sense pin of the second riser slot at one end and connected with the voltage source at another end, and

wherein the server system includes:

a second riser card connected with the second riser slot through a second interface, wherein the second riser card includes a second grounding resistor connected with a second sense terminal of the second interface, and the second sense terminal is connected with the second sense pin.

4. The server system in accordance with claim 3, wherein

the computing unit is to detect connection of the second riser card with the second riser slot by use of a second divided voltage at the second sense pin generated through voltage dividing between the second reference resistor and the second grounding resistor, wherein the second divided voltage is different from the divided voltage.

5. The server system in accordance with claim 1 , wherein the riser card comprises:

at least one Peripheral Component Interconnect Express (PCIe) slot; and at least one resistor, wherein each of the at least one resistor is connected between the sense terminal and one of the at least one PCIe slot, and the at least one resistor and the grounding resistor have different resistances from each other.

6. The server system in accordance with claim 5, wherein

the computing unit is to detect connection of one or more PCIe card respectively with one or more PCIe slot of the at least one PCIe slot by use of a divided voltage at the sense pin, wherein the divided voltage is generated through voltage dividing between the reference resistor and a combination of the grounding resistor and one or more resistor of the at least one resistor corresponding to the one or more PCIe slot.

7. The server system in accordance with claim 6, wherein the connection of the one or more PCIe card causes the one or more resistor to be grounded respectively.

8. The server system in accordance with claim 6, wherein different connection combinations of the riser card and the one or more PCIe card cause different divided voltages at the sense pin.

9. The server system in accordance with claim 8, wherein

the computing unit is to detect connections of the different connection combinations through a reference voltage table indicating correspondences between the different connection combinations and respective divided voltages.

10. A server system, comprising:

a riser card, including: an interface, through which the riser card can connect with a mainboard in the server system,

at least one Peripheral Component Interconnect Express (PCIe) slot, through which at least one PCIe card can connect with the riser card, and

a multiplexer, wherein an output terminal of the multiplexer connects with a sense terminal of the interface, and the at least one PCIe slot connects with at least one select terminal of the multiplexer respectively, and wherein the output terminal of the multiplexer results in different resistor connections based on selecting signals from the at least one select terminal.

1 1 . The server system in accordance with claim 10, wherein the mainboard includes:

a computing unit;

a riser slot connected with the computing unit; and

a reference resistor connected with a sense pin of the riser slot at one end and connected with a voltage source at another end,

wherein the sense terminal of the interface is connected with the sense pin.

12. The server system in accordance with claim 1 1 , wherein

the computing unit is to detect a connection combination of the riser card connected with the mainboard and one or more PCIe card of the at least one PCIe card connected with the riser card by use of a divided voltage at the sense pin, wherein the divided voltage is generated through voltage dividing between the reference resistor and a resistor connection resulted by the output terminal of the multiplexer.

13. The server system in accordance with claim 12, wherein

the riser card includes at least one grounding resistor connected with at least one input terminal of the multiplexer respectively, and wherein a certain status of the selecting signal enables a corresponding grounding resistor of the at least one grounding resistor to further connect to the output terminal of the multiplexer.

14. A server system, comprising:

a mainboard, including:

a computing unit,

a riser slot connected with the computing unit, and

wherein the computing unit is to detect a connection combination of a riser card connected with the riser slot and at least one PCIe card connected with the riser card by use of a divided voltage at the sense pin generated through voltage dividing between the reference resistor and an equivalent resistor corresponding to the connection combination.

15. The server system in accordance with claim 14, wherein the riser card includes:

an interface, through which the riser card can connect with the riser slot; and

at least one Peripheral Component Interconnect Express (PCIe) slot, into which the at least one PCIe card can be inserted,

wherein the equivalent resistor is provided by the riser card and is capable of causing the divided voltage at the sense pin.