TWI675292B - Motherboard device and server - Google Patents

Motherboard device and server Download PDF

Info

Publication number
TWI675292B
TWI675292B TW107131316A TW107131316A TWI675292B TW I675292 B TWI675292 B TW I675292B TW 107131316 A TW107131316 A TW 107131316A TW 107131316 A TW107131316 A TW 107131316A TW I675292 B TWI675292 B TW I675292B
Authority
TW
Taiwan
Prior art keywords
code
voltage
motherboard
image file
unit
Prior art date
Application number
TW107131316A
Other languages
Chinese (zh)
Other versions
TW202011190A (en
Inventor
張衍輝
陳惠玲
Original Assignee
神雲科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 神雲科技股份有限公司 filed Critical 神雲科技股份有限公司
Priority to TW107131316A priority Critical patent/TWI675292B/en
Application granted granted Critical
Publication of TWI675292B publication Critical patent/TWI675292B/en
Publication of TW202011190A publication Critical patent/TW202011190A/en

Links

Landscapes

  • Stored Programmes (AREA)

Abstract

一種伺服器包含一主機板裝置及一中央處理器,該主機板裝置包括一分壓器及一識別器,該分壓器接收一直流電壓並產生相關的分壓電壓,不同的分壓比例對應不同的分壓電壓,及不同的主機板識別碼,該識別器具有一對照資料庫,該對照資料庫記錄多個對應不同分壓電壓的主機板識別碼及基本輸入輸出系統映像檔,該識別器接收該分壓電壓並將其進行數位轉換以產生一編碼,該編碼對應該等主機板識別碼其中之一,該識別器比對該編碼與該對照資料庫,以得到一對應於該等基本輸入輸出系統映像檔其中之一的目標映像檔,該中央處理器接收並執行該目標映像檔。A server includes a main board device and a central processing unit. The main board device includes a voltage divider and an identifier. The voltage divider receives a DC voltage and generates a related voltage divider. Different voltage divide ratios correspond to each other. With different divided voltages and different motherboard identification codes, the identifier has a comparison database that records multiple motherboard identification codes and basic input-output system image files corresponding to different divided voltages. The identifier Receiving the divided voltage and digitally converting it to generate a code, the code corresponding to one of the motherboard identification codes, the identifier comparing the code with the comparison database to obtain a code corresponding to the basic One of the target image files of the input-output system image file, the central processing unit receives and executes the target image file.

Description

主機板裝置及伺服器Motherboard device and server

本發明是有關於一種伺服器,特別是指一種可辨識主機板的伺服器。 The invention relates to a server, in particular to a server capable of recognizing a motherboard.

伺服器的中央處理器在選擇用以驅動主機板的基本輸入輸出系統(BIOS:Basic Input Output System)驅動程式執行前,需先得知主機板的種類(每一主機板各自有對應的案子(Project name)與版本(Revision))以選擇對應的基本輸入輸出系統驅動程式。 Before selecting the basic input output system (BIOS: Basic Input Output System) driver for the central processing unit of the server, it is necessary to know the type of the motherboard (each motherboard has its own case ( Project name) and version (Revision)) to select the corresponding basic I / O system driver.

目前中央處理器辨別主機板種類是先藉由人工調整電連接到主機板的多組並聯的上拉/下拉電阻(Pull-up/Pull-down resistors)各自導通或不導通使其有所區別(即,以數位代碼0、1區分),即,當每組的上/下拉電阻其中之一導通,則其中另一不導通,舉例來說,若有八個不同的主機板,則每一主機板至少需要連接三組並聯的上/下拉電阻(共有23種組合),其中,可調整第 一個主機板的三組上/下拉電阻中的三個下拉電阻導通,代表000,至於第二個主機板則可調整其第一組上/下拉電阻的上拉電阻導通,並調整其餘兩組上/下拉電阻的下拉電阻導通,代表001,其他主機板依此規則調整,之後再由預先儲存多組可代表每一主機板的上/下拉電阻導通變化的數位代碼及每一數位代碼分別對應的基本輸入輸出系統驅動程式的平台路徑控制器(PCH:Platform Controller Hub)偵測該等上拉/下拉電阻接收直流電壓後對應的產生的數位代碼,並與儲存的該等數位代碼比對出對應的基本輸入輸出系統驅動程式,再由中央處理器載入該基本輸入輸出系統驅動程式以驅動該主機板作動。然而,一旦不同的主機板數量增加,就需要對應增加上拉/下拉電阻數量,增加人工調整上/下拉電阻時的複雜度,此外,也浪費電路板的可用空間,因此,現有偵測主機板的裝置有改善的必要。 At present, the CPU distinguishes the type of the motherboard by manually adjusting the pull-up / pull-down resistors of multiple sets of parallel pull-up / pull-down resistors electrically connected to the motherboard to make a difference ( That is, they are distinguished by digital codes 0 and 1.) That is, when one of the up / down resistors of each group is turned on, the other one is not turned on. For example, if there are eight different motherboards, each host The board needs to connect at least three sets of up / down resistors in parallel (a total of 23 combinations). Among them, the three pull-down resistors of the three sets of up / down resistors on the first motherboard can be adjusted to turn on, representing 000, as for the second Each motherboard can adjust the pull-up resistance of the first group of pull-up / down resistors, and adjust the pull-down resistance of the other two groups of pull-up / down resistors to represent 001. Other motherboards are adjusted according to this rule, and then stored in advance Multiple sets of digital codes that can represent the on / down resistance changes of each motherboard and the platform input controller (PCH: Platform Controller Hub) of the basic I / O system driver corresponding to each digital code to detect such pull-ups / The pull-down resistor receives the corresponding digital code generated after receiving the DC voltage, and compares the corresponding basic I / O system driver with the stored digital code, and the central processor loads the basic I / O system driver to drive The motherboard is activated. However, once the number of different motherboards increases, it is necessary to correspondingly increase the number of pull-up / pull-down resistors, increase the complexity when manually adjusting the pull-up / pull-down resistors, and also waste the available space of the circuit board. Therefore, existing detection motherboards Need to improve the device.

因此,本發明的一目的,即在提供一種僅需透過一組分壓電阻,即可供中央處理器選擇對應主機板種類的基本輸入輸出系統驅動程式的伺服器。 Therefore, it is an object of the present invention to provide a server that allows a central processing unit to select a basic input / output system driver corresponding to the type of a motherboard by only using a set of piezoresistors.

於是,本發明伺服器包含一主機板裝置,及一中央處理器。 Therefore, the server of the present invention includes a motherboard device and a central processing unit.

該主機板裝置包括一分壓器,及一識別器。 The motherboard device includes a voltage divider and an identifier.

該分壓器具有一輸入端及一輸出端,其中該輸入端用以接收一直流電壓,該輸出端對應產生一正比於該直流電壓及一分壓比例的分壓電壓,不同的分壓比例對應不同的分壓電壓,不同的分壓電壓對應不同的主機板識別碼。 The voltage divider has an input terminal and an output terminal, wherein the input terminal is used to receive a DC voltage, and the output terminal correspondingly generates a divided voltage proportional to the DC voltage and a divided voltage ratio, and different divided voltage ratios correspond to Different divided voltages, different divided voltages correspond to different motherboard identification codes.

該識別器電連接該輸出端並具有一對照資料庫,該對照資料庫記錄多個分別對應不同分壓電壓的主機板識別碼,及多個分別對應主機板識別碼的基本輸入輸出系統映像檔,該識別器接收來自該輸出端的該分壓電壓,並將該分壓電壓進行類比至數位轉換,以產生一編碼,該編碼對應該等主機板識別碼其中之一,該識別器比對該編碼與該對照資料庫,以得到一對應該等基本輸入輸出系統映像檔其中之一的目標映像檔。 The identifier is electrically connected to the output terminal and has a comparison database which records a plurality of motherboard identification codes corresponding to different divided voltages and a plurality of basic input and output system image files respectively corresponding to the motherboard identification code. The identifier receives the divided voltage from the output terminal and performs analog-to-digital conversion on the divided voltage to generate a code corresponding to one of the identification codes of the motherboards. Coding with this database to get a pair of target images corresponding to one of the basic I / O system images.

該中央處理器電連接該識別器,以接收並執行該目標映像檔。 The CPU is electrically connected to the identifier to receive and execute the target image file.

又,本發明的另一目的,即在提供一種僅需透過一組分壓電阻,即可供中央處理器選擇對應主機板種類的基本輸入輸出系統驅動程式的主機板裝置。 In addition, another object of the present invention is to provide a motherboard device that allows a central processing unit to select a basic input / output system driver corresponding to the type of motherboard by only using a set of piezoresistors.

於是,本發明主機板裝置適用於一中央處理器,該中央處理器運作於一對應該主機板裝置的工作模式,該主機板裝置包含一分壓器,及一識別器。 Therefore, the motherboard device of the present invention is suitable for a central processing unit that operates in a pair of operating modes corresponding to the motherboard device. The motherboard device includes a voltage divider and an identifier.

該分壓器具有一輸入端及一輸出端,該輸入端接收一直 流電壓,該輸出端產生一正比於該直流電壓及一分壓比例的分壓電壓,其中,不同的分壓比例對應不同的分壓電壓,不同的分壓電壓對應不同的主機板識別碼。 The voltage divider has an input terminal and an output terminal. The output terminal generates a divided voltage proportional to the DC voltage and a divided voltage ratio, wherein different divided voltage ratios correspond to different divided voltages, and different divided voltages correspond to different motherboard identification codes.

該識別器電連接該輸出端與該中央處理器,並具有一對照資料庫,該對照資料庫記錄多個分別對應不同分壓電壓的主機板識別碼,及多個分別對應主機板識別碼的基本輸入輸出系統映像檔,該識別器接收來自該分壓器的該分壓電壓,並將該分壓電壓進行類比至數位轉換,以產生一編碼,該編碼對應該多個主機板識別碼其中之一,該識別器並根據該編碼與該對照資料庫比對,以得到一所對應該編碼的的基本輸入輸出系統映像檔以作為一目標映像檔,該中央處理器根據該目標映像檔運作於該工作模式。 The identifier is electrically connected to the output terminal and the central processing unit, and has a comparison database which records a plurality of motherboard identification codes corresponding to different divided voltages and a plurality of motherboard identification codes respectively corresponding to the motherboard identification codes. A basic input-output system image file. The identifier receives the divided voltage from the voltage divider and performs analog-to-digital conversion on the divided voltage to generate a code corresponding to multiple motherboard identification codes. One, the identifier is compared with the comparison database according to the code to obtain a basic input-output system image file corresponding to the code as a target image file, and the central processing unit operates according to the target image file In this mode of operation.

本發明的功效在於:藉由根據每個主機板的不同而設計對應的分壓比例的分壓器,當接收直流電壓時對應產生不同的分壓電壓,可供識別器根據產生的分壓電壓自動比對出預存的對應於該分壓電壓的基本輸入輸出系統映像檔。 The effect of the present invention is that by designing a voltage divider with a corresponding voltage dividing ratio according to the difference of each motherboard, when receiving a DC voltage, different voltage dividing voltages are generated correspondingly, which can be used by the identifier according to the generated voltage dividing voltage. Automatically compare the pre-stored basic input-output system image file corresponding to the divided voltage.

2‧‧‧主機板裝置 2‧‧‧ Motherboard Device

21‧‧‧直流電源 21‧‧‧DC Power

22‧‧‧分壓器 22‧‧‧ Voltage Divider

221‧‧‧第一電阻 221‧‧‧first resistor

222‧‧‧第二電阻 222‧‧‧Second resistor

23‧‧‧識別器 23‧‧‧Identifier

230‧‧‧複雜可程式邏輯裝置 230‧‧‧ Complex programmable logic device

231‧‧‧類比數位轉換單元 231‧‧‧ Analog Digital Conversion Unit

232‧‧‧傳輸單元 232‧‧‧Transmission unit

233‧‧‧基板管理控制單元 233‧‧‧Substrate management control unit

234‧‧‧平台路徑控制單元 234‧‧‧platform path control unit

235‧‧‧記憶體單元 235‧‧‧Memory Unit

236‧‧‧暫存器 236‧‧‧Register

3‧‧‧中央處理器 3‧‧‧Central Processing Unit

本發明的其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中:圖1是一方塊圖,說明本發明伺服器的一實施例的一第一具體 應用;圖2是一資料表,輔助說明本發明伺服器的一對照資料表的儲存內容;圖3是一方塊圖,說明本發明伺服器的一實施例的一第二具體應用;圖4是一方塊圖,說明本發明伺服器的一實施例的一第三具體應用;圖5是一方塊圖,說明本發明伺服器的一實施例的一第四具體應用;圖6是一方塊圖,說明本發明伺服器的一實施例的一第五具體應用;圖7是一方塊圖,說明本發明伺服器的一實施例的一第六具體應用;圖8是一方塊圖,說明本發明伺服器的一實施例的一第七具體應用;及圖9是一方塊圖,說明本發明伺服器的一實施例的一第八具體應用。 Other features and effects of the present invention will be clearly presented in the embodiment with reference to the drawings, wherein: FIG. 1 is a block diagram illustrating a first specific example of an embodiment of the server of the present invention Application; FIG. 2 is a data table to assist in explaining the storage content of a comparison data table of the server of the present invention; FIG. 3 is a block diagram illustrating a second specific application of an embodiment of the server of the present invention; FIG. 4 is A block diagram illustrating a third specific application of an embodiment of the server of the present invention; FIG. 5 is a block diagram illustrating a fourth specific application of an embodiment of the server of the present invention; FIG. 6 is a block diagram, A fifth specific application of an embodiment of the server of the present invention will be described; FIG. 7 is a block diagram illustrating a sixth specific application of an embodiment of the server of the present invention; FIG. 8 is a block diagram illustrating the server of the present invention A seventh specific application of an embodiment of the server; and FIG. 9 is a block diagram illustrating an eighth specific application of an embodiment of the server of the present invention.

本發明伺服器的一實施例,包含一主機板裝置2,及一中 央處理器3,該主機板裝置2可由該中央處理器3執行對應的驅動程式而進行加電自檢(POST:Power On Self Test),每一主機板裝置2具有一分壓器22,該分壓器22包括一第一電阻221,及一電連接該第一電阻221的第二電阻222,且該第一電阻221的一第一端接收一由一直流電源21提供電壓值為Vdd的直流電壓,該第二電阻222的一第二端接地,且該第一電阻221的一第二端與該第二電阻222的一第一端串聯而形成具有一提供一分壓電壓的共同端,也就是說該第一電阻221的該第二端與該第二電阻222的該第一端的相連處即為該共同端,且由該共同端輸出該分壓電壓,該第一電阻221與該第二電阻222間的電阻值對應關係形成一分壓比例,而不同分壓比例對應不同的分壓電壓,也就是說使用不同電阻比例藉以調整該分壓比例,即可藉由該分壓比例控制該共同端輸出不同的分壓電壓,其中,假設該第一電阻221的電阻值為R1,該第二電阻222的電阻值為R2,則該分壓比例=R2/(R1+R2),而該分壓電壓=Vdd×R2/(R1+R2),而不同分壓電壓指示不同的主機板裝置2的種類,進而對應不同的基本輸入輸出系統映像檔版本以作為目標映像檔,在此舉一例說明,該主機板裝置2對應於一專案名稱(Project),並依照本身周邊硬體配置的需求而有不同專案版本(Revision),該第一電阻221與該第二電阻222形成的分壓比例是依照主機板裝置2的專案名稱及專案版本而定,二者接收一直流 電壓並將該直流電壓轉換成一分壓電壓,且該分壓電壓介於一特定範圍內,參下表一所列,假設該主機板裝置2對應的專案名稱為AAA,且可藉由該主機板裝置2對應實施R0A~R0H八種不同專案版本,則該分別對應實施八種不同專案版本的主機板裝置可視為八種不同的主機板裝置2,而由分別對應於該等主機板裝置2的專案版本的該第一電阻221與該第二電阻222所對應的電阻比例則可預先設計成可使該直流電壓經該組分壓電阻而於該共同端輸出的分壓電壓分別介於八種不同範圍的電壓值區間的八種電阻比例,須再補充說明的是,前述基本輸入輸出系統映像檔即為基本輸入輸出系統程式(BIOS code:Basic Input Output System code),其為計算機的中央處理器在開機時須先執行的韌體程式,以進行計算機硬體/韌體狀態之確認及配置等開機流程。 An embodiment of the server of the present invention includes a motherboard device 2 and a medium A central processing unit 3, and the motherboard device 2 may perform a power-on self-test (POST: Power On Self Test) by executing a corresponding driver program, and each motherboard device 2 has a voltage divider 22; The voltage divider 22 includes a first resistor 221 and a second resistor 222 electrically connected to the first resistor 221. A first end of the first resistor 221 receives a voltage value Vdd provided by the DC power source 21. A DC voltage, a second terminal of the second resistor 222 is grounded, and a second terminal of the first resistor 221 is connected in series with a first terminal of the second resistor 222 to form a common terminal for providing a divided voltage That is, the connection between the second end of the first resistor 221 and the first end of the second resistor 222 is the common terminal, and the divided voltage is output from the common terminal. The first resistor 221 The corresponding relationship between the resistance values of the second resistor 222 forms a voltage division ratio, and different voltage division ratios correspond to different voltage division voltages, that is, different voltage division ratios are used to adjust the voltage division ratio. The voltage ratio controls the common terminal to output different divided voltages, where Assuming that the resistance value of the first resistor 221 is R1 and the resistance value of the second resistor 222 is R2, the voltage division ratio = R2 / (R1 + R2), and the voltage division voltage = Vdd × R2 / (R1 + R2), and different divided voltages indicate different types of motherboard device 2 and thus correspond to different versions of the basic input-output system image file as the target image file. Here is an example. The motherboard device 2 corresponds to a The project name (Project), and different project versions (Revision) according to the needs of its peripheral hardware configuration, the voltage division ratio formed by the first resistor 221 and the second resistor 222 is based on the project name and Depending on the version of the project, both receive the stream Voltage and convert the DC voltage into a divided voltage, and the divided voltage is within a specific range, refer to the table below, assuming that the project name corresponding to the motherboard device 2 is AAA, and the host The board device 2 implements eight different project versions corresponding to R0A ~ R0H. The motherboard devices corresponding to the implementation of eight different project versions can be regarded as eight different motherboard devices 2 and the corresponding motherboard devices 2 respectively. In the project version of the first resistor 221 and the second resistor 222, the corresponding resistance ratios can be pre-designed so that the divided voltages output by the DC voltage through the component voltage resistor at the common terminal are respectively between eight There are eight kinds of resistance ratios in different voltage ranges. It must be added that the aforementioned basic input output system image file is the basic input output system program (BIOS code: Basic Input Output System code), which is the center of the computer. When the processor is turned on, the firmware program must be executed first to perform computer hardware / firmware status confirmation and configuration and other startup processes.

另外再說明的是,該第一電阻221與該第二電阻222的設 置態樣主要有三種:第一種是該第一電阻221與該第二電阻222均設置且電連接在該主機板裝置2上,而該第一電阻221與該第二電阻222的電阻值可根據欲實施於該主機板裝置2的專案版本所對應的電阻比例而分別任意搭配不同的電阻值,僅需其電阻比例是依照主機板裝置2的種類不同而有所區別以使該分壓電壓落於該專案版本所對應的電壓值區間即可,第二種是對應相同專案的每一主機板裝置2的該第一電阻221的電阻值固定(即,各主機板裝置2的該第一電阻221的電阻值皆相同)並設置於該主機板裝置2,而該第二電阻222是設置在一裝設該主機板裝置2的機箱內,並與該主機板裝置2電連接的的一背板,且該第二電阻222與該第一電阻221電連接,且該第二電阻222的電阻值是依照主機板裝置2所實施的專案版本所對應的該電阻比例的不同而做調整,第三種是設置在對應相同專案的每一主機板裝置2的該第一電阻221的電阻值固定但設置於與該主機板裝置2電連接的的背板(圖未示),該第二電阻222與該第一電阻221電連接並設置於主機板裝置2,同樣的,該第二電阻222的電阻值是依照主機板裝置2所實施的專案版本所對應的該電阻比例的不同而做調整。 In addition, the design of the first resistor 221 and the second resistor 222 There are mainly three kinds of state settings: the first is that the first resistor 221 and the second resistor 222 are both provided and electrically connected to the motherboard device 2, and the resistance values of the first resistor 221 and the second resistor 222 It can be arbitrarily matched with different resistance values according to the resistance ratio corresponding to the project version of the motherboard device 2 to be implemented, as long as the resistance ratio is different according to the type of the motherboard device 2 to make the divided voltage The voltage may fall within the voltage value range corresponding to the project version. The second type is that the resistance value of the first resistor 221 of each motherboard device 2 corresponding to the same project is fixed (ie, the first resistor 221 of each motherboard device 2 is fixed). A resistor 221 has the same resistance value) and is disposed in the motherboard device 2, and the second resistor 222 is disposed in a chassis in which the motherboard device 2 is installed and electrically connected to the motherboard device 2. A backplane, and the second resistor 222 is electrically connected to the first resistor 221, and the resistance value of the second resistor 222 is adjusted according to the resistance ratio corresponding to the version of the project implemented by the motherboard 2 , The third is set in the corresponding phase The resistance value of the first resistor 221 of each motherboard device 2 of the project is fixed but is provided on a backplane (not shown) electrically connected to the motherboard device 2. The second resistor 222 and the first resistor 221 The second resistor 222 is electrically connected and disposed on the motherboard device 2. Similarly, the resistance value of the second resistor 222 is adjusted according to the resistance ratio corresponding to the version of the project implemented by the motherboard device 2.

以下更具體地說明本發明伺服器的該實施例的具體應用。 The specific application of this embodiment of the server of the present invention is explained in more detail below.

參閱圖1、圖2,本發明伺服器之一第一具體應用包含一 主機板裝置2,及一中央處理器3。 Referring to FIG. 1 and FIG. 2, a first specific application of a server of the present invention includes a The motherboard device 2 and a central processing unit 3.

該主機板裝置2包括一分壓器22,及一識別器23。 The motherboard device 2 includes a voltage divider 22 and an identifier 23.

該分壓器22接收一由一直流電源21提供電壓值為Vdd的直流電壓,並產生一正比於該直流電壓及一分壓比例的分壓電壓,其中,不同的分壓比例對應不同的分壓電壓,不同的分壓電壓對應不同的主機板識別碼,而每一主機板識別碼各自對應一主機板裝置2。 The voltage divider 22 receives a DC voltage provided by the DC power source 21 with a voltage value of Vdd, and generates a divided voltage that is proportional to the DC voltage and a divided voltage ratio. Among them, different divided voltage ratios correspond to different divided voltages. Voltage and voltage, different divided voltages correspond to different motherboard identification codes, and each motherboard identification code corresponds to a motherboard device 2 respectively.

進一步說明,該分壓器22是由一第一電阻221,及一電連接該第一電阻221的第二電阻222所組成,二者分別對應的電阻值依照主機板裝置2的不同而組成不同的電阻比例進而對應不同的分壓比例,該第一電阻221具有一接收該直流電壓的第一端,及一電連接該第二電阻222第二端,該第二電阻222具有一電連接該第一電阻221的該第二端的第一端,及一接地的第二端。 To further explain, the voltage divider 22 is composed of a first resistor 221 and a second resistor 222 electrically connected to the first resistor 221. The corresponding resistance values of the two are different according to the motherboard device 2. The resistance ratio corresponds to different voltage division ratios. The first resistor 221 has a first terminal for receiving the DC voltage, and a second terminal electrically connected to the second resistor 222. The second resistor 222 has an electrical connection to the A first terminal of the second terminal of the first resistor 221 and a second terminal of the ground.

該識別器23電連接該第二電阻222的該第一端並儲存一對照資料庫,該對照資料庫記錄多個分別對應不同分壓電壓的主機板識別碼,及多個分別對應主機板識別碼的基本輸入輸出系統映像檔,即,BIOS code(Basic Input Output System code),該識別器23接收來自該第一電阻221與該第二電阻222共同提供的該分壓電壓,並將該分壓電壓進行類比至數位轉換,以產生一編碼,該識別器23比對該編碼與該對照表,以得到一所對應的基本輸入輸 出系統映像檔作為目標映像檔。 The identifier 23 is electrically connected to the first end of the second resistor 222 and stores a comparison database. The comparison database records a plurality of motherboard identification codes corresponding to different divided voltages, and a plurality of motherboard identification codes respectively. The basic input and output system image file of the code, that is, BIOS code (Basic Input Output System code), the identifier 23 receives the divided voltage provided by the first resistor 221 and the second resistor 222, and The voltage and voltage are converted from analog to digital to generate a code. The identifier 23 compares the code with the lookup table to obtain a corresponding basic input output. Export the system image as the target image.

進一步說明,該識別器23包括一類比數位轉換單元231、一傳輸單元232、一基板管理控制單元233、及一平台路徑控制單元234。 To further explain, the identifier 23 includes an analog-to-digital conversion unit 231, a transmission unit 232, a substrate management control unit 233, and a platform path control unit 234.

該類比數位轉換單元231電連接該第一電阻221的該第二端並接收該分壓電壓,並將該分壓電壓轉換成該編碼。在本實施例中,該類比數位轉換單元231是由伺服器的一複雜可程式邏輯裝置(CPLD:Complex Programmable Logic Device)230其提供的類比數位轉換器所實現。 The analog digital conversion unit 231 is electrically connected to the second terminal of the first resistor 221 and receives the divided voltage, and converts the divided voltage into the code. In this embodiment, the analog-to-digital conversion unit 231 is implemented by a complex programmable logic device (CPLD: Complex Programmable Logic Device) 230 provided by the server.

該傳輸單元232電連接該類比數位轉換單元231並接收該編碼。 The transmission unit 232 is electrically connected to the analog-to-digital conversion unit 231 and receives the code.

該基板管理控制單元233即為BMC(Baseboard Management Controller),電連接該傳輸單元232與該平台路徑控制單元234,用以將該編碼傳送至該平台路徑控制單元234。 The baseboard management control unit 233 is a baseboard management controller (BMC), and is electrically connected to the transmission unit 232 and the platform path control unit 234 to transmit the code to the platform path control unit 234.

該平台路徑控制單元234即為PCH(Platform Controller Hub),其電連接該基板管理控制單元233,並具有可預先儲存該對照資料庫的記憶體單元235,在本實施例中,該記憶體單元235為一非揮發性記憶體(non-volatile memory),例如:快閃記憶體(Flash memory),當該平台路徑控制單元234接收該基板管理控制單元233傳送的該編碼時,即根據該對照資料庫比 對出對應該編碼的該基本輸入輸出系統映像檔以作為目標映像檔。 The platform path control unit 234 is a PCH (Platform Controller Hub), which is electrically connected to the substrate management control unit 233, and has a memory unit 235 that can store the comparison database in advance. In this embodiment, the memory unit 235 is a non-volatile memory, such as a flash memory. When the platform path control unit 234 receives the code transmitted by the substrate management control unit 233, it is based on the comparison. Database ratio The basic I / O system image corresponding to the encoding is used as a target image.

該中央處理器3即為CPU(Central Processing Unit),電連接該識別器23,以接收並執行該識別器23所比對出的該目標映像檔,當該中央處理器3執行該目標映像檔時,同時驅動該主機板裝置2執行自身相關資訊之檢測。 The central processing unit 3 is a CPU (Central Processing Unit), which is electrically connected to the identifier 23 to receive and execute the target image file compared by the identifier 23, and when the central processor 3 executes the target image file At the same time, the motherboard device 2 is simultaneously driven to perform detection of its own related information.

參閱圖3,本發明伺服器之實施例的一第二具體應用與上述第一具體應用相似,差別在於:當該類比數位轉換單元231接收該分壓電壓、並將該分壓電壓轉換成對應的該編碼後,該傳輸單元232直接將該編碼傳送至該平台路徑控制單元234。 Referring to FIG. 3, a second specific application of the embodiment of the server of the present invention is similar to the first specific application described above, except that when the analog digital conversion unit 231 receives the divided voltage and converts the divided voltage into a corresponding After the encoding, the transmission unit 232 directly transmits the encoding to the platform path control unit 234.

舉例來說,依據上述第一具體應用與第二具體應用的差異,該第一具體應用在實際應用中,作為其目標映像檔的其中一基本輸入輸出系統映像檔的版本所對應的設定為將電腦切換器(KVM switch:Keyboard,Video,Mouse switch)功能參數啟動,而該第二具體應用在實際應用中,作為其目標映像檔的其中另一基本輸入輸出系統映像檔的版本所對應的設定為將電腦切換器功能參數關閉,此外,以下其他具體應用可依作為目標映像檔的其中一基本輸入輸出系統映像檔版本的不同而對其周邊硬體依照實際應用有做不同的設定。 For example, according to the difference between the first specific application and the second specific application, in a practical application, the first specific application is used as a target image file version of one of the basic input output system image files corresponding to the setting KVM switch (Keyboard, Video, Mouse switch) function parameters are activated, and this second specific application is used in actual applications as the corresponding setting of another version of the basic input output system image file of its target image file In order to turn off the function parameters of the computer switch, in addition, the following other specific applications can be set differently to their peripheral hardware according to the actual application according to the version of one of the basic input output system image files as the target image file.

參閱圖4,本發明伺服器之實施例的一第三具體應用與上述第一具體應用相似,差別在於:當每個主機板裝置2的專案名稱 相同、版本不同時,則於一電連接該傳輸單元232的暫存器236預先寫入對應該等主機板裝置2的專案名稱的專案碼,即,對應該等主機板裝置2的主機板識別碼中,代表專案名稱的部分,該類比數位轉換單元231將分壓電壓轉換成一對應出對應於主機板識別碼中代表版本部分的版本碼,接著再由該傳輸單元232將預先寫入暫存器236的專案碼與該類比數位轉換單元231轉換出的該版本碼結合成一主機板合成碼,並經由該基板管理控制單元233傳送至該平台路徑控制單元234,該平台路徑控制單元234根據該主機板合成碼比對出對應的主機板識別碼作為目標識別碼,並將該主機板識別碼對應的基本輸入輸出系統映像檔作為目標映像檔,並傳送至該中央處理器3。再者,類似該類比數位轉換單元231,該暫存器236由該複雜可程式邏輯裝置230提供。 Referring to FIG. 4, a third specific application of the embodiment of the server of the present invention is similar to the above-mentioned first specific application, the difference is that when the project name of each motherboard device 2 is When the versions are the same and the versions are different, a register 236 electrically connected to the transmission unit 232 is written in advance with a project code corresponding to the project name of the motherboard devices 2, that is, a motherboard identification corresponding to the motherboard devices 2 The code represents the part of the project name. The analog digital conversion unit 231 converts the divided voltage into a version code corresponding to the version part of the motherboard identification code, and then the transmission unit 232 writes the temporary storage in advance. The project code of the controller 236 and the version code converted by the analog digital conversion unit 231 are combined into a motherboard synthesis code and transmitted to the platform path control unit 234 via the baseboard management control unit 233. The platform path control unit 234 according to the The mainboard synthesis code compares the corresponding mainboard identification code as the target identification code, and uses the basic input-output system image file corresponding to the mainboard identification code as the target image file, and transmits it to the central processing unit 3. Moreover, similar to the analog-to-digital conversion unit 231, the register 236 is provided by the complex programmable logic device 230.

如圖5所示,本發明伺服器之實施例的一第四具體應用與上述第一具體應用相似,差別在於:預存該等分別對應不同分壓電壓的主機板識別碼,及分別對應該等主機板識別碼的基本輸入輸出系統映像檔的記憶體單元235是以外掛的態樣電連接該平台路徑控制單元234,當該平台路徑控制單元234接收來自該基板管理控制器傳送的該主機板識別碼後,讀取該記憶體單元235預先儲存的相關資料執行比對。 As shown in FIG. 5, a fourth specific application of the embodiment of the server of the present invention is similar to the first specific application described above, except that the motherboard identification codes corresponding to different divided voltages are stored in advance, and the corresponding The memory unit 235 of the basic input and output system image of the motherboard identification code is electrically connected to the platform path control unit 234 in a plug-in state. When the platform path control unit 234 receives the motherboard transmitted from the baseboard management controller, After the identification code, read the relevant data stored in the memory unit 235 in advance to perform the comparison.

如圖6所示,本發明伺服器之實施例的一第五具體應用與 上述第四具體應用相似,差別在於:該類比數位轉換單元231接收該分壓電壓,並將該分壓電壓轉換成對應該主機板裝置2的主機板識別碼後,該傳輸單元232直接將該主機板識別碼傳送至該平台路徑控制單元234。 As shown in FIG. 6, a fifth specific application of the embodiment of the server of the present invention and The fourth specific application is similar, except that the analog digital conversion unit 231 receives the divided voltage and converts the divided voltage into a motherboard identification code corresponding to the motherboard device 2. The transmission unit 232 directly converts the The motherboard identification code is transmitted to the platform path control unit 234.

如圖7所示,本發明伺服器之實施例的一第六具體應用與上述第五具體應用相似,差別在於:每個主機板裝置2的專案名稱相同、版本不同,該複雜可程式邏輯裝置230的該暫存器236預先寫入對應該等主機板裝置2的專案名稱的專案碼,即,對應該等主機板裝置2的主機板識別碼中代表專案名稱的部分,至於該類比數位轉換單元231僅需將分壓電壓轉換出對應於主機板識別碼中代表版本部分的信號,即,版本碼,接著再由該傳輸單元232再將預先寫入暫存器236的專案碼與類比數位轉換器轉換出的版本碼結合成主機板合成碼,並將該主機板合成碼傳送至該平台路徑控制單元234比對出對應的主機板識別碼及基本輸入輸出系統映像檔。 As shown in FIG. 7, a sixth specific application of the embodiment of the server of the present invention is similar to the fifth specific application described above. The difference is that each motherboard device 2 has the same project name and different version, and the complex programmable logic device. The register 236 of 230 previously writes a project code corresponding to the project name of the motherboard devices 2, that is, a part of the motherboard identification code corresponding to the motherboard devices 2 that represents the project name. As for the analog digital conversion The unit 231 only needs to convert the divided voltage into a signal corresponding to the version part of the motherboard identification code, that is, the version code, and then the transmission unit 232 will write the project code and analog digits previously written into the register 236 The version code converted by the converter is combined into a motherboard synthesis code, and the motherboard synthesis code is transmitted to the platform path control unit 234 to compare the corresponding motherboard identification code and the basic input-output system image file.

如圖8所示,本發明伺服器之實施例的一第四具體應用與上述第六具體應用相似,差別在於:預存該等分別對應不同分壓電壓的主機板識別碼,及分別對應該等主機板識別碼的基本輸入輸出系統映像檔的記憶體單元235是內建於該平台路徑控制單元234內部,當該平台路徑控制單元234接收來自該基板管理控制器傳送的該主機板識別碼後,讀取預存的相關資料執行比對。 As shown in FIG. 8, a fourth specific application of the embodiment of the server of the present invention is similar to the above-mentioned sixth specific application, the difference is that the motherboard identification codes corresponding to different divided voltages are stored in advance, and corresponding to these The memory unit 235 of the basic input and output system image of the motherboard identification code is built into the platform path control unit 234. After the platform path control unit 234 receives the motherboard identification code transmitted from the baseboard management controller, , Read pre-stored relevant data and perform comparison.

如圖9所示,本發明伺服器之實施例的一第八具體應用與上述第七具體應用相似,差別在於:該傳輸單元232先將該主機板識別碼傳送至該基板管理控制單元233,該基板管理控制單元233再將該主機板識別碼傳送至該平台路徑控制單元234,且,預存該等分別對應不同分壓電壓的主機板識別碼,及分別對應該等主機板識別碼的基本輸入輸出系統映像檔的記憶體單元235是以外掛的態樣電連接該平台路徑控制單元234,當該平台路徑控制單元234接收來自該基板管理控制單元233傳送的該主機板識別碼後,讀取該記憶體單元235預先儲存的相關資料執行比對。 As shown in FIG. 9, an eighth specific application of the embodiment of the server of the present invention is similar to the seventh specific application described above, except that the transmission unit 232 first transmits the motherboard identification code to the substrate management control unit 233, The baseboard management control unit 233 transmits the motherboard identification code to the platform path control unit 234, and pre-stores the motherboard identification codes corresponding to different divided voltages, and the basics corresponding to the motherboard identification codes respectively. The memory unit 235 of the I / O system image is electrically connected to the platform path control unit 234 in a plug-in state. When the platform path control unit 234 receives the motherboard identification code transmitted from the baseboard management control unit 233, it reads Take relevant data stored in advance in the memory unit 235 to perform comparison.

綜上所述,本發明伺服器主要是由該主機板裝置提供不同的分壓電壓,再配合該識別器的該類比數位轉換單元將該分壓電壓轉換為數位格式的編碼,並由該平台路徑控制單元比對出與該編碼對應的基本輸入輸出裝置映像檔以作為目標映像檔,或在該暫存器236預先寫入對應該等主機板裝置的專案名稱的專案碼,該配合該類比數位轉換單元將分壓電壓轉換為對應於主機板識別碼中代表版本部分的版本碼,再由該傳輸單元將專案碼與版本碼結合成主機板合成碼,並由該平台路徑控制單元比對出對應的基本輸入輸出系統映像檔以作為目標映像檔,供該中央處理器執行並驅動該主機板裝置執行加電自檢,而改善現有以人工方式切換上/下拉電阻以讓中央處理器辨別主機板種類的方式所可能發生的潛在錯誤,且大 幅節省所需採用的電阻設備成本與佔據的空間成本,故確實達成本發明的創作目的。 In summary, the server of the present invention mainly provides different divided voltages by the motherboard device, and then cooperates with the analog digital conversion unit of the identifier to convert the divided voltages into digital format codes, and the platform The path control unit compares the basic I / O device image file corresponding to the code as the target image file, or writes in the register 236 a project code corresponding to the project name of the motherboard device in advance, which matches the analogy The digital conversion unit converts the divided voltage into a version code corresponding to the version part of the motherboard identification code, and the transmission unit combines the project code and the version code into a motherboard synthesis code, which is compared by the platform path control unit. The corresponding basic I / O system image file is used as the target image file for the CPU to execute and drive the motherboard device to perform a power-on self-test, and to improve the existing manual switching of the up / down resistors for the CPU to distinguish Potential errors that can occur with the type of motherboard It can save the cost of the resistance equipment and the cost of the occupied space, so it does achieve the purpose of cost invention.

惟以上所述者,僅為本發明的實施例而已,當不能以此限定本發明實施的範圍,凡是依本發明申請專利範圍及專利說明書內容所作的簡單的等效變化與修飾,皆仍屬本發明專利涵蓋的範圍內。 However, the above are only examples of the present invention. When the scope of implementation of the present invention cannot be limited by this, any simple equivalent changes and modifications made according to the scope of the patent application and the contents of the patent specification of the present invention are still Within the scope of the invention patent.

Claims (9)

一種伺服器,包含: 一主機板裝置,包括一分壓器及一識別器,該分壓器具有一輸入端及一輸出端,其中該輸入端用以接收一直流電壓,該輸出端對應產生一正比於該直流電壓及一分壓比例的分壓電壓,不同的分壓比例對應不同的分壓電壓,不同的分壓電壓對應不同的主機板識別碼,該識別器電連接該輸出端並具有一對照資料庫,該對照資料庫記錄多個分別對應不同分壓電壓的主機板識別碼,及多個分別對應主機板識別碼的基本輸入輸出系統映像檔,該識別器接收來自該輸出端的該分壓電壓,並將該分壓電壓進行類比至數位轉換,以產生一編碼,該編碼對應該等主機板識別碼其中之一,該識別器比對該編碼與該對照資料庫,以得到一對應該等基本輸入輸出系統映像檔其中之一的目標映像檔;及 一中央處理器,電連接該識別器,以接收並執行該目標映像檔。A server includes: a motherboard device including a voltage divider and an identifier, the voltage divider has an input end and an output end, wherein the input end is used to receive a DC voltage, and the output end correspondingly generates a It is proportional to the DC voltage and a divided voltage of a divided voltage ratio. Different divided voltage ratios correspond to different divided voltages. Different divided voltages correspond to different motherboard identification codes. The identifier is electrically connected to the output terminal and has A comparison database which records a plurality of motherboard identification codes corresponding to different divided voltages and a plurality of basic input-output system image files respectively corresponding to the motherboard identification code. The identifier receives the Divide the voltage and perform analog-to-digital conversion on the divided voltage to generate a code corresponding to one of the motherboard identification codes. The identifier compares the code with the comparison database to obtain a A target image file corresponding to one of the basic input output system image files; and a central processing unit electrically connected to the identifier to receive and execute the object Image file. 如請求項1所述的伺服器,其中,該分壓器包括一第一電阻,及一電連接該第一電阻的第二電阻,該第一電阻具有一接收該直流電壓的第一端作為該輸入端,及一電連接該第二電阻與該識別器的第二端作為該輸出端,該第二電阻具有一電連接該輸出端的第一端,及一接地的第二端。The server according to claim 1, wherein the voltage divider includes a first resistor and a second resistor electrically connected to the first resistor, and the first resistor has a first terminal for receiving the DC voltage as The input terminal and a second terminal electrically connecting the second resistor and the identifier serve as the output terminal, and the second resistor has a first terminal electrically connected to the output terminal and a second terminal connected to the ground. 如請求項1所述的伺服器,其中,該識別器包括 一類比數位轉換單元,電連接該輸出端以接收該分壓電壓,並將該分壓電壓轉換成該編碼, 一傳輸單元,電連接該類比數位轉換單元,接收該編碼,及 一平台路徑控制單元,電連接該傳輸單元與該中央處理器並具有該對照資料庫,該平台路徑控制單元接收來自該傳輸單元傳送的該編碼,根據該對照資料庫比對出對應該編碼的該基本輸入輸出系統映像檔以作為該目標映像檔,並將該基本輸入輸出系統映像檔傳送至該中央處理器。The server according to claim 1, wherein the identifier comprises an analog digital conversion unit, which is electrically connected to the output terminal to receive the divided voltage, and converts the divided voltage into the code; a transmission unit; Connected to the analog digital conversion unit, receiving the code, and a platform path control unit, electrically connecting the transmission unit and the central processor and having the comparison database, the platform path control unit receiving the code transmitted from the transmission unit, According to the comparison database, the basic input-output system image file corresponding to the encoding is used as the target image file, and the basic input-output system image file is transmitted to the central processing unit. 如請求項1所述的伺服器,其中,該識別器包括 一暫存單元,儲存一相關於該分壓電壓的專案碼, 一類比數位轉換單元,電連接該輸出端並接收該分壓電壓,並將該分壓電壓轉換成一版本碼, 一傳輸單元,電連接該類比數位轉換單元與該暫存單元,接收該專案碼與該版本碼,並將該專案碼與該版本碼組成一主機板合成碼,及 一平台路徑控制單元,電連接該傳輸單元與該中央處理器並儲存該對照資料庫,該平台路徑控制單元接收來自該傳輸單元傳送的該主機板合成碼,根據該主機板合成碼比對出對應的主機板識別碼以作為一目標識別碼,並將對應於該目標識別碼的基本輸入輸出系統映像檔作為該目標映像檔傳送至該中央處理器。The server according to claim 1, wherein the identifier comprises a temporary storage unit, storing a project code related to the divided voltage, an analog digital conversion unit, electrically connected to the output terminal and receiving the divided voltage And convert the divided voltage into a version code, a transmission unit, electrically connecting the analog digital conversion unit and the temporary storage unit, receiving the project code and the version code, and forming the project code and the version code into a host Board synthesis code and a platform path control unit, electrically connecting the transmission unit and the central processing unit and storing the comparison database, the platform path control unit receives the motherboard synthesis code transmitted from the transmission unit, and according to the motherboard The synthesized code compares the corresponding motherboard identification code as a target identification code, and transmits the basic input-output system image file corresponding to the target identification code as the target image file to the central processing unit. 如請求項1所述的伺服器,其中,該識別器包括 一類比數位轉換單元,電連接該輸出端以接收該分壓電壓,並將該分壓電壓轉換成該編碼, 一傳輸單元,電連接該類比數位轉換單元,並接收該編碼, 一基板管理控制單元,電連接該傳輸單元,並接收該傳輸單元傳送的該編碼,及 一平台路徑控制單元,電連接該基板管理控制單元與該中央處理器,並儲存該對照資料庫,該平台路徑控制單元接收來自該基板管理控制單元傳送的該編碼,根據該對照資料庫比對出對應該編碼的其中一基本輸入輸出系統映像檔作為該目標映像檔,並將該目標映像檔傳送至該中央處理器。The server according to claim 1, wherein the identifier comprises an analog digital conversion unit, which is electrically connected to the output terminal to receive the divided voltage, and converts the divided voltage into the code; a transmission unit; Connect the analog digital conversion unit and receive the code, a substrate management control unit, electrically connect the transmission unit, and receive the code transmitted by the transmission unit, and a platform path control unit, electrically connect the substrate management control unit and the A central processing unit, and storing the comparison database, the platform path control unit receives the code transmitted from the baseboard management control unit, and compares one of the basic input-output system image files corresponding to the code as the comparison database according to the comparison database A target image file, and transmitting the target image file to the central processing unit. 如請求項1所述的伺服器,其中,該識別器包括 一類比數位轉換單元,電連接該輸出端並接收該分壓電壓,並將該分壓電壓轉換成該編碼, 一傳輸單元,電連接該類比數位轉換單元,並接收該編碼,一記憶體單元,儲存該對照資料庫,及 一平台路徑控制單元,電連接該傳輸單元與該記憶體單元,該平台路徑控制單元接收來自該傳輸單元傳送的該編碼,並根據該編碼與該記憶體單元儲存的該對照資料庫比對出對應該編碼的基本輸入輸出系統映像檔以作為該目標映像檔,並將該目標映像檔傳送至該中央處理器。The server according to claim 1, wherein the identifier comprises an analog digital conversion unit, which is electrically connected to the output terminal and receives the divided voltage, and converts the divided voltage into the code; a transmission unit; Connect the analog digital conversion unit and receive the code, a memory unit to store the comparison database, and a platform path control unit to electrically connect the transmission unit and the memory unit, the platform path control unit receives from the transmission The code transmitted by the unit, and based on the code, the basic input-output system image file corresponding to the code is compared with the comparison database stored in the memory unit as the target image file, and the target image file is transmitted to the CPU. 一種主機板裝置,適用於一中央處理器,該中央處理器運作於一對應該主機板裝置的工作模式,該主機板裝置包含: 一分壓器,具有一輸入端及一輸出端,該輸入端接收一直流電壓,該輸出端產生一正比於該直流電壓及一分壓比例的分壓電壓,其中,不同的分壓比例對應不同的分壓電壓,不同的分壓電壓對應不同的主機板識別碼;及 一識別器,電連接該輸出端與該中央處理器,並具有一對照資料庫,該對照資料庫記錄多個分別對應不同分壓電壓的主機板識別碼,及多個分別對應主機板識別碼的基本輸入輸出系統映像檔,該識別器接收來自該分壓器的該分壓電壓,並將該分壓電壓進行類比至數位轉換,以產生一編碼,該編碼對應該多個主機板識別碼其中之一,該識別器並根據該編碼與該對照資料庫比對,以得到一所對應該編碼的的基本輸入輸出系統映像檔以作為一目標映像檔,該中央處理器根據該目標映像檔運作於該工作模式。A motherboard device is suitable for a central processing unit. The central processing unit operates in a pair of operating modes corresponding to the motherboard device. The motherboard device includes: a voltage divider having an input end and an output end. The input The terminal receives a DC voltage, and the output terminal generates a divided voltage proportional to the DC voltage and a divided voltage ratio. Among them, different divided voltage ratios correspond to different divided voltages, and different divided voltages correspond to different motherboards. An identification code; and an identifier, which electrically connects the output terminal and the central processing unit, and has a comparison database which records a plurality of motherboard identification codes respectively corresponding to different divided voltages, and a plurality of corresponding ones The basic input and output system image file of the motherboard identification code. The identifier receives the divided voltage from the voltage divider and performs analog-to-digital conversion on the divided voltage to generate a code, which corresponds to multiple codes. One of the motherboard identification codes, and the identifier is compared with the comparison database according to the codes to obtain a basic input-output system corresponding to the codes. Image file as a target image file, the central processing unit of the target image file according to the mode of operation. 如請求項7所述的主機板裝置,其中,該分壓器包括一第一電阻,及一電連接該第一電阻的第二電阻,該第一電阻具有一接收該直流電壓的第一端作為該輸入端,及一電連接該第二電阻與該識別器的第二端作為該輸出端,該第二電阻具有一電連接該輸出端的第一端,及一接地的第二端。The motherboard device according to claim 7, wherein the voltage divider includes a first resistor and a second resistor electrically connected to the first resistor, and the first resistor has a first terminal for receiving the DC voltage As the input terminal, and a second terminal electrically connecting the second resistor and the identifier as the output terminal, the second resistor has a first terminal electrically connected to the output terminal, and a second terminal grounded. 如請求項7所述的主機板裝置,其中,該識別器包括 一類比數位轉換單元,電連接該輸出端以接收該分壓電壓,並根據該分壓電壓取得該編碼, 一傳輸單元,電連接該類比數位轉換單元,接收該編碼,及 一平台路徑控制單元,電連接該傳輸單元與該中央處理器並具有該對照資料庫,該平台路徑控制單元接收來自該傳輸單元傳送的該編碼,根據該對照資料庫比對出對應該編碼的該基本輸入輸出系統映像檔以作為該目標映像檔,並將該目標映像檔傳送至該中央處理器。The motherboard device according to claim 7, wherein the identifier includes an analog digital conversion unit, which is electrically connected to the output terminal to receive the divided voltage, and obtains the code according to the divided voltage, a transmission unit, Connected to the analog digital conversion unit, receiving the code, and a platform path control unit, electrically connecting the transmission unit and the central processor and having the comparison database, the platform path control unit receiving the code transmitted from the transmission unit, According to the comparison database, the basic input-output system image file corresponding to the encoding is used as the target image file, and the target image file is transmitted to the central processing unit.
TW107131316A 2018-09-06 2018-09-06 Motherboard device and server TWI675292B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW107131316A TWI675292B (en) 2018-09-06 2018-09-06 Motherboard device and server

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW107131316A TWI675292B (en) 2018-09-06 2018-09-06 Motherboard device and server

Publications (2)

Publication Number Publication Date
TWI675292B true TWI675292B (en) 2019-10-21
TW202011190A TW202011190A (en) 2020-03-16

Family

ID=69023979

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107131316A TWI675292B (en) 2018-09-06 2018-09-06 Motherboard device and server

Country Status (1)

Country Link
TW (1) TWI675292B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI740272B (en) * 2019-11-14 2021-09-21 和碩聯合科技股份有限公司 Device, method and non-transitory computer readable medium for writing image files into memories
TWI764648B (en) * 2021-03-25 2022-05-11 微星科技股份有限公司 Mainboard, external device of mainboard, and booting method of mainboard
TWI831190B (en) * 2022-04-15 2024-02-01 新加坡商鴻運科股份有限公司 Datacenter-ready secure control module and control method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200937208A (en) * 2008-02-29 2009-09-01 Inventec Corp Apparatus for automatically regulating system ID of motherboard of server and server thereof
TW201424317A (en) * 2012-12-06 2014-06-16 Ibm Method of identifying server location
TW201610850A (en) * 2014-09-08 2016-03-16 廣達電腦股份有限公司 Method, managing apparatus, and computer-readable medium for managing basic input/output system configurations of a computer system
TW201734762A (en) * 2016-03-25 2017-10-01 神雲科技股份有限公司 Data loading method and motherboard
TW201734779A (en) * 2016-03-18 2017-10-01 神雲科技股份有限公司 Boot status notification method and server system using the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200937208A (en) * 2008-02-29 2009-09-01 Inventec Corp Apparatus for automatically regulating system ID of motherboard of server and server thereof
TW201424317A (en) * 2012-12-06 2014-06-16 Ibm Method of identifying server location
TW201610850A (en) * 2014-09-08 2016-03-16 廣達電腦股份有限公司 Method, managing apparatus, and computer-readable medium for managing basic input/output system configurations of a computer system
TW201734779A (en) * 2016-03-18 2017-10-01 神雲科技股份有限公司 Boot status notification method and server system using the same
TW201734762A (en) * 2016-03-25 2017-10-01 神雲科技股份有限公司 Data loading method and motherboard

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI740272B (en) * 2019-11-14 2021-09-21 和碩聯合科技股份有限公司 Device, method and non-transitory computer readable medium for writing image files into memories
US11829329B2 (en) 2019-11-14 2023-11-28 Pegatron Corporation Device, method and non-transitory computer readable medium for writing image files into memories
TWI764648B (en) * 2021-03-25 2022-05-11 微星科技股份有限公司 Mainboard, external device of mainboard, and booting method of mainboard
TWI831190B (en) * 2022-04-15 2024-02-01 新加坡商鴻運科股份有限公司 Datacenter-ready secure control module and control method

Also Published As

Publication number Publication date
TW202011190A (en) 2020-03-16

Similar Documents

Publication Publication Date Title
TWI675292B (en) Motherboard device and server
US8275599B2 (en) Embedded bus emulation
US7610483B2 (en) System and method to accelerate identification of hardware platform classes
US7584305B2 (en) Serial peripheral interface circuit
US7490176B2 (en) Serial attached SCSI backplane and detection system thereof
US20140164672A1 (en) Methods and systems for providing user selection of associations between information handling resources and information handling systems in an integrated chassis
US11157625B2 (en) Verifying basic input/output system (BIOS) boot block code
US20070300055A1 (en) Booting apparatus and method therefor
US9946552B2 (en) System and method for detecting redundant array of independent disks (RAID) controller state from baseboard management controller (BMC)
US8225023B2 (en) Indicator control apparatus
EP3848807A1 (en) Data processing system and method for configuring and operating a data processing system
US20080222365A1 (en) Managed Memory System
US11467780B1 (en) System and method for automatic identification and bios configuration of drives in a backplane
CN113468028B (en) Device management method for computing device, apparatus and medium
US20090119420A1 (en) Apparatus and method for scaleable expanders in systems management
TWI774188B (en) Method and system for simultaneously programming a plurality of memory devices
US20180113833A1 (en) Board management controller peripheral card, host system with the same, and method for managing host peripheral member by the same
US20180261293A1 (en) Power supply management device and memory system
WO2020018094A1 (en) Selectively enabling power lines to usb ports
CN110955456A (en) Mainboard device and server
Intel Intel® Desktop Board D5400XS Technical Product Specification
US10606606B1 (en) Multi-platform firmware support
TWI685745B (en) Rbod
CN111766797A (en) Microcontroller, memory module and method for updating firmware of microcontroller
CN111858226A (en) Electronic device carrying non-volatile memory solid state disk