TWI764648B - Mainboard, external device of mainboard, and booting method of mainboard - Google Patents

Abstract

A mainboard is provided. The mainboard includes a controller, a first switch element and a basic input/output system. The first switch element is configured to pull a first pin of the controller to a first voltage level when it is turned on. The controller detects whether the first pin is at the first voltage level to enter a boot failure rescue mode. In the boot failure rescue mode, the controller causes the basic input/output system to reduce the signal transmission rate corresponding to a signal channel to perform the boot action.

Description

Mainboard, external device of mainboard, and booting method of mainboard

The present invention relates to a mainboard, and in particular, to a solution for eliminating the failure of the mainboard to boot normally.

The Basic Input/Output System (BIOS) is the firmware used to perform hardware initialization and provide runtime services for the operating system during the power-on phase of the computer. The setting values of the BIOS program and the detected values of hardware parameters are stored in a random access memory (Random Access Memory, RAM) commonly known as CMOS.

When starting the computer through the BIOS program, the information in the CMOS needs to be loaded. Generally speaking, if you encounter the wrong BIOS parameter setting or overclocking failure, you can boot by clearing the CMOS settings and loading the system default values. Alternatively, booting can be performed by manually pressing a specific key on the motherboard to force the BIOS interface and loading the system default values. However, if there is a compatibility problem with high-speed devices (such as display cards, storage devices, etc.) or the signal transmission rate of the bus, even if the default value is loaded and the system default state is entered, the failure to boot will still occur. situation. This inability to power on will result in poor user experience and increase product return rates.

Therefore, it is necessary to propose a technical solution to solve the aforementioned problem of inability to boot.

The present invention provides a mainboard, an external device of the mainboard, and a booting method of the mainboard, so as to solve the problem of inability to boot due to the compatibility problem of the signal transmission rate between the internal devices of the host.

The motherboard of the present invention includes a controller, a first switch element and a basic input output system. The first switch element is used for pulling the first pin of the controller to the first voltage level when turned on. The controller detects whether the first pin is at the first voltage level to enter the boot failure rescue mode. In the boot failure rescue mode, the controller makes the basic input output system reduce the signal transmission rate of a corresponding signal channel to perform the boot action.

The external device of the motherboard of the present invention is used for external connection to the aforementioned motherboard. The external device includes a second switching element. The second switch element is coupled to the first switch element for pulling the first pin to the first voltage level through the first switch element when turned on.

The booting method of the mainboard of the present invention includes: the controller of the mainboard detects whether the first pin of the mainboard is at the first voltage level to enter the boot failure rescue mode; and in the boot failure rescue mode, the controller enables the basic The I/O system reduces the signal transmission rate of a corresponding signal channel to perform the booting action.

Based on the above, the present invention reduces the signal transmission rate corresponding to a signal channel in the basic input output system by executing the boot failure rescue mode. In this way, the situation of inability to boot due to the compatibility problem of the signal transmission rate can be excluded.

FIG. 1 is a schematic structural diagram of a motherboard according to a first embodiment of the present invention. Referring to FIG. 1 , components such as a controller 120 , a Basic Input/Output System (BIOS) 130 , and a first switch element 140 are carried through the substrate 110 to form the motherboard 100 . In this embodiment, the controller 120 may be a central processing unit (Central Processing Unit, CPU). The controller 120 has a first pin 121 . The first pin 121 may be a general-purpose input/output (GPIO) pin of the CPU chip, but the invention is not limited thereto.

The first switching element 140 may be any suitable form of switching element or connector, eg may be a pin header. The first switching element 140 may be disposed anywhere on the substrate 110 and one end of the first switching element 140 is coupled to the first pin 121 . In one embodiment, the other end of the first switching element 140 may be coupled to a reference voltage end. When the first switch element 140 is turned on (for example, by shorting the pins of the header together), the first pin 121 of the controller 120 is pulled up to a voltage level corresponding to the aforementioned reference voltage terminal. When the controller 120 detects that the first pin 121 of the controller 120 is at a high voltage level, it enters the boot failure rescue mode. In practical applications, when the user finds that it cannot be powered on normally, the user can manually turn on the first switch element 140 of the motherboard 100 to enter the boot failure rescue mode.

The BIOS 130 is a firmware that performs hardware initialization and provides runtime services for the operating system during the power-on phase (ie, the boot phase) of the host. The BIOS 130 is stored in a memory device (a ROM chip or a flash memory chip). In the boot failure rescue mode, the controller 120 makes the BIOS 130 adjust the signal transmission rate corresponding to a signal channel to perform the boot action. In this embodiment, the signal channel is, for example, a signal channel conforming to the PCIe (abbreviation for PCI Express) standard. At present, high-speed devices (such as graphics cards, storage devices, etc.) and at least some of the bus bars (such as extension cables inside the host) in the host conform to the PCIe specification. In terms of implementation details, the storage circuit of the BIOS 130 can pre-store the first storage information corresponding to the first preset rate. When entering the boot failure rescue mode, the BIOS 130 may use the first preset rate for signal transmission according to the first storage information.

The first preset rate may be a signal transmission rate obtained after actual testing before the product is shipped, which can ensure successful booting. In one embodiment, the first preset rate may be a signaling rate compliant with PCIe version 3.0. However, the present invention is not limited to this, and in other embodiments, the first preset rate may also be a signal transmission rate corresponding to other PCIe versions, such as PCIe 4.0 version, PCIe 5.0 version, or PCIe 2.0 version. Generally speaking, the first preset rate usually corresponds to an older PCIe version.

Instead of directly reducing the signal transmission rate to the first preset rate, in another embodiment, the BIOS 130 may further reduce the signal transmission rate in stages during the boot failure rescue mode. For example, in the boot failure rescue mode, the BIOS 130 may first reduce the current signal transmission rate from the corresponding PCIe 4.0 version to the corresponding PCIe 3.0 version. Moreover, when it is confirmed that the booting action at the signal transmission rate corresponding to the PCIe 3.0 version still fails, the BIOS 130 may further reduce the signal transmission rate from the corresponding PCIe 3.0 version to the corresponding PCIe 2.0 version. In short, when it is confirmed that the boot is still unable to be turned on, the BIOS 130 can reduce the signal transmission rate in turn.

By reducing the current signal transmission rate (whether directly to the first preset rate or sequentially reducing the signal transmission rate), there is a high probability that the signal transmission rate due to high-speed devices (such as graphics cards, storage devices, etc.) or bus bars can be eliminated. Unable to boot due to compatibility issues. Therefore, the user can boot normally by executing the boot failure rescue mode. In addition, compared with the prior method of clearing the CMOS settings (all the boot codes stored in the BIOS 130 will be restored to the system default values), the present invention can maintain the current CMOS settings (that is, previously generated and stored by a user setting) a boot code in BIOS 130). In this way, the user can make individual changes to the setting values that may lead to the failure to boot from the previous setting values through the BIOS interface after the normal booting, without having to re-adjust all the setting values.

The booting action includes executing at least one booting test procedure by the controller 120 . In addition, the controller 120 determines whether the execution of the booting action is successful by reading at least one response signal corresponding to the at least one booting test procedure in a predetermined time interval after the at least one booting test procedure is executed. Specifically, the timing mechanism of the watch dog timer set in the BIOS 130 can be used to check whether the response signal generated by the corresponding power-on test program is effectively returned in a preset time interval. If the judgment result is yes, it means that the booting action is successful. On the contrary, if the judgment result is no, it means that the booting action has failed.

FIG. 2 is a schematic structural diagram of a motherboard according to a second embodiment of the present invention. The second embodiment shown in FIG. 2 is an extension of the first embodiment shown in FIG. 1 . The functions and coupling relationships of the motherboard 100 , the substrate 110 , the controller 120 , the first pins 121 , the BIOS 130 , and the first switch element 140 shown in FIG. 2 can be referred to the elements of the same name in the first embodiment shown in FIG. 1 . The description will not be repeated here. Referring to FIG. 2 , the difference between the second embodiment and the first embodiment is that an external device 200 is added to the second embodiment. The external device 200 may be a controller. The second switch element 210 in the external device 200 is wiredly coupled to the first switch element 140 . The second switch element 210 can be turned on by operating the external device 200 . Similarly, the second switching element 210 may be any suitable form of switching element or connector. When the second switch element 210 is turned on, the first switch element 140 is also turned on to pull the first pin 121 to a first voltage level (eg, a high voltage level) and enter the power-on failure rescue mode.

Under the structure of the first embodiment, the user needs to open the casing to turn on the first switch element 140 . However, under the framework of the second embodiment, the user can enter the boot failure rescue mode only by operating the external device 200 . FIG. 3 is a schematic diagram showing the appearance of the external device of the second embodiment. Referring to FIG. 3 , the external device 300 includes a key group 310 and a screen 320 . In this embodiment, the user can perform frequency reduction and frequency increase operations respectively through the button 311 and the button 312 . In addition, the user can perform power-off and power-on operations through the button 313 and the button 314 respectively. Through the button 315, the reboot operation can be performed under the overclock setting value. The operation of clearing the CMOS settings can be performed through the button 316 . The function of the key 317 is the focus of the second embodiment. Through the button 317, the second switch element 317 can be turned on to enter the boot failure rescue mode.

The screen 320 of the external device 300 is used to display various codes. For example, when "00" is displayed, it means that the motherboard cannot detect CPU or CPU abnormality. When the code "D6" is displayed, it means that the output of the graphics card is abnormal. When the code "55" is displayed, it means that the BIOS cannot detect the memory or the memory is abnormal. In a usage situation, when the code "D6" appears, the user can press the button 317 to enter the "boot failure rescue mode". In this way, the failure to boot due to the problem of incompatible signal rates of high-speed devices (eg, graphics card, DRAM) or cables can be eliminated by executing the boot failure rescue mode. After normal booting, the user can individually adjust the settings that may affect the normal operation of the system through the BIOS interface.

FIG. 4 is a flowchart showing the steps of the booting method of the motherboard of the present invention. It should be noted that the booting method of the motherboard shown in FIG. 4 can be applied to the first embodiment shown in FIG. 1 and the second embodiment shown in FIG. 2 at the same time. Please refer to FIG. 1 , FIG. 2 and FIG. 4 at the same time, in step S410 , the controller 120 detects whether the first pin 121 of the controller 120 is at a first voltage level (eg, a high voltage level) to enter the boot failure rescue model. In step S420, in the boot failure rescue mode, the controller 120 causes the BIOS 130 to lower the signal transmission rate of a corresponding signal channel to perform the booting action.

To sum up, the present invention provides a solution in response to the failure to power on condition. By detecting the voltage level of the first pin of the controller, it can enter the boot failure rescue mode. In addition, in this mode, the BIOS adjusts the signal transmission rate, so as to eliminate the situation of being unable to boot due to the compatibility problem of the signal transmission rate. In this way, the user experience can be improved and product returns caused by failure to boot can be reduced.

100: Motherboard 110: Substrate 120: Controller 121: The first pin 130: Basic Input Output System 140: first switching element 200: External device 210: Second switching element 300: External device 310: Button Group 311~317: Button 320: Screen S410, S420: Steps

FIG. 1 is a schematic structural diagram of a motherboard according to a first embodiment of the present invention. FIG. 2 is a schematic structural diagram of a motherboard according to a second embodiment of the present invention. FIG. 3 is a schematic diagram showing the appearance of the external device of the second embodiment. FIG. 4 is a flowchart showing the steps of the booting method of the motherboard of the present invention.

S410, S420: Steps

Claims (14)

A motherboard, comprising: a controller with a first pin; a first switch element for pulling the first pin to a first voltage level when turned on; and a basic input output system ( Basic Input/Output System, BIOS), wherein the controller detects whether the first pin is at the first voltage level to enter a boot failure rescue mode, wherein, in the boot failure rescue mode, the controller A signal transmission rate corresponding to a signal channel is lowered by the basic input output system to perform a booting action. The motherboard of claim 1, wherein the BIOS is further configured to reduce the signal transmission rate to a first preset rate in the boot failure rescue mode. The motherboard of claim 2, wherein the BIOS is further configured to further reduce the signal transmission rate to a second preset rate to perform the booting action again when the booting action fails, wherein the booting action is performed again. The second preset rate is smaller than the first preset rate. The motherboard of claim 1, wherein in the boot failure rescue mode, the BIOS retains a boot code generated by a user setting. The motherboard as claimed in claim 1, wherein the controller is further configured to execute at least one boot-up test program, and in a preset time interval after the at least one boot-up test program is executed, corresponding to the at least one boot-up program by reading At least one response signal generated by the test program is used to determine whether the booting action is performed successfully. The motherboard of claim 1, wherein the first pin is a general-purpose input/output (GPIO) pin of the controller. An external device for a motherboard, for connecting to the motherboard as claimed in claim 1, wherein the external device comprises: a second switch element, coupled to the first switch element, for passing through the first switch element when turned on The switch element pulls the first pin to the first voltage level. A booting method of a motherboard, wherein the motherboard includes a controller, a basic input output system and a first switch element, wherein the first switch element is used to pull a first pin to a first pin when turned on voltage level, and the booting method includes: detecting, by the controller, whether a first pin of the controller is at the first voltage level to enter a boot failure rescue mode; and in the boot failure rescue mode , the controller makes the basic input output system reduce a signal transmission rate corresponding to a signal channel to perform a booting action. The method for booting a motherboard as claimed in claim 8, wherein the step of causing the BIOS to adjust the signal transmission rate by the controller further comprises: causing the BIOS to adjust the signal transmission rate to a first a preset rate. The booting method of a motherboard as claimed in claim 9, further comprising: when the controller confirms that the booting action fails, causing the basic input output system to further reduce the signal transmission rate to a second preset rate to The booting action is performed again, wherein the second preset rate is smaller than the first preset rate. The booting method of a motherboard as claimed in claim 8, wherein in the boot failure rescue mode, the BIOS retains a boot code generated by a user setting. The method for booting a motherboard according to claim 8, further comprising: executing at least one booting test program by the controller, and reading the corresponding At least one response signal generated by at least one boot test program is used to determine whether the re-execution of the boot action is successful. The booting method of a motherboard as claimed in claim 8, wherein the first pin is a general-purpose input/output pin of the controller. The booting method of a mainboard as claimed in claim 8, wherein the mainboard is further coupled to an external device, and the external device comprises a second switch element for connecting the first switch through the first switch element when turned on The pin is pulled to the first voltage level.

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