WO2017008750A1 - 一种用于gsm/dcs的共源共栅射频功率放大器 - Google Patents

一种用于gsm/dcs的共源共栅射频功率放大器 Download PDF

Info

Publication number
WO2017008750A1
WO2017008750A1 PCT/CN2016/090009 CN2016090009W WO2017008750A1 WO 2017008750 A1 WO2017008750 A1 WO 2017008750A1 CN 2016090009 W CN2016090009 W CN 2016090009W WO 2017008750 A1 WO2017008750 A1 WO 2017008750A1
Authority
WO
WIPO (PCT)
Prior art keywords
power amplifier
transistor
gsm
cascode
dcs
Prior art date
Application number
PCT/CN2016/090009
Other languages
English (en)
French (fr)
Inventor
黄清华
刘磊
陈高鹏
Original Assignee
宜确半导体（苏州）有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 宜确半导体（苏州）有限公司 filed Critical 宜确半导体（苏州）有限公司
Publication of WO2017008750A1 publication Critical patent/WO2017008750A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation

Definitions

  • the invention belongs to the technical field of radio frequency integrated circuits, and particularly relates to a cascode radio frequency power amplifier for GSM/DCS.
  • the RF power amplifier is an indispensable key component in various wireless communication applications for power amplifying the modulated RF signal output by the transceiver to meet the power requirements of the RF signal required for wireless communication.
  • RF power amplifiers are large-signal devices, and therefore semiconductor devices for manufacturing RF power amplifiers are required to have high breakdown voltage, high current density, and the like.
  • Si CMOS technology is widely used.
  • HBT and pHEMT processes based on GaAs materials are obtained in the field of RF power amplifiers due to their high breakdown voltage and carrier mobility. A wide range of applications.
  • a typical RF power amplifier circuit, transistor 103 as an important active device in the RF power amplifier, is usually fabricated in Si or GaAs process in practice; RF power amplifier input signal port RFin through the input matching network 101 is coupled to the gate of transistor 103; the gate of transistor 103 is also coupled to bias voltage port Vbias of the RF power amplifier via bias circuit 102; the source of transistor 103 is coupled to ground; the drain of transistor 103 is passed through a choke inductor 104 is coupled to the supply voltage port Vcc of the RF power amplifier; the supply voltage port Vcc is also coupled to one end of the decoupling capacitor 105, the other end of the decoupling capacitor 105 is coupled to ground; the drain of the transistor 103 is also coupled through the output matching network 106 The output signal port RFout of the RF power amplifier.
  • the input signal voltage swing of the RF power amplifier is low, and after the power amplification of the transistor 103, the voltage swing of the output signal is greatly increased.
  • the voltage swing across the transistor's drain can typically reach 2 ⁇ Vcc.
  • the voltage swing on the drain of the transistor will reach 10V.
  • the RF power amplifier is operating in the Class-E state, the voltage swing across the drain of the transistor will be higher, above 3.5 ⁇ Vcc. It can be seen that the transistor in the RF power amplifier will withstand a swing much higher than the supply voltage, which puts high requirements on the breakdown voltage and reliability of the transistor.
  • the use of semiconductor processes with sufficiently high breakdown voltages to fabricate RF power amplifiers will severely limit the choice, losing design flexibility and reducing integration.
  • the industry typically increases the breakdown voltage of devices by designing the RF power amplifier circuit as a cascode structure. As shown in Figure 2, it is a typical cascode RF power amplifier.
  • the transistor 203 and the transistor 204 are active devices for realizing power amplification in the radio frequency power amplifier, and are usually fabricated by a Si or GaAs process in practice; the input signal port RFin of the radio frequency power amplifier is connected to the gate of the transistor 203 through the input matching network 201;
  • the gate of transistor 203 is also coupled to bias voltage port Vbias1 of the RF power amplifier via bias circuit 202; the source of transistor 203 is coupled to ground; the drain of transistor 203 is coupled to the source of transistor 204; the gate of transistor 204 Connected to the bias voltage port Vbias2 of the RF power amplifier via bias circuit 205; the gate of transistor 204 is also coupled to one end of decoupling capacitor 206, the other end of decoupling capacitor 206 is coupled to
  • transistor 203 is a common source stage and transistor 204 is a common gate; such a cascode structure has a higher power gain and a higher inverse than a single transistor common source structure. To the isolation; more importantly, the cascode structure has a higher breakdown voltage than the single transistor common source structure, allowing the RF power amplifier to have a higher operating voltage.
  • the cascode RF power amplifier operating in the Class-A/AB/B state has a RF voltage swing of 2 ⁇ Vcc at the drain of the transistor 204 and a RF voltage swing at the drain of the transistor 203. Not more than Vcc. Therefore, the voltage swing between the drain and the source of the transistor 203 and the transistor 204 does not exceed 2 ⁇ Vcc, which ensures that the transistor operates in a safe region.
  • 2G GSM is still the communication mode that all mobile terminals need to support as the most widely deployed and most mature mobile communication standard.
  • the uplink communication in the 2G GSM communication mode includes four frequency bands, namely: GSM850: 824-849MHz; GSM900: 880-915MHz; DCS1800: 1710-1785MHz; PCS1900: 1850-1910MHz; usually all mobile terminal power amplifiers need to support These 4 bands of 2G GSM communication mode.
  • the GSM850 band is adjacent to the GSM900 band, it is collectively referred to as the GSM low band or the GSM band; the DCS1800 band and The PCS1900 band is adjacent and is collectively referred to as the GSM high band or DCS band.
  • Two RF power amplifiers can be used to cover the GSM band and the DCS band respectively, that is, one RF power amplifier covers the GSM band 824-915 MHz, and the other RF power amplifier covers the DCS band 1710-1910 MHz.
  • the core circuits of two RF power amplifiers supporting different frequency bands are fabricated on the same die and packaged in the same chip.
  • the object of the present invention is to provide a cascode RF power amplifier for GSM/DCS, which adopts a cascode structure based on GaAs E/D pHEMT process, and integrates two on the same chip for GSM respectively.
  • a common-source cascode RF power amplifier in the frequency band and DCS band, and two RF power amplifiers share a common-gate-level gate capacitance on the chip, which has the advantages of high performance and low cost.
  • a cascode RF power amplifier for GSM/DCS comprising a GSM band cascode power amplifying circuit composed of a first RF transistor and a second RF transistor, and a third RF transistor and a fourth RF transistor DCS band cascode power amplifier circuit, the GSM band cascode power amplifier circuit and DCS band cascode power amplifier circuit share a common gate level gate decoupling capacitor; GSM band cascode power a first bias circuit and a second bias circuit of the amplifying circuit and a third bias circuit and a fourth bias circuit of the DCS band cascode power amplifying circuit are connected to the power control unit, the power control unit having at least one An input control signal terminal for adjusting an output bias voltage of the first bias circuit, the second bias circuit, the third bias circuit, and the fourth bias circuit.
  • the input control signal end is connected to the system controller or is connected to the output end of the RF power amplifier output detection processing circuit.
  • the first RF transistor, the second RF transistor, the third RF transistor, and the fourth RF transistor are GaAs E/D pHEMT transistors.
  • the common gate level decoupling capacitor has a capacitance greater than 100 pF.
  • the GSM band cascode power amplifying circuit and the DCS band cascode power amplifying circuit can be a multi-stage cascode power amplifying circuit.
  • the Ctrl signal can reasonably control the working state of the cascode transistor pair (including on, off, high bias voltage, low bias voltage, etc.), which can optimize the efficiency and linearity of the RF power amplifier at different output power levels. Performance indicators such as degree, with high performance and low cost advantages.
  • 1 is a circuit diagram of a typical RF power amplifier
  • FIG. 2 is a circuit diagram of a conventional RF power amplifier of a common cascode structure
  • FIG. 3 is a circuit diagram of a GSM/DCS cascode RF power amplifier that does not share a common gate level gate capacitance
  • FIG. 4 is a circuit diagram of a cascode RF power amplifier for GSM/DCS of the present invention.
  • a GSM/DCS quad-band power amplifier adopting a cascode structure is composed of a GSM input matching network 301, a first bias circuit 302, a second bias circuit 305, a first transistor 303, and a second transistor.
  • the first decoupling capacitor 307, the first choke inductor 308, the second decoupling capacitor 309, and the GSM output matching network 310 form a GSM band RF power amplifying circuit with a cascode structure; the DCS input matching network 311, The three bias circuit 312, the fourth bias circuit 315, the third transistor 313, the fourth transistor 314, the third decoupling capacitor 317, the second choke inductor 318, the fourth decoupling capacitor 319, and the DCS output matching network 320 are formed.
  • the power control unit 306 receives at least one control signal Ctrl from the outside, and the control signal Ctrl controls the first bias circuit 302, the second bias circuit 305, and the third bias.
  • the output voltages of the circuit 312 and the fourth bias circuit 315 control the operating states of the first transistor 303, the second transistor 304, the third transistor 313, and the fourth transistor 314, thereby controlling the operation of the GSM band power amplifier and the DCS band power amplifier. State and achieve power control.
  • the core circuit part of the GSM band power amplifier and DCS band power amplifier needs to be fabricated on the same die, which will make the die area larger, especially the decoupling capacitor in the circuit, usually in the range of tens of pF to several hundred pF.
  • the level will occupy a considerable die area, resulting in a higher cost for the entire 2G RF power amplifier chip.
  • the two RF power amplifiers share a common-gate-level gate decoupling capacitor on the chip.
  • FIG. 4 is a GSM/DCS quad-band power amplifier using a cascode structure.
  • the GSM input matching network 401, the first bias circuit 402, the second bias circuit 405, the first transistor 403, the second transistor 404, the first decoupling capacitor 407, the first choke inductor 408, and the second decoupling capacitor 409, GSM output matching network 410 constitutes a GSM band RF power amplifier circuit of cascode structure; DCS input matching network 411, third bias circuit 412, fourth bias circuit 415, third transistor 413, fourth transistor 414.
  • the first decoupling capacitor 407, the second choke inductor 418, the fourth decoupling capacitor 419, and the DCS output matching network 420 form a DCS band RF power amplifying circuit of the cascode structure; the power control unit 406 accepts from the outside. At least one control signal Ctrl, the control signal Ctrl controls the output voltages of the first bias circuit 402, the second bias circuit 405, the third bias circuit 412, and the fourth bias circuit 415 to control the first transistor 403 and the second transistor 404.
  • the operating states of the third transistor 413 and the fourth transistor 414 control the operating states of the GSM band power amplifier and the DCS band power amplifier and implement power control.
  • At least one input control signal Ctrl of the power control circuit 406 may be from a system controller (such as a central processing unit in a wireless communication device, a radio frequency transceiver, etc.), or may be derived from an output signal of the RF power amplifier output detection processing circuit. .
  • a system controller such as a central processing unit in a wireless communication device, a radio frequency transceiver, etc.
  • the first transistor 403, the second transistor 404, the third transistor 413, and the fourth transistor 414 are all GaAs pHEMT transistors. It can be seen from Fig. 4 that the GSM band cascode RF power amplifier circuit and the DCS band cascode RF power amplifier circuit have the same circuit topology, and are cascode structures composed of GaAs pHEMT crystals. Compared with the GSM radio frequency power amplifier shown in FIG. 3, in the solution proposed by the present invention, the GSM band RF power amplifier and the DCS band RF power amplifier share the same common gate level gate decoupling capacitor.
  • the gate of the common-gate transistor 404 of the GSM band cascode RF power amplifier is connected to the first of the decoupling capacitor 407
  • the gate of the common-gate-level transistor 414 of the DCS-band cascode RF power amplifier is also coupled to the first terminal of the decoupling capacitor 407.
  • the GSM band RF power amplifier works differently from the DCS band RF power amplifier, that is, at most one of the two RF power amplifiers is working at the same time. Therefore, under the technical solution of the present invention, at least one control signal Ctrl controls the GSM band RF power amplifier and the DCS band RF according to the instruction of the baseband chip or the RF transceiver chip by controlling the opening and closing of the corresponding bias circuit.
  • the Ctrl signal controls the first bias circuit 402 and the second bias circuit 405 to be turned on, and controls the third bias circuit 412 and the fourth bias circuit 415 to be turned off.
  • the GSM band RF power amplifier is turned off.
  • the DCS band RF power amplifier is in the off state; at another time, the Ctrl signal controls the first bias circuit 402 and the second bias circuit 405 to be turned off, and controls the third bias circuit 412 and the fourth bias. Circuit 415 is turned on.
  • the DCS band RF power amplifier is in operation and the GSM band RF power amplifier is off.
  • the common-gate-level gate decoupling capacitor 407 can be shared by both the GSM-band RF power amplifier and the DCS-band RF power amplifier without interfering with the normal operation of the respective circuits.
  • the common gate-level gate decoupling capacitors of the GSM band and DCS band RF power amplifiers have a capacitance greater than 100pF, which will occupy a considerable chip area and even exceed the transistor's occupation.
  • the chip area therefore, under the technical solution proposed by the present invention, the chip area occupied by the common-gate gate decoupling capacitors is greatly reduced to half of the original, which effectively reduces the cost of the GSM RF power amplifier.
  • the GSM band RF power amplifier and the DCS band RF power amplifier in the above embodiments are single-stage RF power amplifiers, and can be designed as two-level, three-level or even more-level RF according to specific conditions.
  • a power amplifier, and in accordance with the spirit of the present invention, the common-gate-level gate decoupling capacitors of the respective stages of the GSM band and the DCS band RF power amplifier can be shared.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

本发明公开了一种用于GSM/DCS的共源共栅射频功率放大器，包括由第一射频晶体管和第二射频晶体管组成的GSM频段共源共栅功率放大电路和由第三射频晶体管和第四射频晶体管组成的DCS频段共源共栅功率放大电路，所述GSM频段共源共栅功率放大电路和DCS频段共源共栅功率放大电路共用一个共栅级栅极去耦电容；GSM频段共源共栅功率放大电路的第一偏置电路和第二偏置电路以及DCS频段共源共栅功率放大电路的第三偏置电路和第四偏置电路连接功率控制单元，所述功率控制单元具有至少一个用于调整四个偏置电路的输出偏置电压的控制信号端。四个晶体管采用GaAs E/D pHEMT工艺，具有高性能及低成本的优势。

Description

一种用于GSM/DCS的共源共栅射频功率放大器 技术领域
本发明属于射频集成电路技术领域，具体涉及一种用于GSM/DCS的共源共栅射频功率放大器。
背景技术
射频功率放大器是各种无线通信应用中必不可少的关键部件，用于将收发信机输出的已调制射频信号进行功率放大，以满足无线通信所需的射频信号的功率要求。射频功率放大器属于大信号器件，因此要求用于制造射频功率放大器的半导体器件具有高击穿电压、高电流密度等特性。相对于数字电路、模拟电路等小信号电路所普遍采用Si CMOS工艺，基于GaAs材料的HBT、pHEMT等工艺，由于其较高的击穿电压和载流子迁移速率，在射频功率放大器领域中得到了广泛的应用。
如图1所示为一个典型的射频功率放大器电路，晶体管103作为射频功率放大器中的重要有源器件，在实际中通常采用Si或GaAs工艺制造；射频功率放大器的输入信号端口RFin通过输入匹配网络101连接到晶体管103的栅极；晶体管103的栅极还通过偏置电路102连接到射频功率放大器的偏置电压端口Vbias；晶体管103的源极连接到地；晶体管103的漏极通过扼流电感104连接到射频功率放大器的供电电压端口Vcc；供电电压端口Vcc还连接到去耦电容105的一端，去耦电容105的另外一端连接到地；晶体管103的漏极还通过输出匹配网络106连接到射频功率放大器的输出信号端口RFout。射频功率放大器的输入信号电压摆幅较低，经过晶体管103功率放大之后，输出信号的电压摆幅大幅提升。对于一个典型的Class-A/B/AB射频功率放大器，在供电电压Vcc下工作，晶体管漏极上的电压摆幅通常可以达到2×Vcc。譬如，当射频功率放大器的供电电压Vcc为5V时，晶体管漏极上的电压摆幅将达到10V。如果射频功率放大器工作于Class-E状态，那么晶体管漏极上的电压摆幅将会更高，达到3.5×Vcc以上。由此可见，射频功率放大器中的晶体管上将承受远高于供电电压的摆幅，对晶体管的击穿电压及可靠性提出了很高的要求。选用足够高击穿电压的半导体工艺来制造射频功率放大器，将使得选择余地严重受限，丧失了设计灵活性并将降低集成度。
为了使得较小击穿电压半导体工艺也可以用于制造射频功率放大器，业界通常通过将射频功率放大器电路设计为共源共栅结构来提高器件的击穿电压。如图2所示，为一个典型的共源共栅结构的射频功率放大器。晶体管203和晶体管204为射频功率放大器中实现功率放大的有源器件，在实际中通常采用Si或GaAs工艺制造；射频功率放大器的输入信号端口RFin通过输入匹配网络201连接到晶体管203的栅极；晶体管203的栅极还通过偏置电路202连接到射频功率放大器的偏置电压端口Vbias1；晶体管203的源极连接到地；晶体管203的漏极连接到晶体管204的源极；晶体管204的栅极通过偏置电路205连接到射频功率放大器的偏置电压端口Vbias2；晶体管204的栅极还连接到去耦电容206的一端，去耦电容206的另外一端连接到地；晶体管204的漏极通过扼流电感207连接到射频功率放大器的供电电压端口Vcc；供电电压端口Vcc还连接到去耦电容208的一端，去耦电容208的另外一端连接到地；晶体管204的漏极还通过输出匹配网络209连接到射频功率放大器的输出信号端口RFout。射频功率放大器的输入信号电压摆幅较低，经过晶体管203及晶体管204功率放大之后，输出信号的电压摆幅大幅提升。在共源共栅结构射频功率放大器中，晶体管203为共源级，晶体管204为共栅极；这样的共源共栅结构相比单晶体管共源结构具有更高的功率增益和更高的反向隔离度；更为重要的是，共源共栅结构比单晶体管共源结构具有更高的击穿电压，允许射频功率放大器有更高的工作电压。
如图2所示，工作于Class-A/AB/B状态的共源共栅结构射频功率放大器，晶体管204漏极的射频电压摆幅为2×Vcc，晶体管203漏极的射频电压摆幅则不超过Vcc。因此，晶体管203及晶体管204各自漏极与源极之间的电压摆幅都不超过2×Vcc，保证了晶体管工作于安全区域。
虽然目前3G和4G移动通信在全世界范围内已经获得越来越多的部署和应用，但是作为部署最广泛和应用最成熟的移动通信标准，2G GSM依然是所有移动终端都需要支持的通信模式。2G GSM通信模式中的上行通信包括4个频段，分别是：GSM850：824-849MHz；GSM900：880-915MHz；DCS1800：1710-1785MHz；PCS1900：1850-1910MHz；通常所有移动终端的功率放大器都需要支持2G GSM通信模式的这4个频段。由于GSM850频段与GSM900频段相邻，统称为GSM低频段或GSM频段；DCS1800频段与 PCS1900频段相邻，统称为GSM高频段或DCS频段。通常可以采用两个射频功率放大器分别覆盖GSM频段和DCS频段，即一个射频功率放大器覆盖GSM频段824-915MHz，另外一个射频功率放大器覆盖DCS频段1710-1910MHz。并且两个支持不同频段的射频功率放大器的核心电路制造在同一个管芯上，封装在同一个芯片当中。这样会使得管芯面积较为庞大，尤其是电路中的去耦电容，通常在几十pF到几百pF量级，会占据相当大的管芯面积，从而使得整个2G射频功率放大器芯片具有较高的成本。
发明内容
本发明目的是：提供一种用于GSM/DCS的共源共栅射频功率放大器，采用基于GaAs E/D pHEMT工艺的共源共栅结构，在同一颗芯片上集成有两个分别应用于GSM频段和DCS频段的共源共栅结构的射频功率放大器，并且两个射频功率放大器在芯片上共用一个共栅级栅极电容，具有高性能及低成本的优势。
本发明的技术方案是：
一种用于GSM/DCS的共源共栅射频功率放大器，包括由第一射频晶体管和第二射频晶体管组成的GSM频段共源共栅功率放大电路和由第三射频晶体管和第四射频晶体管组成的DCS频段共源共栅功率放大电路，所述GSM频段共源共栅功率放大电路和DCS频段共源共栅功率放大电路共用一个共栅级栅极去耦电容；GSM频段共源共栅功率放大电路的第一偏置电路和第二偏置电路以及DCS频段共源共栅功率放大电路的第三偏置电路和第四偏置电路连接功率控制单元，所述功率控制单元具有至少一个用于调整第一偏置电路、第二偏置电路、第三偏置电路和第四偏置电路的输出偏置电压的输入控制信号端。
优选的，所述输入控制信号端连接系统控制器或者连接射频功率放大器输出检测处理电路的输出端。
优选的，所述第一射频晶体管、第二射频晶体管、第三射频晶体管和第四射频晶体管为GaAs E/D pHEMT晶体管。
优选的，所述共栅级栅极去耦电容的容值大于100pF。
优选的，所述GSM频段共源共栅功率放大电路和DCS频段共源共栅功率放大电路可以为多级共源共栅功率放大电路。
本发明的优点是：
1.采用基于GaAs E/D-pHEMT工艺的共源共栅结构，在同一颗芯片上集成两个分别应用于GSM频段和DCS频段的射频功率放大电路，并且两个射频功率放大电路在芯片上共用一个共栅级栅极电容，使得芯片的面积大大减少，大大降低了GSM射频功率放大器的成本。
2.通过Ctrl信号合理地控制共源共栅晶体管对的工作状态(包括打开、关闭、高偏置电压、低偏置电压等)，可以优化射频功率放大器在不同输出功率等级下的效率及线性度等性能指标，具有高性能及低成本优势。
附图说明
下面结合附图及实施例对本发明作进一步描述：
图1为现有典型的射频功率放大器电路图；
图2为现有典型的共源共栅结构的射频功率放大器电路图；
图3为不共用共栅级栅极电容的GSM/DCS的共源共栅射频功率放大器电路图；
图4为本发明用于GSM/DCS的共源共栅射频功率放大器的电路图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明了，下面结合具体实施方式并参照附图，对本发明进一步详细说明。应该理解，这些描述只是示例性的，而并非要限制本发明的范围。此外，在以下说明中，省略了对公知结构和技术的描述，以避免不必要地混淆本发明的概念。
实施例：
如图3所示，一个采用共源共栅结构的GSM/DCS四频功率放大器，由GSM输入匹配网络301、第一偏置电路302、第二偏置电路305、第一晶体管303、第二晶体管304、第一去耦电容307、第一扼流电感308、第二去耦电容309、GSM输出匹配网络310组成共源共栅结构的GSM频段射频功率放大电路；由DCS输入匹配网络311、第三偏置电路312、第四偏置电路315、第三晶体管313、第四晶体管314、第三去耦电容317、第二扼流电感318、第四去耦电容319、DCS输出匹配网络320组成共源共栅结构的DCS频段射频功率放大电路。功率控制单元306接受来自外部的至少一个控制信号Ctrl，控制信号Ctrl控制第一偏置电路302、第二偏置电路305、第三偏 置电路312、第四偏置电路315的输出电压控制第一晶体管303、第二晶体管304、第三晶体管313、第四晶体管314的工作状态，从而控制GSM频段功率放大器和DCS频段功率放大器的工作状态并实现功率控制。
GSM频段功率放大器和DCS频段功率放大器的核心电路部分，需要制造在同一个管芯上，会使得管芯面积较为庞大，尤其是电路中的去耦电容，通常在几十pF到几百pF量级，会占据相当大的管芯面积，从而使得整个2G射频功率放大器芯片具有较高的成本。
因此为了减少管芯面积，两个射频功率放大器在芯片上共用一个共栅级栅极去耦电容。如图4所示，为一个采用共源共栅结构的GSM/DCS四频功率放大器。由GSM输入匹配网络401、第一偏置电路402、第二偏置电路405、第一晶体管403、第二晶体管404、第一去耦电容407、第一扼流电感408、第二去耦电容409、GSM输出匹配网络410组成共源共栅结构的GSM频段射频功率放大电路；由DCS输入匹配网络411、第三偏置电路412、第四偏置电路415、第三晶体管413、第四晶体管414、第一去耦电容407、第二扼流电感418、第四去耦电容419、DCS输出匹配网络420组成共源共栅结构的DCS频段射频功率放大电路；功率控制单元406接受来自外部的至少一个控制信号Ctrl，控制信号Ctrl控制第一偏置电路402、第二偏置电路405、第三偏置电路412、第四偏置电路415的输出电压控制第一晶体管403、第二晶体管404、第三晶体管413、第四晶体管414的工作状态，从而控制GSM频段功率放大器和DCS频段功率放大器的工作状态并实现功率控制。
功率控制电路406的至少一个输入控制信号Ctrl，既可以来自于系统控制器(如无线通信设备中的中央处理器、射频收发器等)，也可以来自于射频功率放大器输出检测处理电路的输出信号。
第一晶体管403、第二晶体管404、第三晶体管413和第四晶体管414均为GaAs pHEMT晶体管。由图4可见，GSM频段共源共栅射频功率放大电路和DCS频段共源共栅射频功率放大电路在电路拓扑结构上相同，都是由GaAs pHEMT晶体构成的共源共栅结构。相较于如图3所示的GSM射频功率放大器，本发明所提出的方案中，GSM频段射频功率放大器和DCS频段射频功率放大器共用同一个共栅级栅极去耦电容。即GSM频段共源共栅射频功率放大器的共栅级晶体管404的栅极连接到去耦电容407的第一 端，DCS频段共源共栅射频功率放大器的共栅级晶体管414的栅极也连接到去耦电容407的第一端。在GSM移动通信中，GSM频段射频功率放大器与DCS频段射频功率放大器不同时工作，即在同一时刻下，两个射频功率放大器至多仅有一个在工作。因此，本发明所提的技术方案下，至少一个控制信号Ctrl根据基带芯片或射频收发器芯片的指令，通过控制对应的偏置电路的开启和关闭，来控制GSM频段射频功率放大器及DCS频段射频功率放大器的开启和关闭。譬如，在某时刻下，Ctrl信号控制第一偏置电路402及第二偏置电路405开启，并控制第三偏置电路412及第四偏置电路415关闭，此时刻下GSM频段射频功率放大器处于工作状态而DCS频段射频功率放大器处于关闭状态；在另一时刻下，Ctrl信号控制第一偏置电路402及第二偏置电路405关闭，并控制第三偏置电路412及第四偏置电路415开启，此时刻下DCS频段射频功率放大器处于工作状态而GSM频段射频功率放大器处于关闭状态。由上可知，共栅级栅极去耦电容407可以由GSM频段射频功率放大器和DCS频段射频功率放大器两者共享而不会干扰各自电路的正常工作。
为了达到较好的栅极去耦效果，通常GSM频段和DCS频段射频功率放大器的共栅级栅极去耦电容的容值大于100pF，将占据相当大的芯片面积，甚至超过了晶体管所占的芯片面积；因此，在本发明所提出的技术方案下，共栅级栅极去耦电容所占据的芯片面积将大幅缩小为原先的一半，有效降低了GSM射频功率放大器的成本。
另外需要说明的是，上述实施例中GSM频段射频功率放大器和DCS频段射频功率放大器都是单级射频功率放大器，在具体实施中可以根据具体情况设计为两级、三级甚至更多级的射频功率放大器，并且根据本发明之精神，GSM频段和DCS频段射频功率放大器相应各级的共栅级栅极去耦电容都可以进行共用。
应当理解的是，本发明的上述具体实施方式仅仅用于示例性说明或解释本发明的原理，而不构成对本发明的限制。因此，在不偏离本发明的精神和范围的情况下所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。此外，本发明所附权利要求旨在涵盖落入所附权利要求范围和边界、或者这种范围和边界的等同形式内的全部变化和修改例。

Claims (5)

  1. 一种用于GSM/DCS的共源共栅射频功率放大器，其特征在于，包括由第一射频晶体管和第二射频晶体管组成的GSM频段共源共栅功率放大电路和由第三射频晶体管和第四射频晶体管组成的DCS频段共源共栅功率放大电路，所述GSM频段共源共栅功率放大电路和DCS频段共源共栅功率放大电路共用一个共栅级栅极去耦电容；GSM频段共源共栅功率放大电路的第一偏置电路和第二偏置电路以及DCS频段共源共栅功率放大电路的第三偏置电路和第四偏置电路连接功率控制单元，所述功率控制单元具有至少一个用于调整第一偏置电路、第二偏置电路、第三偏置电路和第四偏置电路的输出偏置电压的输入控制信号端。
  2. 根据权利要求1所述的用于GSM/DCS的共源共栅射频功率放大器，其特征在于，所述输入控制信号端连接系统控制器或者连接射频功率放大器输出检测处理电路的输出端。
  3. 根据权利要求1所述的用于GSM/DCS的共源共栅射频功率放大器，其特征在于，所述第一射频晶体管、第二射频晶体管、第三射频晶体管和第四射频晶体管为GaAs E/D pHEMT晶体管。
  4. 根据权利要求1所述的用于GSM/DCS的共源共栅射频功率放大器，其特征在于，所述共栅级栅极去耦电容的容值大于100pF。
  5. 根据权利要求1所述的用于GSM/DCS的共源共栅射频功率放大器，其特征在于，所述GSM频段共源共栅功率放大电路和DCS频段共源共栅功率放大电路可以为多级共源共栅功率放大电路。
PCT/CN2016/090009 2015-07-15 2016-07-14 一种用于gsm/dcs的共源共栅射频功率放大器 WO2017008750A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510415574.X 2015-07-15
CN201510415574.XA CN104967414A (zh) 2015-07-15 2015-07-15 一种用于gsm/dcs的共源共栅射频功率放大器

Publications (1)

Publication Number Publication Date
WO2017008750A1 true WO2017008750A1 (zh) 2017-01-19

Family

ID=54221384

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/090009 WO2017008750A1 (zh) 2015-07-15 2016-07-14 一种用于gsm/dcs的共源共栅射频功率放大器

Country Status (2)

Country Link
CN (1) CN104967414A (zh)
WO (1) WO2017008750A1 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114244285A (zh) * 2021-12-16 2022-03-25 宜确半导体（苏州）有限公司 射频功率放大电路及射频功率放大器
CN114944819A (zh) * 2022-05-16 2022-08-26 广东工业大学 一种用于射频功率放大器的偏置电路
CN116667801A (zh) * 2023-07-28 2023-08-29 宜确半导体（苏州）有限公司 一种射频功率放大器、半导体管芯及电子设备

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104967414A (zh) * 2015-07-15 2015-10-07 宜确半导体（苏州）有限公司 一种用于gsm/dcs的共源共栅射频功率放大器
US9948252B1 (en) * 2017-04-06 2018-04-17 Psemi Corporation Device stack with novel gate capacitor topology
CN112953416B (zh) * 2021-03-12 2023-12-12 上海旦迪通信技术有限公司 一种宽工作电压的cmos射频放大器

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101938256A (zh) * 2010-09-03 2011-01-05 清华大学 全集成双频带可配置射频功率放大器
CN103532503A (zh) * 2013-09-18 2014-01-22 清华大学 功率放大器
CN104716905A (zh) * 2015-04-01 2015-06-17 宜确半导体（苏州）有限公司 一种效率提高的共源共栅射频功率放大器
CN104967414A (zh) * 2015-07-15 2015-10-07 宜确半导体（苏州）有限公司 一种用于gsm/dcs的共源共栅射频功率放大器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101667810B (zh) * 2009-09-29 2011-11-16 锐迪科科技有限公司 双频射频功率放大器电路芯片
US8737935B2 (en) * 2012-04-30 2014-05-27 Broadcom Corporation Multi-band up-convertor mixer
CN204697011U (zh) * 2015-07-15 2015-10-07 宜确半导体（苏州）有限公司 一种用于gsm/dcs的共源共栅射频功率放大器

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101938256A (zh) * 2010-09-03 2011-01-05 清华大学 全集成双频带可配置射频功率放大器
CN103532503A (zh) * 2013-09-18 2014-01-22 清华大学 功率放大器
CN104716905A (zh) * 2015-04-01 2015-06-17 宜确半导体（苏州）有限公司 一种效率提高的共源共栅射频功率放大器
CN104967414A (zh) * 2015-07-15 2015-10-07 宜确半导体（苏州）有限公司 一种用于gsm/dcs的共源共栅射频功率放大器

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114244285A (zh) * 2021-12-16 2022-03-25 宜确半导体（苏州）有限公司 射频功率放大电路及射频功率放大器
CN114944819A (zh) * 2022-05-16 2022-08-26 广东工业大学 一种用于射频功率放大器的偏置电路
CN114944819B (zh) * 2022-05-16 2023-02-10 广东工业大学 一种用于射频功率放大器的偏置电路
US11777454B1 (en) 2022-05-16 2023-10-03 Guangdong University Of Technology Bias circuit for radio frequency power amplifier
CN116667801A (zh) * 2023-07-28 2023-08-29 宜确半导体（苏州）有限公司 一种射频功率放大器、半导体管芯及电子设备
CN116667801B (zh) * 2023-07-28 2023-10-20 宜确半导体（苏州）有限公司 一种射频功率放大器、半导体管芯及电子设备

Also Published As

Publication number Publication date
CN104967414A (zh) 2015-10-07

Similar Documents

Publication Publication Date Title
WO2017008750A1 (zh) 一种用于gsm/dcs的共源共栅射频功率放大器
WO2016155614A1 (zh) 一种效率提高的共源共栅射频功率放大器
US8564366B2 (en) High-frequency power amplifier device
US9413309B1 (en) Apparatus and methods for a cascode amplifier topology for millimeter-wave power application
US9698740B2 (en) Mode linearization switch circuit
TWI654831B (zh) 通訊模組
CN108063600B (zh) 一种低噪声放大器及射频前端集成电路
US10911003B2 (en) Doherty amplifier
US10523161B2 (en) Power amplification module
WO2016155612A1 (zh) 一种改进的共源共栅射频功率放大器
KR101751071B1 (ko) 전력 증폭기
CN204442292U (zh) 一种效率提高的共源共栅射频功率放大器
US8378744B2 (en) Multi-mode power amplifier
JP2018019231A (ja) 電力増幅モジュール
Meghdadi et al. A highly linear dual-gain CMOS low-noise amplifier for $ X $-band
US8519795B2 (en) High frequency power amplifier
KR101590605B1 (ko) 무선 송수신기용 선형 전력증폭기
Yamamoto et al. A WCDMA multiband power amplifier module with Si-CMOS/GaAs-HBT hybrid power-stage configuration
KR20150068650A (ko) 인버티드 토폴로지를 이용한 신호 증폭기
CN204697011U (zh) 一种用于gsm/dcs的共源共栅射频功率放大器
JP2012004777A (ja) 高周波増幅器
US9641130B2 (en) Low noise amplifier with noise and linearity improvement
CN110661494A (zh) 高频放大电路及半导体设备
KR101435342B1 (ko) 이득을 부스팅하는 증폭기
Fan et al. Design of a 0.7∼ 1.5 GHz wideband power amplifier in 0.18-μm CMOS process

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16823897

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16823897

Country of ref document: EP

Kind code of ref document: A1