WO2016204209A1

WO2016204209A1 - Laminated wiring board and probe card provided with same

Info

Publication number: WO2016204209A1
Application number: PCT/JP2016/067878
Authority: WO
Inventors: 竹村　忠治; 鉄三原; 正樹葛西; 徹目黒
Original assignee: 株式会社村田製作所
Priority date: 2015-06-19
Filing date: 2016-06-16
Publication date: 2016-12-22
Also published as: KR102014111B1; JPWO2016204209A1; JP6500987B2; KR20170132267A

Abstract

In a laminated wiring board comprising a resin portion laminated on a core board formed from ceramic, the peeling of a mounting electrode for a component mounted on a major plane of the resin portion is decreased. A laminated wiring board 3a to which a plurality of probe pins 5a to 5e is connected comprises a laminate of: a core board 8 comprising a laminate of a plurality of ceramic layers 8a; a mounting electrode 13 which is disposed on one major plane 80a of the core board 8 and which is used for mounting a component; a resin portion 9 which comprises a laminate of a plurality of resin layers 9a and which is laminated on the one major plane 80a of the core board 8; and a plurality of connecting electrode 11a to 11e which are exposed on a major plane 90a of the resin portion 9 on the opposite side from the core board 8, and which are connected to the probe pins 5a to 5e, wherein the mounting electrode 13 is partially exposed on the major plane 90a of the resin portion 9 via a through hole 16 formed in the resin portion 9.

Description

Multilayer wiring board and probe card having the same

The present invention relates to a laminated wiring board including a core substrate formed by laminating a plurality of ceramic layers, and a resin portion laminated on one main surface of the core substrate, and a probe card including the laminated wiring substrate.

With the recent increase in the density of external terminals of semiconductor elements, development of a wiring board for a probe card capable of electrical inspection of this type of semiconductor element is in progress. For example, as shown in FIG. 5, the multilayer wiring board 100 described in Patent Document 1 includes a core substrate 101 formed by stacking a plurality of ceramic layers 101 a and a plurality of resin layers 102 a (for example, polyimide). The resin part 102 which comprises. Here, a plurality of connection electrodes 103 connected to the probe pins are formed on the upper surface of the multilayer wiring substrate 100. A plurality of external electrodes 104 provided so as to correspond to the connection electrodes 103 are arranged on the lower surface of the multilayer wiring substrate 100 at a pitch wider than the pitch of the connection electrodes 103. Then, the corresponding connection electrode 103 and the external electrode 104 are connected to each other via the wiring electrode 105 and the interlayer connection conductor 106 formed inside the multilayer wiring substrate 100, so that a rewiring structure is formed on the multilayer wiring substrate 100. Is formed.

In such a rewiring structure, it is necessary to make the density of the wiring electrodes 105 and the interlayer connection conductors 106 higher in the upper part of the multilayer wiring substrate 100 in which each connection electrode 103 is formed than in the lower part in which each external electrode 104 is formed. is there. Therefore, the upper part of the multilayer wiring substrate 100 is formed by a resin portion 102 that is a laminate of a plurality of resin layers 102a formed of a thin film such as polyimide capable of forming a fine electrode pattern. On the other hand, the lower part of the multilayer wiring substrate 100 where the wiring electrodes 105 and the interlayer connection conductors 106 are not required to have high density is made of ceramic (core substrate) that has higher rigidity than the resin laminate 103 and can easily ensure flatness by polishing or the like. Is formed.

Japanese Patent Laying-Open No. 2011-222945 (see paragraphs 0026 to 0028, FIG. 1, etc.)

When a component is mounted on this type of multilayer wiring board 100, a mounting electrode for the component is provided on the upper surface of the resin portion 102. However, since the adhesion strength between the resin portion 102 and the mounting electrode is low, an impact after mounting the component, etc. Thus, the mounting electrode may be peeled off from the resin portion 102. Further, since the resin of the resin portion 102 has a higher coefficient of thermal expansion than the metal forming the mounting electrode, there is a possibility that the mounting electrode may be peeled off even by a thermal change during the inspection of the probe card.

The present invention has been made in view of the above-described problems, and in a laminated wiring board in which a resin portion is laminated on a core substrate made of ceramic, a mounting electrode for a component mounted on the main surface of the resin portion The purpose is to reduce the peeling.

In order to achieve the above-described object, a multilayer wiring board according to the present invention includes a core board in which a plurality of ceramic layers are laminated in a multilayer wiring board to which a plurality of probe pins are connected, and one main surface of the core board. A resin part having a through hole, a mounting electrode for mounting a component located on the one main surface of the core substrate, and the resin part among the resin part. A plurality of connection electrodes are provided so as to be exposed on the opposite surface, which is the main surface opposite to the main surface facing the core substrate, and connected to the probe pins.

According to this configuration, since the mounting electrodes for component mounting are provided on the core substrate (ceramic) having higher adhesion strength than the resin forming the resin portion, peeling of the mounting electrodes can be reduced. In addition, the ceramic that forms the core substrate has a smaller difference in thermal expansion coefficient from the metal that forms the mounting electrode than the resin that forms the resin portion. Can be reduced. In addition, since the mounting electrode is exposed to the opposite surface of the resin portion by being disposed in the through hole of the resin portion, it is possible to mount a component on the opposite surface of the resin portion while reducing peeling of the mounting electrode. it can.

Further, the resin portion at the periphery of the through hole may cover the periphery of the mounting electrode. If it does in this way, since the peripheral part used as the starting point of peeling from the core substrate of a mounting electrode is protected by the resin part, peeling of a mounting electrode can further be reduced.

The mounting electrode is formed by stacking x (x is an integer of 2 or more) layer pad electrodes. The pad electrode in contact with the core substrate is the first layer, and the nth (n is 2 or more and x The pad electrode of the (integer) layer is formed to have a smaller area than the pad electrode of the (n−1) th layer in plan view of the resin portion, and the pad electrode of the (n−1) th layer. It may be arranged so as to fit in.

According to this configuration, since the area of each pad electrode constituting the mounting electrode increases as it approaches the core substrate, the area of the connection surface of the mounting electrode with the core substrate can be easily increased. The adhesion strength of the substrate can be improved.

The resin portion is formed by laminating y resin layers (y is an integer equal to or greater than the number x of the pad electrodes), and the through hole is a layer through hole provided in each of the resin layers. The resin layer that is connected and is in contact with the core substrate is the first layer, and the m-th (m is an integer of 2 or more and x + 1 or less) layer of the resin layer is the layer through-hole of the resin layer May be laminated on the m−1th layer of the resin layer so that the periphery of the 2nd layer covers the periphery of the m−1th layer of the pad electrode.

According to this configuration, since the peripheral portions of the pad electrodes constituting the mounting electrode are all covered with the resin layer constituting the resin portion, it is possible to reliably reduce the peeling of the mounting electrode from the core substrate.

Further, the above-described laminated wiring board may be used for a probe card that performs an electrical inspection of a semiconductor element. In this case, the laminated wiring board of the present invention in which mounting electrodes are provided on a core board having a small difference in thermal expansion coefficient is suitable as a wiring board used for a probe card exposed to heat during electrical inspection.

According to the present invention, since the mounting electrode for component mounting is provided on the core substrate (ceramic) having higher adhesion strength than the resin forming the resin portion, it is possible to reduce the peeling of the mounting electrode. In addition, the ceramic that forms the core substrate has a smaller difference in thermal expansion coefficient from the metal that forms the mounting electrode than the resin that forms the resin portion. Can be reduced. In addition, since the mounting electrode is exposed on the opposite surface of the resin portion, it is possible to mount a component on the opposite surface of the resin portion while reducing peeling of the mounting electrode.

It is sectional drawing of the probe card concerning 1st Embodiment of this invention. It is sectional drawing of the laminated wiring board of FIG. It is sectional drawing of the laminated wiring board concerning 2nd Embodiment of this invention. It is a fragmentary sectional view of the multilayer wiring board concerning a 3rd embodiment of the present invention. It is sectional drawing of the conventional multilayer wiring board.

<First Embodiment>
A probe card 1 according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2. 1 is a cross-sectional view of the probe card 1, and FIG. 2 is a cross-sectional view of the multilayer wiring board 3a of FIG. In FIG. 1, a part of the wiring electrodes and via conductors formed on the multilayer wiring board 3a is not shown.

As shown in FIG. 1, the probe card 1 according to this embodiment is connected to a mother board 2, a laminated wiring board 3a mounted on one main surface 2a of the mother board 2, and the laminated wiring board 3a. The apparatus includes a plurality of probe pins 5a to 5e and a probe head 4 that supports the probe pins 5a to 5e, and is used for, for example, an electrical inspection of an inspection object such as a semiconductor element.

In the mother substrate 2, a plurality of mounting electrodes 6 for mounting the multilayer wiring board 3a are formed on one main surface 2a, and a plurality of external electrodes 7a to 7e for external connection are formed on the other main surface 2b. . Here, each mounting electrode 6 is connected to predetermined external electrodes 7a to 7e by wiring electrodes 30 and via conductors 31 formed inside the mother substrate. The mother substrate 2 is made of, for example, glass epoxy resin.

The laminated wiring board 3 a includes a core substrate 8 disposed on the mother substrate 2 side, and a resin portion 9 laminated on one main surface 80 a of the core substrate 8. At this time, the core substrate 8 is formed of various ceramics such as a low-temperature co-fired ceramic (LTCC) and a high-temperature fired ceramic (HTCC) mainly composed of a ceramic (for example, alumina) containing borosilicate glass. be able to.

For example, the low-temperature co-fired ceramic (LTCC) materials include CaO—SiO ₂ —Al ₂ O ₃ —B ₂ O ₃ glass 50 to 65 wt% (preferably 60 wt%) and alumina 50 to 35 wt% ( Preferably 40% by weight). When firing the LTCC green sheet, a bonded body obtained by heat-pressing a dummy green sheet (a constrained layer sheet such as alumina) having a sintering temperature higher than that of the green sheet on both surfaces of the above-mentioned LTCC green sheet is bonded to the LTCC green sheet. The LTCC substrate is fired without shrinkage at a sintering temperature of 800 to 1000 ° C. (preferably 900 ° C.). At this time, when Cu is used as the inner layer conductor pattern (for example, the wiring electrode 14), it is necessary to fire in a reducing atmosphere to prevent oxidation. However, Ag, Ag / Pd, Au, and Ag / Pt are used. When used, it can be fired in an oxidizing atmosphere (air). During this firing, the substrate is fired while being pressurized at a pressure (for example, 2 to 20 kgf / cm ² ) that is smaller than the pressure applied when the LTCC green sheet is pressure-bonded. Accordingly, the substrate surface is prevented from being convexly deformed at the inner layer conductor pattern portion during firing, the flatness of the substrate surface is ensured, and warpage or peeling (delamination) of the substrate during firing is also prevented.

Resin portion 9 is formed of a resin such as polyimide, for example. In this embodiment, the core substrate 8 and the resin portion 9 are each formed in a multilayer structure.

The probe head 4 that holds the probe pins 5a to 5e is formed of two holding plates 4a that are arranged substantially in parallel at a predetermined interval, and a spacer 4b that is arranged between the two holding plates 4a. 2 is fixedly arranged on the cover body 21 fixed to 2.

The multilayer wiring board 3a will be specifically described with reference to FIG. 2. The core substrate 8 is composed of a laminate of a plurality of ceramic layers 8a. Here, a plurality of external connection electrodes 10a to 10e for mounting on the mother substrate 2 are formed on the main surface 80b on the opposite side of the resin portion 9 of the core substrate 8, and each of these external connection electrodes 10a to 10e is formed. Each is connected to a predetermined mounting electrode 6 formed on the mother substrate 2 by soldering.

A mounting electrode 13 for mounting the component 12 is formed on the one main surface 80a of the core substrate 8 on the resin portion 9 side. In addition, various wiring electrodes 14 and a plurality of via conductors 15 are formed in each ceramic layer 8a. The external connection electrodes 10a to 10e, the wiring electrodes 14, the via conductors 15, and the mounting electrodes 13 are formed of any one of metals such as Cu, Ag, and Al, for example. Here, each of the external connection electrodes 10a to 10e, each of the wiring electrodes 14 and the mounting electrode 13 can be formed, for example, by screen printing using a conductive paste containing the metal (Cu, Ag, Al, etc.). . Further, each of the external connection electrodes 10a to 10a and the mounting electrode 13 may have a structure in which a surface electrode formed by Ni / Au plating is laminated on a base electrode formed of the above-described metal.

The resin part 9 is composed of a laminate of a plurality of resin layers 9 a and is laminated on the one main surface 80 a of the core substrate 8. Here, a plurality of connection electrodes 11a to 11a to which probe pins 5a to 5e are respectively connected to the main surface 90a of the resin portion 9 opposite to the core substrate 8 (corresponding to the “opposite surface of the resin portion” of the present invention). 11e is formed. In this embodiment, the connection electrode 11a is connected to the probe pin 5a for supplying power, the connection electrode 11b and the connection electrode 11e are both connected to the probe pins 5b and 5e for grounding, and the connection electrode 11c and the connection electrode 11d. Are connected to probe

pins

5c and 5d for signal transmission / reception. Each of the connection electrodes 11a to 11e can be formed of, for example, a base electrode made of Cu or the like and a surface electrode formed by applying Ni / Au plating on the base electrode.

Various wiring electrodes 17 and a plurality of via conductors 18 are formed on each resin layer 9a. In this case, for example, each wiring electrode 17 forms a Ti film as a base electrode on the main surface of the resin layer 9a by sputtering or the like, and similarly forms a Cu film on the Ti film by sputtering or the like. And it can form by forming a Cu film | membrane similarly on a Cu film | membrane by electrolysis or electroless plating. Moreover, the wiring electrode 17 formed in each resin layer 9a is formed in a fine pattern by photolithography. The wiring electrode 14 formed on the core substrate 8 is formed by screen printing or the like and thus has a thick film pattern, whereas the wiring electrode 17 formed on the resin portion 9 is formed by sputtering or the like. Therefore, it becomes a thin film pattern. Further, the wiring electrode 17 formed on the resin portion 9 is thinned by photolithography as described above.

The connection electrodes 11a to 11e are electrically connected to predetermined external electrodes 7a to 7e formed on the other main surface of the mother substrate 2, respectively. Specifically, as shown in FIGS. 1 and 2, each of the connection electrodes 11a to 11e includes a wiring electrode 17 and a via conductor 18 formed on the resin portion 9, and a wiring electrode 14 formed on the core substrate 8, respectively. Further, via conductor 15, wiring electrode 30 formed on mother substrate 2, via conductor 31, and the like are connected to predetermined external electrodes 7 a to 7 e.

In addition, the resin portion 9 is disposed on the resin portion 9 in a thickness direction at a position overlapping the mounting electrode 13 in a plan view of the core substrate 8 (a plan view seen from a direction perpendicular to the one main surface 80a of the core substrate 8). A penetrating through hole 16 is formed. A part of the mounting electrode 13 is exposed to the main surface 90 a of the resin portion 9 through the through hole 16. Here, the peripheral edge portion of the mounting electrode 13 is covered with the resin portion 9 at the peripheral edge of the through hole 16. Thus, by providing a through hole in the resin portion 9 and exposing the mounting electrode 13 to the main surface 90 a of the resin portion 9, the mounting electrode 13 on the core substrate 8 and the main surface 90 a of the resin portion 9 are disposed. It is possible to connect to the made component 12. The through-hole 16 can be formed by, for example, laser processing.

The component 12 can be composed of, for example, a chip capacitor, a chip inductor, a chip resistor, and a fuse chip. In this embodiment, the component 12 includes a bypass capacitor (chip capacitor) connected between a power supply line connecting the connection electrode 11a and the external connection electrode 10b and a ground (ground) line.

Therefore, according to the above-described embodiment, the mounting electrode 13 for component mounting is provided on the core substrate 8 (ceramic) having higher adhesion strength than the resin forming the resin portion 9, so that the mounting electrode 13 is peeled off. Can be reduced.

In addition, since a probe card used for electrical inspection of a semiconductor element or the like is used at a high temperature during inspection, the difference in thermal expansion coefficient between the mounting electrode 13 and the member on which the mounting electrode 13 is formed is the mounting electrode 13. Affects peeling. Here, the thermal expansion coefficient of the ceramic forming the core substrate 8 is 5.5 ppm / ° C., the thermal expansion coefficient of the resin portion 9 when the resin forming the resin portion 9 is polyimide is 50 ppm / ° C., and the mounting electrode 13 is formed. The thermal expansion coefficient of the mounting electrode 13 when the metal is Cu is 16.8 ppm / ° C. According to this configuration, since the difference in thermal expansion coefficient between the core substrate 8 and the mounting electrode 13 is smaller than that of the resin portion 9, the temperature of the multilayer wiring substrate 3 a is formed by forming the mounting electrode 13 on the core substrate 8. The peeling of the mounting electrode 13 due to the change can be reduced.

Further, when the bypass capacitor (component 12) prevents the high frequency noise generated from the semiconductor element or the like during the electrical inspection of the probe card 1 from entering the power supply line, it is efficient to place the bypass capacitor close to the semiconductor element. good. In such a case, it is common to form a mounting electrode for mounting the component 12 on the main surface 90 of the resin part 9, but as described above, the adhesion strength between the resin part 9 and the mounting electrode 13 is Since it is low, the risk of peeling of the mounting electrode 13 increases. On the other hand, according to this configuration, since the mounting electrode 13 can be formed on the core substrate 8 while the component 12 is disposed on the main surface 90a of the resin portion 9, the function of the component 12 as a bypass capacitor is improved. Further, peeling of the mounting electrode 13 can be reduced.

Since the peripheral portion of the mounting electrode 13 is covered with the resin portion 9 at the peripheral edge of the through-hole 16, the peripheral portion serving as a base point for peeling the mounting electrode 13 from the core substrate 8 is protected by the resin portion 9. The peeling of the mounting electrode 13 can be further reduced.

Second Embodiment
A laminated wiring board 3b according to a second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a cross-sectional view of the multilayer wiring board 3b.

The laminated wiring board 3b according to this embodiment is different from the laminated wiring board 3a of the first embodiment described with reference to FIGS. 1 and 2 in that the resin portion 9 has a single layer as shown in FIG. That is, it is composed of the resin layer 9a and the wiring structure of the core substrate 8 is different. Since other configurations are the same as those of the multilayer wiring board 3a of the first embodiment, the description thereof is omitted by giving the same reference numerals.

In this case, on one main surface 80a of the core substrate 8, in addition to the mounting electrode 13 for mounting the component 12, the connection electrodes 11a to 11e formed in the resin portion 9 in the multilayer wiring substrate 3a of the first embodiment. Is formed. The resin part 9 is provided with a through hole 16 for exposing the mounting electrode 13, and the peripheral part of the mounting electrode 13 is covered with the resin part 9 at the peripheral part of the through hole 16. The connection electrodes 11 a to 11 e are also covered with the resin portion 9 at the periphery as in the mounting electrode 13.
The resin portion 9 is not formed with the wiring electrodes 17 and the via conductors 18 formed in the resin portion 9 of the multilayer wiring board 3a of the first embodiment. The wiring structure by the wiring electrodes 14 and via conductors 15 is changed.

According to this configuration, the same effect as the multilayer wiring board 3a of the first embodiment can be obtained. Further, since the connection electrodes 11a to 11e are formed on the core substrate 8, peeling of the connection electrodes 11a to 11e can be reduced.

<Third Embodiment>
A laminated wiring board 3c according to a third embodiment of the present invention will be described with reference to FIG. FIG. 4 is a partial cross-sectional view of the multilayer wiring board 3c, and shows the peripheral portion of the component 12 of the multilayer wiring board 3c.

The laminated wiring board 3c according to this embodiment is different from the laminated wiring board 3a of the first embodiment described with reference to FIGS. 1 and 2 as shown in FIG. Each configuration is different. Since other configurations are the same as those of the multilayer wiring board 3a of the first embodiment, the description thereof is omitted by giving the same reference numerals.

In this case, the mounting electrode 13 is formed by laminating a plurality of layers (three layers in this embodiment) of pad electrodes 13a to 13c. A surface electrode 19 is laminated on the pad electrode 13c farthest from the core substrate 8 of the mounting electrode 13 by plating or the like. In this case, the pad electrode 13a in contact with the core substrate 8 is the first layer, the pad electrode 13b stacked on the pad electrode 13a is the second layer, and the pad electrode 13c stacked on the pad electrode 13b is the third layer. In this case, the second-layer pad electrode 13b is formed so that the area in plan view is smaller than that of the first-layer pad electrode 13a and fits in the first-layer pad electrode 13a. Similarly, the third-layer pad electrode 13c is formed so that the area in plan view is smaller than that of the second-layer pad electrode 13b and fits in the second-layer pad electrode 13b. The surface electrode 19 is formed so that the area in plan view is substantially the same as that of the third-layer pad electrode 13c.

The through hole 16 provided in the resin portion 9 is formed by connecting layer through holes 16a to 16d provided in each resin layer 9a. Specifically, in the resin portion 9, the resin layer 9a in contact with the core substrate 8 is the first layer, the resin layer 9a laminated on the resin layer 9a is the second layer, and the second resin layer 9a. When the resin layer 9a laminated on the third layer is the third layer and the resin layer 9a laminated on the third layer is the fourth layer, the first layer of the resin layer 9a has a pad of the first layer. A layer through-hole 16a having an opening area larger than that of the electrode 13a is provided, and the first-layer pad electrode 13a is disposed in the layer through-hole 16a. In order to form this configuration, for example, a layer through hole 16a is formed in the first resin layer 9a using a photolithography technique, and the first layer pad electrode is formed by Cu plating in the layer through hole 16a. 13a is formed.

Similarly to the first resin layer 9a, the second resin layer 9a is provided with a layer through hole 16b having an opening area larger than that of the second layer pad electrode 13b in plan view. A second-layer pad electrode 13b is disposed in the through hole 16b. At this time, the opening area of the layer through-hole 16b is such that the second-layer pad electrode 13b can be disposed, and the peripheral portion of the layer through-hole 16b of the second-layer resin layer 9a is first in plan view. It is formed in such a size as to cover the peripheral edge of the pad electrode 13a of the layer. The second layer through-hole 16b and the pad electrode 13b can also be formed in the same manner as the first layer through-hole 16a and the pad electrode 13a.

The layer through hole 16c and the pad electrode 13c of the third resin layer 9a are also formed in the same manner as the first and second layer through

holes

16a and 16b and the

pad electrodes

13a and 13b. Here, the surface electrode 19 is further formed on the surface of the third-layer pad electrode 13c (exposed surface from the third-layer through-hole 16c). The surface electrode 19 is formed by Ni / Au plating.

Finally, a layer through hole 16d is formed in a region overlapping the third layer pad electrode 13c in plan view of the fourth resin layer 9a. At this time, the opening area of the layer through-hole 16d is formed such that the peripheral edge of the layer through-hole 16d of the fourth resin layer 9a covers the peripheral edge of the third-layer pad electrode 13c. To do.

Note that each of the pad electrodes 13a to 13c can be formed at the same time as the via conductor 18 formed in the same resin layer 9a, so that a new process is not required for forming the pad electrodes 13a to 13c. Moreover, although this embodiment demonstrated the case where the number of layers (4 layers) of the resin part 9 was larger than the number of layers (3 layers) of the mounting electrode 13, these number of layers may be the same.

The number of layers of each resin layer 9a of the resin portion 9 and each of the pad electrodes 13a to 13c of the mounting electrode 13 can be changed as appropriate. Here, when the number of layers of the mounting electrode is x (x is an integer of 2 or more) and the pad electrode 13a in contact with the core substrate 8 is the first layer, the nth (n is an integer of 2 or more and x or less) ) The pad electrode in the layer is formed so as to have a smaller area than the pad electrode in the (n−1) th layer in a plan view of the resin portion 9 and is fitted in the pad electrode in the (n−1) th layer. It only has to be. Further, regarding the resin portion at this time, when the number of resin layers is y (an integer greater than or equal to the number x of the pad electrodes) and the resin layer in contact with the core substrate 8 is the first layer, the mth ( m is an integer not less than 2 and not more than x + 1) In the resin layer of the first layer, the periphery of the layer through hole of the resin layer covers the periphery of the pad electrode of the (m-1) th layer. It is preferable to be laminated on the m−1th resin layer.

According to this configuration, the area (area in plan view) of each of the pad electrodes 13a to 13c constituting the mounting electrode 13 increases as it approaches the core substrate 8, and therefore the connection surface of the mounting electrode 13 to the core substrate 8 is increased. The area can be easily increased, whereby the adhesion strength between the mounting electrode 13 and the core substrate 8 can be improved. Moreover, since the space of the main surface 90a of the resin part 9 can be expanded by reducing the area of the uppermost pad electrode 13c, the degree of freedom in designing the main surface 90a of the resin part 9 can be improved.

Further, since the peripheral portions of the pad electrodes 13a to 13c constituting the mounting electrode 13 are all covered with the resin layer 9a on one of the pad electrodes 13a to 13c, the mounting electrode 13 from the core substrate 8 is covered. Peeling can be reliably reduced.

The present invention is not limited to the above-described embodiments, and various modifications other than those described above can be made without departing from the spirit of the invention. For example, in each of the embodiments described above, the case where the component 12 is a bypass capacitor has been described. However, as another method for preventing noise from entering the power supply line, the component 12 may be configured by a chip inductor. In this case, the chip inductor may be connected in series with the power supply line.

Moreover, the number of layers of each ceramic layer 8a and each resin layer 9a can be appropriately changed.

Industrial applicability

INDUSTRIAL APPLICABILITY The present invention can be applied to various laminated wiring boards including a core substrate formed by laminating a plurality of ceramic layers, and a resin portion laminated on one main surface of the core substrate, and a probe card including the same. .

DESCRIPTION OF SYMBOLS 1 Probe card 3a-3c Multilayer wiring board 8 Core board 8a Ceramic layer 9 Resin part 9a Resin layer 11a-11e Connection electrode 13 Mounting electrode 13a-13c Pad electrode 16 Through-hole 16a-16d Layer through-hole 80a One main surface of core board 90a Main surface of resin part (opposite surface)

Claims

In a laminated wiring board to which a plurality of probe pins are connected,
A core substrate formed by laminating a plurality of ceramic layers;
A resin portion laminated on one main surface of the core substrate and having a through hole;
A mounting electrode for component mounting located on the one main surface of the core substrate, located in the through hole of the resin portion,
A plurality of connection electrodes are provided which are exposed on the opposite surface which is the principal surface opposite to the principal surface facing the core substrate in the resin portion, and are connected to the probe pins. Multilayer wiring board.
2. The multilayer wiring board according to claim 1, wherein the resin portion at the periphery of the through hole covers the periphery of the mounting electrode.
The mounting electrode is formed by stacking x (x is an integer of 2 or more) layer pad electrodes,
The pad electrode in contact with the core substrate is the first layer, and the pad electrode of the nth (n is an integer not less than 2 and not more than x) layer is the (n−1) th layer in plan view of the resin portion. 3. The multilayer wiring board according to claim 1, wherein the multilayer wiring board is formed so as to have a smaller area than the pad electrode of the eye and fit in the pad electrode of the (n−1) th layer.
The resin portion is formed by laminating y resin layers (y is an integer greater than or equal to the number x of the pad electrodes).
The through hole is formed by connecting layer through holes provided in each of the resin layers,
The resin layer in contact with the core substrate is the first layer, and the m-th (m is an integer of 2 or more and x + 1 or less) layer of the resin layer has a peripheral portion of the layer through hole in the resin layer, 4. The multilayer wiring board according to claim 3, wherein the laminated wiring board is laminated on the m−1th resin layer so as to cover a peripheral edge of the m−1th layer pad electrode. 5.
5. A probe card comprising the laminated wiring board according to claim 1 and performing an electrical inspection of a semiconductor element.