WO2016203751A1

WO2016203751A1 - Rectifying element, switching element, and method for manufacturing rectifying element

Info

Publication number: WO2016203751A1
Application number: PCT/JP2016/002837
Authority: WO
Inventors: 宗弘多田; 直樹伴野; 井口　憲幸
Original assignee: 日本電気株式会社
Priority date: 2015-06-18
Filing date: 2016-06-13
Publication date: 2016-12-22
Also published as: JPWO2016203751A1

Abstract

Provided is a rectifying element wherein current-voltage characteristics are improved. The rectifying element has: a first electrode and a second electrode; a rectifying layer that is provided between the first electrode and the second electrode; a first buffer layer that is provided between the first electrode and the rectifying layer; and a second buffer layer that is provided between the second electrode and the rectifying layer. The work functions of the first buffer layer and the second buffer layer are smaller than those of the first electrode and the second electrode, and the relative dielectric constants of the first buffer layer and the second buffer layer are larger than the relative dielectric constant of the rectifying layer.

Description

Rectifying element, switching element, and method of manufacturing rectifying element

The present invention relates to a rectifying element, a switching element, and a method for manufacturing the rectifying element.

Semiconductor devices (especially silicon devices) have been developed at a pace of 3 years, with the integration and low power consumption of the devices advanced by miniaturization (scaling law: Moore's law). In recent years, the gate length of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) has become 20 nm or less, and due to soaring lithography process (equipment price and mask set price) and physical limitations of device dimensions (operation limit / variation limit) There is a need to improve device performance with an approach different from the scaling law.

Recently, a rewritable programmable logic device called FPGA (Field Programmable Gate Array) has been developed as an intermediate position between a gate array and a standard cell. The FPGA enables the customer himself to perform an arbitrary circuit configuration after manufacturing the chip. The FPGA has a variable resistance element inside a multilayer wiring structure, and the customer can arbitrarily connect the wirings arbitrarily. By using a semiconductor device mounted with such an FPGA, the degree of freedom of the circuit can be improved.

As the resistance change element, MRAM (Magneto-resistiveistRandom Access Memory), PRAM (Phase change memory: Phase Change RAM), ReRAM (Resistance change memory: Resistance Random Access Memory), CBRAM (Solid electrolyte ion) There is a RAM (Conductive Bridging RAM).

In the ReRAM, a conductive path is formed inside the resistance change film by an externally applied voltage and current, or is turned on, or the conductive path formed inside the resistance change film disappears and is turned off. The characteristic of changing the resistance value is used. In the ReRAM cell, a structure having a resistance change film sandwiched between two electrodes is used. For example, an electric field is applied between two electrodes to generate a filament inside the resistance change film made of a metal oxide, or a conductive path is formed between the two electrodes to be turned on. Thereafter, by applying an electric field in the opposite direction, the filament disappears, or the conductive path formed between the two electrodes disappears, and the device is turned off. By reversing the direction of the electric field to be applied, switching between the on state and the off state in which the resistance values between the two electrodes are greatly different is performed. Data is stored by utilizing the fact that the current flowing through the storage element differs according to the difference in resistance value between the on state and the off state. When writing data, select the voltage value, current value, and pulse width that cause the transition from the off state to the on state, or the transition from the on state to the off state, corresponding to the data to be stored. Formation or disappearance of filaments, or formation or disappearance of conductive paths.

Non-Patent Document 1 discloses an element that has a high possibility of improving the degree of freedom of a circuit used for the configuration of a ReRAM memory cell as a kind of resistance change element used for the configuration of ReRAM. The element of Non-Patent Document 1 uses a metal ion movement in an ionic conductor, and "resistance of metal changes by utilizing metal precipitation by reduction of metal ions" and "generation of metal ions by metal oxidation" by electrochemical reaction. This is a non-volatile switching element that performs switching by reversibly changing a resistance value between electrodes sandwiching a film. The nonvolatile switching element disclosed in Non-Patent Document 1 has a configuration having a solid electrolyte made of an ionic conductor, and a first electrode and a second electrode provided in contact with each of two surfaces of the solid electrolyte. . The first electrode is made of a first metal, and the second electrode is made of a second metal. The first metal and the second metal are different in standard generation Gibbs energy ΔG in the process of generating metal ions by oxidizing the metal.

In Non-Patent Document 1, the materials of the first metal and the second metal are described as follows.

When a bias voltage causing a transition from the off state to the on state is applied between the first electrode and the second electrode, an electrochemical reaction induced by the applied bias voltage at the interface between the first electrode and the solid electrolyte As a result, the first metal is oxidized. Thereby, a metal ion is produced | generated and a metal ion is supplied to a solid electrolyte. As described above, a metal that is oxidized by an electrochemical reaction induced by an applied bias voltage to generate metal ions and supply the metal ions to the solid electrolyte is employed as the first metal.

When a bias voltage causing a transition from the on state to the off state is applied between the first electrode and the second electrode, the first metal is deposited on the surface of the second electrode. The deposited first metal is oxidized by an electrochemical reaction induced by an applied bias voltage, generates metal ions, and dissolves in the solid electrolyte as metal ions. In contrast, the process of generating metal ions is not induced in the second metal. That is, as the second metal, a metal that is not oxidized by an applied bias voltage and does not induce a process of generating metal ions is employed.

Here, the switching operation of the metal bridge type resistance change element capable of transitioning between the on state and the off state by forming and dissolving the metal bridge structure will be briefly described.

In the transition process (set process) from the off state to the on state, when the second electrode is grounded and a positive voltage is applied to the first electrode, the metal of the first electrode is metal at the interface between the first electrode and the solid electrolyte. It becomes ions and dissolves in the solid electrolyte. On the other hand, on the second electrode side, using the electrons supplied from the second electrode, metal ions in the solid electrolyte are deposited as metal in the solid electrolyte. A metal bridge structure is formed by the metal deposited in the solid electrolyte, and finally, a metal bridge connecting the first electrode and the second electrode is formed. When the first electrode and the second electrode are electrically connected via the metal bridge, the switch is turned on.

On the other hand, in the transition process (reset process) from the on state to the off state, when the second electrode is grounded and a negative voltage is applied to the first electrode with respect to the switch in the on state, a metal bridge is formed. The metal becomes metal ions and dissolves in the solid electrolyte. When dissolution proceeds, a part of the metal cross-linking structure constituting the metal cross-link is cut. Finally, when the metal bridge connecting the first electrode and the second electrode is cut, the electrical connection is cut and the switch is turned off.

As the dissolution of the metal proceeds, the metal cross-linking structure constituting the conduction path becomes narrower, the resistance between the first electrode and the second electrode increases, and the dissolved metal at the interface between the first electrode and the solid electrolyte. Ions are reduced and deposited as metal. Therefore, the electrical characteristics change from the stage before the electrical connection is completely cut off, such as the concentration of metal ions in the solid electrolyte decreases and the relative permittivity changes, causing the capacitance between electrodes to change. Finally, the electrical connection is broken.

Further, after the metal bridge type resistance change element is changed from the on state to the off state (reset), when the second electrode is grounded again and a positive voltage is applied to the first electrode, the transition from the off state to the on state is performed. The process (set process) proceeds. That is, in the metal bridge type resistance change element, the transition process from the off state to the on state (set process) and the transition process from the on state to the off state (reset process) can be performed reversibly.

Non-Patent Document 1 discloses a configuration of a two-terminal switching element in which two electrodes are arranged via an ion conductor and controls a conduction state between the two electrodes, and a switching operation thereof. Has been.

Focusing on the operating characteristics of variable resistance elements, variable resistance elements can be classified into unipolar and bipolar types. The resistance of the unipolar variable resistance element does not depend on the voltage polarity, and the resistance changes at the applied voltage level. The resistance of the bipolar variable resistance element changes depending on the applied voltage level and voltage polarity.

A solid electrolyte layer type resistance change element having a solid electrolyte layer that is a solid in which ions can freely move by application of an electric field or the like will be described.

Non-Patent Document 1 discloses an example of the bipolar variable resistance element as a solid electrolyte layer type variable resistance element. Non-Patent Document 1 discloses a switching element using metal ion migration and electrochemical reaction in a solid electrolyte layer. This switching element has three layers of a solid electrolyte layer, a first electrode in contact with one surface of the solid electrolyte layer, and a second electrode in contact with the other surface of the solid electrolyte layer. Among these, the 1st electrode plays the role for supplying a metal ion to a solid electrolyte layer. The second electrode does not supply metal ions.

The operation of this switching element will be briefly described.

When the first electrode is grounded and a negative voltage is applied to the second electrode, the metal of the first electrode becomes metal ions and dissolves in the solid electrolyte layer. And the metal ion in a solid electrolyte layer becomes a metal and deposits in a solid electrolyte layer. The metal deposited in the solid electrolyte layer forms a metal bridge that connects the first electrode and the second electrode. When the first electrode and the second electrode are electrically connected by metal bridge, the switching element is turned on.

On the other hand, when the first electrode is grounded and a positive voltage is applied to the second electrode in the ON state, a part of the metal bridge is cut. Thereby, the electrical connection between the first electrode and the second electrode is broken, and the switching element is turned off. Note that the electrical characteristics change from the stage before the electrical connection is completely cut off, such as the resistance between the first electrode and the second electrode is increased, or the capacitance between the electrodes is changed. Connection is lost.

In order to change from the off state to the on state, the first electrode is grounded again and a negative voltage is applied to the second electrode.

As described above, Non-Patent Document 1 discloses the configuration and operation of a two-terminal switching element that controls a conduction state between two electrodes through a solid electrolyte layer as a solid electrolyte layer type resistance change element. Has been.

A switching element using such a solid electrolyte layer type resistance change element is characterized in that it is smaller in size and smaller in on-resistance than a semiconductor switch such as a MOSFET. For this reason, it is considered promising for application to programmable logic devices.

Further, in this switching element, the conduction state (ON or OFF) is maintained as it is even when the applied voltage is turned OFF. For this reason, the application as a non-volatile memory element is also considered. For example, using a memory cell including one selection element such as a transistor and one switching element as a basic unit, a plurality of memory cells are arranged in the vertical and horizontal directions. Arranging in this way makes it possible to select an arbitrary memory cell from among a plurality of memory cells with the word line and the bit line. Non-volatile that can sense the conduction state of the switching element of the selected memory cell and read information “1” or “0” from the on or off state of the switching element. Memory can be realized.

An example of a nonvolatile variable resistance element is disclosed in Patent Document 1. Patent Document 1 discloses that a variable resistance element includes a first electrode, a second electrode, a variable resistor connected to both the first electrode and the second electrode, and a control electrode connected to the variable resistor via a dielectric layer. (Third electrode), and a configuration in which the dielectric layer is in contact with the side surface of the second variable resistor is disclosed.

When the above-described two-terminal variable resistance element is mounted on a semiconductor device and this variable resistance element is programmed, a configuration in which one select transistor (access transistor) is provided for each variable resistance element is used. This configuration is generally called 1T1R. At this time, since the area occupied by the selection transistor is large, there is a problem that the entire area as the switching element is effectively increased. For this reason, it has been studied to reduce the circuit mounting area by replacing the selection transistor with a rectifying element. For example, Patent Document 2 discloses a technique for forming a two-terminal rectifier element on the variable resistance element.

JP 2010-153591 A Japanese Patent No. 5380612

When replacing the selection transistor with a rectifying element as an element for enabling selection of the variable resistance element to be programmed, there is a problem that the rectifying characteristics are not sufficient. Even if the rectifying element is operated to select only one variable resistance element in the array at the time of programming, if the rectifying characteristic is not sufficient, erroneous writing may occur, which may cause malfunction during circuit operation. .

The present invention has been made to solve the above-described problems of the technology, and an object thereof is to provide a rectifying element, a switching element, and a method of manufacturing the rectifying element with improved current-voltage characteristics.

In order to achieve the above object, the rectifier of the present invention comprises:
A first electrode and a second electrode;
A rectifying layer provided between the first electrode and the second electrode;
A first buffer layer provided between the first electrode and the rectifying layer;
A second buffer layer provided between the second electrode and the rectifying layer,
The work functions of the first buffer layer and the second buffer layer are smaller than the work functions of the first electrode and the second electrode, and the relative dielectric constant of the first buffer layer and the second buffer layer is the same as that of the rectifying layer. The configuration is larger than the relative dielectric constant.

The switching element of the present invention is a switching element provided in a signal path of a logic circuit,
The rectifying element of the present invention,
Two resistance change elements,
Each of the two resistance change elements has two terminals,
One terminal of each of the two terminals of the two variable resistance elements is connected to the other, one of the other two terminals of the two variable resistance elements is the input terminal for the signal, and the other is the input terminal for the signal. Output terminal,
Of the first electrode and the second electrode of the rectifying element, one electrode is connected to one terminal of each of the two terminals of the two resistance change elements, and the other electrode is a control terminal.

In addition, the method of manufacturing the rectifying device of the present invention includes
Forming a first electrode on the substrate;
A first buffer layer is formed on the first electrode using a plasma CVD method using silane hydride as a raw material,
A rectifying layer is formed on the first buffer layer using a plasma CVD method using hydrogenated silane and nitrogen or ammonia as raw materials,
A second buffer layer is formed on the rectifying layer using a plasma CVD method using silane hydride as a raw material,
A second electrode is formed on the second buffer layer.

According to the present invention, the current-voltage characteristics can be improved.

It is sectional drawing which shows one structural example of the rectifier of 1st Embodiment. 5 is a graph showing current-voltage characteristics of a bipolar variable resistance element. 5 is a graph showing current-voltage characteristics of a bipolar rectifier element. It is a circuit diagram which shows one structural example of the switching element which has a rectifier of 1st Embodiment. It is a graph which shows the IV characteristic of the experimental sample of a comparative example. 4 is a graph showing IV characteristics of the rectifying element of the first embodiment. It is a block diagram which shows the example of 1 structure of the crossbar switch of 2nd Embodiment. FIG. 3 is a cross-sectional view showing the main parts of a configuration example of the semiconductor device of Example 1; FIG. 10 is a cross-sectional view showing the main parts of another configuration example of the semiconductor device of Example 1; FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7. FIG. 8 is a process cross-sectional view schematically showing the method for manufacturing the semiconductor device shown in FIG. 7.

(First embodiment)
This embodiment relates to a rectifying element having excellent voltage-current characteristics as a first aspect of the present invention.

The configuration of the rectifying element of this embodiment will be described. FIG. 1 is a cross-sectional view showing a configuration example of the rectifying element of the present embodiment.

As shown in FIG. 1, the rectifying element 106 includes a first electrode 101, a second electrode 102, and a rectifying layer 103 provided between the first electrode 101 and the second electrode 102. In the rectifying element 106 of the present embodiment, as shown in FIG. 1, the first buffer layer 104 is provided between the first electrode 101 and the rectifying layer 103. A second buffer layer 105 is provided between the second electrode 102 and the rectifying layer 103. The first buffer layer 104 is in contact with each of the first electrode 101 and the rectifying layer 103. The second buffer layer 105 is in contact with each of the second electrode 102 and the rectifying layer 103.

The first electrode 101 and the second electrode 102 are tantalum, titanium, or nitrogen compounds thereof. The rectifying layer 103 is an oxide or a nitride. The nitride is, for example, silicon nitride. A method for forming these films will be described later.

By applying a voltage between the first electrode 101 and the second electrode 102, the conduction state of the rectifying element can be changed nonlinearly.

According to the present embodiment, by inserting the first buffer layer and the second buffer layer between the two electrodes, the conduction state of the rectifying element can be suitably changed, and excellent rectifying characteristics can be obtained. Become. The “excellent rectification characteristics” in this embodiment will be described later.

As a preferred buffer layer configuration, the work function of the buffer layer is preferably larger than the work functions of the first electrode and the second electrode. In addition, the work function of the buffer layer is preferably smaller than the work function of the rectifying layer. By adopting such a configuration, it is possible to suppress a low voltage applied current.

The preferred dielectric constant of the buffer layer is preferably larger than the dielectric constant of the rectifying layer. As a result, when a high voltage is applied (that is, when the resistance change element is programmed), the buffer layer is steeply inclined when an electric field is applied, so that a larger current can be obtained.

With the above configuration, excellent rectification characteristics can be obtained as will be described later.

In programming of the variable resistance element, it is preferable that the rectifying characteristics of the rectifying element are symmetrical particularly in the bipolar variable resistance element. Therefore, it is preferable that the first electrode and the second electrode have the same electrical characteristics, and it is preferable that the first buffer layer and the second buffer layer have the same electrical characteristics. In combination with the rectifying element of this embodiment, it is preferable to use a bipolar variable resistance element.

The operational characteristics of the variable resistance element and the rectifying element will be described using a bipolar type as an example. FIG. 2A is a graph showing the current-voltage characteristics of the bipolar variable resistance element, and FIG. 2B is a graph showing the current-voltage characteristics of the bipolar rectifying element.

First, the current-voltage characteristics of the variable resistance element will be described with reference to FIG. 2A.

When a positive voltage is applied to the first electrode of the variable resistance element, the leakage current gradually increases (corresponding to A shown in the figure), and when the threshold voltage V1 is exceeded, the resistance state changes from the high resistance state (off state) to the low resistance state. Transition to the resistance state (ON state) (corresponding to B shown in the figure). Even when the voltage is returned to 0 V, the low resistance state is maintained (corresponding to C shown in the figure). Subsequently, when a negative voltage is applied to the first electrode, the resistance state transitions from the low resistance state (on state) to the high resistance state (off state) when a predetermined peak current is reached (corresponding to D shown in the figure). ). Furthermore, even if a negative voltage is applied, the resistance state does not change because it is a bipolar resistance change element (corresponding to E shown in the figure).

Next, the current-voltage characteristics of the rectifying element will be described with reference to FIG. 2B.

In the rectifying element, when a positive voltage is applied to the first electrode, the leakage current gradually increases, and when the threshold voltage V2 is exceeded, the resistance state transitions from the high resistance state (off state) to the low resistance state (on state) ( Equivalent to F shown in the figure). When the voltage is returned to 0 V, since the resistance state is volatile, the current value decreases when the voltage becomes lower than the threshold voltage (corresponding to G in the figure). On the other hand, when a voltage is applied in the reverse direction, the leakage current gradually increases when the voltage is applied in the same manner, and the resistance state changes from the high resistance state (off state) to the low resistance when the threshold voltage (−V2) is exceeded. Transition to a state (ON state) (corresponding to H shown in the figure) When the voltage is returned to 0 V, since the resistance state is volatile, the current value decreases at a voltage lower than the threshold voltage (corresponding to I shown in the figure).

FIG. 3 is a circuit diagram showing a configuration example of the switching element having the rectifying element of the present embodiment.

As shown in FIG. 3, the switching element includes a rectifying element 121 corresponding to the rectifying element 106 shown in FIG. 1 and

variable resistance elements

131 and 132. The

resistance change elements

131 and 132 are connected to each other inactive electrodes. The active electrode of the resistance change element 131 is a first terminal 111, and the active electrode of the resistance change element 132 is a second terminal 112. One of the two electrodes of the rectifying element 121 is connected to the inactive electrodes of the

resistance change elements

131 and 132. Of the two electrodes of the rectifying element 121, the other electrode (the electrode not connected to the inactive electrodes of the resistance change elements 131 and 132) is defined as the third terminal 113.

The

resistance change elements

131 and 132 have an active electrode, an inactive electrode, and a resistance change film sandwiched between these two electrodes. The resistance change film is composed of a solid electrolyte layer. The active electrode is made of a metal that supplies metal ions to the resistance change film when a voltage is applied. The inert electrode is made of a metal that does not supply metal ions to the resistance change film even when a voltage is applied.

A case where the switching element shown in FIG. 3 is provided in the signal path of the logic circuit will be described.

One of the first terminal 111 and the second terminal 112 serves as a signal input terminal, and the other terminal serves as a signal output terminal. The third terminal 113 serves as a control terminal for programming the

resistance change elements

131 and 132 to an on state or an off state.

Consider a case where a voltage is applied between the first terminal 111 and the third terminal 113 in the switching element shown in FIG.

At this time, the voltage applied between the first terminal 111 and the third terminal 113 is voltage-distributed between the resistance change element 131 and the rectifying element 121. For example, in order to change (program) the resistance state of the resistance change element 131 from the off state to the on state with a smaller control voltage, it is preferable to apply most of the applied control voltage to the resistance change element. Therefore, the leakage current level in the off state is preferably lower in the resistance change element than in the rectifier element.

Further, in the switching element shown in FIG. 3, it is preferable that the resistance change element 131, the resistance change element 132, and the rectifying element 121 have the same operation polarity. That is, when a bipolar variable resistance element is used, a bipolar rectifier (bidirectional rectifier) is preferably used. When a unipolar variable resistance element is used, a unipolar rectifier (one Directional rectifier elements can also be used. This is because, in the case of a bipolar variable resistance element, switching is performed in the magnitude and direction of current flow, and accordingly, the rectifying element needs to have the same polarity characteristics.

In the rectifying device of this embodiment, the current value is as low as possible in the low voltage range (0.25 to 0.5 V), and as high as possible in the high voltage range (1 to 3 V). Rectification characteristics ”.

(Comparative Example 1)
An experiment for confirming the effect of the rectifying device of the present embodiment was performed and will be described.

As an experimental sample, a rectifier with “buffer layer” corresponding to the rectifier of this embodiment and a rectifier with no buffer layer were prepared as comparative examples. A method for manufacturing the rectifying device of this embodiment will be described. Here, the case of the rectifying element 106 shown in FIG. 1 will be described.

A TiN film having a thickness of 10 nm is deposited on the semiconductor substrate as the first electrode 101. As the film forming method, a DC sputtering method using a Ti target was used. For example, an Ar gas and N ₂ gas are introduced into a 300 mm wafer sputtering chamber whose pressure is reduced to about 10 ⁻⁶ Pa, and a power of 50 W to 1 kW is applied to deposit a TiN film on the silicon wafer.

Subsequently, the first buffer layer 104 is formed on the first electrode 101. The first buffer layer 104 is formed by depositing an amorphous silicon film having a thickness of 5 nm by plasma CVD (Chemical Vapor Deposition) using silane hydride as a source gas. For example, in a 300 mm wafer parallel plate plasma CVD reactor in which the substrate temperature is maintained in the range of 350 to 400 ° C., SiH ₄ gas is introduced in an amount of 100 to 300 sccm, Ar gas is in the range of 1 to 2 slpm, and He gas is in the range of 1 to 2 slpm. Then, an amorphous silicon film can be deposited by applying RF power of pressure 300 to 600 Pa and 50 to 200 W to the showerhead.

Subsequently, the rectifying layer 103 is formed on the first buffer layer 104. The rectifying layer 103 is formed by depositing a silicon nitride film having a thickness of 8 nm by a plasma CVD method using silane hydride and nitrogen gas or ammonia gas. For example, 200 sccm of SiH ₄ gas and 300 to 500 sccm of N ₂ gas are introduced into a parallel plate plasma CVD reactor in which the substrate temperature is maintained in the range of 350 to 400 ° C., and RF power of pressure 600 Pa and 200 W is applied to the shower head. By doing so, a silicon nitride film can be deposited.

Thereafter, the second buffer layer 105 is formed on the rectifying layer 103 in the same manner as the first buffer layer 104. Further, the second electrode 102 is formed on the second buffer layer 105 in the same manner as the first electrode 101.

As described above, when the first buffer layer and the second buffer layer are amorphous silicon films, and the rectifying layer is silicon nitride, the process from the formation of the first buffer layer to the formation of the second buffer layer is performed halfway. These films can be formed continuously in a plasma CVD reactor without exposing the substrate to the atmosphere.

About the manufacturing method of the experimental sample of a comparative example, since the formation process of the 1st buffer layer 104 and the 2nd buffer layer 105 is unnecessary among the above-mentioned manufacturing processes, the detailed description is abbreviate | omitted. However, three types of SiN film thicknesses of 5 nm, 10 nm, and 15 nm were prepared for the experimental sample of the comparative example.

Next, the measurement results of the experimental sample produced as described above will be described.

FIG. 4A is a graph showing IV characteristics of an experimental sample of a comparative example. FIG. 4A is a graph showing IV characteristics of a rectifying element in an MIM (Metal Insulator Metal) structure that does not have a buffer layer. The structure of the laminated film is TiN / SiN / TiN.

FIG. 4B is a graph showing IV characteristics of the rectifying device of the first embodiment. FIG. 4B is a graph showing IV characteristics of a rectifying element in an MSISM (Metal Semiconductor Insulator Semiconductor Metal) structure having a buffer layer. The structure of the laminated film is TiN / α-Si / SiN / α-Si / TiN.

In the experimental sample of the comparative example, as described above, three types of film thicknesses of 5 nm, 10 nm, and 15 nm of the SiN film serving as the rectifying layer were measured in order to examine the change in the rectifying characteristics. Referring to FIG. 4A, the thicker the SiN film thickness, the lower the leakage current when the low voltage is applied, but the lower the current when the high voltage is applied. On the other hand, as the film thickness of the SiN film becomes thinner, a higher current can be obtained when a high voltage is applied, but the current value also becomes higher when a low voltage is applied. That is, it can be seen that there is a tradeoff in the rectification characteristics in controlling the film thickness of the SiN film, and it is difficult to obtain favorable rectification characteristics.

On the other hand, as shown in FIG. 4B, in the rectifying element of the first embodiment, a low current is obtained when a low voltage is applied, and a high current is obtained when a high voltage is applied. It turns out that it is obtained. This is due to the effect of the buffer layer provided between the electrode and the rectifying layer. Thus, in the rectifying element of the first embodiment, the rectifying characteristics are improved compared to the comparative example.

At this time, the work function of the TiN electrode is 4.7 eV, whereas the work function of amorphous silicon is 4.2 eV. Therefore, the work function of the buffer layer is smaller than that of the electrode. The relative dielectric constant of SiN is 6.5, whereas the relative dielectric constant of amorphous silicon is 9, and the relative dielectric constant of the buffer layer is larger than that of the rectifying layer. Further, when the band gap of the amorphous silicon layer was measured, it was 1.2 eV which was slightly larger than that of single crystal silicon.

As a modified example, when a silicon-rich SiN layer (or an amorphous silicon layer containing nitrogen) was formed between the amorphous silicon layer and the SiN layer, further improvement in rectification characteristics was confirmed. As a result of creating a blanket film for this sample and analyzing the depth direction by XPS, it was confirmed that the closer to the SiN layer, the larger the amount of nitrogen, and the closer to the amorphous silicon layer, the smaller the amount of nitrogen.

Further, as a modification, a comparison was also made when the electrode was TaN, and it was confirmed that the same effect was obtained in the rectification characteristics. Also, it was confirmed that the same effect can be obtained even when amorphous silicon is changed to amorphous germanium. When germanium was used, the band gap was smaller than that of amorphous silicon, so a slight increase in current was measured in the low voltage range, but it was confirmed that it was reduced compared to when it was not used.

For the rectifying layer, an oxide or a nitride can be used, and a Pool-Frenkel type insulating film, a Schottky type insulating film, a threshold switching type volatile resistance change film, or the like can be used. The effect of the present invention was confirmed in the same manner when SiO ₂ was used for the rectifying layer, when TaO _x was used, and when TiO _x was used.

Therefore, it is preferable that the buffer layer used for the rectifying element has a work function smaller than that of the electrode and a relative dielectric constant larger than that of the rectifying layer.

(Second Embodiment)
This embodiment relates to a crossbar switch having a switching element including the rectifying element and the resistance change element described in the first embodiment, as a second aspect of the present invention.

The configuration of the crossbar switch of this embodiment will be described.

FIG. 5 is a block diagram illustrating a configuration example of the crossbar switch of the present embodiment.

As shown in FIG. 5, the crossbar switch has a plurality of switching elements 130 arranged in an array. The switching element 130 includes

resistance change elements

131 and 132 and rectifying

elements

121 and 122.

The

resistance change elements

131 and 132 are connected to each other inactive electrodes. The active electrode of the resistance change element 131 is connected to the first wiring 141. The active electrode of the resistance change element 132 is connected to the second wiring 142. Of the two electrodes of the rectifying element 121, one electrode is connected to the inactive electrode of the resistance change element 131, and the other electrode is connected to the third wiring 143. Of the two electrodes of the rectifying element 122, one electrode is connected to the inactive electrode of the resistance change element 132, and the other electrode is connected to the fourth wiring 144.

In the example shown in FIG. 5, the first wiring 141 and the third wiring 143 are arranged in parallel, and the second wiring 142 and the fourth wiring 144 are arranged in parallel. The first wiring 141 and the third wiring 143 are orthogonal to the other two wirings (second wiring 142 and fourth wiring 144).

Next, a method for programming the switching element 130 shown in FIG. 5 will be described.

When transitioning the resistance change element 131 to the ON state (low resistance state), the third wiring 143 is grounded and a positive voltage higher than the threshold voltage (set voltage) is applied to the first wiring 141. On the other hand, when the resistance change element 131 is transitioned from the ON state to the OFF state (high resistance state), the first wiring 141 is grounded and a positive voltage higher than the threshold voltage (reset voltage) is applied to the third wiring 143. .

Further, when the resistance change element 132 is changed to the ON state, the fourth wiring 144 is grounded and a positive voltage equal to or higher than the threshold voltage (set voltage) is applied to the second wiring 142. On the other hand, when the resistance change element 132 is transitioned from the ON state to the OFF state, the second wiring 142 is grounded and a positive voltage equal to or higher than the threshold voltage (reset voltage) is applied to the fourth wiring 144.

Thus, programming of the resistance change element 131 can be performed via the rectifying element 121, and programming of the resistance change element 132 can be performed via the rectifying element 122.

As described above, the rectifying element of the first embodiment has “excellent rectifying characteristics”. Therefore, by using the rectifying element of the first embodiment as the rectifying element for selecting the resistance change element to be programmed, it is possible to prevent erroneous writing and malfunction of the switching element. As a result, high reliability of the switching element can be achieved.

In this example, the switching element described in the first embodiment is provided in a semiconductor device.

FIG. 6 is a cross-sectional view showing the main part of the configuration of the semiconductor device of this example. FIG. 7 is a cross-sectional view showing the main part of another configuration example of the semiconductor device of this embodiment.

The switching element of the present embodiment is provided in the multilayer wiring structure on the semiconductor substrate and includes a resistance change element and a rectifying element. The multilayer wiring structure refers to a laminated structure including a plurality of wiring layers and an insulating film including an interlayer insulating film provided between these wiring layers.

6 and 7 show the structure of a switching element corresponding to a circuit configuration in which two rectifying elements and two resistance change elements are connected. The number of resistance change elements and rectifying elements is not limited to those shown in these drawings, and the number of rectifying elements may be increased according to the number of connected resistance change elements.

FIG. 6 shows a configuration in which two rectifying elements and two variable resistance elements are provided in two stages. In the first stage, switching

elements

25a and 25b are provided. The switching element 25 a includes a variable resistance element including the first electrode (first wiring 5 a), the variable resistance film 9, and the second electrode 10, and the rectifying element 11. The stacked body 30 illustrated in FIG. 6 corresponds to the resistance change film 9, the second electrode 10, and the rectifying element 11. The switching element 25 b includes a variable resistance element including the first electrode (first wiring 5 b), the variable resistance film 9, and the second electrode 10, and the rectifying element 11.

The resistance change film 9 corresponds to the solid electrolyte in the

resistance change elements

131 and 132 described with reference to FIG. The second electrode 10 corresponds to an inactive electrode of the

resistance change elements

131 and 132. The

first wirings

5a and 5b correspond to active electrodes of the

resistance change elements

131 and 132. The rectifying element 11 corresponds to the rectifying element 121 shown in FIG.

In the first stage, switching

elements

In the second stage, switching

elements

26a and 26b are provided. The switching element 26 a includes a variable resistance element including the first electrode (second wiring 18), the variable resistance film 9, and the second electrode 10, and the rectifying element 11. The switching element 26 b includes a variable resistance element including the first electrode (second wiring 18), the variable resistance film 9, and the second electrode 10, and the rectifying element 11.

In FIG. 6, the second wiring 18 corresponding to the first electrode of the resistance change film of the second-

stage switching elements

26a and 26b and the plug 19 connected to the second wiring 18 are the hard mask film 16 and the interlayer insulating film. 17 laminated insulating films. The side surfaces of the second wiring 18 and the bottom surface of the plug 19 are covered with a barrier metal 20.

One terminal of each of the rectifying elements 11 of the switching

elements

26 a and 26 b in the second stage is connected to the inactive electrode of the resistance change element, and the other terminal is connected to the third wiring 33 via the plug 31. The third wiring 33 and the plug 31 are provided in the laminated insulating film of the hard mask film 35 and the interlayer insulating film 34. The side surfaces of the third wiring 33 and the bottom surface of the plug 31 are covered with a barrier metal 32. The upper surface of the third wiring 33 is covered with a barrier insulating film 36.

Since the film types of the plug 31, the barrier metal 32, and the third wiring 33 are the same as those of the plug 19, the barrier metal 20, and the second wiring 18, which will be described later, detailed description thereof will be omitted. Further, since the film types of the interlayer insulating film 34, the hard mask film 35, and the barrier insulating film 36 are the same as those of the interlayer insulating film 17, the hard mask film 16, and the barrier insulating film 21, which will be described later, detailed description thereof will be given. Omitted.

Next, the semiconductor device shown in FIG. 7 will be described.

The semiconductor device shown in FIG. 7 has switching

elements

22a and 22b.

The switching element 22 a includes a first electrode (first wiring 5 a), a resistance change element including the resistance change film 9 and the second electrode 10, a rectifying element 11, and a third electrode 12. 7 corresponds to the resistance change film 9, the second electrode 10, the rectifying element 11, and the third electrode 12. The switching element 22 b includes a variable resistance element including a first electrode (first wiring 5 b), a variable resistance film 9, and a second electrode 10, a rectifying element 11, and a third electrode 12.

The

resistance change elements

22 a and 22 b share the resistance change film 9, the second electrode 10, and the rectifying element 11. In addition, a third electrode 12 serving as a control electrode is provided in each of the

switching elements

22a and 22b. The third electrode 12 of the switching element 22a is connected to the second wiring 18a through the barrier metal 20a and the plug 19a. The third electrode 12 of the switching element 22b is connected to the second wiring 18b through the barrier metal 20b and the plug 19b.

The configuration shown in FIG. 7 will be described in detail.

As shown in FIG. 7, the multilayer wiring structure has an interlayer insulating film 2, a barrier insulating film 3, an interlayer insulating film 4, an insulating barrier film 7, a protective insulating film 14, an interlayer insulating film on a semiconductor substrate (not shown). 17, an insulating laminated body in which the hard mask film 16 and the barrier insulating film 21 are laminated in this order. The multilayer wiring structure includes

first wirings

5a and 5b and

second wirings

18a and 18b.

First wirings

5a and 5b are buried in wiring grooves formed in the interlayer insulating film 4 and the barrier insulating film 3 through

barrier metals

6a and 6b.

Second wirings

18 a and 18 b and plugs 19 a and 19 b are embedded in the wiring grooves formed in the interlayer insulating film 17 and the hard mask film 16. The second wiring 18 and the plug 19 are integrated, and the side surfaces and the bottom surface of the second wiring 18 and the plug 19 are covered with the barrier metal 20.

A part of the upper surface of the

first wirings

5a and 5b serving as the lower electrodes of the

resistance change elements

22a and 22b is exposed in the opening formed in the insulating barrier film 7. On the wall surface of the opening of the insulating barrier film 7 and the insulating barrier film 7, the resistance change film 9, the second electrode 10, the rectifying element 11, and the third electrode 12 are sequentially stacked. The

switching elements

22a and 22b constitute complementary resistance change elements with rectifying elements.

A protective insulating film 14 is formed on the third electrode 12, and the side surface of the laminate including the resistance change film 9, the second electrode 10, the rectifying element 11, and the third electrode 12 is covered with the protective insulating film 14. . Since the

first wires

5a and 5b also serve as the lower electrode of the resistance change element 22, the number of manufacturing steps can be simplified and the electrode resistance can be reduced. As an additional step to the normal Cu damascene wiring process, it is possible to mount a resistance change element simply by creating at least two mask sets, and it is possible to simultaneously achieve low resistance and low cost of the element.

The

switching elements

22a and 22b are variable resistance nonvolatile elements. In this embodiment, the

switching elements

22a and 22b can be switching elements using metal ion migration and electrochemical reaction in the ion conductor. The variable resistance elements of the

switching elements

22a and 22b include the rectifying element 11 between the

first wires

5a and 5b serving as lower electrodes and the second electrode 10 and the third electrode 12 electrically connected to the plug 19. It has an intervening configuration. In the variable resistance element of each switching element, the variable resistance film 9 and the

first wirings

5 a and 5 b are in direct contact with the region of the opening formed in the insulating barrier film 7, and the plug 19 on the second electrode 10. And the third electrode 12 are electrically connected via the barrier metal 20. The resistance change element performs on / off control by applying a voltage or passing a current. The resistance change element performs on / off control using, for example, electric field diffusion of the metal related to the

first wirings

5 a and 5 b into the resistance change film 9.

The structure of the film shown in FIGS. 6 and 7 will be described. Here, it demonstrates with reference to FIG.

The semiconductor substrate not shown in the figure is a substrate on which a semiconductor element is formed. As the semiconductor substrate, for example, a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.

The interlayer insulating film 2 is an insulating film formed on the semiconductor substrate. For the interlayer insulating film 2, for example, a silicon oxide film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film, or the like can be used. The interlayer insulating film 2 may be a laminate of a plurality of insulating films. As the interlayer insulating film 4, a film of the same type as the interlayer insulating film 2 can be used.

The barrier insulating film 3 is an insulating film having a barrier property provided between the interlayer insulating film 2 and the interlayer insulating film 4. The barrier insulating film 3 serves as an etching stop layer when the

first wirings

5a and 5b are formed in the wiring trench. As the barrier insulating film 3, for example, a SiN film, a SiC film, a SiCN film, or the like can be used.

The insulating barrier film 7 is an insulating film formed on the interlayer insulating film 4. As the insulating barrier film 7, for example, a silicon oxide film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film, or the like can be used. The insulating barrier film 7 may be a laminate of a plurality of insulating films. In the interlayer insulating film 2, a wiring groove for embedding the first wiring is formed, and the

first wiring

5a, 5b is embedded in the wiring groove via the

barrier metals

6a, 6b.

The

first wirings

5a and 5b are wirings embedded in the wiring grooves formed in the interlayer insulating film 4 and the barrier insulating film 3 through the

barrier metals

6a and 6b. The

first wirings

5a and 5b also serve as lower electrodes of the resistance change elements of the

switching elements

22a and 22b, and are in direct contact with the resistance change film 9. An electrode layer or the like may be inserted between the

first wirings

5a and 5b and the resistance change film 9. When the electrode layer is formed, the electrode layer and the resistance change film 9 are deposited in a continuous process and processed in the continuous process. Further, the lower portion of the resistance change film 9 is not connected to the lower layer wiring via the contact plug. For the

first wirings

5a and 5b, a metal that can be diffused and ion-conducted in the resistance change film 9 is used. For example, Cu or the like can be used. The

first wirings

5a and 5b may be alloyed with Al or Mn.

The

barrier metals

6a and 6b are conductive films having a barrier property that cover the side surface or bottom surface of the wiring in order to prevent the metal related to the

first wiring

5a and 5b from diffusing into the interlayer insulating film 2 or the lower layer. is there. For the

barrier metals

6a and 6b, for example, when the

first wirings

5a and 5b are made of a metal element whose main component is Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), carbonitride A refractory metal such as tungsten (WCN), a nitride thereof, or a stacked film thereof can be used.

The insulating barrier film 7 is formed on the interlayer insulating film 4 including the

first wirings

5 a and 5 b, prevents oxidation of the metal (for example, Cu) related to the

first wirings

5 a and 5 b, and enters the interlayer insulating film 4. This prevents the diffusion of the metal related to the

first wirings

5a and 5b, and serves as an etching stop layer when the third electrode 12, the rectifying element 11, the second electrode 10 and the resistance change film 9 are processed. For the insulating barrier film 7, for example, a SiC film, a SiCN film, a SiN film, and a laminated structure thereof can be used. The insulating barrier film 7 is preferably made of the same material as the protective insulating film 14 and the hard mask film 16.

The insulating barrier film 7 has an opening on the

first wirings

5a and 5b. In the opening of the insulating barrier film 7, the

first wirings

5 a and 5 b are in contact with the resistance change film 9. The opening of the insulating barrier film 7 is formed in the region of the

first wirings

5a and 5b. By doing in this way, a resistance change element can be formed on the surface of the

1st wiring

5a, 5b with small unevenness | corrugation. The wall surface of the opening of the insulating barrier film 7 is a tapered surface that becomes wider as the distance from the

first wirings

5a and 5b increases. The tapered surface of the opening of the insulating barrier film 7 is set to 85 ° or less with respect to the upper surfaces of the

first wirings

5a and 5b. By doing so, the electric field concentration in the outer periphery of the connection portion between the

first wirings

5a and 5b and the resistance change film 9 (near the outer periphery of the opening portion of the insulating barrier film 7) is relaxed, and the insulation resistance is improved. Can do.

The resistance change film 9 is a film whose resistance changes. The resistance change film 9 can be made of a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal related to the

first wirings

5a and 5b (lower electrodes). In the case of performing deposition, an ion conductive film is used. For example, an oxide insulating film containing Ta, such as Ta ₂ O ₅ or TaSiO can be used. Further, the resistance change film 9 can have a laminated structure in which Ta ₂ O ₅ and TaSiO are laminated in this order from the bottom. With such a laminated structure, when the resistance change film 9 is used as a solid electrolyte, it is cross-linked by metal ions (for example, copper ions) formed inside the ion conductive layer when the resistance is low (on). Is separated by the Ta ₂ O ₅ layer, so that metal ions can be easily recovered at the time of OFF, and switching characteristics can be improved. The resistance change film 9 is formed on the

first wirings

5 a and 5 b, the tapered surface of the opening of the insulating barrier film 7, and the insulating barrier film 7. In the resistance change film 9, the outer peripheral portion of the connection portion between the

first wirings

5 a and 5 b and the resistance change film 9 is provided along at least the tapered surface of the opening of the insulating barrier film 7.

Of the second electrode 10, the lower electrode that is in direct contact with the resistance change film 9 is less likely to be ionized than the metal associated with the

first wirings

5 a and 5 b, and is less likely to diffuse and ion conduct in the resistance change film 9. Is preferably used. For example, Pt, Ru, etc. can be used. In addition, RuTa, RuTi, etc. whose main component is a metal material such as Pt, Ru, etc. may be used. For controlling the work function, Ta, Ti, etc. are inserted at the interface between the second electrode 10 and the rectifying element. Also good. The second electrode 10 is in direct contact with the resistance change film 9 on one surface, and is in direct contact with the rectifying element 11 on the other surface. The second electrode 10 may have a laminated structure. For example, a laminated structure of a lower layer electrode in direct contact with the resistance change film 9 and an upper electrode in direct contact with the rectifying element 11 may be used. For example, RuTa can be used as the lower layer side electrode and Ta as the upper layer side electrode. This can prevent Ru from being exposed to an oxygen atmosphere when the rectifying element is an oxide.

Of the second electrode 10, the upper layer electrode that is in direct contact with the rectifying element 11 is made of, for example, Ta, TaN, Ti, TiN or the like in consideration of the work function of the rectifying element 11 and the second electrode 10. It may be used.

The rectifying element 11 has the rectifying layer 103 shown in FIG. For the rectifying layer 103, a Pool-Frenkel insulating film, a Schottky insulating film, a threshold switching volatile resistance change film, or the like can be used. For example, titanium oxide (TiO _x ), tantalum oxide (TaO _x ), tungsten oxide (WO _x ), molybdenum oxide (MoO _x ), hafnium oxide (HfO _x ), aluminum oxide (AlO _x ), zircon oxide (ZrO _x ) Yttrium oxide (Y ₂ O ₃ ), manganese oxide (MnO _x ), niobium oxide (NbO _x ), silicon nitrogen film (SiN), silicon nitrogen carbide film (SiCN), silicon oxide film (SiO _x ), or silicon, A film containing any of germanium can be used. Alternatively, these laminated films can be used.

Especially, TaO sometimes uses Ta as an electrode, which is advantageous compared to the case where other materials are used for film formation and processing. SiN is also a material generally used for semiconductor devices, and has an advantage that it can be easily grown and processed by dry etching.

The third electrode 12 can be made of, for example, Ta, Ti, W, Al, or a nitride thereof. The third electrode 12 is preferably made of the same material as the barrier metal 20. The third electrode 12 is electrically connected to the

plugs

19a and 19b through the

barrier metals

20a and 20b. The diameter R2 (or the area of the region) of the region where the third electrode 12 and the

plugs

19a and 19b (strictly speaking, the

barrier metals

20a and 20b) are in contact with each other is determined by the

first wirings

5a and 5b and the resistance change film 9. It is set so as to be smaller than the diameter R1 (or the area of the region) of the circle in contact with the region. By setting in this way, the defective filling of the plating (for example, copper plating) into the pilot hole formed in the interlayer insulating film 17 which becomes the connecting portion between the third electrode 12 and the

plugs

19a and 19b is suppressed, and the void Can be suppressed.

The protective insulating film 14 and the insulating barrier film 7 are preferably made of the same material. That is, by surrounding the entire resistance change element with the same material, the material interface is integrated, so that intrusion of moisture and the like from the outside can be prevented, and detachment from the resistance change element itself can be prevented.

The protective insulating film 14 is an insulating film having a function of preventing oxygen from detaching from the resistance change film 9 without damaging the resistance change element. For example, a SiN film, a SiCN film, or the like can be used for the protective insulating film 14. The protective insulating film 14 is preferably made of the same material as the hard mask film 16 and the insulating barrier film 7. When the same material is used, the protective insulating film 14, the insulating barrier film 7, and the hard mask film 16 are integrated, so that the adhesion at the interface is improved and the resistance change element 22 can be further protected. Become.

The interlayer insulating film 17 is an insulating film formed on the protective insulating film 14. For the interlayer insulating film 17, for example, a silicon oxide film (SiO _x ), a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of the silicon oxide film can be used. The interlayer insulating film 17 may be a laminate of a plurality of insulating films. In the interlayer insulating film 17, a pilot hole for embedding the

plugs

19a and 19b and a wiring groove for embedding the

second wirings

18a and 18b are formed.

Second wirings

18a and 18b are buried in these prepared holes and wiring grooves via

barrier metals

20a and 20b.

The

second wirings

18a and 18b are wirings embedded in the wiring grooves formed in the interlayer insulating film 17 through the

barrier metals

20a and 20b. The second wiring 18a is integrated with the plug 19a. The plug 19a is embedded in a prepared hole formed in the interlayer insulating film 17 and the hard mask film 16 via a barrier metal 20a. The plug 19 a is electrically connected to the second electrode 10 through the rectifying element 11. For example, Cu can be used for the second wiring 18a and the plug 19a. The second wiring 18b and the plug 19b have the same configuration as the second wiring 18a and the plug 19a.

The

barrier metals

20a and 20b are formed of the

second wirings

18a and 18b and the plug 19a in order to prevent the metal related to the

second wirings

18a and 18b (including the

plugs

19a and 19b) from diffusing into the interlayer insulating film 17 or the lower layer. , 19b is a conductive film having a barrier property that covers the side surface and the bottom surface. In the

barrier metals

20a and 20b, for example, when the

second wirings

18a and 18b and the

plugs

19a and 19b are made of a metal element containing Cu as a main component, tantalum (Ta), tantalum nitride (TaN), titanium nitride ( A high melting point metal such as TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used. The

barrier metals

20 a and 20 b are preferably made of the same material as the third electrode 12. For example, when the

barrier metals

20 a and 20 b have a stacked structure of TaN (lower layer) / Ta (upper layer), it is preferable to use TaN, which is a lower layer material, for the third electrode 12. Alternatively, when the

barrier metals

20 a and 20 b are Ti (lower layer) / Ru (upper layer), it is preferable to use Ti as the lower layer material for the second electrode 10.

The barrier insulating film 21 is formed on the interlayer insulating film 17 including the

second wirings

18a and 18b, prevents oxidation of the metal (for example, Cu) related to the

second wirings

18a and 18b, and the second wiring 18a to the upper layer. 18b is an insulating film having a role of preventing diffusion of the metal according to 18b. For the barrier insulating film 21, for example, a SiC film, a SiCN film, a SiN film, and a laminated structure thereof can be used.

In this example, a method for manufacturing the semiconductor device described in Example 1 will be described. This embodiment is an example of a method for manufacturing a semiconductor device of the present invention, and will be described in the case of the semiconductor device shown in FIG.

8A to 8L are process cross-sectional views schematically showing a method for manufacturing the semiconductor device shown in FIG.

First, an interlayer insulating film 2 is deposited on a semiconductor substrate (for example, a substrate on which a semiconductor element is formed). The interlayer insulating film 2 is, for example, a silicon oxide film and has a film thickness of 300 nm. Thereafter, a barrier insulating film 3 and an interlayer insulating film 4 are sequentially deposited on the interlayer insulating film 2. The barrier insulating film 3 is, for example, a SiN film and has a thickness of 30 nm. The interlayer insulating film 4 is, for example, a silicon oxide film and has a thickness of 200 nm. Thereafter, a wiring groove is formed in the interlayer insulating film 4 and the barrier insulating film 3 by using a lithography method (including photoresist formation, dry etching, and photoresist removal). After that,

first wirings

5a and 5b (for example, copper) are embedded in the wiring trench through a barrier metal 6 (for example, TaN / Ta, film thickness of 5 nm / 5 nm).

The

interlayer insulating films

2 and 4 can be formed by a plasma CVD method. Here, the plasma CVD method refers to, for example, a gas source or a liquid source that is continuously supplied to a reaction chamber under reduced pressure, and molecules are excited by plasma energy to cause a gas phase reaction or a substrate. This is a technique for forming a continuous film on a substrate by surface reaction or the like.

The

first wirings

5a and 5b are formed by, for example, forming a barrier metal 6 (for example, a TaN / Ta laminated film) by a PVD (Physical Vapor Deposition) method, forming a Cu seed by the PVD method, and then performing an electrolytic plating method. It can be formed by embedding copper in the wiring groove, heat-treating at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by a CMP (Chemical-Mechanical-Polishing) method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. Here, the CMP method is a method of flattening by polishing the unevenness of the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. By polishing excess copper embedded in the trench, a buried wiring (damascene wiring) is formed, or by planarizing by polishing the interlayer insulating film (FIG. 8A).

Next, an insulating barrier film 7 (for example, a SiCN film, a film thickness of 30 nm) is formed on the interlayer insulating film 4 including the

first wirings

5a and 5b (FIG. 8B). Here, the insulating barrier film 7 can be formed by a plasma CVD method. The thickness of the insulating barrier film 7 is preferably about 10 nm to 50 nm.

Next, a first hard mask film 8 (for example, a silicon oxide film) is formed on the insulating barrier film 7 (FIG. 8C). At this time, the hard mask film 8 is preferably made of a material different from the insulating barrier film 7 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film. . For the hard mask film 8, for example, a silicon oxide film, a silicon nitride film, TiN, Ti, Ta, TaN, or the like can be used, and a SiN / SiO ₂ laminate can be used.

Next, the opening is patterned on the first hard mask film 8 using a photoresist (not shown). An opening pattern is formed in the hard mask film 8 by dry etching using the photoresist as a mask, and then the photoresist is peeled off by oxygen plasma ashing or the like (FIG. 8D). At this time, the dry etching is not necessarily stopped on the upper surface of the insulating barrier film 7 and may reach the inside of the insulating barrier film 7.

Next, the insulating barrier film 7 exposed from the opening of the hard mask film 8 is etched back (dry etching) using the hard mask film 8 with the opening shown in FIG. An opening is formed in the barrier film 7, and a part of the upper surface of the

first wiring

5 a, 5 b is exposed from the opening of the insulating barrier film 7. At this time, the opening may reach the inside of the interlayer insulating film 4. Thereafter, an organic stripping process is performed with an amine-based stripping solution to remove the copper oxide formed on the exposed surfaces of the

first wirings

5a and 5b, and to remove etching multi-products generated during the etch back. (See FIG. 8E).

The hard mask film 8 shown in FIG. 8D is preferably completely removed during the etch-back, but may be left as it is when it is an insulating material. In addition, the shape of the opening of the insulating barrier film 7 can be a circle, a square, or a rectangle, and the diameter of the circle or the length of one side of the rectangle can be 20 nm to 500 nm.

Further, in etching back the insulating barrier film 7, the wall surface of the opening of the insulating barrier film 7 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas.

Next, a resistance change film 9 is deposited on the insulating barrier film 7 including the

first wirings

5a and 5b. The resistance change film is a solid electrolyte, and for example, a porous hydrocarbon film, SiCOH, TaSiO, Ta ₂ O ₅ , ZrO, or HfO (film thickness 6 nm) can be used (FIG. 8F). Here, the resistance change film 9 can be formed using a PVD method or a CVD method.

Since moisture or the like is attached to the opening of the insulating barrier film 7 by the organic peeling process, the insulating barrier film 7 is removed by applying a heat treatment under reduced pressure at a temperature of about 250 ° C. to 400 ° C. before the deposition of the resistance change film 9. It is preferable to gas. At this time, care must be taken such as in a vacuum or in a nitrogen atmosphere so as not to oxidize the copper surface again.

Further, before the resistance change film 9 is deposited, gas cleaning or plasma cleaning treatment using H ₂ gas may be performed on the

first wirings

5 a and 5 b exposed from the opening of the insulating barrier film 7. Good. By doing so, it is possible to suppress oxidation of the

first wirings

5a and 5b when forming the resistance change film 9, and to suppress thermal diffusion (mass transfer) of copper during the process. Become.

Further, before the resistance change film 9 is deposited, the oxidation of the

first wirings

5a and 5b may be suppressed by depositing a thin valve metal (thickness of 2 nm or less) (not shown) using the PVD method. . The valve metal is made of at least one of Zr, Hf, Ti, Al, Ta, etc., and can be selected from materials that have a negative free energy of oxidation larger than that of Cu. The thin valve metal layer is oxidized during the formation of the resistance change film 9 to become an oxide.

Further, since it is necessary to bury the variable resistance film 9 in the opening having a step with good coverage, it is preferable to use the plasma CVD method.

Next, the second electrode 10 having a laminated structure is formed on the resistance change film 9. The second electrode 10 is divided into a lower layer electrode (for example, a layer containing Ru as a main component, thickness 10 nm) and an upper layer electrode (for example, titanium nitride, thickness 10 nm) that is in direct contact with the resistance change film 9. It can also be deposited. Further, the rectifying element 11 and the control electrode 12 are formed in this order on the second electrode 10 (see FIG. 8G). The rectifying element 11 can be manufactured by the manufacturing method described in Comparative Example 1.

A second hard mask film (for example, SiCN film, film thickness 30 nm) 23 and a third hard mask film (for example, SiO ₂ film, film thickness 200 nm) 24 are stacked in this order on the control electrode 12 (FIG. 8H).

The second hard mask film 23 and the third hard mask film 24 can be formed using a plasma CVD method. The hard mask film including the second hard mask film 23 and the third hard mask film 24 can be formed using a general plasma CVD method in the technical field of semiconductor devices. The second hard mask film 23 and the third hard mask film 24 are preferably different types of films. For example, the second hard mask film 23 is a SiCN film, and the third hard mask film 24 is SiO _2. It can be a membrane. At this time, the second hard mask film 23 is preferably made of the same material as the protective insulating film 14 and the insulating barrier film 7. That is, all the surroundings of the variable resistance element are surrounded by the same material, so that the material interface can be integrated to prevent intrusion of moisture and the like from the outside and to prevent detachment from the variable resistance element itself.

The first hard mask film 8 can be formed by a plasma CVD method, but it is necessary to maintain a reduced pressure in the reaction chamber before film formation. At this time, oxygen is desorbed from the resistance change film 9, There arises a problem that the leakage current of the solid electrolyte increases due to oxygen defects. In order to suppress them, it is preferable to set the film forming temperature to 400 ° C. or lower. Further, it is preferable not to use a reducing gas because the film is exposed to a film forming gas under reduced pressure before film formation. For example, it is preferable to use a SiN film in which a mixed gas of SiH ₄ / N ₂ is formed by high-density plasma.

Further, a metal hard mask can be used for the hard masks such as the first to third

hard mask films

8, 23, 24, etc. For example, TiN can be used.

Next, a photoresist (not shown) for patterning the switching element portion is formed on the third hard mask film 24, and then the photoresist is used as a mask until the upper surface of the second hard mask film 23 appears. 3 The hard mask film 24 is dry-etched, and then the photoresist is removed using oxygen plasma ashing and organic peeling. (See Figure 8I)
Next, a photoresist (not shown) for patterning the rectifying element portion is formed on the third hard mask film 24, and then the rectifying element pattern is formed in the third hard mask film 24 using the photoresist as a mask. The photoresist is removed using oxygen plasma ashing and organic peeling. As a result, the variable resistance element portion and the rectifying element portion are patterned in the second hard mask film 23 and the third hard mask film 24. (See Figure 8J)
Next, using the second hard mask film 23 and the third hard mask film 24 as a mask, the second hard mask film 23, the third electrode 12, the rectifier element 11, the second electrode 10, and the resistance change film 9 are continuously dried. Etch. At this time, the hard mask film is preferably completely removed during the etch back, but may remain as it is.

For example, when the second electrode 10 is TiN, it can be processed by Cl ₂ -based RIE (Reactive Ion Etching), and when the second electrode 10 is Ru, RIE processing is performed with a mixed gas of Cl ₂ / O _2. can do. In the etching of the resistance change film 9, it is necessary to stop the dry etching on the insulating barrier film 7 on the lower surface. By using such a hard mask RIE method, the variable resistance element portion and the rectifying element portion can be processed without being exposed to oxygen plasma ashing for resist removal.

Next, a protective insulating film 14 (for example, a SiN film, a film thickness of 30 nm) is deposited on the insulating barrier film 7 including the third electrode 12, the rectifying element 11, the second electrode 10, and the resistance change film 9 (FIG. 8L). reference). At this time, the third hard mask film 23 remaining on the third electrode 12 is also covered with the protective insulating film 14.

Although the protective insulating film 14 can be formed by plasma CVD, it is necessary to maintain a reduced pressure in the reaction chamber before film formation. At this time, oxygen is desorbed from the side surface of the resistance change film 9, and the solid electrolyte This causes a problem that the leakage current increases. In order to suppress them, it is preferable to set the deposition temperature of the protective insulating film 14 to 350 ° C. or lower. Further, it is preferable not to use a reducing gas because the film is exposed to a film forming gas under reduced pressure before film formation. For example, it is preferable to use a SiN film or the like formed by using a mixed gas of SiH ₄ / N ₂ with high-density plasma at a substrate temperature of 200 ° C.

The subsequent steps will be described with reference to FIG.

Next, an interlayer insulating film 17 (for example, a silicon oxide film) is formed on the protective insulating film 14, and then the interlayer insulating film 17 is etched and planarized by CMP. A hard mask film 16 is deposited on the planarized interlayer insulating film 17. Thereafter, a wiring groove for the

second wiring

18a, 18b and a pilot hole for the

plugs

19a, 19b are formed, and

barrier metal

20a, 20b (for example, in the wiring groove and the pilot hole is formed using a copper dual damascene wiring process. The

second wirings

18a and 18b (for example, Cu) and the

plugs

19a and 19b (for example, Cu) are simultaneously formed through TaN / Ta). Thereafter, a barrier insulating film 21 (for example, a SiN film) is deposited on the hard mask film 16 including the

second wirings

18a and 18b.

The formation of the

second wirings

18a and 18b can use the same process as the formation of the lower layer wirings (

first wirings

5a and 5b). At this time, by making the

barrier metals

20a and 20b and the third electrode 12 the same material, the contact resistance between the

plugs

19a and 19b and the third electrode 12 is reduced, and the element performance is improved (the resistance change element 22 when turned on). Can be reduced).

The interlayer insulating film 17 can be formed by a plasma CVD method.

According to the manufacturing method of the present embodiment, the

first wirings

5a and 5b are used as the lower electrodes of the resistance change element, that is, the

first wirings

5a and 5b also serve as the lower electrode of the resistance change element. Therefore, it is possible to achieve high density by miniaturization of the variable resistance element, to form a complementary variable resistance element, and to improve reliability. The rectifying element 11 is formed on the upper surface of the variable resistance element, and the variable resistance element can be mounted only by creating three mask sets as an additional step to the normal Cu damascene wiring process. As a result, the cost reduction of the semiconductor device can be achieved at the same time. Furthermore, a resistance change element can also be mounted inside a state-of-the-art device composed of copper wiring to improve the performance of the apparatus.

The industrial applicability of the present invention will be described.

For example, a semiconductor manufacturing apparatus technology having a CMOS (Complementary Metal Oxide Semiconductor) circuit, which is a field of use that has been the background of the invention made by the present inventor, will be described in detail, and a resistance change element is provided inside a copper multilayer wiring on a semiconductor substrate. Although an example of forming is described, the present invention is not limited thereto. For example, DRAM (Dynamic Random Access Memory), SRAM (Static Random Access Memory), flash memory, FRAM (registered trademark) (Ferro Electric Random Access) Memory (MRAM), MRAM (Magnetic Random Access Memory), resistance change memory, semiconductor products having memory circuits such as bipolar transistors, semiconductor products having logic circuits such as microprocessors, or boards and packages on which these are posted simultaneously Can be applied on copper wiring .

The present invention can also be applied to the bonding of electronic circuit devices, optical circuit devices, quantum circuit devices, micromachines, MEMS (Micro Electro Mechanical Systems), etc. to semiconductor devices. In the present invention, the example of the switch function has been mainly described. However, the present invention can be used for a nonvolatile memory, a resistance change characteristic, and a memory element using a rectifying element. Further, in the present invention, as an example of the resistance change element, the characteristics of the metal ion precipitation type resistance change element are mainly shown, but the operation principle of the resistance change element does not limit the use of the present invention.

In particular, when the variable resistance element is a metal deposition type variable resistance element, the variable resistance element exhibits bipolar characteristics. Therefore, it is preferable to use the present invention having both rectification characteristics. Furthermore, when the variable resistance element is used as a switch arranged in a signal line of a logic circuit, the specification required as a rectifying element is excellent in rectifying characteristics (the current is small when a low voltage is applied and the current is large when a high voltage is applied). In addition, it is desirable that the parasitic capacitance of the rectifying element itself is small. Since the rectifying element of the present invention can form the buffer layer (for example, amorphous silicon) at 400 ° C. or lower and can be formed inside the multilayer wiring, it also has an advantage that a low capacity can be realized structurally.

Also, the switching element according to the present invention can be confirmed from the completion. Specifically, by observing the cross section of the device with a TEM (Transmission Electron Microscope), when the variable resistance element is mounted inside the multilayer wiring, the lower surface of the variable resistance element is a copper wiring. Yes, it can be confirmed by observing whether the copper wiring also serves as the lower electrode and has an opening between two different lower layer wirings, and can confirm whether the structure is described in the present invention . In addition to TEM, it is described in the present invention by performing composition analysis such as EDX (Energy Dispersive X-ray Spectroscopy), EELS (Electron Energy Loss Spectroscopy). It can be confirmed whether it is a new material.

The present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

This application claims priority based on Japanese Patent Application No. 2015-122892 filed on Jun. 18, 2015, the entire disclosure of which is incorporated herein.

2

Interlayer insulating film

5a,

5b First wiring

6a, 6b Barrier metal 7 Insulating barrier film 8 First hard mask film 9 Resistance change film 10 Second electrode 11 Rectifier 12 Control electrode (third electrode)
14 Protective insulating film 15 Interlayer insulating film 16 Hard mask film 17

Interlayer insulating film

18a,

18b Second wiring

19a,

19b Plug

20a, 20b Barrier metal 21

Barrier insulating film

22a, 22b, 25a, 25b, 26a, 26b Switching element 101 First 1 electrode 102 2nd electrode 103 3rd electrode 104 1st buffer layer 105 2nd buffer layer 106 Rectifier

Claims

A first electrode and a second electrode;
A rectifying layer provided between the first electrode and the second electrode;
A first buffer layer provided between the first electrode and the rectifying layer;
A second buffer layer provided between the second electrode and the rectifying layer,
The work functions of the first buffer layer and the second buffer layer are smaller than the work functions of the first electrode and the second electrode, and the relative dielectric constant of the first buffer layer and the second buffer layer is the same as that of the rectifying layer. A rectifying element larger than the relative dielectric constant.
The rectifying device according to claim 1,
The first buffer layer and the second buffer layer are rectifier elements composed mainly of silicon or germanium.
The rectifying device according to claim 1 or 2,
The rectifying element, wherein the first buffer layer and the second buffer layer are amorphous.
In the rectifier according to any one of claims 1 to 3,
The rectifying device has a band gap of 1.2 eV or less between the first buffer layer and the second buffer layer.
In the rectifying device according to any one of claims 1 to 4,
The rectifying element, wherein the first electrode and the second electrode are tantalum, titanium, or a nitrogen compound thereof.
The rectifying device according to any one of claims 1 to 5,
The rectifying element is an rectifying element made of oxide or nitrogen.
The rectifying device according to claim 6,
The rectifying element is made of silicon nitride.
A switching element provided in a signal path of a logic circuit,
A rectifying device according to any one of claims 1 to 7,
Two resistance change elements,
Each of the two resistance change elements has two terminals,
One terminal of each of the two terminals of the two variable resistance elements is connected to the other, one of the other two terminals of the two variable resistance elements is the input terminal for the signal, and the other is the input terminal for the signal. Output terminal,
One of the first electrode and the second electrode of the rectifying element is connected to one of the two terminals of the two resistance change elements, and the other electrode is a control terminal. .
Forming a first electrode on the substrate;
A first buffer layer is formed on the first electrode using a plasma CVD method using silane hydride as a raw material,
A rectifying layer is formed on the first buffer layer using a plasma CVD method using hydrogenated silane and nitrogen or ammonia as raw materials,
A second buffer layer is formed on the rectifying layer using a plasma CVD method using silane hydride as a raw material,
A method of manufacturing a rectifying element, wherein a second electrode is formed on the second buffer layer.
The method of manufacturing a rectifying device according to claim 9,
The method of manufacturing a rectifying element, wherein the formation of the first buffer layer, the formation of the rectifying layer, and the formation of the second buffer layer are continuously performed without exposing the substrate to the air in the middle.