WO2016201850A1 - Pfc电路及一种电子设备 - Google Patents

Pfc电路及一种电子设备 Download PDF

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WO2016201850A1
WO2016201850A1 PCT/CN2015/092863 CN2015092863W WO2016201850A1 WO 2016201850 A1 WO2016201850 A1 WO 2016201850A1 CN 2015092863 W CN2015092863 W CN 2015092863W WO 2016201850 A1 WO2016201850 A1 WO 2016201850A1
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circuit
pfc
loop
sampling
power
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PCT/CN2015/092863
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English (en)
French (fr)
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何维
周平森
张滨
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中兴通讯股份有限公司
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Publication of WO2016201850A1 publication Critical patent/WO2016201850A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
    • Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Definitions

  • the utility model relates to the technical field of power electronics, in particular to a PFC circuit and an electronic device.
  • PFC Power Factor Correction
  • the purpose is to improve the power factor of the switching power supply, reduce the reactive power of the power grid, and improve the utilization efficiency of the power grid.
  • the PFC technology generally adopts the BOOST type circuit topology, and includes a power loop and a control loop in the circuit composition.
  • the high-frequency switching noise of the switching tube of the power loop When the PFC circuit is working, the high-frequency switching noise of the switching tube of the power loop generates common mode interference through the ground loop, and the common mode disturbance voltage generates a disturbance current on the working ground of the power loop and the control loop, and the disturbance current flows through the loop impedance to generate a disturbance voltage. .
  • the control chip of the PFC control loop flows through the disturbance current, causing the reference ground plane to be unstable; the detection signal of the control loop and the control circuit are disturbed by the ground level disturbance.
  • problems such as control chip reset, control error, detection signal inaccuracy, and abnormal protection.
  • the usual method for solving common mode interference is that the PFC control loop layout and routing are far from the common mode interference generating loop PFC power loop path, and the interference caused by the interference is reduced by increasing the spatial distance.
  • the current and future development trend of switching power supplies is that the power density of the power supply is increased and the volume is reduced.
  • the power and control loops are compact and cannot increase the spatial distance to reduce the effects of common-mode interference.
  • the embodiment of the present invention provides a PFC circuit and an electronic device to solve at least the problem that the common mode interference generated by the PFC power conversion loop on the control loop cannot be eliminated or reduced in the related art.
  • a power factor correction PFC circuit includes: a power loop and a control loop, the control loop including at least one of the following: an AC AC voltage sampling circuit, an AC current sampling circuit, PFC control circuit, driving circuit, PFC output sampling circuit, the above power circuit and the above control circuit are isolated; the AC voltage sampling circuit is a circuit for isolating and sampling the input voltage; the AC current sampling circuit is for isolating and sampling the input current The circuit is the circuit that drives the driving signal in an isolated manner; the PFC output sampling circuit is a circuit that isolates and samples the PFC output voltage.
  • the reference ground of the power circuit is isolated from the reference ground of the control loop.
  • the PFC circuit further includes: a first auxiliary power source and a second auxiliary power source, wherein the first auxiliary power source is referenced to a reference ground of the power circuit, and the second auxiliary power source is referenced to the control circuit For reference.
  • the power circuit includes at least one of the following: a switch tube, an inductor, a diode, a filter capacitor, and a load.
  • an electronic device comprising the PFC circuit described above.
  • a power factor correction PFC circuit includes: a power loop and a control loop, and the control loop includes at least one of the following: an AC AC voltage sampling circuit, an AC current sampling circuit, a PFC control circuit, a driving circuit, and a PFC.
  • the output sampling circuit is characterized in that the power loop and the control loop are isolated; the AC voltage sampling circuit is a circuit for isolating and sampling the input voltage; the AC current sampling circuit is a circuit for isolating and sampling the input current; the driving circuit is a driving signal The circuit driven by the isolation mode; the PFC output sampling circuit is a circuit for isolating and sampling the PFC output voltage.
  • FIG. 1 is a schematic diagram of a "totem pole" type PFC circuit in the related art
  • FIG. 2 is a schematic diagram of a PFC circuit in the related art
  • FIG. 3 is a block diagram showing the structure of a PFC circuit according to an embodiment of the present invention.
  • FIG. 4 is a diagram of an isolated control PFC circuit in accordance with an embodiment of the present invention.
  • FIG. 5 is a PFC control logic diagram in the related art
  • FIG. 6 is a PFC control logic diagram in accordance with an embodiment of the present invention.
  • FIG. 3 is a structural block diagram of a PFC circuit according to an embodiment of the present invention.
  • a power loop and a control loop are included in the PFC circuit, and the control loop includes at least one of the following: an AC AC voltage sampling circuit 32, an AC current.
  • the sampling circuit 34, the PFC control circuit 36, the driving circuit 38, the PFC output sampling circuit 40, the power loop and the control loop are isolated.
  • the AC voltage sampling circuit is a circuit that isolates the input voltage.
  • the AC current sampling circuit is a circuit that isolates the input current.
  • the drive circuit is a circuit that drives the drive signal in an isolated manner.
  • the PFC output sampling circuit is a circuit that isolates the PFC output voltage.
  • the above embodiments relate to power loop and control loop isolation settings, in an alternative embodiment, the reference ground of the power loop and the reference ground of the control loop are isolated. In turn, the isolation settings of the power loop and the control loop are realized.
  • the PFC circuit further includes: a first auxiliary power source and a second auxiliary power source, wherein the first auxiliary power source is referenced to a reference ground of the power loop The second auxiliary power source is referenced to the reference ground of the control loop.
  • the power circuit includes at least one of the following: a switch transistor, an inductor, a diode, a filter capacitor, and a load.
  • an electronic device comprising the PFC circuit described above.
  • An alternative embodiment of the present invention proposes a method and apparatus for eliminating common mode interference of a PFC control circuit.
  • the implementation method is: cutting the power loop and control of the PFC by cutting off the control loop of the PFC transform and the ground loop path of the main power loop. Loop isolation method to eliminate or reduce common mode interference of the PFC control circuit.
  • Input voltage detection adopts isolation detection
  • input current adopts isolation detection
  • output voltage isolation detection
  • PFC control circuit adopts ground isolation
  • PFC drive adopts isolation drive.
  • the entire control loop and power conversion are fully electrically isolated. Thereby the effect of common mode interference on the control line is completely eliminated from the path.
  • the PFC circuit still divides the power loop and the control loop, and the power loop includes a conventional switch tube, an inductor, a diode, a filter circuit, and a load, and is collectively referred to as a power loop.
  • the control loop is also equivalent to the sampling circuit, control circuit, protection circuit, and drive circuit of the traditional PFC control loop, collectively referred to as the control loop.
  • PFC power loop and PFC control loop the two modules are connected by isolation.
  • 4 is a diagram of an isolated controlled PFC circuit in accordance with an embodiment of the present invention.
  • the sampling of PFC input signal is isolated sampling.
  • AC voltage and current sampling adopts isolated sampling
  • PFC output voltage adopts isolated sampling
  • PFC control signal and switching tube drive signal are driven by isolation.
  • the working place of the PFC can be divided into power ground and control ground.
  • the reference ground of the PFC power loop is the power ground; the reference ground of the PFC control loop is the control ground.
  • the auxiliary power supply of the PFC can be divided into two independent power supply units, an auxiliary power supply unit with power ground as reference, and an auxiliary power supply unit with control ground as a loop.
  • FIG. 5 is a PFC control logic diagram in the related art
  • FIG. 6 is a PFC control logic diagram according to an embodiment of the present invention.
  • the isolated control PFC circuit still divides the power loop and the control loop, and the power loop includes the switch tube S1, the inductor LB, the diode VD1, the filter capacitor CB and the load RL of the conventional PFC circuit, and is collectively referred to as a power loop.
  • the control loop also includes an AC voltage sampling circuit equivalent to a conventional PFC control loop, an AC current isolation sampling circuit, a PFC control circuit, a PFC isolation sampling circuit, and an isolated driving circuit, and are collectively referred to as a control loop.
  • PFC input AC voltage and current sampling adopts isolated sampling
  • AC current sampling adopts isolated sampling
  • PFC output voltage adopts isolated sampling
  • PFC drive adopts isolated driving
  • the working place of the PFC can be divided into power ground and control ground.
  • the reference ground of the PFC power loop is power ground, which is represented by the symbol PGND;
  • the reference ground of the PFC control loop is indicated by the symbol SGND for the control ground;
  • the auxiliary power supply of the PFC can be divided into two independent power supply units, an auxiliary power supply unit with the power ground PGND as the reference ground, and an auxiliary power supply unit with the control ground SGND as the reference ground.
  • the working ground of the "totem pole” PFC can be divided into power ground and control ground.
  • the reference ground of the PFC power loop is the power ground, which is represented by the symbol PGND;
  • the reference ground of the "totem pole” PFC control loop is the control ground with the symbol SGND. ;
  • the auxiliary power supply of the "totem pole" PFC can be divided into two independent power supply units, an auxiliary power supply unit with the power ground PGND as the reference ground, and an auxiliary power supply unit with the control ground SGND as the reference ground.
  • the method and the device of the embodiment of the present invention have simple control logic, complete PFC control function without complicated EMI simulation and experiment, reduce design difficulty, and improve development success rate. .
  • it has achieved the goal of reducing development cycle and improving development efficiency and success rate. It is not limited by the size of the power supply, and eliminates the need for complex EMI simulation and processing to eliminate the effects of PFC power loop noise on the PFC control loop.
  • a power factor correction PFC circuit includes: a power loop and a control loop, and the control loop includes at least one of the following: an AC AC voltage sampling circuit, an AC current sampling circuit, a PFC control circuit, a driving circuit, and a PFC.
  • the output sampling circuit is characterized in that the power loop and the control loop are isolated; the AC voltage sampling circuit is a circuit for isolating and sampling the input voltage; the AC current sampling circuit is a circuit for isolating and sampling the input current; the driving circuit is a driving signal The circuit driven by the isolation mode; the PFC output sampling circuit is a circuit for isolating and sampling the PFC output voltage.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

一种功率因数校正（PFC）电路及一种电子设备。PFC电路包括功率回路（VCC1）和控制回路（VCC2）。控制回路包括以下至少之一：AC电压采样电路（32）、AC电流采样电路（34）、PFC控制电路（36）、驱动电路（38）、PFC输出采样电路（40）。功率回路和控制回路隔离设置。AC电压采样电路为对输入电压（VAC）进行隔离采样的电路。AC电流采样电路为对输入电流进行隔离采样的电路。驱动电路为对驱动信号进行隔离驱动的电路。PFC输出采样电路为对PFC输出电压进行隔离采样的电路。通过隔离，能够减小或消除PFC电路中功率回路对控制回路产生的共模干扰。

Description

PFC电路及一种电子设备 技术领域
本实用新型涉及电力电子技术领域，具体而言，涉及一种PFC电路及一种电子设备。
背景技术
功率因数校正(Power Factor Correction，简称为PFC)在电力电子领域广泛应用，目的是提高开关电源的功率因数，减小电网的无功功率，提高电网的利用效率。PFC技术一般是采用BOOST类电路拓扑，在电路组成上包括功率回路和控制回路。
在PFC电路工作的时候，功率回路的开关管的高频开关噪声通过地回路产生共模干扰，共模扰动电压在功率回路和控制回路工作地上产生扰动电流，扰动电流流过回路阻抗产生扰动电压。PFC控制回路的控制芯片地流过扰动电流，造成参考地平面不稳定；控制回路的检测信号和控制线路受到地电平扰动的干扰。一般会出现控制芯片复位，控制出错，检测信号不准，不正常保护等问题。图1是相关技术中“图腾柱”式PFC电路示意图，图2是相关技术中PFC电路示意图。
特别在如图2所示的“图腾柱式”无桥PFC拓扑工作的时候，在输入交流电压过零的时刻，过大的冲击电流流入PFC电感，并和回路二极管的等效结电容、开关管的结电容、EMI滤波器的X电容发生谐振，导致PFC回路的地上出现很大的脉冲电流和脉冲电压。脉冲电流和脉冲电压导致PFC的效率下降，也造成强烈的EMI干扰，对连接到PFC功率地回路中的采样电路、控制电路、驱动电路受到干扰。造成PFC开关管开关控制的逻辑错误，轻度情况下PFC性能受到影响，严重情况下PFC开关管共通或过热烧毁。
通常解决共模干扰常规方法是PFC控制回路布局和走线远离共模干扰产生回路PFC功率回路路径，通过增加空间距离来减少干扰造成的影响。但是当前和未来的开关电源发展趋势是，电源功率密度提高，体积减小。在PFC变换应用的大多数场合，特别是高功率密度的开关电源内部，功率回路和控制回路都很紧凑，不能靠增加空间距离来减少共模干扰的影响。
针对相关技术中，对于如何消除或者减小PFC功率变换回路对控制回路产生共模干扰的问题，还未提出有效的解决方案。
实用新型内容
本实用新型实施例提供了一种PFC电路及一种电子设备，以至少解决相关技术中无法消除或者减小PFC功率变换回路对控制回路产生共模干扰的问题。
根据本实用新型实施例的一个方面，提供了一种功率因数校正PFC电路包括：功率回路和控制回路，上述控制回路包括以下至少之一：交流AC电压采样电路、AC电流采样电路、 PFC控制电路、驱动电路、PFC输出采样电路，上述功率回路和上述控制回路隔离设置；上述AC电压采样电路为对输入电压进行隔离采样的电路；上述AC电流采样电路为对输入电流进行隔离采样的电路；上述驱动电路为对驱动信号进行隔离方式驱动的电路；上述PFC输出采样电路为对PFC输出电压进行隔离采样的电路。
可选地，上述功率回路的参考地和上述控制回路的参考地隔离设置。
可选地，上述PFC电路还包括：第一辅助电源和第二辅助电源，其中，上述第一辅助电源以上述功率回路的参考地为参考地，上述第二辅助电源以上述控制回路的参考地为参考地。
可选地，其中，上述功率回路包括以下至少之一：开关管、电感、二极管、滤波电容和负载。
根据本实用新型实施例的另一个方面，还提供了一种电子设备，包括上述的PFC电路。
通过本实用新型实施例，采用一种功率因数校正PFC电路包括：功率回路和控制回路，控制回路包括以下至少之一：交流AC电压采样电路、AC电流采样电路、PFC控制电路、驱动电路、PFC输出采样电路，其特征在于，功率回路和控制回路隔离设置；AC电压采样电路为对输入电压进行隔离采样的电路；AC电流采样电路为对输入电流进行隔离采样的电路；驱动电路为对驱动信号进行隔离方式驱动的电路；PFC输出采样电路为对PFC输出电压进行隔离采样的电路。解决了相关技术中无法消除或者减小PFC功率变换回路对控制回路产生共模干扰的问题。
附图说明
此处所说明的附图用来提供对本实用新型的进一步理解，构成本申请的一部分，本实用新型的示意性实施例及其说明用于解释本实用新型，并不构成对本实用新型的不当限定。在附图中：
图1是相关技术中“图腾柱”式PFC电路示意图；
图2是相关技术中PFC电路示意图；
图3是根据本实用新型实施例的PFC电路的结构框图；
图4是根据本实用新型实施例的隔离控制的PFC线路图；
图5相关技术中PFC控制逻辑图；
图6是根据本实用新型实施例的PFC控制逻辑图；
图7是根据本实用新型实施例的隔离控制的“图腾柱式”无桥PFC线路。
具体实施方式
下文中将参考附图并结合实施例来详细说明本实用新型。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
图3是根据本实用新型实施例的PFC电路的结构框图，如图3所示，在PFC电路中包括功率回路和控制回路，控制回路包括以下至少之一：交流AC电压采样电路32、AC电流采样电路34、PFC控制电路36、驱动电路38、PFC输出采样电路40，功率回路和控制回路隔离设置。其中，在一个可选实施例中，AC电压采样电路为对输入电压进行隔离采样的电路。在另一个可选实施例中，AC电流采样电路为对输入电流进行隔离采样的电路。在再一个可选实施例中，驱动电路为对驱动信号进行隔离方式驱动的电路。在再一个可选实施例中，PFC输出采样电路为对PFC输出电压进行隔离采样的电路。
上述实施例涉及到功率回路和控制回路隔离设置，在一个可选实施例中，功率回路的参考地和控制回路的参考地隔离设置。进而实现了功率回路和控制回路的隔离设置。
上述实施例涉及到功率回路和控制回路隔离设置，在一个可选实施例中，PFC电路还包括：第一辅助电源和第二辅助电源，其中，第一辅助电源以功率回路的参考地为参考地，第二辅助电源以控制回路的参考地为参考地。
在一个可选实施例中，其中，上述功率回路包括以下至少之一：开关管、电感、二极管、滤波电容和负载。
根据本实用新型实施例的另一个方面，还提供了一种电子设备，包括上述的PFC电路。
本实用新型可选实施例提出了一种消除PFC控制电路共模干扰的方法和装置，实现方式：通过切断PFC变换的控制回路和主功率回路的地回路路径，让PFC变换的功率回路和控制回路隔离的方法，来消除或减小PFC控制电路的共模干扰。
输入电压检测采用隔离检测，输入电流采用隔离检测，输出电压隔离检测，PFC控制线路采用地隔离，PFC驱动采用隔离驱动。整个控制回路和功率变换做到完全电气隔离。从而从路径上完全消除共模干扰对控制线路的影响。
与相关技术相比，PFC电路仍分功率回路和控制回路，功率回路包含传统的开关管，电感，二极管，滤波电路及负载等，统称功率回路。控制回路也等同传统PFC控制回路的采样电路，控制电路，保护电路，和驱动电路等，统称控制回路。
与传统PFC不同之处在于，本实用新型可选实施例提出的PFC功率回路和控制回路的参考地是隔离的，不是直接相连。
本实用新型可选实施例的隔离控制的PFC装置包括以下模块：
PFC功率回路和PFC控制回路，两个模块通过隔离方式连接。图4是根据本实用新型实施例的隔离控制的PFC线路图。
隔离型控制PFC装置一般有如下特征：
1、PFC输入信号的采样都是隔离采样，比如交流电压电流采样采用隔离采样，PFC输出电压采用隔离采样；PFC控制信号和开关管驱动信号采用隔离方式驱动。
2、PFC的工作地可以划分为功率地和控制地，PFC功率回路参考地为功率地；PFC控制回路的参考地为控制地。
3、PFC的辅助电源可划分为两个独立供电单元，以功率地为参考的辅助电源单元，和以控制地为回路的辅助电源单元。
图5相关技术中PFC控制逻辑图，图6是根据本实用新型实施例的PFC控制逻辑图。与相关技术的PFC装置相比，隔离控制的PFC电路仍分功率回路和控制回路，功率回路包含传统PFC电路的开关管S1，电感LB，二极管VD1，滤波电容CB及负载RL等，统称功率回路。控制回路也包括等同传统PFC控制回路的AC电压采样电路，AC电流隔离采样电路，PFC控制电路，PFC隔离采样电路，和隔离驱动电路等功能模块，统称控制回路。
与传统PFC装置的区别特征如下：
1、PFC输入AC电压电流采样采用隔离采样，AC电流采样采用隔离采样，PFC输出电压采用隔离采样，PFC驱动采用隔离驱动。
2、PFC的工作地可以划分为功率地和控制地，PFC功率回路参考地为功率地，用符号PGND表示；PFC控制回路的参考地为控制地用符号SGND表示；
3、PFC的辅助电源可划分为两个独立供电单元，以功率地PGND为参考地的辅助电源单元，和以控制地SGND为参考地的辅助电源单元。
图7是根据本实用新型实施例的隔离控制的“图腾柱式”无桥PFC线路。与传统方式的“图腾柱”PFC装置不同之处如下：
1、信号采样采用隔离方式采样，PFC驱动采用隔离方式驱动。
2、“图腾柱”PFC的工作地可以划分为功率地和控制地，PFC功率回路参考地为功率地，用符号PGND表示；“图腾柱”PFC控制回路的参考地为控制地用符号SGND表示；
3、“图腾柱”PFC的辅助电源可划分为两个独立供电单元，以功率地PGND为参考地的辅助电源单元，和以控制地SGND为参考地的辅助电源单元。
综上所述，通过本实用新型实施例方法和装置，与相关技术相比，控制逻辑简单，在不需要复杂EMI仿真和试验的情况下完成PFC控制功能，减少设计难度，提高开发的成功率。特别针对于高效的无桥PFC拓扑，达到了减少开发周期，提高开发效率和成功率的目的。并且不受电源尺寸的限制，无需复杂EMI仿真和处理，就能消除PFC功率回路的噪声对PFC控制回路的影响。
以上所述仅为本实用新型的优选实施例而已，并不用于限制本实用新型，对于本领域的技术人员来说，本实用新型可以有各种更改和变化。凡在本实用新型的精神和原则之内，所 作的任何修改、等同替换、改进等，均应包含在本实用新型的保护范围之内。
工业实用性
通过本实用新型实施例，采用一种功率因数校正PFC电路包括：功率回路和控制回路，控制回路包括以下至少之一：交流AC电压采样电路、AC电流采样电路、PFC控制电路、驱动电路、PFC输出采样电路，其特征在于，功率回路和控制回路隔离设置；AC电压采样电路为对输入电压进行隔离采样的电路；AC电流采样电路为对输入电流进行隔离采样的电路；驱动电路为对驱动信号进行隔离方式驱动的电路；PFC输出采样电路为对PFC输出电压进行隔离采样的电路。解决了相关技术中无法消除或者减小PFC功率变换回路对控制回路产生共模干扰的问题。

Claims (5)

  1. 一种功率因数校正PFC电路包括：功率回路和控制回路，所述控制回路包括以下至少之一：交流AC电压采样电路、AC电流采样电路、PFC控制电路、驱动电路、PFC输出采样电路，
    所述功率回路和所述控制回路隔离设置；
    所述AC电压采样电路为对输入电压进行隔离采样的电路；
    所述AC电流采样电路为对输入电流进行隔离采样的电路；
    所述驱动电路为对驱动信号进行隔离方式驱动的电路；
    所述PFC输出采样电路为对PFC输出电压进行隔离采样的电路。
  2. 根据权利要求1所述的PFC电路，其中，所述功率回路的参考地和所述控制回路的参考地隔离设置。
  3. 根据权利要求2所述的PFC电路，其中，所述PFC电路还包括：第一辅助电源和第二辅助电源，其中，所述第一辅助电源以所述功率回路的参考地为参考地，所述第二辅助电源以所述控制回路的参考地为参考地。
  4. 根据权利要求1所述的PFC电路，其中，其中，所述功率回路包括以下至少之一：开关管、电感、二极管、滤波电容和负载。
  5. 一种电子设备，包括权利要求1至4中任一项所述的PFC电路。
PCT/CN2015/092863 2015-06-15 2015-10-26 Pfc电路及一种电子设备 WO2016201850A1 (zh)

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