WO2016194199A1 - ストレージ装置 - Google Patents
ストレージ装置 Download PDFInfo
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- WO2016194199A1 WO2016194199A1 PCT/JP2015/066212 JP2015066212W WO2016194199A1 WO 2016194199 A1 WO2016194199 A1 WO 2016194199A1 JP 2015066212 W JP2015066212 W JP 2015066212W WO 2016194199 A1 WO2016194199 A1 WO 2016194199A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0632—Configuration or reconfiguration of storage systems by initialisation or re-initialisation of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
- G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0611—Improving I/O performance in relation to response time
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0689—Disk arrays, e.g. RAID, JBOD
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/20—Initialising; Data preset; Chip identification
Definitions
- the present invention relates to a storage device using a nonvolatile semiconductor memory.
- Patent Document 1 discloses a storage system that initializes a disk drive while receiving an I / O request from a host.
- initialization is performed in the background, and a predetermined data pattern such as all zero is written by the initialization.
- host I / O arrives, if the I / O target area has been initialized, normal I / O is performed on that area. If not already initialized, data is written after initialization if the I / O is a write, and initialization data is returned to the host if the I / O is a read.
- a test code for enabling data validity verification may be stored together with data when data is written to a storage device.
- a field referred to as DIF (Data Integrity Field)
- DIF Data Integrity Field
- an inspection code includes an error detection code calculated based on write data and information (information calculated based on a data storage destination address) for enabling validity verification of a data access position. Since the data is stored, the content of the inspection code may vary depending on the data storage position.
- Patent Document 1 In the initialization technique disclosed in Patent Document 1, it is possible to write a predetermined data pattern in the storage area, but it is not considered to store different information depending on the data storage position. Therefore, it is difficult to introduce the technology disclosed in Patent Document 1 to a storage system that requires high reliability.
- a storage apparatus includes a plurality of storage devices and a storage controller.
- the storage device provides a storage controller with a storage space having a plurality of sectors, and each sector includes a write data storage area and an inspection code storage area.
- an inspection code is generated based on the information included in the read request, and the storage controller has a predetermined pattern. Send data and test code.
- the initialization process for the storage device can be substantially eliminated.
- the information of the present invention may be described in terms of “aaa table” or the like, but the information may be expressed in a data structure other than a table or the like. Therefore, the “aaa table” or the like may be referred to as “aaa information” to indicate that it does not depend on the data structure.
- information for identifying “bbb” of the present invention may be described by an expression such as “bbb name”. However, the information for identifying these is not limited to a name, but an identifier, an identification number, Any information can be used as long as it can identify “bbb” such as an address.
- program may be used as the subject, but in reality, the program is executed by a processor (CPU (Central Processing Unit)), so that the processing determined by the processor is stored in memory. And I / F (interface). However, to prevent the explanation from becoming redundant, the program may be described as the subject. Further, part or all of the program may be realized by dedicated hardware.
- Various programs may be installed in each apparatus by a program distribution server or a computer-readable storage medium.
- the storage medium for example, an IC card, an SD card, a DVD, or the like may be used.
- FIG. 1 shows a configuration of a computer system including a storage system 1 according to the embodiment.
- a storage system (also referred to as a storage device) 1 includes a storage controller (also referred to as DKC) 10 and a plurality of storage devices (200, 200 ') connected to the storage controller 10.
- DKC storage controller
- the storage device (200, 200 ') is used to store write data from a host device such as the host 2.
- the storage system 1 is an FMPK (Flash, which is a storage device using a nonvolatile semiconductor memory such as a flash memory as a storage medium in addition to an HDD (Hard Disk Drive) using a magnetic disk as a storage medium as a storage device. Memory (PacKage) can be used. A specific configuration of FMPK will be described later.
- the storage device 200 ′ is an HDD and the storage device 200 is FMPK will be described. Therefore, the storage device 200 may be referred to as “FMPK200”, and the storage device 200 ′ may be referred to as “HDD200 '”. However, a storage device of a type other than the HDD or FMPK may be used as the storage device (200, 200 '). In this embodiment, the storage device (200, 200 ') communicates with the storage controller 10 in accordance with the SAS (Serial Attached SCSI) standard.
- SAS Serial Attached SCSI
- One or more hosts 2 are connected to the DKC 10.
- the DKC 10 and the host 2 are connected via a SAN (Storage Area Network) 3 formed using a fiber channel as an example.
- SAN Storage Area Network
- the DKC 10 includes at least a processor 11, a host interface (denoted as “host IF” in the figure) 12, a device interface (denoted as “device IF” in the figure) 13, a memory 14, and a parity operation circuit 15.
- the processor 11, the host IF 12, the device IF 13, the memory 14, and the parity operation circuit 15 are interconnected via a mutual coupling switch (mutual coupling SW) 16.
- a plurality of these components may be mounted in the DKC 10 in order to ensure high performance and high availability. However, a configuration in which only one of these components is provided in the DKC 10 may be used.
- the device IF 13 includes at least an interface controller 131 (indicated as “SAS-CTL” in the drawing) for communicating with the storage devices 200 and 200 ′, and a transfer circuit (not shown).
- the interface controller 131 is for converting a protocol (SAS in one example) used in the storage devices 200 and 200 'into a communication protocol (PCI-Express as an example) used in the DKC 10.
- SAS-CTL a SAS controller
- FIG. 1 only one SAS-CTL 131 is described in one device IF 13, but a configuration in which a plurality of SAS-CTLs 131 exist in one device IF 13 may be adopted.
- the host IF 12 has at least an interface controller and a transfer circuit (not shown), like the device IF 13.
- the interface controller is for converting a communication protocol (for example, fiber channel) used between the host 2 and the DKC 10 into a communication protocol used inside the DKC 10.
- the parity calculation circuit 15 is hardware that generates redundant data (parity) required by the RAID technology. Examples of redundant data generated by the parity operation circuit 15 include exclusive OR (XOR) and Reed-Solomon code.
- the processor 11 processes I / O requests coming from the host IF 12.
- the memory 14 is used to store programs executed by the processor 11 and various management information of the storage system 1 used by the processor 11.
- the memory 14 is also used for temporarily storing I / O target data for the storage devices (200, 200 ').
- the memory 14 is configured by a volatile storage medium such as DRAM or SRAM. However, as another embodiment, the memory 14 may be configured by using a nonvolatile memory.
- the storage system 1 can be equipped with a plurality of types of storage devices such as the FMPK 200 and the HDD 200 '.
- the following description is based on the assumption that only the FMPK 200 is mounted in the storage system 1 unless otherwise specified.
- the FMPK 200 includes a device controller (FM controller) 201 and a plurality of FM chips 210.
- the FM controller 201 includes a memory 202, a processor 203, a compression / decompression circuit 204 for performing data compression / decompression, a format data generation circuit 205 for generating format data, a SAS-CTL 206, and an FM-IF 207.
- the memory 202, the processor 203, the compression / decompression circuit 204, the format data generation circuit 205, the SAS-CTL 206, and the FM-IF 207 are interconnected via an internal connection switch (internal connection SW) 208.
- SAS-CTL 206 is an interface controller for performing communication between the FMPK 200 and the DKC 10.
- the SAS-CTL 206 is connected to the SAS-CTL 131 of the DKC 10 via a transmission line (SAS link).
- the FM-IF 207 is an interface controller for performing communication between the FM controller 201 and the FM chip 210.
- the processor 203 performs processing related to various commands coming from the DKC 10.
- the memory 202 stores programs executed by the processor 203 and various management information.
- a volatile memory such as a DRAM is used.
- a nonvolatile memory may be used for the memory 202.
- the compression / decompression circuit 204 is hardware having a function of compressing data or decompressing the compressed data. Instead of the compression / decompression circuit 204, the processor 203 may execute a data compression program to perform data compression. In addition, the compression / decompression circuit 204 is not required when compression is not performed when data is stored in the FM chip 210.
- the format data generation circuit 205 is hardware for generating initialization data. Further, instead of the format data generation circuit 205, the processor 203 may execute a program for executing processing equivalent to that of the format data generation circuit 205, thereby causing the processor 203 to replace the format data generation circuit 205.
- FM chip 210 is a non-volatile semiconductor memory chip such as a NAND flash memory.
- data is read / written in units of pages in the flash memory, and data erasure is performed in units of blocks that are a set of a plurality of pages.
- a page once written cannot be overwritten, and in order to rewrite a page once written, it is necessary to erase the entire block including the page. Therefore, the FMPK 200 does not directly provide the storage area of the FM chip 210 to the DKC 10 to which the FMPK 200 is connected, but provides a logical storage space.
- the storage system 1 uses a plurality of FMPKs 200 to form a RAID (Redundant Arrays of Independent / Independent Disks) group.
- RAID Redundant Arrays of Independent / Independent Disks
- the data stored in the failed FMPK 200 can be recovered using the remaining data in the FMPKs 200.
- a part of the storage area (or all storage areas) in the RAID group is provided as a logical volume to a host device such as the host 2.
- FMPK # 0 to FMPK # 3 represent storage spaces provided by the FMPK 200 (200-0 to 200-3) to the DKC 10, respectively.
- the DKC 10 constitutes one RAID group 20 from a plurality (four in the example of FIG. 3) of FMPKs 200, and FMPKs (FMPK # 0 (200-0) to FMPK # 3 (200-3) belonging to the RAID group 20 are included. ))
- the above storage space is managed by dividing it into a plurality of fixed-size storage areas called stripe blocks.
- FIG. 3 shows an example in which the RAID level of the RAID group 20 (representing the data redundancy method in the RAID technology and generally having RAID levels of RAID1 to RAID6) is RAID5.
- boxes such as “0”, “1”, and “P” in the RAID group 20 represent stripe blocks, and the size of the stripe block is, for example, 64 KB, 256 KB, 512 KB, or the like.
- a number such as “1” assigned to each stripe block is referred to as a “stripe block number”.
- the stripe block described as “P” in the stripe block is a stripe block in which redundant data is stored, and this is called a “parity stripe”.
- a stripe block in which numbers (0, 1 etc.) are written is a stripe block in which data (data which is not redundant data) written from a host device such as the host 2 is stored. This stripe block is called “data stripe”.
- the stripe block located at the head of FMPK # 3 (200-3) is the parity stripe 301-3.
- the data stripe (stripe) positioned at the head of each FMPK 200 (FMPK # 0 (200-0) to FMPK # 2 (200-2)) is stored. Redundant data is generated by performing a predetermined operation (for example, exclusive OR (XOR) or the like) on the data stored in the blocks 301-0, 301-1 and 301-2).
- a predetermined operation for example, exclusive OR (XOR) or the like
- each stripe block belonging to one stripe line is located at the same position in the storage space of the FMPKs 200-0 to 200-3 (like the stripe line 300 shown in FIG.
- the stripe line is configured according to the rule of existing at the address.
- the stripe block number described above is a number assigned to the data stripe, and is a unique number within the RAID group. As shown in FIG. 3, the DKC 10 assigns numbers 0, 1, and 2 to the data stripes included in the first stripe line in the RAID group. Further, the data stripes included in the subsequent stripe lines are also 3, 4, 5,. . . The serial number is attached.
- a data stripe whose stripe block number is n (n is an integer value of 0 or more) is referred to as “data stripe n”.
- the storage system 1 manages the storage area of the RAID group 20 by dividing it. Each divided storage area is called a virtual device (VDEV). Note that all storage areas of one RAID group 20 may be managed as one VDEV. Each VDEV is assigned a unique identification number within the storage system 1. This identification number is called a VDEV number (or VDEV #). A VDEV whose VDEV # is n is expressed as “VDEV # n”. In this embodiment, VDEV # is an integer value of 0 or more and 65535 or less, that is, a value that can be expressed by a 16-bit binary number.
- the storage system 1 divides the storage area of the VDEV and provides the host 2 with a storage area obtained by removing the parity stripe from the divided storage area.
- the storage area provided to the host 2 is called a logical device (LDEV). Similar to the VDEV, each LDEV is given a unique identifier in the storage system 1. This identifier is called an LDEV number (or LDEV #).
- LDEV # logical device
- the host 2 writes or reads data to or from the storage system 1, it issues a write command or a read command that specifies LDEV # (or information such as LUN that can derive the LDEV identifier).
- the command includes an address of an access target area in the LDEV (hereinafter, this address is referred to as “LDEV LBA”) in addition to the LDEV #.
- LDEV LBA an address of an access target area in the LDEV
- the DKC 10 converts the LDEV # and LDEV LBA into addresses on the storage space of the VDEV # and VDEV (hereinafter referred to as “VDEV LBA”). Further, the DKC 10 calculates the identifier of the FMPK 200 and the address on the FMPK 200 (this address is referred to as “FMPK LBA”) from the VDEV # and VDEV LBA, and reads data from the FMPK 200 using the calculated FMPK LBA.
- the DKC 10 calculates the FMPK LBA of the FMPK 200 in which the parity corresponding to the write target data is to be stored, in addition to the FMPK LBA of the FMPK 200 in which the write target data is to be stored.
- the minimum unit when the host 2 accesses the data stored in the storage space in the LDEV is 512 bytes as an example.
- the storage controller 10 receives a write command and write data for the LDEV from the host 2, the storage controller 10 adds an 8-byte inspection code for every 512-byte data. In this embodiment, this inspection code is called DIF.
- this inspection code is called DIF.
- a 520-byte data chunk consisting of 512-byte data and a DIF added thereto, or an area in which this 520-byte chunk is stored is called a “sector”.
- a sector consists of data 510 and DIF 511.
- Data 510 is an area where write data received from the host 2 is stored
- DIF 511 is an area where DIF added by the storage controller 10 is stored.
- the DIF 511 includes three types of information: CRC 512, LA 513, and APP 514.
- the CRC 512 is an error detection code (CRC (Cyclic Redundancy Check) is used as an example) that is generated by performing a predetermined operation on the data 510, and is 2-byte information.
- CRC Cyclic Redundancy Check
- LA 513 is 5-byte information generated based on the data storage position.
- LA0 (513-0) information obtained by processing VDEV # of the VDEV in which data 510 is stored is stored.
- Information obtained by processing the storage destination address (FMPK LBA) of the data 510 is recorded in the remaining 4 bytes (referred to as “LA1 (513-1)”).
- FMPK LBA storage destination address
- LA1 (513-1) information obtained by processing the storage destination address of the data 510 is recorded in the remaining 4 bytes.
- the storage controller 10 uses the data write destination address LBA included in the write request to write the write data storage destination VDEV #, the write data storage destinations FMPK and FMPK.
- LBA information to be stored in LA0 (513-0) and LA1 (513-1) is generated.
- APP 514 is also a kind of error detection code and is 1-byte information. APP 514 is an exclusive OR of each byte of data 510, CRC 512, and LA 513.
- both the data 510 and the DIF 511 are returned to the storage controller 10.
- the storage controller 10 performs a predetermined operation on the data 510 to calculate a CRC. Then, it is determined whether or not the calculated CRC matches the CRC 512 in the DIF 511 (hereinafter, this determination is referred to as “CRC check”). If they do not match, it means that the data contents have been changed due to a failure or the like in the process of transferring data from the FMPK 200. Therefore, if the two do not match, the storage controller 10 determines that the data could not be read correctly.
- the storage controller 10 determines whether the information included in LA0 (513-0) matches the VDEV # to which the read target data belongs. In addition, a predetermined calculation (described later) is performed on an address (FMPK LBA) included in the read command issued to the FMPK 200 to determine whether it matches LA1 (513-1) (hereinafter, this determination is referred to as “LA Called "check”). If they do not match, the storage controller 10 determines that the data could not be read correctly.
- FMPK LBA address included in the read command issued to the FMPK 200
- the FMPK 200 has at least management information of a logical physical mapping table 600, a free page list 700, and an uninitialized block list 800.
- FIG. 5 is a configuration example of the logical-physical mapping table 600.
- the logical physical mapping table 600 has columns of logical page # 601, LBA 602, allocation state 603, block # 604, and physical page # 605. In each record, information about the sector of the FMPK 200 is stored.
- the logical physical mapping table 600 is stored in the memory 202. Alternatively, it may be stored in a partial area of the FM chip 210 as another embodiment.
- LBA 602 represents the LBA of the sector
- logical page # 601 stores the logical page number of the logical page to which the sector belongs.
- the physical page # 605 stores the identification number (physical page number) of the physical page mapped to the logical page to which the sector belongs
- the block # 604 contains the identification number (block number) of the block to which the physical page belongs. Stored.
- NULL invalid value
- the minimum writing unit of the flash memory is a page. Therefore, even when there is a write to a part of the logical page from the DKC 10, one physical page is mapped to the logical page.
- block # 604 and physical page # 605 of all sectors of this logical page are respectively assigned to the block number of the block to which the mapped physical page belongs and the physical of the mapped physical page. Stores the page number.
- the allocation state 603 stores information indicating that writing has been performed on the sector specified by the LBA 602. When there is a write to the sector, “1” is stored in the allocation state 603. When there is no writing, “0” is stored.
- the physical page is mapped to the logical page for the first time when writing from the DKC 10 to the logical page is performed. Since physical pages cannot be rewritten unless erasure processing is performed, when the FM controller 201 maps physical pages to logical pages, it maps unwritten physical pages (unused physical pages). For this purpose, the FM controller 201 stores and manages information on all unused physical pages in the FMPK 200 in the free page list 700 (FIG. 6). In block # 701 and physical page # 702 of the free page list 700, the block number of the block to which the unused physical page belongs and the physical page number of the unused physical page are stored, respectively.
- FIG. 7 shows the structure of the uninitialized block list 800.
- the uninitialized block list 800 is management information used when the FMPK 200 performs an initialization process.
- the uninitialized block list 800 stores a list of block numbers of blocks that need to be erased during the initialization process.
- the DKC 10 forms a RAID group using a plurality of FMPKs 200, and defines one or more VDEVs using the formed RAID group. Furthermore, the DKC 10 uses the VDEV to define one or more LDEVs.
- the FMPK 200 used to form the RAID group may be an FMPK 200 that has been used for another purpose in the past in addition to the unused FMPK 200 immediately after installation in the storage system 1. Therefore, there is a possibility that arbitrary data is stored in each FMPK 200 constituting the RAID group immediately after the RAID group is formed.
- the LDEV (VDEV) when the LDEV (VDEV) is defined, appropriate information is stored in the data stripe and parity stripe of the RAID group to which the LDEV (VDEV) belongs. Must be stored. That is, it is necessary to store redundant data (parity) formed from all data stripes of the same stripe line in the parity stripe of each stripe line.
- the storage system 1 by setting all the data stripe and parity stripe areas (excluding the part storing the DIF) of the storage devices 200 and 200 ′ constituting the RAID group to 0.
- the RAID group is initialized. Also, when initializing the RAID group, appropriate information is stored in the DIF of each stripe block.
- the DKC 10 transmits an initialization command to each FMPK 200 configuring the VDEV, and causes each FMPK 200 to perform initialization.
- 0 is not actually stored in the storage area (FM chip 210), but each FMPK 200 merely creates a state in which all zero is virtually stored in the storage area. Since the data (all zero) is not actually written to the storage area, the time required for the initialization process is substantially zero.
- the initialization program is a program for initializing the FMPK 200, and forms a state in which no data is stored in each sector of the FMPK 200.
- the processor 11 starts initialization of the LDEV or VDEV.
- the processor 11 issues an initialization command to each FMPK 200 constituting the LDEV or VDEV.
- the processor 203 of the FMPK 200 starts executing the initialization program in response to receiving the initialization command from the storage controller 10.
- the read program is a program for executing processing related to the read command received from the DKC 10.
- the write program is a program for executing processing related to the write command received from the DKC 10.
- the processor 203 starts executing the initialization program.
- the initialization program first acquires configuration information transmitted together with the initialization command and stores it in the memory 202 (S11). Details of the configuration information will be described later.
- the initialization program initializes the management information (S12). Specifically, the allocation status 603 of all records in the logical-physical mapping table 600 is set to 0, and block # 604 and physical page # 605 are set to NULL. Also, all physical page information stored in the free page list 700 is erased. The block numbers of all blocks in the FMPK 200 are registered in the uninitialized block list 800.
- the initialization program starts erasing the block with the block number registered in the uninitialized block list 800 (S13).
- block #X the erasure of the block having the block number X
- the initialization program erases the block #X from the uninitialized block list 800 and becomes free.
- page list 700 block numbers and physical page numbers of all physical pages belonging to the block #X are registered.
- the initialization program notifies the storage controller 10 of a message indicating that the initialization has been completed (S14). Only a small part of the blocks in the FMPK 200 may be erased before S14.
- the storage controller 10 receives a message indicating that the initialization is completed from the FMPK 200, the storage controller 10 can issue a read command or a write command to the FMPK 200.
- the FMPK 200 notifies the storage controller 10 that the initialization has been completed. Therefore, the FMPK 200 is in a state where the initialization is completed in a very short time. Become.
- the initialization program continues to erase the block with the block number registered in the uninitialized block list 800 (S15).
- S15 the execution of the initialization program ends.
- the block erase (Erase) process of S13 and S15 is not an essential process.
- the block may be erased when there is no empty physical page when the write command is received from the DKC 10 to the FMPK 200 without erasing the block by the initialization program.
- the FMPK 200 starts accepting a write command from the DKC 10 without performing S13, it becomes necessary to perform block erase before storing the write data received from the DKC 10, and the performance at the time of writing deteriorates (response) Time will be longer). Therefore, in the FMPK 200 according to the present embodiment, by erasing a predetermined number of blocks in advance, the write data from the storage controller 10 can be immediately stored in a physical page (without executing block erasure). Yes.
- the minimum writing unit when the DKC 10 writes data to the FMPK 200 is a sector.
- the minimum writing unit when the FMPK 200 writes to the FM chip 210 is a page (physical page), and the page size is an integral multiple of the sector size (the page size is larger than the sector size). For this reason, when the size of the area designated by the write command from the DKC 10 is less than one page, the FMPK 200 performs so-called read-modify-write, and writes to the FM chip 210 in units of pages.
- the processor 203 starts execution of the write program.
- the write program calculates the logical page # of the logical page of the data write destination using the LBA and data length information included in the write command.
- the write program secures unused pages from the free page list 700. If no physical page (unused page) is registered in the free page list 700, the write program erases the block registered in the uninitialized block list 800 before securing the unused page. Then, create an unused page. The created unused page information is registered in the free page list 700.
- a plurality of data write destination logical pages may be specified. If a plurality of data write destination logical pages are specified, the write program secures a plurality of unused pages.
- the specified logical page # is n (n is an integer value of 0 or more) will be described below.
- the write program secures an area (hereinafter referred to as “buffer”) having a size of one page on the memory 202 (S120).
- the buffer contents may be initialized (for example, 0 is written) or not.
- the write program determines whether a physical page has already been mapped to the logical page of the data write destination. This can be determined by whether or not a value other than NULL is stored in the physical page # 605 (and block # 604) of the row of the logical page # 601 of the logical physical mapping table 600. If the physical page # 605 (and block # 604) is NULL, it means that the physical page is not mapped to the data write destination logical page (S130: NO). In this case, the write program skips S140 and S150, and performs the processes after S160.
- the write program determines whether the write range specified by the write command matches the logical page boundary (S140). When the write range matches the logical page boundary (that is, the first LBA of the write target area matches the LBA of the first sector in the logical page, and the end LBA of the write target area matches the LBA of the end sector in the logical page) If it is, the process of S150 is not performed. On the other hand, if the write range does not match the logical page boundary (S140: NO), the write program reads data from the physical page mapped to the logical page and stores it in the buffer secured in S120 (S150). .
- the write program overwrites the write data received together with the write command in the buffer secured in S120.
- the DIF is added to each 512-byte data by the DKC 10 in the write data received together with the write command from the DKC 10.
- the write program stores the buffer data in the physical page secured in S110 (S170).
- the write program updates the logical-physical mapping table 600. Specifically, the write program stores the physical page number and block number of the physical page secured in S110 in the physical page # 605 and block # 604 of the row where the logical page # 601 is n in the logical physical mapping table 600. The write program also changes the allocation state 603 of the row included in the access range specified by the write command to “1” by the LBA 602 of the logical-physical mapping table 600. When these processes are completed, the write program ends the write process.
- the minimum reading unit when the DKC 10 reads data from the FMPK 200 is a sector.
- the processor 203 When the FMPK 200 receives the read command, the processor 203 starts executing the read program.
- the read program confirms whether or not the access range specified by the read command is a previously written area. Specifically, if the allocation state 603 of the record included in the access range specified by the read command in the LBA 602 among the records of the logical-physical mapping table 600 is “1”, it is a previously written area. . In the following, in order to avoid redundant description, an example in which reading of an area for one sector is designated by a read command will be described.
- the read program When the allocation state 603 of the row included in the access range specified by the read command is “1” (S220: YES), the read program reads the data from the physical page in which the read target data is stored and reads the memory 202. To store. Since the minimum read unit of the FM chip 210 is a page (physical page), data for one page is read here. Then, the read program extracts the data to be read by the read command from the data for one page read out on the memory 202, returns it to the DKC 10 (S230), and ends the read process.
- the read program uses the format data generation circuit 205 to create the format data on the memory 202. (S250). A method for creating the format data will be described later. Then, the created data is returned to the DKC 10, and the read process is terminated.
- the same processing is performed even when the access range extends over a plurality of sectors.
- the area of the access range may include sectors that have been written in the past and sectors that have not been written yet.
- the read program may perform the above-described processing of S230 for sectors that have been written in the past, and the above-described processing of S250 for sectors that have not been written yet.
- format data data in which a predetermined data pattern is stored in the data 510 of FIG. 4 is referred to as “format data”.
- An example of the data pattern is all zero (all bits are 0).
- format data in which all zero is stored in the data 510 will be described.
- the LA 513 stores information on the VDEV and FMPK LBA to which the data 510 belongs. These pieces of information are included in the configuration information received from the DKC 10 during the initialization process, and the LA 513 is created using the configuration information in S250.
- the configuration information received from the DKC 10 will be outlined with reference to FIG. In the example of FIG. 3, VDEV # 100 and VDEV # 101 are defined in a RAID group composed of FMPK # 0 (200-0) to FMPK # 3 (200-3).
- the FMPK 200 belonging to this RAID group includes VDEV # (100 and 101) as configuration information, the address and size (number of sectors) of the area belonging to VDEV # 100, and the address of the area belonging to VDEV # 101 among the areas in FMPK200. And the size (number of sectors) are received.
- the format data generation circuit 205 uses the configuration information and the LBA information specified by the read command to determine which VDEV the LBA specified by the read command is. Identify whether it belongs.
- the VDEV # of the specified VDEV is stored in LA0 (513-0).
- VDEV # is a 16-bit size value
- VDEV # is processed and stored in LA0 (513-0) so that it fits in LA0 (513-0), which is a 1-byte area.
- the format data generation circuit 205 extracts the upper 8 bits and lower 8 bits of VDEV #, and stores the 8-bit information obtained by calculating the logical sum of both in LA0 (513-0).
- other storage formats may be adopted.
- LA1 (FMPK LBA) specified by the read command is stored in the FMPK 200 included in the VDEV to which the LBA specified by the read command belongs.
- the remainder divided by the area size (number of sectors). For example, if the LBA specified by the read command belongs to VDEV # 100 and the size (number of sectors) of the FMPK200 area belonging to VDEV # 100 is m, the LBA specified by the read command is divided by m. The remainder is stored.
- the format data generation circuit 205 calculates the exclusive OR of each byte of the data 510, CRC 512, and LA 513, and stores this in the APP 514.
- the FMPK 200 when the initialization process is executed, the sector allocation state 603 is set to “0” to set each sector to a data unwritten state. However, when the initialization process is executed, data writing to the FM chip 210 is not performed.
- the FMPK 200 creates initialization data and returns it to the DKC 10 to apparently initialize the storage area. Creating a state. Therefore, the FMPK 200 according to the present embodiment can initialize the FMPK 200 in a very short time.
- an inspection code is added to the data and stored in the storage device when the data is stored in the storage device. Since the DIF includes information (data storage destination address, etc.) for verifying the validity of the data access position, the values that can be taken by the DIF differ depending on the storage system, volume configuration, and data storage position.
- the FMPK 200 according to the present embodiment is configured to be able to generate information for storing in the DIF by acquiring configuration information from the storage controller 10. Therefore, there is no need to receive initialization data from the storage controller 10 and write it to the FM chip 210 during initialization.
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Abstract
Description
上でも述べたとおり、all zeroが格納される。なお、データストライプのデータ510とパリティストライプのデータ510のいずれにも、all zeroが格納される。all zeroのデータストライプを用いてパリティを生成すると、その内容はall zeroになるからである。
データ510に、all zeroが格納される場合、CRC512の値(つまりデータ510から生成されるCRC)も0になる。そのため、CRC512にもall zeroが格納される。
S250では、フォーマットデータ生成回路205は構成情報とリードコマンドで指定されているLBAの情報を用いて、リードコマンドで指定されているLBAがどのVDEVに属するか特定する。そして特定されたVDEVのVDEV#がLA0(513-0)に格納される。本実施例では、VDEV#は16ビットのサイズの値なので、1バイトの領域であるLA0(513-0)に収まるように、VDEV#を加工してLA0(513-0)に格納される。一例としてフォーマットデータ生成回路205はVDEV#の上位8ビットと下位8ビットを抽出し、両者の論理和を算出して得られた8ビットの情報をLA0(513-0)に格納する。ただしこれ以外の格納形式が採用されてもよい。
LA1(513-1)には、リードコマンドで指定されたLBA(FMPK LBA)を、リードコマンドで指定されているLBAが属するVDEVに含まれるFMPK200の領域サイズ(セクタ数)で割った剰余が格納される。たとえばリードコマンドで指定されているLBAがVDEV#100に属し、FMPK200の領域のうちVDEV#100に属する領域のサイズ(セクタ数)がmであれば、リードコマンドで指定されたLBAをmで割った剰余が格納される。
S250でフォーマットデータ生成回路205は、データ510とCRC512とLA513の各バイトの排他的論理和を算出し、これをAPP514に格納する。
Claims (14)
- デバイスコントローラと不揮発性記憶媒体を有する複数の記憶デバイスと、ストレージコントローラとを有し、
前記記憶デバイスは前記ストレージコントローラに記憶空間を提供するよう構成されており、前記記憶空間は複数のセクタを有し、前記複数のセクタのそれぞれは、ライトデータ格納領域と前記ライトデータ格納領域に格納されたデータの検査用コードの格納領域から成り、
前記記憶デバイスは、前記複数のセクタのうち、前記ストレージコントローラからの書き込みが行われていない第一セクタに対するリード要求を前記ストレージコントローラから受領した場合、
所定のパターンのデータと、前記検査用コードとを生成し、前記所定のパターンのデータに前記検査用コードを付加した情報を前記ストレージコントローラに返送する、
ことを特徴とする、ストレージ装置。 - 前記検査用コードには、前記ライトデータ格納領域に格納されるデータを用いて生成される誤り検出符号と、前記データの格納位置に関する情報が含まれる、
ことを特徴とする、請求項1に記載のストレージ装置。 - 前記ストレージコントローラは、ホスト計算機からライト要求とライトデータを受領すると、前記ライト要求に含まれる位置情報と前記ライトデータに基づいて、前記検査用コードを生成し、前記ライトデータに前記検査用コードを付加して前記記憶デバイスに送信し、
前記記憶デバイスは、前記ライトデータと前記検査用コードを前記不揮発性記憶媒体に格納する、
ことを特徴とする、請求項2に記載のストレージ装置。 - 前記記憶デバイスは、前記セクタに対するライト要求を受領すると、前記セクタに前記不揮発性記憶媒体の記憶領域をマッピングし、前記マッピングされた記憶領域に前記ライトデータと前記検査用コードを格納し、前記セクタに前記ライトデータが書き込まれた旨と前記セクタにマッピングされた前記記憶領域の情報をマッピング情報に記録する、
ことを特徴とする、請求項2に記載のストレージ装置。 - 前記記憶デバイスは、前記複数のセクタのうち、過去に前記ストレージコントローラからの書き込みが行われたセクタに対するリード要求を受領した時、
前記セクタにマッピングされた前記記憶領域に格納されたデータを、前記ストレージコントローラに返送する、
ことを特徴とする、請求項4に記載のストレージ装置。 - 前記デバイスコントローラは、前記ストレージコントローラから初期化指示を受領すると、前記マッピング情報をクリアする、
ことを特徴とする、請求項4に記載のストレージ装置。 - 前記不揮発性記憶媒体は、データの消去単位であるブロックを複数有するフラッシュメモリであって、
前記デバイスコントローラは、前記初期化指示を受領すると、複数の前記ブロックのうち、所定数の前記ブロックの消去を行った後、
前記ストレージコントローラに、前記初期化指示に係る処理が完了した旨を返答する
ことを特徴とする、請求項6に記載のストレージ装置。 - 前記ストレージコントローラは、前記複数の記憶デバイスの有する記憶空間を用いて1以上の論理的記憶空間を形成し、
前記ストレージコントローラは前記検査用コードを生成する時、前記論理的記憶空間の識別子を前記検査用コードに格納するよう構成されており、
前記記憶デバイスは、前記ストレージコントローラから前記初期化指示を受領する時に、前記記憶デバイスの属する前記論理的記憶空間の識別子を受領し、
前記記憶デバイスが前記検査用コードを生成する時、前記受領した識別子を前記検査用コードに格納する、
ことを特徴とする、請求項6に記載のストレージ装置。 - デバイスコントローラと不揮発性記憶媒体を有し、ストレージ装置に接続される記憶デバイスであって、
前記デバイスコントローラは前記ストレージ装置に複数のセクタを有する記憶空間を提供するよう構成されており、前記複数のセクタのそれぞれは、ライトデータ格納領域と前記ライトデータ格納領域に格納されたデータの検査用コードの格納領域から構成されており、
前記デバイスコントローラは、前記複数のセクタのうち、前記ストレージ装置からの書き込みが行われていない第一セクタに対するリード要求を前記ストレージ装置から受領した時、
所定のパターンのデータと、前記検査用コードを生成し、前記所定のパターンのデータに前記検査用コードを付加した情報を前記ストレージ装置に返送する、
ことを特徴とする、記憶デバイス。 - 前記検査用コードには、前記ライトデータ格納領域に格納されるデータを用いて生成される誤り検出符号と、前記データの格納位置に関する情報が含まれる、
ことを特徴とする、請求項9に記載の記憶デバイス。 - 前記デバイスコントローラは、前記セクタに対するライト要求を受領すると、前記セクタに前記不揮発性記憶媒体の記憶領域をマッピングし、前記マッピングされた記憶領域に前記ライトデータと前記検査用コードを格納し、前記セクタに前記ライトデータが書き込まれた旨と前記セクタにマッピングされた前記記憶領域の情報をマッピング情報に記録する、
ことを特徴とする、請求項10に記載の記憶デバイス。 - 前記デバイスコントローラは、前記複数のセクタのうち、過去に前記ストレージ装置からの書き込みが行われたセクタに対するリード要求を受領した時、
前記セクタにマッピングされた前記記憶領域に格納されたデータを、前記ストレージ装置に返送する、
ことを特徴とする、請求項11に記載の記憶デバイス。 - 前記デバイスコントローラは、前記ストレージ装置から初期化指示を受領すると、前記マッピング情報をクリアする、
ことを特徴とする、請求項11に記載の記憶デバイス。 - 前記不揮発性記憶媒体は、データの消去単位であるブロックを複数有するフラッシュメモリであって、
前記デバイスコントローラは、前記初期化指示を受領すると、複数の前記ブロックのうち、所定数の前記ブロックの消去を行った後、
前記ストレージ装置に、前記初期化指示に係る処理が完了した旨を返答する
ことを特徴とする、請求項13に記載の記憶デバイス。
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