WO2016192434A1

WO2016192434A1 - Method for removing growth substrate by utilizing chemical corrosion

Info

Publication number: WO2016192434A1
Application number: PCT/CN2016/076453
Authority: WO
Inventors: 郝茂盛; 袁根如; 奚明
Original assignee: 上海芯元基半导体科技有限公司
Priority date: 2015-05-29
Filing date: 2016-03-16
Publication date: 2016-12-08
Also published as: CN104993023A; CN104993023B; TW201706452A; TWI647335B

Abstract

A method for removing a growth substrate, comprising: first etching a semiconductor medium pattern layer and then forming a cavity structure between the substrate and the epitaxial layer, subsequently introducing a chemical agent capable of etching the epitaxial buffer layer into the cavity structure to etch the epitaxial buffer layer, so that the integral removing of the growth substrate is realized. The method provided for removing the growth substrate can be used for preparing a self-supported III-V group nitride substrate and can also be used for transferring a relatively thin III-V group nitride epitaxial layer device structure to other support substrates from the growth substrate.

Description

Method for peeling growth substrate by chemical etching method

Technical field

The present invention relates to the field of semiconductor illumination, and more particularly to a method of stripping a growth substrate by chemical etching.

Background technique

As a new high-efficiency solid-state light source, semiconductor lighting has the advantages of long life, energy saving, environmental protection and safety, and its application field is rapidly expanding. The core of semiconductor lighting is light-emitting diodes (LEDs). In terms of structure, LEDs are composed of III-V compounds such as gallium arsenide (GaAs), gallium phosphide (GaP), gallium arsenide (GaAsP), gallium nitride. A PN junction formed of a semiconductor such as (GaN). In order to increase the luminous efficiency of the LED, an active region of a quantum well is generally added between the N-type layer and the P-type layer of the PN junction. Therefore, most of the LEDs are sequentially grown on the substrate in the order of the N-type layer, the active region, and the P-type layer by means of epitaxy. Since there are no inexpensive GaN homogeneous substrates, GaN-based LEDs are usually grown on Si, SiC, and sapphire (mainly Al2O3) substrates, with sapphire substrates being the most widely used growth substrates.

After growing the GaN crystal material and the epitaxial structure on the sapphire substrate, it is usually necessary to peel the substrate. At present, the substrate is mainly stripped by laser. The laser stripping is to focus the high-energy laser on the interface between the substrate and the epitaxial layer, and the epitaxial buffer layer is instantaneously melted by the laser point-by-point scanning, thereby peeling off the substrate and the epitaxial layer. However, laser peeling has many drawbacks, such as damage to the epitaxial layer, and it is also difficult to achieve very uniform peeling. This ultimately leads to defects such as leakage and low yield in devices fabricated by laser stripping.

Summary of the invention

In view of the above-discussed shortcomings of the prior art, it is an object of the present invention to provide a method of stripping a growth substrate by a chemical etching method for solving various disadvantages in the prior art growth substrate peeling process. The invention has two main applications: one can be used to prepare a self-supporting III-V nitride substrate, the specific process is to grow a relatively thick III on a heterogeneous substrate (also known as a growth substrate). a V nitride epitaxial layer, which is then stripped off by the method of the present invention, the III-V nitride epitaxial layer being thicker than the thickness capable of supporting itself, forming a self-supporting III-V nitride liner The application of another aspect of the invention is that it can be used to transfer the epitaxial layer structure of a relatively thin device from a growth substrate to other so-called support substrates. Therefore, the contents of the present invention will be described from the following two aspects.

One aspect of the present invention provides a method of stripping a growth substrate by a chemical etching method, and preparing a self-supporting III-V nitride substrate by the method of stripping a growth substrate, comprising at least:

1) providing a growth substrate;

2) depositing a III-V nitride epitaxial buffer layer on the growth substrate;

3) depositing a semiconductor dielectric layer on the epitaxial buffer layer;

4) patterning the semiconductor dielectric layer, that is, removing a portion of the semiconductor dielectric layer, so that the removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while the portion where the dielectric layer is removed is exposed. The surface of the epitaxial buffer layer, the portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window;

5) performing epitaxial transition layer deposition on a surface of the dielectric layer pattern exposing the epitaxial buffer layer, the epitaxial transition layer having a thickness greater than a height of the semiconductor medium, the epitaxial transition layer completely covering the semiconductor dielectric layer, the epitaxial transition The layer has a flat upper surface;

6) depositing a certain thickness of the group III-V nitride on the epitaxial transition layer;

7) etching the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) using a chemical agent capable of etching only the semiconductor dielectric material to form a void structure between the growth substrate and the epitaxial transition layer ;

8) using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and causing such a chemical agent to enter the void structure formed in step 7), etching away the epitaxial buffer layer formed in step 2), allowing growth to grow. An epitaxial transition layer over the substrate is separated from the growth substrate along with a III-V nitride having a certain thickness to complete the lift-off of the growth substrate to form a self-supporting III-V nitride substrate.

Another aspect of the present invention provides a method for stripping a growth substrate by a chemical etching method, and transferring the epitaxial structure of the device from the growth substrate to another support substrate by the method of stripping the growth substrate includes at least:

1) providing a growth substrate;

2) depositing a III-V nitride epitaxial buffer layer on the growth substrate;

3) depositing a semiconductor dielectric layer on the epitaxial buffer layer;

6) epitaxial structure of the light emitting diode device composed of an n-type epitaxial layer, a multi-quantum well light-emitting layer and a p-type epitaxial layer epitaxially grown on the epitaxial transition layer;

7) bonding the substrate having the epitaxial structure together with the growth substrate to another support substrate such that the surface of the epitaxial structure of the device and the surface of the support substrate are closely bonded together;

8) etching away the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) using a chemical agent capable of etching only the semiconductor dielectric material to form a void structure between the growth substrate and the epitaxial transition layer ;

9) using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and causing such a chemical agent to enter the void structure formed in step 8), etching away the epitaxial buffer layer formed in step 2), allowing growth to grow. The epitaxial transition layer over the substrate is separated from the growth substrate along with the epitaxial structure of the device to complete the lift-off of the growth substrate, transferring the epitaxial structure of the light-emitting diode device to the support substrate.

The device structure fabrication process is completed on the epitaxial structure layer on the stripped support substrate.

As described above, the present invention provides a method for stripping a substrate by a chemical etching method, the main feature of which is to first etch the dielectric layer with an etching solution, thereby forming a void at the original dielectric layer, and then enabling etching of the epitaxial buffer. The etching solution of the layer enters the void structure and etches away the epitaxial buffer layer, successfully peeling off the growth substrate.

The preparation method of the invention has simple process and is beneficial to reduce manufacturing cost and is suitable for industrial production.

DRAWINGS

1 to 2 are schematic views showing the steps of steps 1) and 2) of the method for peeling off a substrate by a chemical etching method according to the present invention.

3 is a schematic view showing the structure of the method 3) of the method for peeling off a substrate by a chemical etching method of the present invention.

4 to 7 are schematic views showing the structure of the method 4) of the method for peeling off a substrate by a chemical etching method according to the present invention.

Figure 8 is a schematic view showing the structure of the method 5), 6) of the method for peeling off a substrate by a method of chemical etching according to the present invention.

Figure 9 is a schematic view showing the structure of the method 7) of the method for peeling off a substrate by a chemical etching method of the present invention.

Figure 10 is a schematic view showing the structure of the method 8) of the method for peeling off a substrate by a chemical etching method of the present invention.

Component label description

101 growth substrate

102 epitaxial buffer layer

103 semiconductor dielectric layer

104 photoresist layer

105 spaced-apart photoresist patterns

106 spaced-apart photoresist pattern with slope

107 spaced semiconductor dielectric patterns

108 epitaxial structure layer

109 hollow

110 support substrate

detailed description

As a preferred embodiment of the method for stripping a substrate by a chemical etching method of the present invention, the material of the growth substrate is Al2O3, and may be other semiconductor materials such as Si or SiC.

As a preferred embodiment of the method for peeling a growth substrate by a chemical etching method of the present invention, the thickness of the epitaxial buffer layer is preferably from 100 to 500 angstroms, more preferably from 200 to 400 angstroms. An excessively thin epitaxial buffer layer cannot meet the nucleation requirements required for subsequent epitaxial growth, resulting in a decrease in the growth quality of the epitaxial layer; an excessively thick epitaxial buffer layer may cause insufficient recrystallization in the subsequent temperature rise process, affecting the quality of the epitaxial layer. An excessively thick epitaxial buffer layer also affects the light extraction efficiency of LEDs fabricated on such substrates.

As a preferred embodiment of the method for stripping a substrate by a method of chemical etching according to the present invention, the epitaxial buffer layer is any amorphous or polycrystalline material capable of forming a hexagonal symmetric crystal by annealing and recrystallization, more preferably selected from the group consisting of : AlxGa1-xN prepared by metal organic chemical chemical vapor deposition, 0≤X≤0.5, preferably 0≤X≤0.2, prepared at a temperature range of 450-700 ° C, preferably 500-600 ° C; using metal organic compounds chemical vapor phase The AlN prepared by the deposition method has a temperature range of 700 to 1000 ° C; an AlN layer prepared by a sputtering method, the crystal orientation of the AlN layer is (0001) orientation; BN; or ZnO. The preparation method of the above epitaxial buffer layer is known to those skilled in the art and will not be described herein. Since the preparation temperature of the transition layer is low, the required thickness is small, and the production cost can be effectively reduced while ensuring nucleation growth of the subsequent light-emitting epitaxial structure (especially GaN-based light-emitting epitaxial structure). Compared with the low-temperature AlxGa1-xN layer, the AlN layer prepared by sputtering has the advantages of high thickness controllability, high crystal orientation, and nucleation of luminescent epitaxial structures (especially GaN-based luminescent epitaxial structures). Growing.

As a preferred embodiment of the method for stripping a growth substrate by a chemical etching method of the present invention, the semiconductor dielectric layer is at least one of SiO2, SiONx, or SiNx, and plasma enhanced chemical vapor deposition (PECVD) may be employed. Or formed by other film forming methods, the semiconductor dielectric layer is more preferably SiO2, which is formed by SiCVD and N2O in a plasma reaction environment at a temperature range of 250-350 ° C using PECVD.

A preferred embodiment of the method for stripping a growth substrate by a method of chemical etching according to the present invention, the semiconductor The thickness of the bulk dielectric layer is preferably 0.5 to 2 μm.

As a preferred embodiment of the method for stripping a growth substrate by a method of chemical etching according to the present invention, the semiconductor dielectric layer is composed of a growth window from which the dielectric layer is removed and a remaining dielectric layer after patterning, and a growth window is formed. The so-called recessed hole. In the present invention, the portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window.

As a preferred embodiment of the method for peeling a growth substrate by a method of chemical etching according to the present invention, the shape of the growth window is not limited, and may be a circular shape, a square shape or a hexagonal shape, and a size of the growth window is preferred. From 0.1 to 15 microns, the spacing between the growth windows is preferably from 0.1 to 25 microns.

As a preferred embodiment of the method for peeling a growth substrate by chemical etching in the present invention, the shape of the growth window may also be a strip structure, and the width of the strip growth window is preferably 0.1 to 15 μm, and the strip growth window The spacing between them is preferably from 0.1 to 25 microns.

As a preferred embodiment of the method for peeling a growth substrate by a chemical etching method of the present invention, the support substrate for bonding the epitaxial structure layer may have good electrical and thermal conductivity according to the function of the device. The Cu-based substrate may also be another semiconductor substrate such as a Si and GaAs substrate, or may be a thermally conductive ceramic substrate.

As a preferred embodiment of the method for stripping a growth substrate by a method of chemical etching according to the present invention, the bonding process may be any conventional bonding process in the semiconductor industry, and if necessary, if necessary, conductive Metal bonding such as Au-Au bonding or AuSn may be preferable, and organic binder bonding may be selected if conductivity is not required.

As a preferred embodiment of the method for peeling a growth substrate by chemical etching in the present invention, the semiconductor dielectric layer is connected in a whole piece or forms a continuous strip, so that the solution can be extended to completely etch the semiconductor dielectric layer. Dropped, a void structure is formed between the growth substrate and the epitaxial layer.

The chemical reagent or etching solution and the etching process which are used in the present invention to etch the semiconductor dielectric layer are well known in the semiconductor industry, and will not be described herein. For example, the ratio of HF solution or HF to HNO3 may be preferably 1: 1 mixed solution.

The chemical reagent or etching solution and the etching process capable of etching the epitaxial buffer layer used in the present invention are well known in the semiconductor industry, and will not be described herein. For example, a KOH solution having a molar concentration of 10 mol/liter may be preferably used. The etching temperature is preferably 100 °C.

Example

The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily understand the other advantages and effects of the present invention from the disclosure. The present invention may be embodied or applied in various other specific embodiments, and various modifications and changes can be made without departing from the spirit and scope of the invention.

Please refer to Figure 1 to Figure 10. It should be noted that the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention in a schematic manner, and only show the components related to the present invention, rather than the number, shape, and size of the components in actual implementation. The manufacturing method and the process window are limited. The actual type of implementation, the type, quantity and proportion of each component can be a random change, and the component layout type can be more complicated. The process conditions involved in the examples can be reasonably changed within the effective window and achieve the effects disclosed herein.

Example 1

As shown in FIG. 1 to FIG. 10, the embodiment provides a method for stripping a growth substrate by chemical etching, comprising the following steps:

1. Formation of an epitaxial buffer layer. As shown in FIG. 1, in the present embodiment, the growth substrate 101 is a commercially available flat sheet type Al2O3 substrate having a surface crystal orientation (0001) having an atomic level flatness and a substrate size of 2 inch. In this embodiment, a no-clean substrate was used, which was used without additional cleaning. The substrate is placed on a graphite tray having a SiC protective layer and fed into a metal organic chemical vapor deposition (MOCVD) reaction chamber; the substrate is heated to 1100 ° C under a hydrogen atmosphere and maintained at this temperature for 10 minutes. Then, the substrate temperature was lowered to 550 ° C, and ammonia gas, trimethyl aluminum (TMAl) and trimethyl gallium (TMGa) were simultaneously introduced into the reaction chamber, wherein the standard flow rate of ammonia gas was 56 liters / minute, TMAl and The molar flow rates of TMGa were 3.25 x 10-5 and 2.47 x 10-4 mol/min, respectively, the pressure in the reaction chamber was 500 torr, and the pass time was 215 seconds. As shown in FIG. 2, the thickness of the AlxGa1-xN epitaxial buffer layer formed on the growth substrate 101 under the above conditions was 300 angstroms, where x = 0.2.

2. As shown in FIG. 3, after the growth of the buffer layer 102 is completed, a SiO2 layer 103 is formed on the surface of the buffer layer 102 by plasma enhanced chemical vapor deposition (PECVD) to a thickness of 1 μm. The temperature in the PECVD reaction chamber was 350 ° C, the pressure was 1 torr (one standard atmospheric pressure was 760 torr), the flow rates of SiH4 and N2O were 10 sccm (standard cc / min) and 300 sccm, respectively, and the RF power of the plasma was 30 W.

3. Formation of a geometric pattern of the dielectric layer. As shown in FIG. 4 to FIG. 7 , the pattern formed is a periodically arranged SiO 2 recessed hole arranged in a hexagonal close-packed structure with a period of 10 μm, a SiO 2 recessed hole having a circular shape, a bottom width of 3 μm, and a pitch of 7 μm. .

Specifically, the geometric patterning of the dielectric layer includes the following steps:

a, as shown in FIG. 4 to FIG. 5, first, a 1 μm photoresist layer 104 is coated on the surface of the SiO2 layer 103, and the photoresist layer 104 is formed into a hexagonal close-packed light by an exposure process. The recessed hole 105 has a cycle of hexagonal close-packing of 10 μm, a diameter of the photoresist cylinder of 3 μm, and a pitch of 7 μm.

b. As shown in FIG. 6, the plurality of photoresist recesses are then reflowed into a hole having a certain slope by a heating reflow process, wherein the reflow temperature is 128 degrees Celsius and the reflow time is 60 seconds.

c, as shown in FIG. 7, after that, the photoresist pattern is transferred to the SiO2 layer 103 by inductively coupled plasma etching (ICP) to form a plurality of SiO2 recesses, and the SiO2 recesses are exposed. The transition layer 102 is used for epitaxial growth of subsequent GaN epitaxial materials. The above ICP etching process conditions are as follows: the etching gas is CHF3 (trifluoromethane), the standard flow rate is 100 ml/min; the upper electrode power of the ICP is 1000 W, and the lower electrode power is 50 W. The cleaning process conditions are as follows: using acetone to wash away the residual photoresist on the surface of the above SiO2, and then washing away the surface of the SiO2 and other contaminants on the surface of the exposed transition layer with dilute hydrochloric acid, and then directly used for epitaxial growth of GaN. .

4. Formation of epitaxial structure layers. As shown in FIG. 8, an epitaxial transition layer is epitaxially grown on the exposed buffer layer surface by an MOCVD device, the epitaxial transition layer completely covering the semiconductor dielectric bumps and completely filling the space between the semiconductor dielectric bumps, the epitaxial transition The layer has a flat upper surface. The substrate structure prepared in the above step is placed on a graphite tray having a SiC protective layer and fed into a metal organic chemical vapor deposition (MOCVD) reaction chamber in which the surface of the buffer layer exposed at the SiO2 recess is exposed. Can act as a buffer layer, directly under the protection of NH3, raise the temperature of the reaction chamber to 1100 ° C, epitaxially grow a GaN undoped layer transition layer with a thickness of 2 microns, NH3 flow rate of 25 standard liters / minute, TMGa flow The growth pressure was 400 Torr at 4 × 10 -5 mol/min.

After the epitaxial transition layer growth is completed, the epitaxial active layer is grown by directly growing on the surface of the epitaxial transition layer by MOCVD without interrupting growth, and the epitaxial active layer contains at least an n-type doped epitaxial layer. a layer, a p-doped epitaxial layer, and a light-emitting layer, wherein the n-type epitaxial layer and the p-type epitaxial layer are located on both sides of the light-emitting layer.

The main growth conditions of each layer of the epitaxial active layer are as follows:

a, growing Si-doped n-type GaN layer, NH3 flow rate is 25 standard liters / minute, TMGa flow rate is 4 × 10-3 moles / minute, doping SiH4 flow rate from 2 × 10-7 moles / minute, the reaction chamber The temperature is 1,100 ° C, the pressure is 400 Torr, and the thickness of the n-type GaN layer is 3 μm;

b, growing a Si-doped n-type AlGaN intercalation layer, a growth temperature of 1050 ° C, a growth time of 10 min, a pressure of 400 Torr, a thickness of 0.1 micron;

c. growing multiple quantum well layer light-emitting layer: the multiple quantum well layer comprises ten sequentially overlapping quantum well structures, which are sequentially overlapped by an InxGa1-xN (x=0.2) well layer and a GaN barrier layer Growing up. The growth temperature of the InxGa1-xN well layer is 780 ° C, the pressure is 300 Torr, and the thickness is 2.5 nm; the growth temperature of the GaN barrier layer is between 950 ° C, the pressure is between 400 Torr, and the thickness is 12 nm;

d, growing Mg-doped p-type AlGaN layer, growth temperature is 1000 ° C, NH3 flow rate is 41 standard liter / minute, TMGa flow rate is 1.1 × 10 -4 mole / minute, TMAl flow rate is 6.2 × 10-5 mole / minute , Cp2Mg flow rate is 7.5 × 10-7 mol / min, the reaction chamber pressure is 500 Torr, the growth thickness is 50 nm;

e, growing a Mg-doped p-type GaN layer: the temperature is lowered to 950 ° C, and the TMGa flow rate is 1 × 10 -4 mol / min, The Cp2Mg flow rate is 4.5×10-6 mol/min, the reaction chamber pressure is 500 Torr, and the growth thickness is 600 nm;

f. Grinding the Mg-doped InGaN layer, the temperature is lowered to 650 ° C, the NH 3 flow rate is 40 standard liter / minute, the TEGa flow rate is 1.5 × 10 -5 mol / min, the TMIn flow rate is 3 × 10 -5 mol / min, Cp2Mg The flow rate is 3.2×10-6 mol/min, the reaction chamber pressure is 500 Torr, and the growth thickness is 5 nm;

g, annealing treatment, and finally the temperature was lowered to 800 ° C, the total flow rate of N2 was 80 standard liter / minute, the reaction chamber pressure was 200 Torr, and the activation time was 10 minutes.

5. After the growth of the entire epitaxial structure is completed, the temperature of the MOCVD reaction chamber is lowered to room temperature, and then the sample is taken out from the MOCVD reaction chamber, and the epitaxial structure can be transferred to the support substrate along with the growth substrate. The supporting substrate used in this embodiment is Si (001), and the bonding process used is an Au-Au bonding process. First, it is necessary to vapor-deposit a 1 μm metal Au bond on the surface of the epitaxial layer and the surface of the Si supporting substrate, respectively. The layers were laminated, and then the surfaces of the two were bonded together, and the bonding was completed at 280 ° C under a pressure of 5 kg for 10 minutes.

6, the formation of voids. As shown in FIG. 9, the semiconductor dielectric layer is etched away with an HF acid solution. Since the semiconductor dielectric layer is connected in a single piece, the solution can be extended to completely etch away the semiconductor dielectric layer, thereby between the epitaxial structure and the growth substrate. Form a hollow structure.

7. The growth substrate is peeled off. The sample having the void structure described above is placed in a high temperature KOH etching solution at 100 ° C, and the molar concentration of KOH is 10 mol / liter, and the KOH solution enters between the epitaxial structure and the growth substrate. The void structure erodes the epitaxial buffer layer and the etching time is 3 minutes, and the chemical peeling of the growth is successfully achieved.

8. A device process for completing an epitaxial structure of a device over a Si substrate.

Example 2

As shown in FIG. 1 to FIG. 10, the present embodiment provides a method for stripping a substrate by chemical etching. The basic steps are as in Embodiment 1, and the difference is only the second step: patterning the semiconductor medium. The layer 103 is a periodically spaced SiO2 line having a line bottom width of 7 μm and a pitch of 3 μm.

The above-described embodiments are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Modifications or variations of the above-described embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and scope of the invention will be covered by the appended claims.

Claims

A method of stripping a growth substrate by a chemical etching method, and manufacturing a self-supporting III-V nitride substrate by the method of stripping a growth substrate, characterized in that:

1) providing a growth substrate;

2) depositing a III-V nitride epitaxial buffer layer on the growth substrate;

3) depositing a semiconductor dielectric layer on the epitaxial buffer layer;

4) patterning the semiconductor dielectric layer, that is, removing a portion of the semiconductor dielectric layer, so that the removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while the portion where the dielectric layer is removed is exposed. a surface of the epitaxial buffer layer, a portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window;

5) performing epitaxial transition layer deposition on a surface of the dielectric layer pattern exposing the epitaxial buffer layer, the epitaxial transition layer having a thickness greater than a height of the semiconductor medium, the epitaxial transition layer completely covering the semiconductor dielectric layer, the epitaxial transition The layer has a flat upper surface;

6) depositing a certain thickness of the group III-V nitride on the epitaxial transition layer;

7) etching the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) using a chemical agent capable of etching only the semiconductor dielectric material to form a void structure between the growth substrate and the epitaxial transition layer ;

Using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and causing such a chemical agent to enter the void structure formed in step 7), etching away the epitaxial buffer layer formed in step 2) to grow on the growth substrate The epitaxial transition layer on top is separated from the growth substrate along with a III-V nitride having a certain thickness to complete the lift-off of the growth substrate to form a self-supporting III-V nitride substrate.
A method of stripping a growth substrate by a chemical etching method, wherein an epitaxial structure of a device grown on a growth substrate is peeled off from a growth substrate by the method of stripping a growth substrate, wherein:

1) providing a growth substrate;

2) depositing a III-V nitride epitaxial buffer layer on the growth substrate;

3) depositing a semiconductor dielectric layer on the epitaxial buffer layer;

4) patterning the semiconductor dielectric layer, that is, removing a portion of the semiconductor dielectric layer, so that the removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while the portion where the dielectric layer is removed is exposed. a surface of the epitaxial buffer layer, a portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window;

5) performing epitaxial transition layer deposition on a surface of the dielectric layer pattern exposing the epitaxial buffer layer, the epitaxial transition layer having a thickness greater than a height of the semiconductor medium, the epitaxial transition layer completely covering the semiconductor dielectric layer, the epitaxial transition The layer has a flat upper surface;

6) epitaxial structure of the light emitting diode composed of an n-type epitaxial layer, a multi-quantum well light-emitting layer and a p-type epitaxial layer is sequentially epitaxially grown on the epitaxial transition layer;

7) bonding the epitaxial structure together with the growth substrate to another support substrate such that the surface of the epitaxial structure of the device and the surface of the support substrate are tightly bonded together;

8) etching away the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) using a chemical agent capable of etching only the semiconductor dielectric material to form between the growth substrate and the epitaxial transition layer Hollow structure

9) using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and causing such a chemical agent to enter the void structure formed in step 8), etching away the epitaxial buffer layer formed in step 2), allowing growth to grow. The epitaxial structure over the substrate is separated from the growth substrate along with the support substrate, the stripping of the growth substrate is completed, and the device epitaxial structure formed in step 6) is transferred onto the support substrate.
The method according to claim 1 or 2, wherein the material of the substrate is a semiconductor material such as Al2O3 or SiC.
The method according to claim 1 or 2, wherein the nitride epitaxial buffer layer is a group III-V nitride, deposited by MOCVD or halogenated vapor phase epitaxy (HVPE) or PVD, etc., preferably having a thickness of 5 to 1000 angstroms.
The method according to claim 1 or 2, wherein the semiconductor dielectric layer is one or more of SiO2, SiN, or SiONx, and is plasma enhanced chemical vapor deposition (PECVD), PVD, or electron beam evaporation. The method is deposited by a method which preferably has a thickness of between 0.01 and 5 microns.
The method according to claim 1 or 2, wherein patterning the semiconductor dielectric layer comprises at least the following steps:

a) forming a photoresist layer on the surface of the dielectric layer, and forming the photoresist layer into a photoresist pattern by an exposure process;

b) transferring the photoresist pattern to the dielectric layer by dry etching or wet etching, and the nitride buffered surface of the portion of the dielectric layer is completely exposed to form a growth window for the subsequent growth of the epitaxial transition layer. The remaining dielectric layer forms a patterned dielectric pickle film that prevents epitaxial growth;

c) removing the residue of the photoresist block.
The method according to claim 1 or 2, wherein the epitaxial transition layer is deposited on the substrate having the growth window and the patterned medium pickling layer by MOCVD or halogenated vapor phase epitaxy (HVPE) or PVD, and epitaxially. The thickness of the transition layer is greater than the thickness of the media pickling layer.
The method according to claim 1, wherein a certain thickness of the group III-V nitride is deposited on the epitaxial transition layer and deposited on the epitaxial transition layer by MOCVD or halogenated vapor phase epitaxy (HVPE) or PVD. .
The method according to claim 2, wherein the epitaxial structure layer of the light emitting diode device comprises at least an n-type GaN, an InGaN multiple quantum well (MQW) light emitting layer, and a p-type GaN deposited by an epitaxial transition by MOCVD. Above the layer.
The method according to claim 2, wherein the supporting substrate is made of a Cu-based substrate, other semiconductor substrates such as Si and GaAs substrates, and a thermally conductive ceramic substrate.
The method according to claim 2, wherein the bonding process is preferably metal bonding such as Au-Au bonding or AuSn, and organic binder bonding is also selected.
Process according to claim 1 or 2, characterized in that the chemical agent which only corrodes the semiconductor dielectric material can be an HF solution or a mixture of HF and other chemical agents.
The method according to claim 1 or 2, wherein the chemical agent capable of etching the buffer layer may be a KOH solution, a NaOH solution, or a mixed solution of H2SO4 and H2PO4, or other solution capable of etching a nitride. .
The method according to claim 1 or 2, wherein the semiconductor dielectric pattern layer between the growth substrate and the epitaxial transition layer is first etched using a chemical agent capable of etching only the semiconductor dielectric material, in the growth lining A void structure is formed between the bottom and the epitaxial transition layer, and then a chemical agent capable of etching the epitaxial buffer layer is introduced into the void structure to etch away the epitaxial buffer layer to complete the peeling of the growth substrate.