WO2016192321A1 - Phase ambiguity correction method and device, and computer storage medium - Google Patents

Phase ambiguity correction method and device, and computer storage medium Download PDF

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Publication number
WO2016192321A1
WO2016192321A1 PCT/CN2015/094926 CN2015094926W WO2016192321A1 WO 2016192321 A1 WO2016192321 A1 WO 2016192321A1 CN 2015094926 W CN2015094926 W CN 2015094926W WO 2016192321 A1 WO2016192321 A1 WO 2016192321A1
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phase
blur correction
subframe
phase blur
training sequence
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PCT/CN2015/094926
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French (fr)
Chinese (zh)
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秦文平
何开江
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深圳市中兴微电子技术有限公司
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Publication of WO2016192321A1 publication Critical patent/WO2016192321A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying

Definitions

  • the invention relates to a phase blur correction technology, in particular to a phase blur correction method and device, and a computer storage medium.
  • Optical fiber transmission has a core position in long-distance transmission networks due to its large throughput, low unit capacity and high reliability.
  • the cost of fiber construction is high. How to use limited fiber resources to increase data throughput is a goal that network operators are pursuing.
  • DSP Digital Signal Processing
  • QPSK Quadrature Phase Shift Keying
  • phase blurring occurs due to a specific algorithm. How to monitor and correct the phase ambiguity effect of this QPSK adjustment mode, and implement it on the ASIC, so that low power consumption and configurability need to be solved.
  • an embodiment of the present invention provides a phase blur correction method and apparatus, and a computer storage medium.
  • the received data is subjected to QPSK phase blur correction using the phase blur correction factor.
  • the phase correction correction factor is used to perform QPSK phase blur correction on the received data, including:
  • the data received in parallel is buffered by the signal
  • the QPSK phase blur correction is performed on the delayed buffer data by using the calculated phase blur correction factor.
  • the phase blur correction factor is obtained by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe header, including:
  • the phase blur correction factor is calculated by the difference between the calculated phase and the phase of the known sub-frame header.
  • the method further includes:
  • the position where the QPSK phase blur correction is performed is determined by the control of the effective depth of the buffer unit, and the position of the QPSK phase blur correction is between any symbols from the previous subframe to the current subframe.
  • the method further includes:
  • the input signal is signal gated by an enable signal to remove the invalid transition.
  • the receiving unit is configured to receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
  • a determining unit configured to determine a frame header position of each subframe in the training sequence
  • phase blur correction factor unit configured to obtain a phase blur correction factor by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe frame header
  • a correction unit configured to perform QPSK phase blur correction on the received data by using the phase blur correction factor.
  • the correcting unit includes:
  • a cache subunit configured to buffer data received in parallel
  • a calculating subunit configured to calculate a phase blur correction factor according to the received data when the frame header indication signal of the subframe is valid
  • the correction subunit is configured to perform QPSK phase blur correction on the delayed buffered data using the calculated phase blur correction factor.
  • the phase blur correction factor unit is further configured to calculate a phase of each symbol in the frame header of the sub-frame in parallel; and calculate a difference between the calculated phase and the phase of the known sub-frame header. A phase blur correction factor is obtained.
  • the device further includes:
  • a first control unit configured to determine, by a control of an effective depth of the buffer unit, a position where the QPSK phase blur correction is performed, where the position of the QPSK phase blur correction is between any symbol between the previous subframe and the current subframe .
  • the device includes:
  • a second control unit configured to enable an input signal by an enable signal when the subframe header is not reached The signal is gated to remove invalid transitions.
  • the computer storage medium provided by the embodiment of the present invention stores a computer program for executing the phase blur correction method described above.
  • the QPSK phase blur is corrected by inserting a training sequence on the transmitting side and detecting the training sequence on the receiving side.
  • the training sequence sent by the sending side is received, where the training sequence includes multiple subframes, and the length and segmentation of each subframe in the training sequence are configured as set values; and the frame header of each subframe in the training sequence is determined.
  • a phase blur correction factor obtained by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe header; using the phase blur correction factor to perform quadrature phase shift keying on the received data QPSK phase blur correction.
  • the length of the training sequence is fixed, the interval may be fixed, or may be fixed in segments, the content of the training sequence is configurable, and is also known to the receiving end.
  • the position for phase correction is configurable, and compensation can be performed from any position before the previous subframe and before the current subframe.
  • the phase blur correction factor is calculated by using a parallel circuit to minimize the calculation delay, thereby reducing the data buffer depth and reducing the circuit area.
  • the power consumption of the device is further reduced by methods such as signal gating.
  • FIG. 1 is a schematic flow chart of a phase blur correction method according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural diagram of a training sequence according to an embodiment of the present invention.
  • FIG. 3 is a block diagram of a circuit for calculating a phase blur correction factor according to an embodiment of the present invention
  • variable depth buffer 4 is a schematic diagram of a variable depth buffer for performing stepwise selection on an input side according to an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a variable depth buffer for performing stepwise selection on an output side according to an embodiment of the present invention
  • Figure 6 is a general block diagram of a correction circuit in accordance with an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a phase blur correction apparatus according to an embodiment of the present invention.
  • phase blur correction method includes the following steps:
  • Step 101 Receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values.
  • an optical transport network (OTN) network using a QSPK modulation mode is required to insert a special training sequence on the transmitting side in order to correct the phase ambiguity introduced by the QPSK frequency offset and the phase offset adjustment algorithm at the receiving end. That is, a so-called sub-frame is constructed.
  • the design of the training sequence has the following characteristics:
  • the high throughput of the OTN 100G DSP chip is under the current technical conditions, the main frequency of a single set of circuits can not be processed, and multiple sets of parallel circuits are needed for processing.
  • the length of the training sequence and the length of the internal subframe are designed as integer multiples of the number of parallel circuits, which can effectively reduce the processing difficulty.
  • the overhead caused by the training sequence must be less than 1%.
  • the length and segmentation of each subframe can be flexibly matched, and the ratio of the length of the training sequence can be selected before and after the subframe is inserted into the training sequence to facilitate the selection of the PLL.
  • there are a plurality of subframes there are a plurality of subframes. The ratio of the frame length before and after the insertion of the sub-frame is small enough to facilitate the selection of the Phase Locked Loop (PLL) and reduce its cost.
  • PLL Phase Locked Loop
  • Figure 2 is one of the frame structures produced in accordance with the above constraints.
  • Step 102 Determine a frame header position of each subframe in the training sequence.
  • the structure of the training sequence is transparent to the receiving side. Therefore, pick up After receiving the frame header of the training sequence, the receiving side can locate the frame header position of each subframe, and can obtain the phase blur correction factor by calculating the phase of the frame header symbol of the subframe and comparing with the phase of the known subframe frame header. And then perform QPSK phase blur correction on the received data.
  • Step 103 Obtain a phase blur correction factor by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe header.
  • the position of the QPSK phase blur correction is determined by the control of the effective depth of the buffer unit, and the position of the QPSK phase blur correction is between any symbols from the previous subframe to the current subframe.
  • the input signal is gated by the enable signal to remove the invalid jump.
  • the phase is calculated in parallel for each symbol in the frame header of the sub-frame; and the phase blur correction factor is calculated by calculating the difference between the phase and the phase of the known sub-frame header.
  • the input signal is gated by the enable signal EN to remove the invalid jump.
  • the phase of the sub-frame header is calculated in parallel, the difference between the phase and the known phase is calculated, the radians are adjusted to the range of 2 ⁇ , and the unit vector is obtained, and then the unit vector is accumulated to obtain a vector. Then, the phase is obtained, and finally the correction factor is determined.
  • the use of parallel circuits sacrifices a small amount of resources in the factor calculation unit, in exchange for the significant resource savings of the signal buffer unit.
  • the embodiment of the present invention supports the data before the subframe. Correction is made, and the correction can start from any symbol between the previous subframe and the current subframe. The flexibility of this calibration starting point is achieved by the control of the effective depth of the buffer unit.
  • FIG. 4 is a variable depth buffer selected step by step on the input side
  • FIG. 5 is a variable depth buffer selected step by step on the output side, with respect to a common variable depth buffer uniformly selected on the output side
  • FIG. 4 and FIG. 5 are more advantageous for the ASIC (Application Specific Integrated Circuit) routing, which reduces the possibility of wiring congestion.
  • ASIC Application Specific Integrated Circuit
  • Step 104 Perform quadrature phase shift keying QPSK phase blur correction on the received data by using the phase blur correction factor.
  • the data received in parallel is buffered; when the header indication signal of the subframe is valid, the phase fuzzy correction factor is calculated according to the received data; and the calculated phase fuzzy correction factor is used.
  • the QPSK phase blur correction is performed on the delayed buffer data.
  • Fig. 6 is an overall block diagram of the correction circuit. The following only describes the correction process of the X polarization state, and the Y polarization state is similar: the data entering in parallel enters the X polarization state signal buffer. Meanwhile, if the frame header indication signal is valid, the first 8 symbols of the input data are taken and sent to the X polarization state factor calculation module. The delayed data from the X-polarization signal buffer module is entered into the X-polarization phase correction module together with the correction factor calculated by the X-polarization factor calculation unit to perform QPSK phase blur correction.
  • the structure of the training sequence may be reselected according to the multiplication ratio of the PLL, and the length of the training sequence and the length of the subframe are equal to the number of parallel circuits of the circuit for implementation, and the starting point of the correction is flexible and configurable. And it is beneficial to ASIC implementation, and effectively controls the power consumption when the circuit is idling.
  • FIG. 7 is a phase blur correction apparatus according to an embodiment of the present invention. As shown in FIG. 7, the apparatus includes:
  • the receiving unit 71 is configured to receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
  • a determining unit 72 configured to determine a frame header position of each subframe in the training sequence
  • the phase blur correction factor unit 73 is configured to obtain a phase blur correction factor by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe frame header;
  • the correcting unit 74 is configured to perform quadrature phase shift keying QPSK phase blur correction on the received data by using the phase blur correction factor.
  • the correcting unit 74 includes:
  • the buffer subunit 741 is configured to buffer the data received in parallel
  • the calculating subunit 742 is configured to calculate a phase blur correction factor according to the received data when the frame header indication signal of the subframe is valid;
  • the correction sub-unit 743 is configured to perform QPSK phase blur correction on the delayed buffer data using the calculated phase blur correction factor.
  • the phase blur correction factor unit 73 is further configured to calculate the phase of each symbol in the frame header of the sub-frame in parallel; and the difference between the calculated phase and the phase of the known sub-frame header, The phase blur correction factor is calculated.
  • the device further includes:
  • the first control unit 75 is configured to determine, by the control of the effective depth of the buffer unit, the position where the QPSK phase blur correction is performed, where the position of the QPSK phase blur correction is any symbol from the previous subframe to the current subframe. between.
  • the device includes:
  • the second control unit 76 is configured to perform signal gating on the input signal by the enable signal when the subframe frame header is not reached to remove the invalid jump.
  • each unit and its subunits in the phase blur correction apparatus shown in FIG. 7 can be understood by referring to the related description of the phase blur correction method described above.
  • the functions of each unit and its subunits in the phase blur correction apparatus shown in FIG. 7 can be realized by a program running on a processor, or can be realized by a specific logic circuit.
  • each unit module in the phase blur correction device may be implemented by a central processing unit.
  • CPU Central Processing Unit
  • DSP Digital Signal Processor
  • FPGA Field-Programmable Gate Array
  • the apparatus for tracking the service signaling may also be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a separate product.
  • the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions.
  • a computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk.
  • program codes such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk.
  • an embodiment of the present invention further provides a computer storage medium, wherein a computer program for executing the phase blur correction method of the embodiment of the present invention is stored.
  • the disclosed method and smart device may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner such as: multiple units or components may be combined, or Can be integrated into another system, or some features can be ignored or not executed.
  • the coupling, or direct coupling, or communication connection of the components shown or discussed may be indirect coupling or communication connection through some interfaces, devices or units, and may be electrical, mechanical or other forms. of.
  • the units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place.
  • the party may also be distributed to multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one second processing unit, or each unit may be separately used as one unit, or two or more units may be integrated into one unit;
  • the above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.

Abstract

Disclosed are a phase ambiguity correction method and device, and computer storage medium. The method comprises: receiving a training sequence transmitted by a transmitting side, the training sequence comprising a plurality of sub-frames, and lengths and segmentations of each sub-frame in the training sequence being configured as set values; determining positions of frame headers of each sub-frame in the training sequence; acquiring a phase ambiguity correction factor by calculating a frame header symbol phase of the sub-frame and comparing the same with a known sub-frame header phase; and performing QPSK phase ambiguity correction on received data by utilizing the phase ambiguity correction factor.

Description

一种相位模糊校正方法及装置、计算机存储介质Phase blur correction method and device, computer storage medium 技术领域Technical field
本发明涉及相位模糊校正技术，尤其涉及一种相位模糊校正方法及装置、计算机存储介质。The invention relates to a phase blur correction technology, in particular to a phase blur correction method and device, and a computer storage medium.
背景技术Background technique
光纤传输以其吞吐量大、单位容量成本低、可靠性高等特点，在长距离的传输网中占据了核心地位。然而，光纤施工的成本高昂，如何利用有限的光纤资源，提高数据通行速率，是网络运营商不懈追求的目标。Optical fiber transmission has a core position in long-distance transmission networks due to its large throughput, low unit capacity and high reliability. However, the cost of fiber construction is high. How to use limited fiber resources to increase data throughput is a goal that network operators are pursuing.
提高光纤的通行速率，有两个努力方向：1、缩小相邻光通道之间的频率间隔，从而增加1550nm窗口内的通道数量。当前，密集型光波复用(DWDM，Dense Wavelength Division Multiplexing)相邻通道的频率间隔为50GHz和25GHz，单根光纤上可以容纳64到160个DWDM频率通道。2、提高单个光通道上的数据速率。在100G系统中，使用数字信号处理(DSP，Digital Signal Processing)技术对抗色散、码间干扰，采用更高阶的调制方式，如正交相移键控(QPSK，Quadrature Phase Shift Keying)，都是为了达到这一目的。To improve the throughput rate of optical fibers, there are two efforts: 1. Reduce the frequency spacing between adjacent optical channels, thereby increasing the number of channels in the 1550 nm window. Currently, the DWDM (Dense Wavelength Division Multiplexing) adjacent channel has a frequency interval of 50 GHz and 25 GHz, and can accommodate 64 to 160 DWDM frequency channels on a single fiber. 2. Increase the data rate on a single optical channel. In 100G systems, digital signal processing (DSP, Digital Signal Processing) technology is used to combat dispersion and intersymbol interference, and higher-order modulation methods such as Quadrature Phase Shift Keying (QPSK) are used. In order to achieve this.
采用QPSK调制方式后，接收端进行频相偏校正时，因为特定算法的缘故，会产生相位模糊现象。如何监测并校正这种QPSK调整方式下的相位模糊效应，并在ASIC上进行实现，做到功耗低、可配置亟需解决。After the QPSK modulation method is adopted, when the receiving end performs frequency phase offset correction, phase blurring occurs due to a specific algorithm. How to monitor and correct the phase ambiguity effect of this QPSK adjustment mode, and implement it on the ASIC, so that low power consumption and configurability need to be solved.
发明内容Summary of the invention
为解决上述技术问题，本发明实施例提供了一种相位模糊校正方法及装置、计算机存储介质。 To solve the above technical problem, an embodiment of the present invention provides a phase blur correction method and apparatus, and a computer storage medium.
本发明实施例提供的相位模糊校正方法包括：The phase blur correction method provided by the embodiment of the present invention includes:
接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值；Receiving a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
确定出所述训练序列中各个子帧的帧头位置；Determining a frame header position of each subframe in the training sequence;
通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子；Obtaining a phase blur correction factor by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe header;
利用所述相位模糊校正因子，对接收到的数据进行QPSK相位模糊校正。The received data is subjected to QPSK phase blur correction using the phase blur correction factor.
本发明实施例中，所述利用所述相位模糊校正因子，对接收到的数据进行QPSK相位模糊校正，包括：In the embodiment of the present invention, the phase correction correction factor is used to perform QPSK phase blur correction on the received data, including:
将并行接收到的数据进行信号缓存；The data received in parallel is buffered by the signal;
当所述子帧的帧头指示信号有效时，依据接收到的数据计算相位模糊校正因子；When the frame header indication signal of the subframe is valid, calculating a phase blur correction factor according to the received data;
利用计算出的相位模糊校正因子，对经延时的缓存数据进行QPSK相位模糊校正。The QPSK phase blur correction is performed on the delayed buffer data by using the calculated phase blur correction factor.
本发明实施例中，所述通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子，包括：In the embodiment of the present invention, the phase blur correction factor is obtained by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe header, including:
对所述子帧帧头内的各个符号，并行计算其相位；Calculating the phase of each symbol in the header of the sub-frame in parallel;
通过计算出的相位与已知子帧帧头相位之差，计算得到相位模糊校正因子。The phase blur correction factor is calculated by the difference between the calculated phase and the phase of the known sub-frame header.
本发明实施例中，所述方法还包括：In the embodiment of the present invention, the method further includes:
通过缓存单元有效深度的控制，确定出进行QPSK相位模糊校正的位置，所述QPSK相位模糊校正的位置为从上一个子帧到当前子帧之间的任意符号之间。The position where the QPSK phase blur correction is performed is determined by the control of the effective depth of the buffer unit, and the position of the QPSK phase blur correction is between any symbols from the previous subframe to the current subframe.
本发明实施例中，所述方法还包括： In the embodiment of the present invention, the method further includes:
当子帧帧头未到达时，通过使能信号对输入信号进行信号门控，以去除无效跳变。When the sub-frame header is not reached, the input signal is signal gated by an enable signal to remove the invalid transition.
本发明实施例提供的相位模糊校正装置包括：The phase blur correction apparatus provided by the embodiment of the invention includes:
接收单元，配置为接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值；The receiving unit is configured to receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
确定单元，配置为确定出所述训练序列中各个子帧的帧头位置；a determining unit configured to determine a frame header position of each subframe in the training sequence;
相位模糊校正因子单元，配置为通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子；a phase blur correction factor unit configured to obtain a phase blur correction factor by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe frame header;
校正单元，配置为利用所述相位模糊校正因子，对接收到的数据进行QPSK相位模糊校正。And a correction unit configured to perform QPSK phase blur correction on the received data by using the phase blur correction factor.
本发明实施例中，所述校正单元包括：In the embodiment of the present invention, the correcting unit includes:
缓存子单元，配置为将并行接收到的数据进行信号缓存；a cache subunit configured to buffer data received in parallel;
计算子单元，配置为当所述子帧的帧头指示信号有效时，依据接收到的数据计算相位模糊校正因子；a calculating subunit configured to calculate a phase blur correction factor according to the received data when the frame header indication signal of the subframe is valid;
校正子单元，配置为利用计算出的相位模糊校正因子，对经延时的缓存数据进行QPSK相位模糊校正。The correction subunit is configured to perform QPSK phase blur correction on the delayed buffered data using the calculated phase blur correction factor.
本发明实施例中，所述相位模糊校正因子单元，还配置为对所述子帧帧头内的各个符号，并行计算其相位；通过计算出的相位与已知子帧帧头相位之差，计算得到相位模糊校正因子。In the embodiment of the present invention, the phase blur correction factor unit is further configured to calculate a phase of each symbol in the frame header of the sub-frame in parallel; and calculate a difference between the calculated phase and the phase of the known sub-frame header. A phase blur correction factor is obtained.
本发明实施例中，所述装置还包括：In the embodiment of the present invention, the device further includes:
第一控制单元，配置为通过缓存单元有效深度的控制，确定出进行QPSK相位模糊校正的位置，所述QPSK相位模糊校正的位置为从上一个子帧到当前子帧之间的任意符号之间。a first control unit configured to determine, by a control of an effective depth of the buffer unit, a position where the QPSK phase blur correction is performed, where the position of the QPSK phase blur correction is between any symbol between the previous subframe and the current subframe .
本发明实施例中，所述装置包括：In the embodiment of the present invention, the device includes:
第二控制单元，配置为当子帧帧头未到达时，通过使能信号对输入信 号进行信号门控，以去除无效跳变。a second control unit configured to enable an input signal by an enable signal when the subframe header is not reached The signal is gated to remove invalid transitions.
本发明实施例提供的计算机存储介质存储有计算机程序，该计算机程序用于执行上述相位模糊校正方法。The computer storage medium provided by the embodiment of the present invention stores a computer program for executing the phase blur correction method described above.
本发明实施例的技术方案中，通过在发送侧插入训练序列(Training Sequence)，在接收侧检测训练序列的方式来校正QPSK相位模糊。具体地，接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值；确定出所述训练序列中各个子帧的帧头位置；通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子；利用所述相位模糊校正因子，对接收到的数据进行正交相移键控QPSK相位模糊校正。本发明实施例的技术方案中，训练序列的长度固定，间隔可以固定，也可以分段固定，训练序列内容可配置，且对于接收端也是已知的。计算出相位模糊校正因子后，进行相位校正的位置是可配置的，可以从上一个子帧之后，当前子帧之前的任何位置开始进行补偿。相位模糊校正因子采用并行电路进计算，最大限度降低计算时延，进而减少数据缓存深度，减小了电路面积。并且，通过信号门控等方法，进一步降低设备的功耗。In the technical solution of the embodiment of the present invention, the QPSK phase blur is corrected by inserting a training sequence on the transmitting side and detecting the training sequence on the receiving side. Specifically, the training sequence sent by the sending side is received, where the training sequence includes multiple subframes, and the length and segmentation of each subframe in the training sequence are configured as set values; and the frame header of each subframe in the training sequence is determined. a phase blur correction factor obtained by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe header; using the phase blur correction factor to perform quadrature phase shift keying on the received data QPSK phase blur correction. In the technical solution of the embodiment of the present invention, the length of the training sequence is fixed, the interval may be fixed, or may be fixed in segments, the content of the training sequence is configurable, and is also known to the receiving end. After the phase blur correction factor is calculated, the position for phase correction is configurable, and compensation can be performed from any position before the previous subframe and before the current subframe. The phase blur correction factor is calculated by using a parallel circuit to minimize the calculation delay, thereby reducing the data buffer depth and reducing the circuit area. Moreover, the power consumption of the device is further reduced by methods such as signal gating.
附图说明DRAWINGS
图1为本发明实施例的相位模糊校正方法的流程示意图；1 is a schematic flow chart of a phase blur correction method according to an embodiment of the present invention;
图2为本发明实施例的训练序列的结构组成示意图；2 is a schematic structural diagram of a training sequence according to an embodiment of the present invention;
图3为本发明实施例的计算相位模糊校正因子电路框图；3 is a block diagram of a circuit for calculating a phase blur correction factor according to an embodiment of the present invention;
图4为本发明实施例的输入侧进行逐级选择的可变深度缓存器示意图；4 is a schematic diagram of a variable depth buffer for performing stepwise selection on an input side according to an embodiment of the present invention;
图5为本发明实施例的输出侧进行逐级选择的可变深度缓存器示意图；FIG. 5 is a schematic diagram of a variable depth buffer for performing stepwise selection on an output side according to an embodiment of the present invention; FIG.
图6是本发明实施例的校正电路的整体框图；Figure 6 is a general block diagram of a correction circuit in accordance with an embodiment of the present invention;
图7为本发明实施例的相位模糊校正装置的结构组成示意图。 FIG. 7 is a schematic structural diagram of a phase blur correction apparatus according to an embodiment of the present invention.
具体实施方式detailed description
为了能够更加详尽地了解本发明实施例的特点与技术内容，下面结合附图对本发明实施例的实现进行详细阐述，所附附图仅供参考说明之用，并非用来限定本发明实施例。The embodiments of the present invention are described in detail below with reference to the accompanying drawings.
图1为本发明实施例的相位模糊校正方法的流程示意图，如图1所示，所述相位模糊校正方法包括以下步骤：1 is a schematic flowchart of a phase blur correction method according to an embodiment of the present invention. As shown in FIG. 1, the phase blur correction method includes the following steps:
步骤101：接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值。Step 101: Receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values.
本发明实施例中，采用QSPK调制模式的光传送网(OTN，Optical Transport Network)网络，为了在接收端校正QPSK频偏、相偏调整算法引入的相位模糊，需要在发送侧插入专门的训练序列，即构造所谓的子帧。本发明中，训练序列的设计，具有以下特点：In the embodiment of the present invention, an optical transport network (OTN) network using a QSPK modulation mode is required to insert a special training sequence on the transmitting side in order to correct the phase ambiguity introduced by the QPSK frequency offset and the phase offset adjustment algorithm at the receiving end. That is, a so-called sub-frame is constructed. In the present invention, the design of the training sequence has the following characteristics:
OTN 100G DSP芯片的高吞吐量是当前技术条件下，单套电路的主频远不能处理的，需要采用多套并行电路进行处理。将训练序列的长度及其内部的子帧的长度设计为并行电路数量的整数倍，能有效降低处理难度。训练序列造成的开销，必须小于1％。在同一训练序列中各个子帧的长度、分段灵活可配，确保子帧插入训练序列前后，训练序列的长度之比有多种选择，方便PLL的选择。进一步，在同一训练序列中，存在多种子帧。插入子帧前后的帧长之比，要足够小，方便锁相回路(PLL，Phase Locked Loop)的选择，降低其成本。The high throughput of the OTN 100G DSP chip is under the current technical conditions, the main frequency of a single set of circuits can not be processed, and multiple sets of parallel circuits are needed for processing. The length of the training sequence and the length of the internal subframe are designed as integer multiples of the number of parallel circuits, which can effectively reduce the processing difficulty. The overhead caused by the training sequence must be less than 1%. In the same training sequence, the length and segmentation of each subframe can be flexibly matched, and the ratio of the length of the training sequence can be selected before and after the subframe is inserted into the training sequence to facilitate the selection of the PLL. Further, in the same training sequence, there are a plurality of subframes. The ratio of the frame length before and after the insertion of the sub-frame is small enough to facilitate the selection of the Phase Locked Loop (PLL) and reduce its cost.
在上述设计的约束下，通过脚本，以训练序列长度、并行电路套数、开销等作为变量，编写程序，进行自动遍历，然后根据帧长之比进行筛选，能够得到所需的训练序列的结构。图2是按照上述约束产生的帧结构之一。Under the constraints of the above design, through the script, the training sequence length, the number of parallel circuit sets, the overhead, etc. are used as variables, the program is written, the automatic traversal is performed, and then the filtering is performed according to the frame length ratio, and the structure of the required training sequence can be obtained. Figure 2 is one of the frame structures produced in accordance with the above constraints.
步骤102：确定出所述训练序列中各个子帧的帧头位置。Step 102: Determine a frame header position of each subframe in the training sequence.
本发明实施例中，训练序列的结构，对于接收侧是透明的。因此，接 收侧在检测到训练序列的帧头之后，能够定位到各个子帧的帧头位置，通过子帧的帧头符号相位的计算、与已知子帧帧头相位的比较，能够获得相位模糊校正因子，进而对接收到的数据进行QPSK相位模糊校正。In the embodiment of the present invention, the structure of the training sequence is transparent to the receiving side. Therefore, pick up After receiving the frame header of the training sequence, the receiving side can locate the frame header position of each subframe, and can obtain the phase blur correction factor by calculating the phase of the frame header symbol of the subframe and comparing with the phase of the known subframe frame header. And then perform QPSK phase blur correction on the received data.
步骤103：通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子。Step 103: Obtain a phase blur correction factor by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe header.
本发明实施例中，通过缓存单元有效深度的控制，确定出进行QPSK相位模糊校正的位置，所述QPSK相位模糊校正的位置为从上一个子帧到当前子帧之间的任意符号之间。In the embodiment of the present invention, the position of the QPSK phase blur correction is determined by the control of the effective depth of the buffer unit, and the position of the QPSK phase blur correction is between any symbols from the previous subframe to the current subframe.
本发明实施例中，当子帧帧头未到达时，通过使能信号对输入信号进行信号门控，以去除无效跳变。In the embodiment of the present invention, when the subframe frame header is not reached, the input signal is gated by the enable signal to remove the invalid jump.
本发明实施例中，对所述子帧帧头内的各个符号，并行计算其相位；通过计算出的相位与已知子帧帧头相位之差，计算得到相位模糊校正因子。In the embodiment of the present invention, the phase is calculated in parallel for each symbol in the frame header of the sub-frame; and the phase blur correction factor is calculated by calculating the difference between the phase and the phase of the known sub-frame header.
对于校正因子的计算步骤，参照图3，为了最大限度降低功耗，在没有子帧帧头到达的时候，用使能信号EN对输入信号进行信号门控，去除无效跳变。For the calculation step of the correction factor, referring to FIG. 3, in order to minimize the power consumption, when the subframe header is not reached, the input signal is gated by the enable signal EN to remove the invalid jump.
采用8套电路，对子帧帧头内的各个符号，并行计算其相位、与已知相位的差、将弧度调整到2π范围内、并求其单位向量，然后，对单位向量进行累加得到向量和，进而求出其相位，最后进行校正因子的判定。采用并行电路，牺牲了因子计算单元的少量资源，换取了信号缓存单元大量资源的节省。Using 8 sets of circuits, the phase of the sub-frame header is calculated in parallel, the difference between the phase and the known phase is calculated, the radians are adjusted to the range of 2π, and the unit vector is obtained, and then the unit vector is accumulated to obtain a vector. Then, the phase is obtained, and finally the correction factor is determined. The use of parallel circuits sacrifices a small amount of resources in the factor calculation unit, in exchange for the significant resource savings of the signal buffer unit.
考虑到QPSK相位模糊在训练序列上发生的随机性，训练序列上检测到混叠时，实际的混叠可能已经在该子帧到来之前发生，因此，本发明实施例支持对子帧之前的数据进行校正，校正能够从上一个子帧到当前子帧之间的任意符号开始。这种校正起点的灵活性，通过缓存单元有效深度的控制来实现。 Considering the randomness of the QPSK phase ambiguity on the training sequence, when the aliasing is detected on the training sequence, the actual aliasing may have occurred before the arrival of the subframe. Therefore, the embodiment of the present invention supports the data before the subframe. Correction is made, and the correction can start from any symbol between the previous subframe and the current subframe. The flexibility of this calibration starting point is achieved by the control of the effective depth of the buffer unit.
在控制数据缓存单元的有效深度时，本发明实施例采用图4或图5所示的结构。图4是一个在输入侧逐级选择的可变深度缓存器，图5是一个在输出侧逐级选择的可变深度缓存器，相对于普通的在输出侧统一选择的可变深度缓存器，图4和图5更利于专门集成电路(ASIC，Application Specific Integrated Circuit)走线，降低了出现布线拥塞的可能性。The embodiment of the present invention adopts the structure shown in FIG. 4 or FIG. 5 when controlling the effective depth of the data buffer unit. 4 is a variable depth buffer selected step by step on the input side, and FIG. 5 is a variable depth buffer selected step by step on the output side, with respect to a common variable depth buffer uniformly selected on the output side, FIG. 4 and FIG. 5 are more advantageous for the ASIC (Application Specific Integrated Circuit) routing, which reduces the possibility of wiring congestion.
步骤104：利用所述相位模糊校正因子，对接收到的数据进行正交相移键控QPSK相位模糊校正。Step 104: Perform quadrature phase shift keying QPSK phase blur correction on the received data by using the phase blur correction factor.
本发明实施例中，将并行接收到的数据进行信号缓存；当所述子帧的帧头指示信号有效时，依据接收到的数据计算相位模糊校正因子；利用计算出的相位模糊校正因子，对经延时的缓存数据进行QPSK相位模糊校正。In the embodiment of the present invention, the data received in parallel is buffered; when the header indication signal of the subframe is valid, the phase fuzzy correction factor is calculated according to the received data; and the calculated phase fuzzy correction factor is used. The QPSK phase blur correction is performed on the delayed buffer data.
参照图6，图6是校正电路的整体框图，下面仅对X偏振态的校正过程加以描述，Y偏振态与之类似：并行进入的数据，全部进入X偏振态信号缓存。同时，如果帧头指示信号有效，则取输入数据的前8个符号，送给X偏振态因子计算模块。从X偏振态信号缓存模块出来的经过延时的数据，与X偏振态因子计算单元计算出来的校正因子，一同进入X偏振态相位校正模块，进行QPSK相位模糊校正。Referring to Fig. 6, Fig. 6 is an overall block diagram of the correction circuit. The following only describes the correction process of the X polarization state, and the Y polarization state is similar: the data entering in parallel enters the X polarization state signal buffer. Meanwhile, if the frame header indication signal is valid, the first 8 symbols of the input data are taken and sent to the X polarization state factor calculation module. The delayed data from the X-polarization signal buffer module is entered into the X-polarization phase correction module together with the correction factor calculated by the X-polarization factor calculation unit to perform QPSK phase blur correction.
本发明实施例的技术方案，训练序列的结构可以根据PLL的倍频比进行重新选择，且训练序列的长度、子帧长度皆等于电路并行路数以便实现，对于校正的起点，灵活可配，且利于ASIC实现，并有效控制了电路空转时的功耗。In the technical solution of the embodiment of the present invention, the structure of the training sequence may be reselected according to the multiplication ratio of the PLL, and the length of the training sequence and the length of the subframe are equal to the number of parallel circuits of the circuit for implementation, and the starting point of the correction is flexible and configurable. And it is beneficial to ASIC implementation, and effectively controls the power consumption when the circuit is idling.
图7为本发明实施例的相位模糊校正装置，如图7所示，所述装置包括：FIG. 7 is a phase blur correction apparatus according to an embodiment of the present invention. As shown in FIG. 7, the apparatus includes:
接收单元71，配置为接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值；The receiving unit 71 is configured to receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
确定单元72，配置为确定出所述训练序列中各个子帧的帧头位置； a determining unit 72, configured to determine a frame header position of each subframe in the training sequence;
相位模糊校正因子单元73，配置为通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子；The phase blur correction factor unit 73 is configured to obtain a phase blur correction factor by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe frame header;
校正单元74，配置为利用所述相位模糊校正因子，对接收到的数据进行正交相移键控QPSK相位模糊校正。The correcting unit 74 is configured to perform quadrature phase shift keying QPSK phase blur correction on the received data by using the phase blur correction factor.
本发明实施例中，所述校正单元74包括：In the embodiment of the present invention, the correcting unit 74 includes:
缓存子单元741，配置为将并行接收到的数据进行信号缓存；The buffer subunit 741 is configured to buffer the data received in parallel;
计算子单元742，配置为当所述子帧的帧头指示信号有效时，依据接收到的数据计算相位模糊校正因子；The calculating subunit 742 is configured to calculate a phase blur correction factor according to the received data when the frame header indication signal of the subframe is valid;
校正子单元743，配置为利用计算出的相位模糊校正因子，对经延时的缓存数据进行QPSK相位模糊校正。The correction sub-unit 743 is configured to perform QPSK phase blur correction on the delayed buffer data using the calculated phase blur correction factor.
本发明实施例中，所述相位模糊校正因子单元73，还配置为对所述子帧帧头内的各个符号，并行计算其相位；通过计算出的相位与已知子帧帧头相位之差，计算得到相位模糊校正因子。In the embodiment of the present invention, the phase blur correction factor unit 73 is further configured to calculate the phase of each symbol in the frame header of the sub-frame in parallel; and the difference between the calculated phase and the phase of the known sub-frame header, The phase blur correction factor is calculated.
本发明实施例中，所述装置还包括：In the embodiment of the present invention, the device further includes:
第一控制单元75，配置为通过缓存单元有效深度的控制，确定出进行QPSK相位模糊校正的位置，所述QPSK相位模糊校正的位置为从上一个子帧到当前子帧之间的任意符号之间。The first control unit 75 is configured to determine, by the control of the effective depth of the buffer unit, the position where the QPSK phase blur correction is performed, where the position of the QPSK phase blur correction is any symbol from the previous subframe to the current subframe. between.
本发明实施例中，所述装置包括：In the embodiment of the present invention, the device includes:
第二控制单元76，配置为当子帧帧头未到达时，通过使能信号对输入信号进行信号门控，以去除无效跳变。The second control unit 76 is configured to perform signal gating on the input signal by the enable signal when the subframe frame header is not reached to remove the invalid jump.
本领域技术人员应当理解，图7所示的相位模糊校正装置中的各单元及其子单元的实现功能可参照前述相位模糊校正方法的相关描述而理解。图7所示的相位模糊校正装置中的各单元及其子单元的功能可通过运行于处理器上的程序而实现，也可通过具体的逻辑电路而实现。It will be understood by those skilled in the art that the implementation functions of the units and their subunits in the phase blur correction apparatus shown in FIG. 7 can be understood by referring to the related description of the phase blur correction method described above. The functions of each unit and its subunits in the phase blur correction apparatus shown in FIG. 7 can be realized by a program running on a processor, or can be realized by a specific logic circuit.
实际应用中，所述相位模糊校正装置中各个单元模块可由中央处理器 (CPU，Central Processing Unit)、或数字信号处理器(DSP，Digital Signal Processor)、或可编程门阵列(FPGA，Field－Programmable Gate Array)实现。In practical applications, each unit module in the phase blur correction device may be implemented by a central processing unit. (CPU, Central Processing Unit), or digital signal processor (DSP, Digital Signal Processor), or Field-Programmable Gate Array (FPGA) implementation.
本发明实施例上述业务信令跟踪的装置如果以软件功能模块的形式实现并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机、服务器、或者网络设备等)执行本发明各个实施例所述方法的全部或部分。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read Only Memory)、磁碟或者光盘等各种可以存储程序代码的介质。这样，本发明实施例不限制于任何特定的硬件和软件结合。The apparatus for tracking the service signaling according to the embodiment of the present invention may also be stored in a computer readable storage medium if it is implemented in the form of a software function module and sold or used as a separate product. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions. A computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention. The foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk. Thus, embodiments of the invention are not limited to any specific combination of hardware and software.
相应地，本发明实施例还提供一种计算机存储介质，其中存储有计算机程序，该计算机程序用于执行本发明实施例的相位模糊校正方法。Correspondingly, an embodiment of the present invention further provides a computer storage medium, wherein a computer program for executing the phase blur correction method of the embodiment of the present invention is stored.
本发明实施例所记载的技术方案之间，在不冲突的情况下，可以任意组合。The technical solutions described in the embodiments of the present invention can be arbitrarily combined without conflict.
在本发明所提供的几个实施例中，应该理解到，所揭露的方法和智能设备，可以通过其它的方式实现。以上所描述的设备实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，如：多个单元或组件可以结合，或可以集成到另一个系统，或一些特征可以忽略，或不执行。另外，所显示或讨论的各组成部分相互之间的耦合、或直接耦合、或通信连接可以是通过一些接口，设备或单元的间接耦合或通信连接，可以是电性的、机械的或其它形式的。In the several embodiments provided by the present invention, it should be understood that the disclosed method and smart device may be implemented in other manners. The device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, such as: multiple units or components may be combined, or Can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, or direct coupling, or communication connection of the components shown or discussed may be indirect coupling or communication connection through some interfaces, devices or units, and may be electrical, mechanical or other forms. of.
上述作为分离部件说明的单元可以是、或也可以不是物理上分开的，作为单元显示的部件可以是、或也可以不是物理单元，即可以位于一个地 方，也可以分布到多个网络单元上；可以根据实际的需要选择其中的部分或全部单元来实现本实施例方案的目的。The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place. The party may also be distributed to multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
另外，在本发明各实施例中的各功能单元可以全部集成在一个第二处理单元中，也可以是各单元分别单独作为一个单元，也可以两个或两个以上单元集成在一个单元中；上述集成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。In addition, each functional unit in each embodiment of the present invention may be integrated into one second processing unit, or each unit may be separately used as one unit, or two or more units may be integrated into one unit; The above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。 The above is only a specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope of the present invention. It should be covered by the scope of the present invention.

Claims (11)

  1. 一种相位模糊校正方法，所述方法包括：A phase blur correction method, the method comprising:
    接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值；Receiving a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
    确定出所述训练序列中各个子帧的帧头位置；Determining a frame header position of each subframe in the training sequence;
    通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子；Obtaining a phase blur correction factor by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe header;
    利用所述相位模糊校正因子，对接收到的数据进行正交相移键控QPSK相位模糊校正。The phase-shift keying QPSK phase blur correction is performed on the received data by using the phase blur correction factor.
  2. 根据权利要求1所述的相位模糊校正方法，其中，所述利用所述相位模糊校正因子，对接收到的数据进行QPSK相位模糊校正，包括：The phase blur correction method according to claim 1, wherein the performing QPSK phase blur correction on the received data by using the phase blur correction factor comprises:
    将并行接收到的数据进行信号缓存；The data received in parallel is buffered by the signal;
    当所述子帧的帧头指示信号有效时，依据接收到的数据计算相位模糊校正因子；When the frame header indication signal of the subframe is valid, calculating a phase blur correction factor according to the received data;
    利用计算出的相位模糊校正因子，对经延时的缓存数据进行QPSK相位模糊校正。The QPSK phase blur correction is performed on the delayed buffer data by using the calculated phase blur correction factor.
  3. 根据权利要求1所述的相位模糊校正方法，其中，所述通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子，包括：The phase blur correction method according to claim 1, wherein the phase blur correction factor is obtained by comparing the phase of the frame header symbol of the subframe with the phase of the known subframe header, including:
    对所述子帧帧头内的各个符号，并行计算其相位；Calculating the phase of each symbol in the header of the sub-frame in parallel;
    通过计算出的相位与已知子帧帧头相位之差，计算得到相位模糊校正因子。The phase blur correction factor is calculated by the difference between the calculated phase and the phase of the known sub-frame header.
  4. 根据权利要求1所述的相位模糊校正方法，其中，所述方法还包括：The phase blur correction method according to claim 1, wherein the method further comprises:
    通过缓存单元有效深度的控制，确定出进行QPSK相位模糊校正的位置，所述QPSK相位模糊校正的位置为从上一个子帧到当前子帧之间的任 意符号之间。The position of the QPSK phase blur correction is determined by the control of the effective depth of the buffer unit, and the position of the QPSK phase blur correction is between the previous subframe and the current subframe. Between the symbols.
  5. 根据权利要求1至4任一项所述的相位模糊校正方法，其中，所述方法还包括：The phase blur correction method according to any one of claims 1 to 4, wherein the method further comprises:
    当子帧帧头未到达时，通过使能信号对输入信号进行信号门控，以去除无效跳变。When the sub-frame header is not reached, the input signal is signal gated by an enable signal to remove the invalid transition.
  6. 一种相位模糊校正装置，所述装置包括：A phase blur correction device, the device comprising:
    接收单元，配置为接收发送侧发送的训练序列，所述训练序列包括多个子帧，训练序列中各个子帧的长度、分段配置为设定值；The receiving unit is configured to receive a training sequence sent by the sending side, where the training sequence includes multiple subframes, and the length and segment configuration of each subframe in the training sequence are set values;
    确定单元，配置为确定出所述训练序列中各个子帧的帧头位置；a determining unit configured to determine a frame header position of each subframe in the training sequence;
    相位模糊校正因子单元，配置为通过所述子帧的帧头符号相位的计算与已知子帧帧头相位的比较，获得相位模糊校正因子；a phase blur correction factor unit configured to obtain a phase blur correction factor by comparing a phase of the frame header symbol of the subframe with a phase of a known subframe frame header;
    校正单元，配置为利用所述相位模糊校正因子，对接收到的数据进行正交相移键控QPSK相位模糊校正。And a correction unit configured to perform quadrature phase shift keying QPSK phase blur correction on the received data by using the phase blur correction factor.
  7. 根据权利要求6所述的相位模糊校正装置，其中，所述校正单元包括：The phase blur correction device according to claim 6, wherein the correction unit comprises:
    缓存子单元，配置为将并行接收到的数据进行信号缓存；a cache subunit configured to buffer data received in parallel;
    计算子单元，配置为当所述子帧的帧头指示信号有效时，依据接收到的数据计算相位模糊校正因子；a calculating subunit configured to calculate a phase blur correction factor according to the received data when the frame header indication signal of the subframe is valid;
    校正子单元，配置为利用计算出的相位模糊校正因子，对经延时的缓存数据进行QPSK相位模糊校正。The correction subunit is configured to perform QPSK phase blur correction on the delayed buffered data using the calculated phase blur correction factor.
  8. 根据权利要求6所述的相位模糊校正装置，其中，所述相位模糊校正因子单元，还配置为对所述子帧帧头内的各个符号，并行计算其相位；通过计算出的相位与已知子帧帧头相位之差，计算得到相位模糊校正因子。The phase blur correction device according to claim 6, wherein the phase blur correction factor unit is further configured to calculate a phase thereof in parallel for each symbol in the header of the sub-frame; by calculating the phase and the known sub- The phase blur correction factor is calculated by the difference between the phase of the frame header.
  9. 根据权利要求6所述的相位模糊校正装置，其中，所述装置还包括：The phase blur correction device of claim 6, wherein the device further comprises:
    第一控制单元，配置为通过缓存单元有效深度的控制，确定出进行 QPSK相位模糊校正的位置，所述QPSK相位模糊校正的位置为从上一个子帧到当前子帧之间的任意符号之间。a first control unit configured to determine that the effective depth is controlled by the cache unit The position of the QPSK phase blur correction, the position of the QPSK phase blur correction is between any symbols from the previous subframe to the current subframe.
  10. 根据权利要求6至9任一项所述的相位模糊校正装置，其中，所述装置包括：The phase blur correction device according to any one of claims 6 to 9, wherein the device comprises:
    第二控制单元，配置为当子帧帧头未到达时，通过使能信号对输入信号进行信号门控，以去除无效跳变。The second control unit is configured to perform signal gating on the input signal by the enable signal when the subframe frame header is not reached to remove the invalid jump.
  11. 一种计算机存储介质，所述计算机存储介质中存储有计算机可执行指令，该计算机可执行指令配置为执行权利要求1-5任一项所述的相位模糊校正方法。 A computer storage medium having stored therein computer executable instructions configured to perform the phase blur correction method of any of claims 1-5.
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