CN114116195B - QPSK phase-separating fuzzifier based on MPI and multithreading - Google Patents

QPSK phase-separating fuzzifier based on MPI and multithreading Download PDF

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CN114116195B
CN114116195B CN202111180864.2A CN202111180864A CN114116195B CN 114116195 B CN114116195 B CN 114116195B CN 202111180864 A CN202111180864 A CN 202111180864A CN 114116195 B CN114116195 B CN 114116195B
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CN114116195A (en
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田梦雪
王静温
郦家骅
李小梅
刘文俊
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Beijing Research Institute of Telemetry
Aerospace Long March Launch Vehicle Technology Co Ltd
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Aerospace Long March Launch Vehicle Technology Co Ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
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Abstract

The invention provides a QPSK phase-separating ambiguity apparatus based on MPI and multithread, which comprises n MPI processes arranged in parallel, wherein each MPI process comprises a demodulation code synchronization module and an ambiguity-separating module which are sequentially connected, and the demodulation code synchronization module is used for receiving QPSK signals and demodulating and synchronizing to generate I-path code synchronization data and Q-path code synchronization data and outputting the I-path code synchronization data and the Q-path code synchronization data to the ambiguity-separating module; the defuzzification module comprises 4 data decoding combination threads, 4 shared caches and 4 frame synchronization threads which are arranged in parallel, wherein each data decoding combination thread is sequentially connected with 1 shared cache and 1 frame synchronization thread, and each frame synchronization thread is connected with 4 data decoding combination threads. The invention realizes a software framework of two-stage deblurring of multithreading and parallelism and a self-defined thread dynamic scheduling model based on multiple Sections of OpenMP. The data integrity is guaranteed while the ambiguity resolution real-time performance is improved, and the self-defined thread dynamic scheduling model can dynamically adjust the number of the working threads according to the data code rate.

Description

QPSK phase-separating fuzzifier based on MPI and multithreading
Technical Field
The invention relates to the technical field of electric digital data processing, in particular to a QPSK phase-resolving blur device based on MPI and multithreading.
Background
Both the bandwidth and power of satellite communications are limited, and constant envelope type modulation is therefore often employed as the transmission regime. QPSK is the most typical one of the constant inclusion types of modulation, and is widely used for applications including civilian wireless communication, satellite navigation, and deep space communication. When the receiver performs demodulation decoding, operations such as carrier recovery, code synchronization, phase ambiguity resolution and the like are needed to recover carriers, and generally, nonlinear carrier recovery methods such as a 4-degree square loop, a costas loop and the like are used, so that phase ambiguity is brought, and the phase ambiguity can be quadruple phase ambiguity of 0 degree, 90 degree, 180 degree or 270 degree.
At present, a method for implementing a QPSK demodulation phase ambiguity resolution function in baseband equipment applied to a communication system is based on FPGA (Field Programmable GATE ARRAY field programmable gate array) programming, and judges which phase ambiguity state the demodulation data belongs to at the moment by identifying frame header data through frame synchronization. The traditional engineering practice method needs to judge four kinds of data with fuzzy phases in sequence, the data is subjected to frame synchronization under the assumption of the phase of the demodulated data, and if the frame synchronization fails, the next phase is replaced for judgment. This process results in loss of demodulated data and waste of information, which is unacceptable in deep space communication.
Disclosure of Invention
The invention provides a QPSK phase-resolving blur device based on MPI and multithread, which is used for performing data decoding combination and frame synchronization in parallel by utilizing MPI and multithread, ensuring the data integrity of correct input sequences at the cost of the computing capacity of a multi-core multi-path CPU and a plurality of shared memory spaces, ensuring whether each input sequence decoding result can be frame-synchronized or not without multiple serial attempts, determining the correct input sequence, realizing signal soft demodulation by utilizing pure software, and effectively improving the computing performance and maintaining the data integrity.
The invention provides a QPSK phase-resolving fuzzy ware based on MPI and multithread, which comprises n MPI processes arranged in parallel, wherein n is more than or equal to 1; each MPI process comprises a demodulation code synchronization module and a defuzzification module which are connected in sequence, wherein the demodulation code synchronization module is used for receiving QPSK signals, demodulating and synchronizing to generate I-path code synchronization data and Q-path code synchronization data, and outputting the I-path code synchronization data and the Q-path code synchronization data to the defuzzification module;
The defuzzification module comprises 4 data decoding combined threads, 4 shared caches and 4 frame synchronization threads which are arranged in parallel, wherein each data decoding combined thread is sequentially connected with 1 shared cache and 1 frame synchronization thread, and each frame synchronization thread is connected with 4 data decoding combined threads; the data decoding combination thread is used for receiving I-path code synchronous data and Q-path code synchronous data and carrying out Gray decoding, IQ combination and code type conversion to generate decoding combination data, the decoding combination data is written into the shared buffer memory, the shared buffer memory is used for storing the decoding combination data, the frame synchronous thread is used for reading the decoding combination data from the shared buffer memory and carrying out frame synchronous processing, the frame synchronous thread is used for generating a frame synchronous locking message after finishing the frame synchronous processing and simultaneously transmitting the frame synchronous locking message to the 4 data decoding combination threads, the data decoding combination thread is used for receiving the frame synchronous locking message and judging whether the frame synchronous locking message corresponds to the data decoding combination thread or not, if yes, the data decoding combination thread continues data combination and decoding work, and if no, the data combination and decoding work is stopped until the frame synchronous locking message corresponding to the data decoding combination thread is received.
According to the QPSK phase-resolving blur device based on MPI and multithreading, n is the same as the number of paths of QPSK signals as a preferable mode; the activated MPI process is always started from the process 0 and activated according to the sequence of the process numbers; the MPI process is created on the same machine.
The invention relates to a QPSK phase-resolving blur device based on MPI and multithreading, which is characterized in that a data decoding combination thread comprises OpenMP Sections software architecture and OpenMP Sections software architecture as an optimal mode, wherein the OpenMP Sections software architecture is used for carrying out segmentation coverage operation on I-path code synchronous data and Q-path code synchronous data.
According to the QPSK phase-resolving blur device based on MPI and multithreading, as an optimal mode, a data decoding combination thread is used for carrying out segmentation processing on I-path code synchronous data and Q-path code synchronous data, the lengths of all data sections are the same, adjacent data sections keep a Section of coverage area, sections of each OpenMP Sections software architecture process Gray decoding, data combination and code pattern transformation of one data Section, the data decoding combination thread copies output data of each Section to a unified result buffer area, and a result obtained by processing the next Section of data covers the tail part corresponding to the previous Section of data.
According to the QPSK phase-resolving blur device based on MPI and multithreading, as an optimal mode, the length of output data is the same and is an integer multiple of bytes, a coverage area comprises M bytes, M is the k power of 2, and k is more than or equal to 1.
According to the QPSK phase-resolving blur device based on MPI and multithreading, as a preferred mode, a data decoding combination thread is created by using pthread.
According to the QPSK phase-resolving blur device based on MPI and multithreading, as a preferred mode, IQ combination is used for combining I-path code synchronous data and Q-path code synchronous data after Gray decoding into I+Q data, I-Q data, Q+I data and Q-I data;
The code pattern transformation is used for performing code pattern transformation on the I+Q data, the I-Q data, the Q+I data and the Q-I data to generate decoding combined data and writing the decoding combined data into the shared buffer memory.
According to the QPSK phase-separation blur device based on MPI and multithreading, as an optimal mode, gray decoding comprises a Gray0 decoding mode, a Gray1 decoding mode, a Gray2 decoding mode, a Gray3 decoding mode, a Gray4 decoding mode, a Gray5 decoding mode, a Gray6 decoding mode and a Gray7 decoding mode which accord with CCSDS standards.
The QPSK phase-splitting blur device based on MPI and multithreading in the invention is characterized in that the code pattern transformation comprises an NRZ-L code pattern, an NRZ-M code pattern, an NRZ-S code pattern, a BI-L code pattern, a BI-S code pattern and a BI-M code pattern as a preferable mode.
The invention relates to a QPSK phase-separating blur device based on MPI and multithreading, which is used as a preferable mode, and a frame synchronization locking message comprises a sequence number of a frame synchronization thread for sending the frame synchronization locking message and a frame synchronization zone bit.
The technical scheme of the invention is as follows:
MPI process parallel software framework implementation
The MPI process parallel software framework of the present invention is composed of thread pairs that perform decoding combination and frame synchronization for different QPSK code synchronization data I, Q sequences.
The MPI process parallel software framework implementation process in the step is as follows:
(1a) When the n-path QPSK demodulation data is deblurred, n MPI processes are activated, and 2 pthread threads are started in each MPI process, namely 2n pthread threads. The pthread threads 0-pthread threads n-1 belong to a first-stage processing module, gray decoding, data combination and code pattern transformation are executed, I, Q paths of data are input, after Gray decoding, the data are combined into a form of I+ Q, I-Q, Q + I, Q-I, and the I+ Q, I-Q, Q + I, Q-I is written into the corresponding shared cache 1-shared cache 4 after the code pattern transformation.
(1B) The pthread threads n to pthread thread 2n-1 belong to the second-stage processing module, and read data from the shared buffer 1 to the shared buffer 4, respectively, and perform frame synchronization processing. When a certain frame synchronization pthread thread enters a frame synchronization locking state, a locking message is sent to all pthread threads in the MPI process in the form of a global variable.
(1C) After the data decoding combined thread receives the frame synchronization locking message, judging whether the combined data result corresponding to the thread is successful in frame synchronization. If the frame synchronization thread is in the frame synchronization state, the data decoding combination work is continued, if the frame synchronization thread is in the frame synchronization state, the data decoding combination work is stopped, and the frame synchronization thread and the corresponding frame synchronization thread wait for the next reset command and then start the work.
Whether the created MPI procedure is activated and starts working depends on the way number setting of the input QPSK data. The activated MPI process always starts from process 0.
The MPI processes need to be created on the same machine so that memory buffers can be shared between MPI processes.
In the data decoding combination module, I, Q paths of data are input, and eight decoding modes of Gray 0-Gray 7 which accord with CCSDS standards are adopted for Gray code decoding; the code pattern transformation adopts six code patterns of NRZ-L, NRZ-M, NRZ-S, BI phi-L, BI phi-S, BI phi-M which meet the IRIGB-106 standard.
In the data decoding combination module, two paths of data are input into I, Q, and four combination modes of I+ Q, I-Q, Q +I and Q-I are formed according to the mode shown in figure 2.
(II) multiple OpenMP Sections implementation of data segment coverage parallel decoding combination
The processing procedure for realizing the data segmentation coverage parallel decoding and combining by using the OpenMP multiple Sections is as follows:
(2a) The incoming I, Q data streams are segmented, each data segment being the same length, adjacent data segments maintaining a segment footprint, as shown in fig. 3.
(2B) The OpenMP Sections software architecture is set up as shown in fig. 4. Each Section handles Gray decoding, data combining and pattern transformation of one data segment.
(2C) Copying the result output by each Section to a unified result buffer area, and covering the tail part corresponding to the previous Section of data by the result obtained by the processing of the next Section of data.
The footprint length setting is such that the output data length is an integer multiple of bytes. And in order to ensure the accuracy of the output result of the tail part of each block of data, at least 2 bytes of data need to be covered by the data of the next section.
The invention comprises n MPI deblurring processes, 4n shared caches, 4n data decoding combination threads and 4n frame synchronization threads; the data decoding combination thread, the shared buffer memory and the frame synchronization thread are in one-to-one correspondence;
Each MPI defuzzification process contains 4 data coding combination threads and 4 frame synchronization threads. The data decoding combination thread is used for carrying out Gray decoding, IQ combination and code pattern transformation on I, Q paths of code synchronous data, and writing the decoding combination data into a corresponding shared cache; the frame synchronization thread reads out the decoded and combined data from the corresponding shared buffer memory, and performs frame synchronization processing, and once frame synchronization is completed, the frame synchronization locking message is simultaneously sent to 4 data decoding and combining threads; the frame synchronization locking message comprises a frame synchronization thread sequence number and a frame synchronization flag bit which are used for sending the message;
And after receiving the frame synchronization locking message, the data decoding combination thread judges whether the frame synchronization is finished according to the decoding combination data result corresponding to the data decoding combination thread, if so, the data combination and decoding work is continued, and if not, the data combination and decoding work is stopped.
The MPI process number is equal to the number of paths of QPSK signals needing to be subjected to phase ambiguity resolution, and the minimum value is 1. The activated MPI process always starts from process 0 and activates in process number order. The MPI process needs to be created on the same machine.
The data form entering the data decoding and combining thread is I, Q paths of data after QPSK code synchronization.
The data decoding combination thread is created by using pthread, and the creation sequence can be not according to the thread numbering sequence.
Data segment coverage parallel transcoding combining is implemented within each transcoding combining thread using OpenMP Sections. The data length of each Section is the same, and the data of adjacent sections is repeated in M bytes. M is minimum 2 and M should take on the power of 2 to the nth power.
The invention realizes a software framework of two-stage deblurring of multithreading and parallelism and a self-defined thread dynamic scheduling model based on multiple Sections of OpenMP. The data integrity is guaranteed while the ambiguity resolution real-time performance is improved, and the self-defined thread dynamic scheduling model can dynamically adjust the number of the working threads according to the data code rate.
The invention has the following advantages:
(1) According to the method, decoding combination and frame synchronization of different input data are executed in parallel according to MPI+multithreading, so that data are not lost in a phase ambiguity resolution process;
(2) The invention utilizes the data buffer to divide the data decoding combined module and the frame synchronization module into two-stage processing, which is beneficial to adapting to different code rates and frame lengths;
(3) The invention activates multiple processes by utilizing MPI form, which is beneficial to the defuzzification of QPSK demodulation signals with different paths; MPI multiprocess parallel processing is carried out, and mutual interference among different paths of QPSK demodulation signals is avoided;
(4) The invention utilizes the multiple Sections of OpenMP to perform segmented coverage operation on the data, and can dynamically adjust the data throughput of one-time parallel defuzzification so as to meet the requirement of engineering application on real-time.
Drawings
FIG. 1 is a schematic diagram of a QPSK dephasing blur software framework based on MPI and multithreading;
FIG. 2 is a graph of the combined input sequence of the demodulation data of the QPSK phase-separation blur based on MPI and multithreading;
FIG. 3 is a block diagram of a QPSK demodulation phase ambiguity demodulator demodulation data based on MPI and multithreading;
Fig. 4 is a schematic diagram of a QPSK phase-separation blur filter OpenMP multi Sections based on MPI and multithreading.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
Example 1
As shown in FIG. 1, the QPSK phase-splitting ambiguity resolver based on MPI and multithreading comprises n MPI processes which are arranged in parallel, wherein n is larger than or equal to 1; each MPI process comprises a demodulation code synchronization module and a defuzzification module which are connected in sequence, wherein the demodulation code synchronization module is used for receiving QPSK signals, demodulating and synchronizing to generate I-path code synchronization data and Q-path code synchronization data, and outputting the I-path code synchronization data and the Q-path code synchronization data to the defuzzification module;
The defuzzification module comprises 4 data decoding combined threads, 4 shared caches and 4 frame synchronization threads which are arranged in parallel, wherein each data decoding combined thread is sequentially connected with 1 shared cache and 1 frame synchronization thread, and each frame synchronization thread is connected with 4 data decoding combined threads; the data decoding combination thread is used for receiving I-path code synchronous data and Q-path code synchronous data and carrying out Gray decoding, IQ combination and code type conversion to generate decoding combination data, the decoding combination data is written into the shared buffer memory, the shared buffer memory is used for storing the decoding combination data, the frame synchronous thread is used for reading the decoding combination data from the shared buffer memory and carrying out frame synchronous processing, the frame synchronous thread is used for generating a frame synchronous locking message after finishing the frame synchronous processing and simultaneously transmitting the frame synchronous locking message to the 4 data decoding combination threads, the data decoding combination thread is used for receiving the frame synchronous locking message and judging whether the frame synchronous locking message corresponds to the data decoding combination thread or not, if yes, the data decoding combination thread continues data combination and decoding work, if no, the data combination and decoding work is stopped until the frame synchronous locking message corresponding to the data decoding combination thread is received;
n is the same as the number of paths of QPSK signals; the activated MPI process is always started from the process 0 and activated according to the sequence of the process numbers; MPI processes are created on the same machine;
the data decoding combination thread is created by using pthread;
as shown in fig. 2, IQ combining is used to combine the Gray-decoded I-way code synchronization data and Q-way code synchronization data into i+q data, I-Q data, q+i data, and Q-I data;
The code pattern transformation is used for performing code pattern transformation on the I+Q data, the I-Q data, the Q+I data and the Q-I data to generate decoding combined data and writing the decoding combined data into the shared cache;
As shown in fig. 3-4, the data decoding combination thread includes OpenMP Sections software architecture, openMP Sections software architecture is used for performing segment coverage operation on the I-way code synchronous data and the Q-way code synchronous data;
The data decoding combination thread is used for carrying out segmentation processing on the I-path code synchronous data and the Q-path code synchronous data, wherein the lengths of all data sections are the same, the adjacent data sections keep a Section of coverage area, the Section of each OpenMP Sections software architecture processes Gray decoding, data combination and code pattern transformation of one data Section, the data decoding combination thread copies output data of each Section to a unified result buffer area, and the result obtained by the processing of the next Section of data covers the tail part corresponding to the previous Section of data;
The length of the output data is the same and is an integer multiple of bytes, the coverage area comprises M bytes, M is the power of k of 2, and k is more than or equal to 1;
The Gray decoding comprises a Gray0 decoding mode, a Gray1 decoding mode, a Gray2 decoding mode, a Gray3 decoding mode, a Gray4 decoding mode, a Gray5 decoding mode, a Gray6 decoding mode and a Gray7 decoding mode which accord with CCSDS standards;
the pattern transformation includes NRZ-L patterns, NRZ-M patterns, NRZ-S patterns, BI phi-L patterns, BI phi-S patterns, and BI phi-M patterns;
the frame synchronization locking message includes a sequence number of a frame synchronization thread transmitting the frame synchronization locking message and a frame synchronization flag bit.
Example 2
QPSK phase-separating fuzzifier based on MPI and multithread includes MPI multiprocessing software frame, multithread based on pthread realizing data decoding combination and frame synchronous asynchronous structure.
As shown in fig. 1, the specific implementation steps of the QPSK phase-resolving blur device based on mpi+multithreading of the present invention are as follows:
MPI process parallel software framework implementation
The MPI process parallel software framework of the present invention is composed of thread pairs that perform decoding combination and frame synchronization for different QPSK code synchronization data I, Q sequences.
The MPI process parallel software framework implementation process in the step is as follows:
(1a) When the n-path QPSK demodulation data is deblurred, n MPI processes are activated, and 2 pthread threads are started in each MPI process, namely 2n pthread threads. The pthread threads 0-pthread threads n-1 belong to a first-stage processing module, gray decoding, data combination and code pattern transformation are executed, I, Q paths of data are input, after Gray decoding, the data are combined into a form of I+ Q, I-Q, Q + I, Q-I, and the I+ Q, I-Q, Q + I, Q-I is written into the corresponding shared cache 1-shared cache 4 after the code pattern transformation.
(1B) The pthread threads n to pthread thread 2n-1 belong to the second-stage processing module, and read data from the shared buffer 1 to the shared buffer 4, respectively, and perform frame synchronization processing. When a certain frame synchronization pthread thread enters a frame synchronization locking state, a locking message is sent to all pthread threads in the MPI process in the form of a global variable.
(1C) After the data decoding combined thread receives the frame synchronization locking message, judging whether the combined data result corresponding to the thread is successful in frame synchronization. If the frame synchronization thread is in the frame synchronization state, the data decoding combination work is continued, if the frame synchronization thread is in the frame synchronization state, the data decoding combination work is stopped, and the frame synchronization thread and the corresponding frame synchronization thread wait for the next reset command and then start the work.
Whether the created MPI procedure is activated and starts working depends on the way number setting of the input QPSK data. The activated MPI process always starts from process 0.
The MPI processes need to be created on the same machine so that memory buffers can be shared between MPI processes.
In the data decoding combination module, I, Q paths of data are input, and eight decoding modes of Gray 0-Gray 7 which accord with CCSDS standards are adopted for Gray code decoding; the code pattern transformation adopts six code patterns of NRZ-L, NRZ-M, NRZ-S, BI phi-L, BI phi-S, BI phi-M which meet the IRIGB-106 standard.
In the data decoding combination module, two paths of data are input into I, Q, and four combination modes of I+ Q, I-Q, Q +I and Q-I are formed according to the mode shown in figure 2.
(II) multiple OpenMP Sections implementation of data segment coverage parallel decoding combination
The processing procedure for realizing the data segmentation coverage parallel decoding combination of the data through the OpenMP multi Sections is as follows:
(2a) The incoming I, Q data streams are segmented, each data segment being the same length, adjacent data segments maintaining a segment footprint, as shown in fig. 3.
(2B) The OpenMP Sections software architecture is set up as shown in fig. 4. Each Section handles Gray decoding, data combining and pattern transformation of one data segment.
(2C) Copying the result output by each Section to a unified result buffer area, and covering the tail part corresponding to the previous Section of data by the result obtained by the processing of the next Section of data.
The footprint length setting is such that the output data length is an integer multiple of bytes. And in order to ensure the accuracy of the output result of the tail part of each block of data, at least 2 bytes of data need to be covered by the data of the next section.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art, who is within the scope of the present invention, should make equivalent substitutions or modifications according to the technical scheme of the present invention and the inventive concept thereof, and should be covered by the scope of the present invention.

Claims (10)

1. A QPSK de-phase ambiguity-blur based on MPI and multithreading, characterized by: the method comprises n MPI processes which are arranged in parallel, wherein n is more than or equal to 1; each MPI process comprises a demodulation code synchronization module and a defuzzification module which are connected in sequence, wherein the demodulation code synchronization module is used for receiving QPSK signals, demodulating and synchronizing to generate I-path code synchronization data and Q-path code synchronization data, and outputting the I-path code synchronization data and the Q-path code synchronization data to the defuzzification module;
The defuzzification module comprises 4 data decoding combination threads, 4 shared caches and 4 frame synchronization threads which are arranged in parallel, wherein each data decoding combination thread is sequentially connected with 1 shared cache and 1 frame synchronization thread, and each frame synchronization thread is connected with 4 data decoding combination threads; the data decoding combination thread is used for receiving the I-path code synchronous data and the Q-path code synchronous data, performing Gray decoding, IQ combination and code pattern transformation to generate decoding combination data, writing the decoding combination data into the shared buffer, wherein the shared buffer is used for storing the decoding combination data, the frame synchronous thread is used for reading the decoding combination data from the shared buffer and performing frame synchronous processing, the frame synchronous thread is used for generating a frame synchronous locking message after finishing the frame synchronous processing and simultaneously transmitting the frame synchronous locking message to 4 data decoding combination threads, the data decoding combination thread is used for receiving the frame synchronous locking message and judging whether the frame synchronous locking message corresponds to the data decoding combination thread or not, if yes, the data decoding combination thread continues data combination and decoding work, and if no, the data combination and decoding work is stopped until the frame synchronous locking message corresponding to the data decoding combination thread is received.
2. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: n is the same as the number of paths of the QPSK signal; the activated MPI process is always started from process 0 and is activated according to the sequence of the process numbers; the MPI process is created on the same machine.
3. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: the data coding combination thread comprises OpenMP Sections software architecture, and the OpenMP Sections software architecture is used for performing segment coverage operation on the I-path code synchronous data and the Q-path code synchronous data.
4. A MPI and multi-threading based QPSK phase ambiguity resolver according to claim 3, wherein: the data decoding and combining thread is used for carrying out segmentation processing on the I-path code synchronous data and the Q-path code synchronous data, wherein the lengths of all data sections are the same, adjacent data sections keep a Section of coverage area, each Section of OpenMP Sections software architecture processes Gray decoding, data combining and code pattern transformation of one data Section, the data decoding and combining thread copies output data of each Section to a unified result buffer area, and a result obtained by processing the next Section of data covers the tail part corresponding to the previous Section of data.
5. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 4, wherein: the output data are identical in length and are integer multiples of bytes, the coverage area comprises M bytes, M is the power of k of 2, and k is more than or equal to 1.
6. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: the data coding composition thread is created using pthread.
7. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: the IQ combination is used for combining the I-path code synchronous data and the Q-path code synchronous data after Gray decoding into I+Q data, I-Q data, Q+I data and Q-I data;
The code pattern transformation is used for performing code pattern transformation on the I+Q data, the I-Q data, the Q+I data and the Q-I data to generate the decoding combination data and writing the decoding combination data into the shared cache.
8. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: the Gray decoding comprises a Gray0 decoding mode, a Gray1 decoding mode, a Gray2 decoding mode, a Gray3 decoding mode, a Gray4 decoding mode, a Gray5 decoding mode, a Gray6 decoding mode and a Gray7 decoding mode which accord with CCSDS standards.
9. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: the pattern transforms include NRZ-L patterns, NRZ-M patterns, NRZ-S patterns, BI phi-L patterns, BI phi-S patterns, and BI phi-M patterns.
10. The MPI and multithreading based QPSK phase ambiguity resolution apparatus of claim 1, wherein: the frame synchronization locking message comprises a sequence number and a frame synchronization flag bit of the frame synchronization thread which sends the frame synchronization locking message.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1138795A (en) * 1995-06-07 1996-12-25 迪维安公司 Signal processing apparatus and method
CN103078727A (en) * 2013-01-06 2013-05-01 中国电子科技集团公司第十研究所 Method for improving frame synchronization performance of data transmission receiver
WO2016192321A1 (en) * 2015-06-03 2016-12-08 深圳市中兴微电子技术有限公司 Phase ambiguity correction method and device, and computer storage medium
CN110808772A (en) * 2019-11-26 2020-02-18 上海航天测控通信研究所 Baseband signal processing method and device for receiver of near-moon space communication
CN110995280A (en) * 2019-12-19 2020-04-10 北京遥测技术研究所 Parallel Viterbi decoder

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8990830B2 (en) * 2011-07-19 2015-03-24 International Business Machines Corporation Thread management in parallel processes

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1138795A (en) * 1995-06-07 1996-12-25 迪维安公司 Signal processing apparatus and method
CN103078727A (en) * 2013-01-06 2013-05-01 中国电子科技集团公司第十研究所 Method for improving frame synchronization performance of data transmission receiver
WO2016192321A1 (en) * 2015-06-03 2016-12-08 深圳市中兴微电子技术有限公司 Phase ambiguity correction method and device, and computer storage medium
CN110808772A (en) * 2019-11-26 2020-02-18 上海航天测控通信研究所 Baseband signal processing method and device for receiver of near-moon space communication
CN110995280A (en) * 2019-12-19 2020-04-10 北京遥测技术研究所 Parallel Viterbi decoder

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
QPSK信号旋转方向对调制解调的影响;曹颖鹏;杨光文;靳一;;空间电子技术;20200625(第03期);全文 *
基于数据分解的高速QPSK并行解调方法;闫迪;王元钦;吴涛;孙克;;系统工程与电子技术;20180125(第07期);全文 *

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