WO2016165486A1 - Émetteur et procédé de sortie de signal - Google Patents

Émetteur et procédé de sortie de signal Download PDF

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Publication number
WO2016165486A1
WO2016165486A1 PCT/CN2016/074298 CN2016074298W WO2016165486A1 WO 2016165486 A1 WO2016165486 A1 WO 2016165486A1 CN 2016074298 W CN2016074298 W CN 2016074298W WO 2016165486 A1 WO2016165486 A1 WO 2016165486A1
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signal
module
constant envelope
bit
signals
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PCT/CN2016/074298
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English (en)
Chinese (zh)
Inventor
孙泰然
陶俊
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中兴通讯股份有限公司
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Publication of WO2016165486A1 publication Critical patent/WO2016165486A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0294—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using vector summing of two or more constant amplitude phase-modulated signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

Definitions

  • the present invention relates to the field of mobile communications, and in particular to a transmitter and a signal output method.
  • LTE-A LTE-Advanced
  • LTE-A LTE-Advanced
  • technologies such as Carrier Aggregation (CA) and Multi-Antenna (MIMO) are required, and wireless base stations are required to have broadband.
  • CA Carrier Aggregation
  • MIMO Multi-Antenna
  • features such as wide, high efficiency, and flexible configurability greatly increase the complexity of the RF front end.
  • An efficient transmitter based on Linear Amplification with Nonlinear Components (LINC) is an ideal solution to meet the future evolution of mobile communication systems.
  • the baseband digital processor decomposes a single peak-to-average ratio signal into two constant envelope signals, and outputs them through a dac and an IQ modulator.
  • the original signal is restored.
  • the decomposition principle is shown in Fig. 2.
  • the band-limited signal S(t) r(t) ⁇ e -j ⁇ (t) of the amplitude modulation phase modulation characteristic, 0 ⁇ r(t) ⁇ r max , where r max is the input
  • the maximum value of the signal amplitude is separated by a signal separator (Signal Components Separator, SCS for short) to generate the following two signals:
  • the structure is complex, including multiple analog components, such as the need for digital-to-analog converters (DAC), and analog modulators, even with IC technology is difficult to integrate, package.
  • DAC digital-to-analog converters
  • analog modulators even with IC technology is difficult to integrate, package.
  • the present invention has been made in order to provide a transmitter and signal output method that overcomes the above problems or at least partially solves the above problems.
  • An embodiment of the present invention provides a transmitter, including:
  • a coded modulator configured to convert an input baseband signal into two constant envelope signals and convert the two constant envelope signals from a multi-bit signal to a single bit by digital signal modulator DSM encoding and pulse width modulator PWM encoding signal;
  • the digital up-conversion module is configured to up-convert two single-bit signals outputted by the code modulator in the digital domain, move two single-bit signals to a carrier frequency, and combine the single-bit IQ complex signals of each single-bit signal For a single bit real signal, output to a high speed serial transmitter module;
  • a high speed serial transmitter module configured to convert two constant envelope signals from a digital signal to an analog signal and output to a band pass filter
  • a bandpass filter configured to filter out the out-of-band signal modulated by the code modulator and recover the two-way constant envelope signal after the out-of-phase decomposition, wherein the passband bandwidth of the bandpass filter is a code modulator conversion The decomposition bandwidth of the two-way constant envelope signal;
  • the power amplifier module is configured to perform power amplification on the two constant envelope signals output by the band pass filter;
  • the passive combination module is configured to combine and output two constant envelope signals output by the power amplifier module.
  • the code modulator, the digital up-conversion module, the high-speed serial transmitter module, the band-pass filter, the power amplifier module, and the passive combination module may adopt central processing when performing processing (CPU, Central Processing Unit), digital signal processor (DSP, Digital Singnal Processor) or Programmable Array (FPGA).
  • CPU Central Processing Unit
  • DSP Digital Singnal Processor
  • FPGA Programmable Array
  • the embodiment of the invention further provides a signal output method, including:
  • the coded modulator converts the input baseband signal into two constant envelope signals, and converts the two constant envelope signals from the multi-bit signal to the single-bit signal through digital signal modulator DSM encoding and pulse width modulator PWM coding;
  • the digital up-conversion module upconverts two single-bit signals output by the coded modulator in the digital domain, moves the two single-bit signals to the carrier frequency, and combines the single-bit IQ complex signals of each single-bit signal into a single bit.
  • the high-speed serial transmitter module converts two constant envelope signals from digital signals to analog signals and outputs them to a band-pass filter.
  • the band-pass filter filters out the out-of-band signals modulated by the code modulator and recovers the difference.
  • the phase-decomposed two-way constant envelope signal is input to the power amplifier module, wherein the passband bandwidth of the bandpass filter is a decomposition bandwidth of the two modulators of the constant envelope signal converted by the code modulator;
  • the power amplifier module power-amplifies and inputs two constant envelope signals output from the band pass filter To the passive combination module, the passive combination module combines and outputs the two constant envelope signals output by the power amplifier module.
  • the original LINC transmitter is modified, the concept of the digital transmitter is introduced, the transmitter link is simplified under the condition of ensuring high efficiency, and the original analog-to-digital converter is replaced by using digital modulation technology.
  • IQ modulator and a large number of RF links its structural complexity, transmitter cost will be greatly reduced, easy to integrate and commercial; in addition, the higher frequency of the digital domain output signal makes the adjustment accuracy of the branch delay higher, which is beneficial to the branch balance.
  • Sexual modulation is provided.
  • the technical solution of the embodiment of the present invention can greatly improve the coding efficiency because the out-of-band signal can be filtered out before the power amplifier, and at the combined output, due to the speciality of the outphasing algorithm. Sex, out-of-band noise is cancelled, making digital pre-distortion of the system easy to implement.
  • FIG. 1 is a schematic diagram of a basic architecture of a LINC transmitter in the prior art
  • FIG. 3 is a schematic structural diagram of a transmitter according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the principle of an efficient transmitter according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a transmitter according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of an OUTPHASING processing module according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a DSM/PWM encoding module according to an embodiment of the present invention.
  • FIG. 8 is a flowchart of a signal output method according to an embodiment of the present invention.
  • an embodiment of the present invention provides a code modulator implemented by combining Outphasing and DSM/PWM, and a single-bit all-digital transmitter device composed thereof: by Outphasing decomposition at a low sampling rate , high sampling rate on DSM / PWM encoding, modulation.
  • the constant envelope signal is recovered by the filter and output to the high efficiency LINCPA.
  • FIG. 3 is a schematic structural diagram of a transmitter according to an embodiment of the present invention.
  • a transmitter according to an embodiment of the present invention includes: a code modulator (ie, a subordinate) Digital coded modulator 30), digital up-conversion module 31, high-speed serial transmitter module 32, bandpass filter 33, power amplifier module (ie, LINCPA described below) 34, and passive combining module 35, in the following embodiments of the present invention Each module is described in detail.
  • the code modulator 30 is configured to convert the input baseband signal into two constant envelope signals, and convert the two constant envelope signals from the multi-bit signal to a single by the digital signal modulator DSM encoding and the pulse width modulator PWM encoding.
  • the bit signal; the code modulator 30 specifically includes: a heterogeneous processing module and an encoding module, specifically:
  • a heterogeneous processing module configured to oversample an input baseband signal and pass the signal
  • the number separation algorithm performs out-of-phase decomposition to convert one baseband signal into two constant envelope signals
  • the heterogeneous processing module is specifically configured to extract the phase and amplitude information of the input baseband signal by using a coordinate rotation digital calculation method, and The amplitude information is converted into phase information, and finally two kinds of phase information are input to the phase modulator, and two constant envelope signals are output.
  • the coding module is configured to perform oversampling and noise shaping processing on the two constant envelope signals by DSM coding, perform PWM processing on the signal after the noise shaping processing, and perform parallel-to-serial conversion.
  • the coding module specifically includes: a DSM coding module and a PWM coding module, specifically:
  • the DSM encoding module is configured to perform oversampling and noise shaping processing on the two constant envelope signals by DSM encoding, and compress the bits of the two constant envelope signals from M bits to N bits, where 1 ⁇ N ⁇ M;
  • the PWM coding module is configured to perform a table lookup operation by using two N-bit constant envelope signals as a table lookup address, and perform parallel-to-serial conversion of the data, and output two single-bit signals according to the result of the look-up table (the single-bit signal is IQ complex signal).
  • the digital up-conversion module 31 is configured to up-convert the two single-bit signals output by the code modulator 30 in the digital domain, to move the two single-bit signals to the carrier frequency, and to multiply the single-bit IQ of each single-bit signal.
  • the signals are combined into a single bit real signal and output to the high speed serial transmitter module 32;
  • the high speed serial transmitter module 32 is configured to convert two constant envelope signals from a digital signal to an analog signal, and output to the band pass filter 33;
  • the bandpass filter 33 is configured to filter out the out-of-band signal modulated by the code modulator and recover the two-way constant envelope signal after the out-of-phase decomposition, wherein the passband bandwidth of the bandpass filter is
  • the code modulator converts the decomposition bandwidth of two constant envelope signals
  • the band-pass filter requires the filtered signal to be a constant envelope. In order to improve the overall system efficiency, it is required to filter out the out-of-band signal as much as possible. Therefore, the passband bandwidth of the bandpass filter is required.
  • the outphasing decomposition bandwidth for the out-of-phase processing module is required.
  • the power amplifier module 34 is configured to perform power amplification on the two constant envelope signals output by the band pass filter 33;
  • the passive combining module 35 is configured to combine and output the two constant envelope signals output by the power amplifier module 34.
  • the passive combination module 35 includes an isolation combiner or a non-isolated combiner.
  • the system mainly includes three parts: a digital code modulator (Digital Encode Modulator), a filter, and a LINCPA.
  • the digital modulator performs digital modulation in the digital domain, generates a modulated digital signal, and generates two constant envelope signals to drive LINCPA through filtering.
  • the LINCPA mainly works in a saturated region, and has characteristics of high efficiency, flexibility, reconfigurability, and high linearity.
  • DSM digital-sigma modulator
  • PWM pulse-width modulator
  • OUTPHASING is decomposed and the peak-to-average ratio signal (the envelope varies greatly) is converted into two constant envelope signals by the Signal Separation Algorithm (SCS). Although both paths generate a noise signal that occupies the decomposition bandwidth, the noise cancels each other after the LINCPA combines.
  • SCS Signal Separation Algorithm
  • DSM can modulate multi-bit input signals into low-bit outputs by oversampling (ie, sampling rates are many times higher than signal bandwidth) and noise shaping techniques (quantization noise is mainly distributed out-of-band with low in-band noise).
  • the signal can maintain the signal to noise ratio (SNR) performance of the signal.
  • SNR signal to noise ratio
  • the PWM compares the signal with a comparison wave of a certain frequency, and generates a low-bit or single-bit output signal according to the comparison result, and is also a signal coding modulation technique.
  • the signal-separation algorithm can change the variable envelope signal into two constant envelope signals, and then perform the latter two coding techniques (DSM/PWM) on the two signals, and the constant-envelope multi-bit signal, Convert to a single-bit signal, then pass the bandpass filter and enter LINCPA.
  • DSM/PWM Digital to Analog Converter
  • the DAC Digital to Analog Converter
  • the analog up-conversion structure can be omitted by (DSM/PWM), and then the constant envelope signal can be recovered by the filter to further improve the coding efficiency.
  • LINCPA it achieves high power amplifier efficiency.
  • FIG. 5 is a schematic structural diagram of a transmitter according to an embodiment of the present invention. As shown in FIG. 5, the method specifically includes:
  • the OUTPHASING processing module oversamples the baseband signal, and at the lower sampling rate, performs OUTPHASING decomposition on the signal, and converts one signal into two constant envelope signals, both of which contain information of the original signal, and phase
  • the opposite noise signal when passing through the combiner, the opposite phase noise signals cancel each other out, thereby recovering the original signal.
  • the 502 module is an OUTPHASING processing module, and the amplitude information of the input peak-to-average ratio signal is converted into additional phase information of the two sub-signals S1 and S2.
  • the OUTPHASING processing module 601 uses the cordic algorithm to extract the phase and amplitude information of the input signal, converts the amplitude information into phase information through the 602 lookup table, and finally inputs the two phase information to the phase modulator. 603, output two phase modulation signals of Hengbao.
  • the DSM ⁇ PWM processing module the DSM processing module mainly performs oversampling and noise shaping processing on the previous two M-bit constant envelope data, and compresses it to N bits (M>N) to ensure that the near-end noise floor is sufficiently low. Then, the table-and-table method is used to realize the coding and modulation of the PWM signal.
  • the input N-bit data is used as the address of the lookup table, and the content outputted after the look-up table is used as the PWM pulse width modulation signal.
  • the PWM processing module realizes parallel-to-serial conversion of data in the process of implementing input data look-up, converting N-bit data into single-bit output, and multi-bit output in multi-level applications. However, the number of bits is less than N, and the data rate is also increased by 2 ⁇ N times of the principle.
  • the 503 module is a DSM/PWM encoding module, and encodes and modulates a multi-bit signal of an input signal to perform noise shaping processing, and the input signal is M-bit data, and the output signal is an N-bit signal (M >N).
  • 701 is DSM encoding. Module, which performs shaping filtering on quantization noise, which can be first-order, second-order or even higher-order noise shaping, and the output is an N-bit model.
  • the 702 module is a PWM module, which performs PWM processing on the input signal and implements parallel-to-serial conversion.
  • the input signal is an N-bit signal
  • the output signal is a single bit.
  • the digital up-conversion module 504 implements a "sampling rate/4" up-conversion function in the digital domain, and combines the IQ complex signal into a single-channel real-signal output while moving the signal to the carrier frequency, wherein the sampling rate refers to the PWM processing module.
  • the data rate of the output signal is a "sampling rate/4" up-conversion function in the digital domain, and combines the IQ complex signal into a single-channel real-signal output while moving the signal to the carrier frequency, wherein the sampling rate refers to the PWM processing module.
  • the data rate of the output signal is a "sampling rate/4" up-conversion function in the digital domain, and combines the IQ complex signal into a single-channel real-signal output while moving the signal to the carrier frequency, wherein the sampling rate refers to the PWM processing module. The data rate of the output signal.
  • the high speed serial transmitter (Serdes) module 505 takes the signal from digital to analog. Different from the traditional digital-to-analog conversion of DAC devices, the digital logic circuit chip integrated high-speed serial transmitter (Serdes) is used to convert digital signals to analog signals.
  • the two-way bandpass filter 506 filters out the out-of-band harmonics generated by the PWM/DSM modulation, and retains the branch signal decomposed by the OUTPHASING in the band to restore the analog signal of the constant envelope.
  • Power amplifier module 507 LINCPA mainly refers to the two-way consistency of high-efficiency power amplifiers (C, D, E, F), this power amplifier module works in saturation state, driven by constant envelope signal, the efficiency is very high.
  • the passive combining module 508 is mainly an isolated and non-isolated combiner realized by a coupling transmission line. Considering the improvement of the combining efficiency, the Cherix combiner with the compensation angle can be used according to the peak-to-average ratio of the input signal.
  • the OUTPHASING and DSM operating operating clock rates are relatively low, and high-order DSMs can be used to further suppress near-end noise.
  • the PWM module is composed of A very small lookup table implementation, very high precision, and the resulting signal performance is also very good.
  • the multi-channel single-bit signal in the digital domain can be converted from digital to analog domain by multi-channel Serdes, and then bandpass filtered with a passband bandwidth of 60M.
  • the OUTPHASING constant envelope signal is restored to the high-efficiency power amplifier module of the subsequent stage to achieve power amplification.
  • the high efficiency (with compensation angle) Cherix isolation combiner combines to improve the combined efficiency, which is consistent with the traditional LINCPA.
  • the digital part has a feedback branch, due to the special nature of OUTPHASING decomposition synthesis, and band pass filtering.
  • the filter filters out the out-of-band modulation signal so that digital pre-distortion can be done before digital modulation (before OUTPHASING decomposition) in a manner consistent with traditional architecture.
  • the out-of-band signal can be filtered out before the power amplifier, the coding efficiency is greatly improved, and at the combined output, due to the particularity of the OUTPHASING algorithm, the out-of-band noise is Offseting makes the digital predistortion of the system easy to implement.
  • FIG. 8 is a flowchart of a signal output method according to an embodiment of the present invention. As shown in FIG. 8, the present invention is implemented according to the present invention.
  • the signal output method of the example includes the following processing:
  • Step 801 the code modulator converts the input baseband signal into two constant envelope signals, and communicates Over digital signal modulator DSM encoding and pulse width modulator PWM encoding converts two constant envelope signals from a multi-bit signal to a single-bit signal;
  • step 801 includes the following processing:
  • Step 1 The heterogeneous processing module oversamples the input baseband signal, and performs heterogeneous decomposition by the signal separation algorithm to convert one baseband signal into two constant envelope signals; specifically, the heterogeneous processing module uses coordinate rotation
  • the digital calculation method extracts the phase and amplitude information of the input baseband signal, converts the amplitude information into phase information by looking up the table, and finally inputs the two phase information to the phase modulator to output two constant envelope signals.
  • Step 2 The encoding module oversamples and forms the two-way constant envelope signal by DSM encoding, performs PWM processing on the signal after the noise shaping process, and performs parallel-to-serial conversion. Specifically, the following processing is included:
  • the DSM encoding module oversamples and noises the two constant envelope signals by DSM encoding, and compresses the bits of the two constant envelope signals from M bits to N bits, where 1 ⁇ N ⁇ M;
  • the PWM coding module performs a table lookup operation by using two N-bit constant envelope signals as a table lookup address, and performs parallel-to-serial conversion of the data. According to the result of the look-up table, two single-bit signals are outputted (the single-bit signal is an IQ complex number). signal).
  • Step 802 the digital up-conversion module up-converts two single-bit signals outputted by the code modulator in the digital domain, moves two single-bit signals to a carrier frequency, and converts a single-bit IQ complex signal in each single-bit signal. Merged into a single-bit real signal, output to a high-speed serial transmitter module;
  • Step 803 the high-speed serial transmitter module converts two constant envelope signals from a digital signal into an analog signal, and outputs the signal to a band pass filter, and the band pass filter filters out the out-of-band signal modulated by the code modulator, and Restore the two-way constant envelope signal after the heterogeneous decomposition, and input it to the power amplifier module;
  • Step 804 the power amplifier module power-amplifies the two-way constant envelope signals output by the band-pass filter, and inputs the signals to the passive combining module, and the passive combining module outputs the two-way constant envelope of the power amplifier module.
  • the signals are combined and output.
  • the passive combination module includes: an isolation combiner, or a non-isolated combiner.
  • the digital modulator performs digital modulation in the digital domain to generate a modulated digital signal, and generates two constant envelope signals to drive LINCPA through filtering.
  • the LINCPA mainly works in a saturated region, and has high efficiency, flexibility and reconfigurability. High linearity and other characteristics.
  • DSM digital-sigma modulator
  • PWM pulse-width modulator
  • OUTPHASING is decomposed and the peak-to-average ratio signal (the envelope varies greatly) is converted into two constant envelope signals by the Signal Separation Algorithm (SCS). Although both paths generate a noise signal that occupies the decomposition bandwidth, the noise cancels each other after the LINCPA combines.
  • SCS Signal Separation Algorithm
  • DSM can modulate multi-bit input signals into low-bit outputs by oversampling (ie, sampling rates are many times higher than signal bandwidth) and noise shaping techniques (quantization noise is mainly distributed out-of-band with low in-band noise).
  • the signal can maintain the signal to noise ratio (SNR) performance of the signal.
  • SNR signal to noise ratio
  • the PWM compares the signal with a comparison wave of a certain frequency, and generates a low-bit or single-bit output signal according to the comparison result, and is also a signal coding modulation technique.
  • the signal-separation algorithm can change the variable envelope signal into two constant envelope signals, and then perform the latter two coding techniques (DSM/PWM) on the two signals, and the constant-envelope multi-bit signal, Convert to a single-bit signal, then pass the bandpass filter and enter LINCPA.
  • DSM/PWM Digital to Analog Converter
  • the analog up-conversion structure can be omitted by (DSM/PWM), and then the constant envelope signal can be recovered by the filter to further improve the coding efficiency.
  • LINCPA it achieves high power amplifier efficiency.
  • FIG. 5 is a detailed structural diagram of a transmitter according to an embodiment of the present invention, as shown in FIG. include:
  • the OUTPHASING processing module oversamples the baseband signal, and at the lower sampling rate, the signal is subjected to OUTPHASING decomposition, and one signal is converted into two constant envelope signals, both of which contain the original signal information and the opposite phase.
  • the noise signal when passing through the combiner, the opposite phase noise signals cancel each other out, thereby recovering the original signal.
  • the 502 module is an OUTPHASING processing module, and the amplitude information of the input peak-to-average ratio signal is converted into additional phase information of the two sub-signals S1 and S2.
  • the OUTPHASING processing module 601 uses the cordic algorithm to extract the phase and amplitude information of the input signal, converts the amplitude information into phase information through the 602 lookup table, and finally inputs the two phase information to the phase modulator. 603, output two phase modulation signals of Hengbao.
  • the DSM ⁇ PWM processing module mainly performs oversampling and noise shaping processing on the previous two M-bit constant envelope data, and compresses it to N bits (M>N) to ensure that the near-end noise floor is sufficiently low. Then, the table-and-table method is used to realize the coding and modulation of the PWM signal.
  • the input N-bit data is used as the address of the lookup table, and the content outputted after the look-up table is used as the PWM pulse width modulation signal. It should be noted here that the PWM processing module realizes the parallel-to-serial conversion of data in the process of implementing the input data look-up table, and converts the N-bit data into a single-bit output.
  • the 503 module is a DSM/PWM encoding module, and encodes and modulates a multi-bit signal of an input signal to perform noise shaping processing, and the input signal is M-bit data, and the output signal is an N-bit signal (M >N).
  • 701 is a DSM encoding module, and the module performs shaping filtering on the quantization noise, which may be first-order, second-order or even higher-order noise shaping, and the output is an N-bit model.
  • the 702 module is a PWM module, which performs PWM processing on the input signal and implements parallel-to-serial conversion.
  • the input signal is an N-bit signal
  • the output signal is a single bit.
  • the digital up-conversion module implements the “sampling rate/4” up-conversion function in the digital domain, and combines the IQ complex signal into a single-channel real-signal output while moving the signal to the carrier frequency.
  • the sampling rate refers to the PWM processing module output signal. Data rate.
  • the high-speed serial transmitter (Serdes) module takes the signal from digital to analog. Different from the traditional digital-to-analog conversion of DAC devices, the digital logic circuit chip integrated high-speed serial transmitter (Serdes) is used to convert digital signals to analog signals.
  • the two-band bandpass filter filters the out-of-band harmonics generated by the PWM/DSM modulation, while retaining the branch signal decomposed by the OUTPHASING in the band, and restores the analog signal into a constant envelope.
  • the power amplifier module LINCPA mainly refers to two well-consistent high-efficiency power amplifiers (C, D, E, F). This power amplifier module works in a saturated state and is driven by a constant envelope signal with high efficiency.
  • the passive combination module is mainly an isolated and non-isolated combiner realized by a coupling transmission line. Considering the improvement of the combining efficiency, the Cherix combiner with the compensation angle can be used according to the peak-to-average ratio of the input signal.
  • the OUTPHASING and DSM operating operating clock rates are relatively low, and high-order DSMs can be used to further suppress near-end noise.
  • the PWM module is implemented by a very small lookup table, which is very accurate and produces very good signal performance.
  • the multi-channel single-bit signal in the digital domain can be converted from digital to analog domain by multi-channel Serdes, and then bandpass filtered with a passband bandwidth of 60M.
  • the OUTPHASING constant envelope signal is restored to the high-efficiency power amplifier module of the subsequent stage to achieve power amplification.
  • the high efficiency (with compensation angle) Cherix isolation combiner combines to improve the efficiency of the combination, which is consistent with the traditional LINCPA.
  • the digital part also has a feedback branch due to OUTPHASING.
  • the special nature of the decomposition synthesis, as well as the bandpass filter filtering out the out-of-band modulation signal, allows digital pre-distortion to be done before digital modulation (before OUTPHASING decomposition) in a manner consistent with traditional architectures.
  • the out-of-band signal can be filtered out before the power amplifier, the coding efficiency is greatly improved, and at the combined output, due to the particularity of the OUTPHASING algorithm, the out-of-band noise is Offseting makes the digital predistortion of the system easy to implement.
  • modules in the client in the embodiment can be adaptively changed and placed in one or more clients different from the embodiment.
  • the modules in the embodiments can be combined into one module, and further they can be divided into a plurality of sub-modules or sub-units or sub-components.
  • any combination of the features disclosed in the specification, including the accompanying claims, the abstract and the drawings, and any methods so disclosed, or All processes or units of the client are combined.
  • Each feature disclosed in this specification may be replaced by alternative features that provide the same, equivalent or similar purpose.
  • the various component embodiments of the present invention may be implemented in hardware, or in a software module running on one or more processors, or in a combination thereof.
  • a microprocessor or digital signal processor can be used in practice to implement one of some or all of the components loaded with the ordered web address in accordance with an embodiment of the present invention.
  • the invention can also be implemented as a device or device program (e.g., a computer program and a computer program product) for performing some or all of the methods described herein.
  • Such a program implementing the invention may be stored on a computer readable medium or may be in the form of one or more signals. Such signals may be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.
  • the original LINC transmitter is modified, the concept of the digital transmitter is introduced, the transmitter link is simplified under the condition of ensuring high efficiency, and the original analog-to-digital converter is replaced by using digital modulation technology.
  • IQ modulator and a large number of RF links its structural complexity, transmitter cost will be greatly reduced, easy to integrate and commercial; in addition, the higher frequency of the digital domain output signal makes the adjustment accuracy of the branch delay higher, which is beneficial to the branch balance.
  • Sexual modulation is provided.
  • the technical solution of the embodiment of the present invention can greatly improve the coding efficiency because the out-of-band signal can be filtered out before the power amplifier, and at the combined output, due to the speciality of the outphasing algorithm. Sex, out-of-band noise is cancelled, making digital pre-distortion of the system easy to implement.

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  • Transmitters (AREA)

Abstract

L'invention concerne un émetteur et un procédé de sortie de signal. L'émetteur comporte: un modulateur de codeur, un module numérique de conversion ascendante, un module émetteur série à grande vitesse, un filtre passe-bande, un module amplificateur de puissance et un module combinateur passif. Au moyen de la solution technique de la présente invention, le rendement de codage est considérablement amélioré, la distorsion numérique préalable d'un système est facilement réalisée, et la complexité et les coûts de structure de l'émetteur sont considérablement réduits, facilitant ainsi l'intégration et l'utilisation commerciale; de plus, la précision de réglage du retard temporel de branches est relativement élevée, ce qui est bénéfique pour la modulation de l'équilibre des branches.
PCT/CN2016/074298 2015-09-06 2016-02-22 Émetteur et procédé de sortie de signal WO2016165486A1 (fr)

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CN201510559348.9A CN106506014B (zh) 2015-09-06 2015-09-06 发射机及信号输出方法

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US9985667B1 (en) * 2017-04-24 2018-05-29 Mitsubishi Electric Research Laboratories, Inc. Inter-band CA digital transmitter with multi-stage out-of-band noise canceller
CN111566940B (zh) * 2017-12-22 2021-08-13 华为技术有限公司 一种信号处理电路、射频信号发射机和通信设备
CN110429985B (zh) * 2018-05-15 2022-12-09 东南大学 一种全集成低成本高速高精度异相调制器
CN110719115B (zh) * 2019-09-29 2021-09-10 中国工程物理研究院电子工程研究所 一种基于fpga的数字射频发射机

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