Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
  • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
  • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
  • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
  • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
  • G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
  • G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
  • G01R19/16547—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies voltage or current in AC supplies
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
  • G06F1/26—Power supply means, e.g. regulation thereof
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
  • G06F1/26—Power supply means, e.g. regulation thereof
  • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
  • G06F1/26—Power supply means, e.g. regulation thereof
  • G06F1/32—Means for saving power
  • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
  • G06F1/3234—Power saving characterised by the action undertaken
  • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/0003—Details of control, feedback or regulation circuits
  • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
  • H02M7/02—Conversion of AC power input into DC power output without possibility of reversal
  • H02M7/04—Conversion of AC power input into DC power output without possibility of reversal by static converters
  • H02M7/12—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M7/21—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M7/217—Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03K—PULSE TECHNIQUE
  • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
  • H03K19/003—Modifications for increasing the reliability for protection
  • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
  • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

• This invention relates generally to droop detectors, and more specifically, to a droop detector configured as a multi-input, multi-stage scalable rectifier.
• integrated circuits receive power from an external power source.
• These integrated circuits include multiple cores, each of which may be powered by a different external power supply with respect to the others.
• the different cores may operate at different supply voltages.
• Droop may be defined as a transitory reduction in the supply voltage for a given core. Droops may be caused by one or more factors, such as the simultaneous switching of a number of circuits, temperature variations and so forth. Circuitry subject to a power supply droop may experience erroneous operation (e.g., timing failures). Failures resulting from power supply droop may be considered soft failures, since they are not always repeatable in the absence of the drop in the supply voltage. Determining the cause and characterizing such failures may be difficult. However, droops on supplies for cores of a central processing unit (CPU) can lead to computational errors if left uncorrected.
• CPU central processing unit
• FIG. 1 A is a functional block diagram of a system for detecting droops in the supply voltages and appropriately adjusting the clock frequency in accordance with one embodiment of the present disclosure
• FIG. IB is a functional block diagram of a system for detecting droops in the supply voltages and appropriately adjusting the clock frequency in accordance with another embodiment of the present disclosure
• FIG. 2A is a functional block diagram of the droop detector including a plurality of detector modules in accordance with one embodiment of the present disclosure
• FIG. 3 A shows a connection of the outputs of the two detector modules in the droop detector in accordance with one embodiment of the present disclosure
• FIG. 4 is a functional block diagram of an apparatus configured to detect droops using a multi-input, multi-stage scalable detector with a non-linear feedback to disable stages with no droop transitions to avoid gain degradation in accordance with one embodiment of the present disclosure.
• an average current drawn by a core may increase substantially if the number of instructions to be processed is significantly increased.
• the supply voltage is expected to be lower than its nominal value by an amount equal to the increase in the average current multiplied by the resistance of the power distribution network.
• the reduction in the supply voltage is expected and the core/CPU should be designed to work under such conditions.
• a droop on the supply voltage occurs while the core/CPU transitions from processing a few instructions to processing a large quantity of instructions.
• a droop is a transitory (typically much larger) reduction in the supply voltage.
• Embodiments as described herein provide for detecting droops using a multi- input, multi-stage scalable rectifier with a non-linear feedback to disable stages with no droop transitions to avoid gain degradation.
• Outputs of the detector modules 132, 134, 136, 138 are tied together to form a single output (V out ) for the droop detector 130.
• the output of the detector modules 132, 134, 136, 138 (V out ) is coupled to one of the inputs of the comparator 140, which compares V out with a reference voltage (V ref ) and outputs a control signal (V con troi) when V ou t falls below V re f.
• the outputs of the detector modules 132, 134, 136, 138 (V out ) are coupled to the comparator 140 through a bandpass filter 142 to only pass frequencies of the output voltage within a predetermined range.
• the output signal of the comparator 140 selects the divide-by-N output of the PLL at the diplexer 156 (selects " 1" input). Otherwise, the output signal of the comparator 140 selects the direct output of the PLL at the diplexer 156 (selects "0" input).
• the output of the clock generator 150 is tied to the clock inputs of the plurality of cores 122, 124, 126, 128.
• Each detector module 132, 134, 136, or 138 includes an input terminal (A) coupled to each input node (in 0 , ini, in 2 , ... , or in n ), an output terminal (B) coupled to the output node (out), and an input tracking unit 220 coupled to the input terminal (A) and the output terminal (B).
• the droop detector 130 further includes a comparator 140 configured to receive and compare the output voltage (V ou t) to a reference voltage (V re f).
• V ou t the output voltage
• V re f the reference voltage
• the outputs of the detector modules 132, 134, 136, 138 (V out ) can be coupled to the comparator 140 through a bandpass filter 142 to only pass frequencies of the output voltage within a predetermined range.
• Current sources 250, 252 provide an appropriate amount of current for proper operation of the detector module 130.
• the current source 252 is coupled to a voltage source (V D D) and the source terminal of the PMOS transistor 224.
• the current source 250 is coupled to the voltage source and the PMOS transistor 232.
• FIG. 3 A shows a connection of the outputs of the two detector modules 132, 134 in the droop detector 130 in accordance with one embodiment of the present disclosure.
• the detector module 132 receives supply voltage Vddo, while the detector module 134 receives supply voltage Vddi. Further, the output terminal 312 of the detector module 132 is connected to the output terminal 314 of the detector module 134.
• FIG. 3B shows the operation of the two detector modules 132, 134 connected together at an output node 310 in accordance with one example embodiment of the present disclosure.
• the detector module 132 receives supply voltage Vdd 0 , which includes droop 350 from a nominal voltage, while the detector module 134 receives supply voltage Vddi, with no droop 354 in the voltage.
• the non-linear feedback loop 370 of each detector module is configured to temporarily disable detector modules that are detecting no droop (e.g., input 354) at their respective inputs while other detector modules are detecting a droop at their respective inputs (e.g., input 350).
• the PMOS transistor 224 1 By turning the PMOS transistor 224 1 off and temporarily disconnecting (see
• FIG. 4 is a functional block diagram of an apparatus 400 configured to detect droops using a multi-input, multi-stage scalable detector with a non-linear feedback to disable stages with no droop transitions to avoid gain degradation in accordance with one embodiment of the present disclosure.
• the apparatus 400 includes multiple supply voltage receiving units 410, an output coupling unit 420, and multiple detector modules 430.
• Each supply voltage receiving unit 410 is configured to receive a supply voltage (Vddo, Vddi, V dd 2, ... , or V dd n)-
• the output coupling unit 420 is configured to couple the outputs of the multiple detector modules 430 and output an output voltage (V out ) at an output terminal.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• General Physics & Mathematics (AREA)
• Theoretical Computer Science (AREA)
• General Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Computer Hardware Design (AREA)
• Computing Systems (AREA)
• Mathematical Physics (AREA)
• Measurement Of Current Or Voltage (AREA)

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Citations (4)

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• 2015
  • 2015-03-27 US US14/670,996 patent/US9680391B2/en active Active
• 2016
  • 2016-03-25 CN CN201680017013.7A patent/CN107407700B/zh active Active
  • 2016-03-25 WO PCT/US2016/024189 patent/WO2016160559A1/en not_active Ceased
  • 2016-03-25 EP EP16715947.4A patent/EP3274728B1/en active Active
  • 2016-03-25 JP JP2017550179A patent/JP6732786B2/ja not_active Expired - Fee Related
  • 2016-03-25 KR KR1020177027097A patent/KR102479541B1/ko active Active

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