WO2016134573A1 - 一种集成电路功耗测试系统和方法 - Google Patents

一种集成电路功耗测试系统和方法 Download PDF

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WO2016134573A1
WO2016134573A1 PCT/CN2015/083364 CN2015083364W WO2016134573A1 WO 2016134573 A1 WO2016134573 A1 WO 2016134573A1 CN 2015083364 W CN2015083364 W CN 2015083364W WO 2016134573 A1 WO2016134573 A1 WO 2016134573A1
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data
power consumption
integrated circuit
working
test board
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PCT/CN2015/083364
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English (en)
French (fr)
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方向明
杨志炜
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深圳市中兴微电子技术有限公司
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Publication of WO2016134573A1 publication Critical patent/WO2016134573A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing

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  • the present invention relates to integrated circuit testing techniques, and more particularly to an integrated circuit power consumption testing system and method.
  • a power consumption testing method includes: using a milliohm resistor in series to the power supply path, and then using a multimeter to test the voltage across the two ends for current and power consumption calculation;
  • the drawback is that the work caused by the manual measurement method is complicated and the human error is easily introduced.
  • Another power consumption test method is: using a digital voltage source and an ammeter to build an automatic test system; this method is mostly used for whole machine testing.
  • the problem with this method is that since the integrated circuit has many types of power supply voltage, it needs to be used a lot. Voltmeters, ammeters, and cluttered wiring result in increased test costs.
  • embodiments of the present invention are expected to provide an integrated circuit power consumption test system and method. It can solve the problem of automatic power consumption testing of integrated circuits in multiple working scenarios.
  • An embodiment of the present invention provides an integrated circuit power consumption test system, including: a host computer, a power consumption test board, and an integrated circuit test board;
  • the upper computer is configured to set voltage data of the integrated circuit under test and a plurality of working scene data, and output the voltage data and the plurality of working scene data to the power consumption test board;
  • the power consumption test board is configured to receive the voltage data and the plurality of working scene data, output a voltage to the integrated circuit test board according to the voltage data, and output the plurality of working scene data to the An integrated circuit test board; configured to receive each working scene data from the integrated circuit test board, and synchronously collect current data of the integrated circuit under test in each working scenario, according to the voltage data and the current Data calculating power consumption data of the integrated circuit under test in each working scenario;
  • the integrated circuit test board is configured to receive the voltage and the plurality of working scene data, and sequentially test each working scene according to the plurality of working scene data, and at a moment when each working scene starts Each of the work scene data is output to the power consumption test board.
  • the power consumption test board includes:
  • a central processing unit configured to receive the voltage data and the plurality of working scene data, and output the power consumption data of each of the working scene data and the integrated circuit under test in each working scene to the upper computer ;
  • a field programmable gate array configured to output the plurality of operational scene data to the integrated circuit test board, receive each of the operational scene data from the integrated circuit test board, and according to the voltage data and the The current data calculates power consumption data of the integrated circuit under test in each working scenario;
  • a programmable power chip configured to output the voltage to the integrated circuit test board according to the voltage data
  • the current sampling circuit is configured to synchronously collect current data of the integrated circuit under test in each working scenario.
  • the power consumption test board is further configured to store and display the power consumption data of each of the work scene data and the integrated circuit under test in each work scene, and output the work scene data and The power consumption data of the integrated circuit under test in each working scenario is sent to the upper computer.
  • the power consumption test board further includes:
  • a memory configured to store the power consumption data of each of the working scene data and the integrated circuit under test in each working scenario
  • a liquid crystal display configured to display the power consumption data of each of the working scene data and the integrated circuit under test in each working scene.
  • the integrated circuit test board includes:
  • a power line interface configured to receive the voltage from the power consumption test board
  • the integrated circuit under test is configured to receive the plurality of working scene data from the power consumption test board, and sequentially test each working scene according to the plurality of working scene data, and start at each working scene The moment of the output outputs the each work scene data to the power consumption test board.
  • the host computer is further configured to receive the power consumption data of each of the working scene data from the power consumption test board and the integrated circuit under test in each working scene, and generate each of the work.
  • the power consumption report and power consumption curve of the scene are further configured to receive the power consumption data of each of the working scene data from the power consumption test board and the integrated circuit under test in each working scene, and generate each of the work. The power consumption report and power consumption curve of the scene.
  • the embodiment of the present invention further provides an integrated circuit power consumption testing method, including: setting voltage data of the integrated circuit under test and multiple working scene data; the method further includes:
  • the power consumption test board receives the output voltage according to the voltage data to the integrated circuit test board, and outputs the plurality of working scene data to the integrated circuit test board;
  • the integrated circuit test board sequentially pairs each work scene according to the plurality of work scene data Performing a test, and outputting each of the work scene data to the power consumption test board at a time when each of the work scenes starts;
  • the power consumption test board synchronously collects current data of the integrated circuit under test in each working scenario, and calculates power consumption data of the integrated circuit under test in each working scenario according to the voltage data and the current data.
  • the power consumption test board stores and displays the power consumption data of each of the work scene data and the integrated circuit under test in each work scene, and outputs the work work data and each work scene.
  • the power consumption data of the integrated circuit under test is sent to the host computer.
  • the upper computer receives the power consumption data of each of the working scene data from the power consumption test board and the integrated circuit under test in each working scene, and generates a power consumption situation report of each working scene and Power consumption curve.
  • the voltage data of the integrated circuit under test and the plurality of working scene data are set; the power consumption test board outputs a voltage according to the voltage data to the integrated circuit test board, and outputs And the plurality of working scene data is tested to the integrated circuit test board; the integrated circuit test board sequentially tests each working scene according to the plurality of working scene data, and outputs the time at the beginning of each working scene Each of the working scene data is sent to the power consumption test board; the power consumption test board synchronously collects current data of the integrated circuit under test in each working scenario, and calculates the integrated measurement under each working scenario. Power consumption data of the circuit.
  • the embodiments of the present invention enable the integrated circuit power consumption test to get rid of the cumbersome workload of manual measurement, thereby reducing the error of manual measurement.
  • the present invention Embodiments can also automatically perform power consumption tests in multiple work scenarios.
  • FIG. 1 is a schematic structural diagram of a power consumption test system of an integrated circuit according to an embodiment of the present invention
  • FIG. 2 is a schematic flowchart of an implementation process of an integrated circuit power consumption test method according to an embodiment of the present invention.
  • the voltage data of the integrated circuit under test and the plurality of working scene data are first set; the power consumption test board outputs a voltage according to the voltage data to the integrated circuit test board, and outputs the plurality of working scene data to The integrated circuit test board: the integrated circuit test board sequentially tests each work scene according to the plurality of work scene data, and outputs the work work data to the start time of each work scene to The power consumption test board synchronously collects current data of the integrated circuit under test in each working scenario, and calculates power consumption data of the integrated circuit under test in each working scenario.
  • the setting of the voltage data of the integrated circuit under test and the plurality of working scene data may be completed by the host computer, and after the setting is completed, the upper opportunity outputs the voltage data and the plurality of working scene data to the power consumption test board.
  • the work data of each of the working scenes and the power consumption of the integrated circuit under each working scene may be stored and displayed; and the upper level may be The machine outputs the power consumption data of each working scene data and the integrated circuit under test in each working scene.
  • the integrated circuit power consumption test system includes: a host computer 110, a power consumption test board 120, and an integrated circuit test board 130. .
  • the upper computer 110 is configured to set voltage data of the integrated circuit under test and a plurality of working scene data, and output the voltage data and the plurality of working scene data to the power consumption test board 120.
  • the host computer 110 uses the upper software to set voltage data, dynamic voltage adjustment data, and power-on sequence required for each circuit in the integrated circuit test board.
  • the voltage data includes the voltage of the integrated circuit under test in the integrated circuit test board 130 and the voltage of other circuits.
  • the upper computer 110 sets a plurality of working scene data of the integrated circuit under test using the upper software.
  • the work scene data may include: call scene data and standby scene data of the mobile phone.
  • the host computer 110 also uses the upper software to set the test time of the power consumption in each scene and the sampling frequency of the power consumption data.
  • the host computer 110 After the setting is completed, the host computer 110 simultaneously outputs the setting data and the power consumption test start command to the power consumption test board 120.
  • the host computer 110 is further configured to receive the each work scene data from the power consumption test board 120 and the power consumption data of the integrated circuit under test in each work scene. After that, the power consumption situation report and the power consumption curve of each work scene are generated.
  • each working scenario will be tested for a period of time, during which a large amount of the power consumption data will be generated.
  • the host computer 110 may be a personal computer (PC, Personal Computer).
  • the power consumption test board 120 is configured to receive the voltage data from the upper computer 110 and the plurality of working scene data, output a voltage according to the voltage data to the integrated circuit test board 130, and output
  • the plurality of work scenario data is sent to the integrated circuit test board 130; and configured to receive the work work data from the integrated circuit test board 130, and synchronously collect the integrated test under each work scenario.
  • the current data of the circuit calculates the power consumption data of the integrated circuit under test in each working scenario according to the voltage data and the current data.
  • the power consumption test board 120 is further configured to store and display each of the work fields And the power consumption data of the integrated circuit under test in each of the working scenarios, and outputting the power consumption data of each of the working scene data and the integrated circuit under test in each working scenario to the host computer 110 .
  • the power consumption test board 120 includes:
  • a central processing unit (CPU) 121 configured to receive the voltage data and the plurality of work scene data from the upper computer 110, and output the work scene data and each work The power consumption data of the integrated circuit under test in the scenario is sent to the host computer 110.
  • CPU central processing unit
  • the CPU 121 receives the voltage data from the upper computer 110, the plurality of working scene data, and the power consumption test start command through an RS-232 interface of a peripheral. After the CPU 121 analyzes the power consumption test start command, the control signal is output to a Field Programmable Gate Array (FPGA) 122. At the same time, the CPU 121 outputs the voltage data and the plurality of working scene data to the FPGA 122.
  • FPGA Field Programmable Gate Array
  • the CPU 121 After the CPU 121 receives the flag signal from the FPGA 122, the CPU 121 starts the reading of each working scene data in the memory 125 and the work of the integrated circuit under each working scene. The data is consumed, and the power consumption data is output to the upper computer 110 through an Ethernet interface of the peripheral device, and the each working scene data is output to the upper computer 110 through the RS-232 interface.
  • the CPU 121 may be a processor MPC8360
  • the RS-232 interface may be a DB9 socket
  • the Ethernet interface may be an RJ45 socket.
  • the FPGA 122 is configured to output the plurality of working scene data to the integrated circuit test board 130, receive each of the working scene data from the integrated circuit test board 130, and according to the voltage data and the The current data calculates power consumption data of the integrated circuit under test in each working scenario.
  • the FPGA 122 receives the control signal from the CPU 121, the Voltage data and the plurality of work scene data.
  • the FPGA 122 sequentially outputs the plurality of working scene data to the tested integrated circuit 132 in the integrated circuit test board 130 through a data line.
  • the FPGA 122 outputs the voltage data to the programmable power chip 123 to control the voltages required by the programmable power chip 123 to output the integrated circuit test board 130 according to the set power-on sequence.
  • the voltage of the integrated circuit under test is included.
  • the measured integrated circuit 132 in the integrated circuit test board 130 outputs the each working scene data to the FPGA 122 at the beginning of each of the working scenes.
  • the FPGA 122 then receives the each of the work scene data from the integrated circuit under test 132.
  • the FPGA 122 outputs the power consumption data of each of the working scene data and the integrated circuit under test in each working scene to a memory 125 and a liquid crystal display (LCD) 126.
  • the FPGA 122 can also receive power consumption test setting data manually received in the LCD 126.
  • the FPGA 122 When one or two areas of the memory 125 are full of data, the FPGA 122 generates a flag signal and outputs it to the CPU 121 so that the CPU 121 reads the data of the memory 125.
  • the data line may be an Ethernet port, a universal receiving output port, and a universal asynchronous transceiver.
  • the programmable power supply chip 123 is configured to output the voltage to the integrated circuit test board 130 based on the voltage data.
  • the programmable power chip 123 outputs the voltage to the power line interface 131 in the integrated circuit test board 130 through a power line.
  • the programmable power chip 123 can also be used to monitor the voltage of the integrated circuit 132 under test in the integrated circuit test board 130 and output to the FPGA 122, so that the FPGA 122 dynamically adjusts the measured according to the monitoring voltage.
  • the voltage of integrated circuit 132 The voltage of integrated circuit 132.
  • the current sampling circuit 124 is configured to synchronously collect current data of the integrated circuit under test in each working scenario.
  • the current sampling circuit 124 synchronously outputs the current data to the FPGA 122.
  • the power consumption test board 120 further includes:
  • the memory 125 is configured to store the power consumption data of each of the working scene data and the integrated circuit under test in each working scene.
  • the storage area of the memory 125 can be divided into one area and two areas.
  • the FPGA 122 will generate a flag signal and receive it to the CPU 121, so that the CPU 121 starts reading data in one zone or two zones according to the flag signal and receives it to The upper computer 110.
  • the interface of the memory 125 may be an 184-core DDR DIMM socket.
  • the memory bank of the memory 125 can be selected as needed.
  • the LCD 126 is configured to display the power consumption data of each of the working scene data and the integrated circuit under test in each working scene.
  • the LCD 126 receives the power consumption data of each of the working scene data from the FPGA 122 and the integrated circuit under test in each working scenario, and according to the integrated circuit under test in each working scenario. Power consumption data dynamically displays the work of each of the work scenes on the screen Consumption curve.
  • the integrated circuit test board 130 is configured to receive the voltage from the power consumption test board 120 and the plurality of work scene data, and then sequentially test each work scene according to the plurality of work scene data. Each of the work scene data is output to the power consumption test board 120 at the beginning of each of the work scenes.
  • the integrated circuit test board 130 includes:
  • a power line interface 131 is configured to receive the voltage from the power consumption test board.
  • the power line interface 131 receives the respective voltages from the programmable power chip 123 in the power consumption test board 120 through the power line.
  • the integrated circuit power supply voltage (IC_VCC, Integrated Circuit_Volt Current Condenser) 1 to IC_VCCn on the power line interface 131 outputs a voltage to the integrated circuit under test 132.
  • the power supply voltage receiving (VCC_IN, Volt Current Condenser_Input) on the power line interface 131 outputs a voltage to a direct current-direct current converter (DCDC), and then the DCDC outputs the converted voltage to other circuits. .
  • DCDC direct current-direct current converter
  • the power line interface 131 can be a DB25 interface.
  • the integrated circuit 132 is configured to receive the plurality of working scene data from the power consumption test board, and then test each working scene according to the plurality of working scene data in sequence and in each working scene. The start time outputs the each work scene data to the power consumption test board.
  • the tested integrated circuit 132 receives the plurality of working scene data from the FPGA 122 in the power consumption test board 120 through the data line.
  • the measured integrated circuit 132 sequentially tests each working scene according to the plurality of working scene data, and outputs the each working scene data to the power consumption test at a moment when each working scene starts.
  • the FPGA 122 in the board 120 receives the plurality of working scene data from the FPGA 122 in the power consumption test board 120 through the data line.
  • the measured integrated circuit 132 sequentially tests each working scene according to the plurality of working scene data, and outputs the each working scene data to the power consumption test at a moment when each working scene starts.
  • the FPGA 122 in the board 120 receives the plurality of working scene data from the FPGA 122 in the power consumption test board 120 through the data line.
  • the measured integrated circuit 132 sequentially tests each working scene according to the plurality of working scene data, and outputs the each working scene data to the power consumption test at a moment when each working scene starts.
  • the integrated circuit power consumption test method includes:
  • Step 210 Set voltage data of the integrated circuit under test and multiple working scene data.
  • the setting may be completed by the upper computer.
  • the upper device After the setting, the upper device outputs the voltage data and the plurality of working scene data to the power consumption test board.
  • Step 220 The power consumption test board receives the output voltage according to the voltage data to the integrated circuit test board, and outputs the plurality of working scene data to the integrated circuit test board.
  • Step 230 The integrated circuit test board sequentially tests each work scenario according to the plurality of work scene data, and outputs the each work scene data to the power consumption at a moment when each work scene starts. Test board.
  • Step 240 The power consumption test board synchronously collects current data of the integrated circuit under test in each working scenario, and calculates the work of the integrated circuit under test in each working scenario according to the voltage data and the current data. Consumption data.
  • the integrated circuit power consumption testing method of the embodiment of the present invention may further include:
  • Step 250 The power consumption test board stores and displays the power consumption data of each working scene data and the integrated circuit under test in each working scene.
  • Step 260 The power consumption test board outputs the power consumption data of each of the working scene data and the integrated circuit under test in each working scene to the upper computer.
  • the integrated circuit power consumption testing method further includes:
  • the upper computer receives the power consumption data of each of the working scene data from the power consumption test board and the integrated circuit under test in each working scene, and generates a power consumption situation report of each working scene and Power consumption curve.
  • the embodiment of the present invention enables the integrated circuit power consumption test to get rid of the cumbersome workload of manual measurement, thereby reducing the error of manual measurement.
  • the use of multiple instruments to build complex systems does not require complicated and complicated wiring, so it can overcome the problems of current DC power analyzer channel limitation, fixed function, high price and interface mismatch.
  • the power consumption test in multiple working scenarios can be automatically performed in the embodiment of the present invention.
  • the voltage data of the integrated circuit under test and the plurality of working scene data are set; the power consumption test board outputs a voltage according to the voltage data to the integrated circuit test board, and outputs And the plurality of working scene data is tested to the integrated circuit test board; the integrated circuit test board sequentially tests each working scene according to the plurality of working scene data, and outputs the time at the beginning of each working scene Each of the working scene data is sent to the power consumption test board; the power consumption test board synchronously collects current data of the integrated circuit under test in each working scenario, and calculates the integrated measurement under each working scenario. Power consumption data of the circuit.
  • the integrated circuit power consumption test is freed from the cumbersome workload of manual measurement, thereby reducing the error of manual measurement.
  • the integrated circuit power consumption test is freed from the cumbersome workload of manual measurement, thereby reducing the error of manual measurement.

Abstract

一种集成电路功耗测试系统和方法，包括：上位机(110)、功耗测试板(120)和集成电路测试板(130)；其中，上位机(110)配置为设置被测集成电路的电压数据和多个工作场景数据；功耗测试板(120)配置为根据所述电压数据输出电压至集成电路测试板(130)，并输出所述多个工作场景数据至所述集成电路测试板(130)；还配置为同步采集所述每个工作场景下被测集成电路的电流数据，并计算所述每个工作场景下被测集成电路的功耗数据；集成电路测试板(130)配置为根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板(120)。

Description

一种集成电路功耗测试系统和方法 技术领域
本发明涉及集成电路测试技术，尤其涉及一种集成电路功耗测试系统和方法。
背景技术
在现有的集成电路功耗测试技术中，一种功耗测试方法包括：采用毫欧级电阻串联到电源通路上，随后使用万用表测试两端电压以进行电流及功耗计算；这种方法的缺陷在于：使用手动测量的方法导致的工作繁杂，同时容易引入人为误差。另一种功耗测试方法为：采用数字电压源和电流表配合搭建自动测试系统；这种方法多用于整机测试，该方法的问题在于：由于集成电路的供电电压种类较多，所以需要使用很多电压表、电流表以及纷繁杂乱的接线，从而导致测试成本的提高。此外，还有一种功耗测试方法为：使用现有技术领域中唯一一款直流电源分析仪，以实现四路电源的供给和电流检测；但是，这种方法也存在通道受限、功能固定、价格昂贵及接口不匹配导致的连接杂乱等问题；进一步地，由于这种方法缺少与被测设备(DUT，Device Under Test)交互的数据通道，因此，不能将集成电路工作场景与功耗联系起来，进而不能自动完成各种集成电路工作场景下的功耗测试。
鉴于此，如何在多个工作场景下对集成电路进行自动化的功耗测试已经成为相关领域亟待解决的技术问题。
发明内容
有鉴于此，本发明实施例期望提供一种集成电路功耗测试系统和方法， 能够解决在多个工作场景下对集成电路进行自动化功耗测试的问题。
为达到上述目的，本发明实施例的技术方案是这样实现的：
本发明实施例提供了一种集成电路功耗测试系统，包括：上位机、功耗测试板和集成电路测试板；其中，
所述上位机，配置为设置被测集成电路的电压数据和多个工作场景数据，并输出所述电压数据和所述多个工作场景数据至所述功耗测试板；
所述功耗测试板，配置为接收所述电压数据和所述多个工作场景数据，根据所述电压数据输出电压至所述集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；还配置为接收来自所述集成电路测试板的每个工作场景数据，并同步采集所述每个工作场景下被测集成电路的电流数据，根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据；
所述集成电路测试板，配置为接收所述电压和所述多个工作场景数据，根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板。
上述方案中，所述功耗测试板包括：
中央处理器，配置为接收所述电压数据和所述多个工作场景数据，以及输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机；
现场可编程门阵列，配置为输出所述多个工作场景数据至所述集成电路测试板，接收来自所述集成电路测试板的所述每个工作场景数据，以及根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据；
可编程电源芯片，配置为根据所述电压数据输出所述电压至所述集成电路测试板；
电流采样电路，配置为同步采集所述每个工作场景下被测集成电路的电流数据。
上述方案中，所述功耗测试板还配置为存储并显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，并输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机。
上述方案中，所述功耗测试板还包括：
存储器，配置为存储所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据；
液晶显示器，配置为显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据。
上述方案中，所述集成电路测试板包括：
电源线接口，配置为接收来自所述功耗测试板的所述电压；
被测集成电路，配置为接收来自所述功耗测试板的所述多个工作场景数据，根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板。
上述方案中，所述上位机还配置为接收来自所述功耗测试板的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，生成所述每个工作场景的功耗情况报告和功耗变化曲线。
本发明实施例还提供了一种集成电路功耗测试方法，包括：设置被测集成电路的电压数据和多个工作场景数据；所述方法还包括：
功耗测试板接收根据所述电压数据输出电压至集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；
所述集成电路测试板根据所述多个工作场景数据依次对每个工作场景 进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板；
所述功耗测试板同步采集所述每个工作场景下被测集成电路的电流数据，根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据。
上述方案中，还包括：
所述功耗测试板存储并显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，并输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至上位机。
上述方案中，还包括：
所述上位机接收来自所述功耗测试板的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，生成所述每个工作场景的功耗情况报告和功耗变化曲线。
本发明实施例所提供的集成电路功耗测试系统和方法，设置被测集成电路的电压数据和多个工作场景数据；功耗测试板根据所述电压数据输出电压至集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；所述集成电路测试板根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板；所述功耗测试板同步采集所述每个工作场景下被测集成电路的电流数据，并计算所述每个工作场景下被测集成电路的功耗数据。
如此，本发明实施例使得集成电路功耗测试摆脱了手动测量的繁杂工作量，从而减小了手工测量的误差。同时，由于不需要采用多台仪表搭建复杂系统，也不需要繁乱复杂的接线，所以，可以克服目前直流电源分析仪的通道受限、功能固定、价格昂贵与接口不匹配等问题。此外，本发明 实施例还可以自动完成多个工作场景下的功耗测试。
附图说明
图1为本发明实施例提供的集成电路功耗测试系统组成结构示意图；
图2为本发明实施例提供的集成电路功耗测试方法实现流程示意图。
具体实施方式
在本发明实施例中，先设置被测集成电路的电压数据和多个工作场景数据；功耗测试板根据所述电压数据输出电压至集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；所述集成电路测试板根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板；所述功耗测试板同步采集所述每个工作场景下被测集成电路的电流数据，并计算所述每个工作场景下被测集成电路的功耗数据。
这里，所述设置被测集成电路的电压数据和多个工作场景数据可由上位机完成，并且，设置完成后，上位机会将所述电压数据和所述多个工作场景数据输出至功耗测试板。
进一步的，所述功耗测试板计算出功耗数据后，可以存储并显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据；且可以向所述上位机输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据。
下面结合附图及具体实施例对本发明再做进一步详细的说明。
实施例一
图1为本发明实施例提供的集成电路功耗测试系统组成结构示意图，如图1所示，所述集成电路功耗测试系统包括：上位机110、功耗测试板120和集成电路测试板130。
其中，所述上位机110，配置为设置被测集成电路的电压数据和多个工作场景数据，并输出所述电压数据和所述多个工作场景数据至功耗测试板120。
具体地，所述上位机110使用上位软件设置集成电路测试板中各个电路所需的电压数据、动态电压调节数据和上电顺序。所述电压数据包括所述集成电路测试板130中被测集成电路的电压和其它电路的电压。同时，所述上位机110使用上位软件设置被测集成电路的多个工作场景数据。所述工作场景数据可以包括：手机的通话场景数据和待机场景数据。
其次，所述上位机110还使用上位软件设置各场景下功耗的测试时间和功耗数据的采样频率。
完成设置后，所述上位机110将所述设置数据和功耗测试启动命令同时输出至所述功耗测试板120。
此外，在功耗测试过程中，所述上位机110还配置为接收来自所述功耗测试板120的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据后，生成所述每个工作场景的功耗情况报告和功耗变化曲线。
需要说明的是，所述每个工作场景都会进行一段时间的测试，期间将产生大量所述功耗数据。
这里，所述上位机110可以是个人计算机(PC，Personal Computer)。
所述功耗测试板120，配置为接收来自所述上位机110的所述电压数据和所述多个工作场景数据后，根据所述电压数据输出电压至所述集成电路测试板130，并输出所述多个工作场景数据至所述集成电路测试板130；还配置为接收来自所述集成电路测试板130的所述每个工作场景数据，并同步采集所述每个工作场景下被测集成电路的电流数据，根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据。
进一步地，所述功耗测试板120还配置为存储并显示所述每个工作场 景数据和所述每个工作场景下被测集成电路的功耗数据，并输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机110。
具体地，所述功耗测试板120包括：
中央处理器(CPU，Central Processing Unit)121，配置为接收来自所述上位机110的所述电压数据和所述多个工作场景数据，及输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机110。
首先，所述CPU121通过外设的RS-232接口接收来自所述上位机110的所述电压数据、所述多个工作场景数据和所述功耗测试启动命令。所述CPU121解析所述功耗测试启动命令后，产生控制信号输出至现场可编程门阵列(FPGA，Field Programmable Gate Array)122。同时，所述CPU121输出所述电压数据和所述多个工作场景数据至所述FPGA122。
在所述功耗测试过程中，所述CPU121接收来自所述FPGA122的标志信号后，启动读取存储器125中的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，并通过外设的以太网接口输出所述功耗数据至所述上位机110，及通过所述RS-232接口输出所述每个工作场景数据至所述上位机110。
这里，所述CPU121可以为处理器MPC8360，所述RS-232接口可以为DB9插座，所述以太网接口可以为RJ45插座。
所述FPGA122，配置为输出所述多个工作场景数据至所述集成电路测试板130，接收来自所述集成电路测试板130的所述每个工作场景数据，及根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据。
首先，所述FPGA122接收来自所述CPU121的所述控制信号、所述 电压数据和所述多个工作场景数据。
随后，所述FPGA122通过数据线将所述多个工作场景数据依次输出至所述集成电路测试板130中的被测集成电路132。同时，所述FPGA122输出所述电压数据至可编程电源芯片123，以实现控制所述可编程电源芯片123按设定上电顺序输出所述集成电路测试板130需要的各路电压，所述电压包括所述被测集成电路的电压。在所述每个工作场景开始的时刻，所述集成电路测试板130中的所述被测集成电路132输出所述每个工作场景数据至所述FPGA122。随后，所述FPGA122接收来自所述被测集成电路132中的所述每个工作场景数据。如果所述FPGA122检测到接收到的所述每个工作场景数据异常，例如死机等情况，则所述FPGA122控制所述集成电路板130重新上电，并继续对未完成的工作场景进行测试。在所述每个工作场景运行过程中，所述FPGA122将接收来自电流采样电路124的大量同步采集的被测集成电路的电流数据，并根据所述电压数据和每一个所述电流数据计算所述每个工作场景下被测集成电路的每一个功耗数据。具体功耗计算公式为：功耗＝电压*电流。需要说明的是，由于所述每个工作场景运行过程中将会产生大量的所述被测集成电路的电流数据，所生成的所述被测集成电路的功耗数据也是大量的。
随后，所述FPGA122输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至存储器125和液晶显示器(LCD，Liquid Crystal Display)126。同时，所述FPGA122还可以接收所述LCD126中手工接收的功耗测试设置数据。当所述存储器125的一区或二区放满数据时，所述FPGA122产生标志信号并输出至所述CPU121以便所述CPU121读取所述存储器125的数据。
这里，所述数据线可以为以太网口、通用接收输出端口、通用异步收发传输器。
可编程电源芯片123，配置为根据所述电压数据输出所述电压至所述集成电路测试板130。
具体地，所述可编程电源芯片123通过电源线输出所述电压至所述集成电路测试板130中的电源线接口131。
进一步地，所述可编程电源芯片123还可用于监测所述集成电路测试板130中的被测集成电路132的电压并输出至所述FPGA122，以便所述FPGA122根据监测电压动态调节所述被测集成电路132的电压。
电流采样电路124，配置为同步采集所述每个工作场景下被测集成电路的电流数据。
进一步地，所述电流采样电路124将所述电流数据同步输出至所述FPGA122。
进一步地，所述功耗测试板120还包括：
存储器125，配置为存储所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据。
具体地，所述存储器125的存储区可以分为一区和二区。当所述一区或二区数据放满时，所述FPGA122将产生标志信号并接收至所述CPU121，以便所述CPU121根据所述标志信号启动读取一区或二区中的数据并接收至所述上位机110。
这里，所述存储器125的接口可以为184芯DDR DIMM插座。同时，可以根据需要来选择所述存储器125的内存条。
LCD126，配置为显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据。
具体地，所述LCD126接收来自所述FPGA122的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，并根据所述每个工作场景下被测集成电路的功耗数据在屏幕上动态显示所述每个工作场景的功 耗变化曲线。
所述集成电路测试板130，配置为接收来自所述功耗测试板120的所述电压和所述多个工作场景数据后，根据所述多个工作场景数据依次对每个工作场景进行测试并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板120。
具体地，所述集成电路测试板130包括：
电源线接口131，配置为接收来自所述功耗测试板的所述电压。
具体地，所述电源线接口131通过所述电源线接收来自所述功耗测试板120中的所述可编程电源芯片123的所述各路电压。
所述电源线接口131上的集成电路电源电压(IC_VCC,Integrated Circuit_Volt Current Condenser)1至IC_VCCn输出电压至被测集成电路132。所述电源线接口131上的电源电压接收(VCC_IN,Volt Current Condenser_Input)输出电压至直流变直流转换器(DCDC,Direct Current-Direct Current),随后，所述DCDC将转变后的电压输出至其它电路。
这里，所述电源线接口131可以为DB25接口。
被测集成电路132，配置为接收来自所述功耗测试板的所述多个工作场景数据后，根据所述多个工作场景数据依次对每个工作场景进行测试并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板。
具体地，所述被测集成电路132通过所述数据线接收来自所述功耗测试板120中的所述FPGA122的所述多个工作场景数据。根据所述多个工作场景数据，所述被测集成电路132依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板120中的所述FPGA122。
实施例二
图2为本发明实施例提供的集成电路功耗测试方法实现流程示意图，如图2所示，结合上述实施例一和图1，所述集成电路功耗测试方法包括：
步骤210：设置被测集成电路的电压数据和多个工作场景数据。
本步骤中，所述设置可以由上位机完成，设置之后，上位机会输出所述电压数据和所述多个工作场景数据至功耗测试板。
步骤220：功耗测试板接收根据所述电压数据输出电压至集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板。
步骤230：所述集成电路测试板根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板。
步骤240：所述功耗测试板同步采集所述每个工作场景下被测集成电路的电流数据，根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据。
在步骤240之后，本发明实施例的集成电路功耗测试方法还可以包括：
步骤250：所述功耗测试板存储并显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据。
步骤260：所述功耗测试板输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机。
进一步地，所述集成电路功耗测试方法还包括：
所述上位机接收来自所述功耗测试板的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，生成所述每个工作场景的功耗情况报告和功耗变化曲线。
实施例二中的具体实施方式参见实施例一中的描述。
由上述实施例可以看出，本发明实施例使得集成电路功耗测试摆脱了手动测量的繁杂工作量，从而减小了手工测量的误差。同时，由于不需要 采用多台仪表搭建复杂系统，也不需要繁乱复杂的接线，所以可以，克服目前直流电源分析仪的通道受限、功能固定、价格昂贵与接口不匹配等问题。此外，本发明实施例还可以自动完成多个工作场景下的功耗测试。
以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。
工业实用性
本发明实施例所提供的集成电路功耗测试系统和方法，设置被测集成电路的电压数据和多个工作场景数据；功耗测试板根据所述电压数据输出电压至集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；所述集成电路测试板根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板；所述功耗测试板同步采集所述每个工作场景下被测集成电路的电流数据，并计算所述每个工作场景下被测集成电路的功耗数据。采用发明实施例，使得集成电路功耗测试摆脱了手动测量的繁杂工作量，从而减小了手工测量的误差。同时，由于不需要采用多台仪表搭建复杂系统，也不需要繁乱复杂的接线，所以，可以克服目前直流电源分析仪的通道受限、功能固定、价格昂贵与接口不匹配等问题。

Claims (9)

  1. 一种集成电路功耗测试系统，所述系统包括：上位机、功耗测试板和集成电路测试板；其中，
    所述上位机，配置为设置被测集成电路的电压数据和多个工作场景数据，并输出所述电压数据和所述多个工作场景数据至所述功耗测试板；
    所述功耗测试板，配置为接收所述电压数据和所述多个工作场景数据，根据所述电压数据输出电压至所述集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；还配置为接收来自所述集成电路测试板的每个工作场景数据，并同步采集所述每个工作场景下被测集成电路的电流数据，根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据；
    所述集成电路测试板，配置为接收所述电压和所述多个工作场景数据，根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板。
  2. 根据权利要求1所述的系统，其中，所述功耗测试板包括：
    中央处理器，配置为接收所述电压数据和所述多个工作场景数据，以及输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机；
    现场可编程门阵列，配置为输出所述多个工作场景数据至所述集成电路测试板，接收来自所述集成电路测试板的所述每个工作场景数据，以及根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据；
    可编程电源芯片，配置为根据所述电压数据输出所述电压至所述集成电路测试板；
    电流采样电路，配置为同步采集所述每个工作场景下被测集成电路的 电流数据。
  3. 根据权利要求1或2所述的系统，其中，所述功耗测试板还配置为存储并显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，并输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至所述上位机。
  4. 根据权利要求3所述的系统，其中，所述功耗测试板还包括：
    存储器，配置为存储所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据；
    液晶显示器，配置为显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据。
  5. 根据权利要求1或2所述的系统，其中，所述集成电路测试板包括：
    电源线接口，配置为接收来自所述功耗测试板的所述电压；
    被测集成电路，配置为接收来自所述功耗测试板的所述多个工作场景数据，根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据至所述功耗测试板。
  6. 根据权利要求3所述的系统，其中，所述上位机还配置为接收来自所述功耗测试板的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，生成所述每个工作场景的功耗情况报告和功耗变化曲线。
  7. 一种集成电路功耗测试方法，设置被测集成电路的电压数据和多个工作场景数据；所述方法还包括：
    功耗测试板接收根据所述电压数据输出电压至集成电路测试板，并输出所述多个工作场景数据至所述集成电路测试板；
    所述集成电路测试板根据所述多个工作场景数据依次对每个工作场景进行测试，并在所述每个工作场景开始的时刻输出所述每个工作场景数据 至所述功耗测试板；
    所述功耗测试板同步采集所述每个工作场景下被测集成电路的电流数据，根据所述电压数据和所述电流数据计算所述每个工作场景下被测集成电路的功耗数据。
  8. 根据权利要求7所述的方法，其中，所述方法还包括：
    所述功耗测试板存储并显示所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，并输出所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据至上位机。
  9. 根据权利要求8所述的方法，其中，所述方法还包括：
    所述上位机接收来自所述功耗测试板的所述每个工作场景数据和所述每个工作场景下被测集成电路的功耗数据，生成所述每个工作场景的功耗情况报告和功耗变化曲线。
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