WO2016127822A1 - 一种全集成抗阻塞射频接收前端架构 - Google Patents

一种全集成抗阻塞射频接收前端架构 Download PDF

Info

Publication number
WO2016127822A1
WO2016127822A1 PCT/CN2016/072557 CN2016072557W WO2016127822A1 WO 2016127822 A1 WO2016127822 A1 WO 2016127822A1 CN 2016072557 W CN2016072557 W CN 2016072557W WO 2016127822 A1 WO2016127822 A1 WO 2016127822A1
Authority
WO
WIPO (PCT)
Prior art keywords
blocking
low noise
noise amplifier
stage
receiving front
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/072557
Other languages
English (en)
French (fr)
Inventor
吴建辉
程超
于天骥
姚红燕
程康
陈超
李红
黄成�
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Southeast University
Original Assignee
Southeast University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Southeast University filed Critical Southeast University
Publication of WO2016127822A1 publication Critical patent/WO2016127822A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits

Definitions

  • the invention belongs to the field of wireless communication receivers and relates to a fully integrated anti-blocking RF receiving front-end architecture.
  • Infinite communication technology is now widely used, but due to the limited nature of spectrum resources, there are a large number of users in the public frequency band.
  • the strong transmit signal of the transmitter is a blocking signal for other receivers in nearby channels in the desired frequency band.
  • a large blocking signal can shift the operating state of the transistor in the receiver, causing the receiver's gain to drop, noise figure and linearity to deteriorate, and even the receiver can not work.
  • In order to eliminate the impact of the blocking signal on the overall circuit of the receiver it needs to be eliminated from the point RF front end at the front end of the receiver.
  • Broadcom's feedforward and feedback structure uses the mixer's mixing function to move the low-IF high-pass filter to the RF local oscillator to form the RF band stop. Filter, such a structure not only does the two branches not match, but also the blocking signal passes through the lower mixer in the feedforward branch and the high-pass filter in the low intermediate frequency, which deteriorates the linearity, causing gain compression and deterioration. Noise Figure.
  • the European Microelectronics Research Center's voltage-mode fully integrated anti-blocking RF receiver front-end architecture is highly demanding because it is directly in voltage form.
  • the research center's results used a 2.5V LNA with a supply voltage.
  • Cornell University's LNA-less structure has good linearity, but its noise performance is poor, and the isolation effect is poor.
  • the local oscillator signal is easy to leak into the antenna and deteriorate the frequency domain resource environment.
  • the present invention proposes a fully integrated anti-blocking RF receiving front-end architecture that solves the impact of blocking signals on a receiver in a frequency domain environment.
  • the fully integrated anti-blocking RF receiving front-end architecture of the present invention includes a radio frequency blocking signal filtering stage And a downmixing stage, the RF blocking signal filtering stage comprising a first low noise amplifier, a second low noise amplifier, a subtraction circuit and a load stage, the first low noise amplifier being connected to a differential end of the subtraction circuit
  • the second low noise amplifier is connected to another differential end of the subtraction circuit, and the second low noise amplifier is also connected to the load stage.
  • the RF band rejection filter stage is connected to the downmix stage through the output of the subtraction circuit.
  • the load stage is connected by a second passive switching mixer and a second transimpedance amplifier, and an input end of the second passive switching mixing stage and an output end of the second low noise amplifier connection.
  • the output of the subtraction circuit is also connected to an LC load network.
  • the downmixing stage includes a first transconductance amplifier, a first passive switching mixer, and a first transimpedance amplifier that are sequentially connected.
  • the output frequency response curve of the first low noise amplifier exhibits an all-pass characteristic
  • the output frequency response curve of the second low noise amplifier and the load stage exhibits a band-stop characteristic.
  • the RF receive front end architecture includes a blocking signal filtering stage and a down mixing stage.
  • the blocking signal filtering stage is a feedforward structure comprising a first low noise amplifier, a second low noise amplifier, a second passive switching mixer, a second transimpedance amplifier, L1 and C1.
  • the first low noise amplifier of the main branch is identical to the second low noise amplifier of the feedforward branch, achieving a high degree of matching of the two branches.
  • the second low noise amplifier, the second passive switching mixer, and the second transimpedance amplifier form a passive mixer.
  • the passive mixer Since the passive mixer has a shifting characteristic in the frequency domain, the input impedance characteristic of the second transimpedance amplifier is moved to the local oscillator frequency by the second passive switching mixer, and the output of the second low noise amplifier The end filters the wanted signal and retains the blocking signal. The output components of the first low noise amplifier and the second low noise amplifier are subtracted to obtain a radio frequency useful signal, and the blocking signal is filtered out.
  • the architecture directly filters the blocking signal after passing through the first low noise amplifier and the second low noise amplifier without introducing it into other circuit modules, resulting in more non-ideal factors.
  • the LC network acts as a load, and the inductance resonates with the parasitic capacitance at that point to reduce leakage of the RF useful current signal.
  • the downmixing stage is a passive mixer comprising a first transconductance amplifier, a first passive switching mixer and a first transimpedance amplifier, which are converted into an RF useful current signal by the first transconductance amplifier, first
  • the source switching mixer modulates it to obtain an intermediate frequency useful current signal
  • the first transimpedance amplifier converts the intermediate frequency useful current signal into an intermediate frequency useful voltage signal.
  • the main branch of the invention utilizes a passive mixer to shift the impedance at a frequency, and the switching mixer stage and the transimpedance level of the passive mixer are used as a low-noise load, and are mixed through the switch of the working linear region.
  • the frequency converter moves the input impedance of the intermediate frequency high-pass impedance characteristic of the transimpedance amplifier to the RF local oscillator to form an RF band rejection filter.
  • the feedforward branch filters out the RF wanted signal while preserving the RF blocking signal.
  • the main branch uses the same low noise level as the feedforward branch.
  • the RF useful signal is obtained by subtracting the two branches.
  • the RF band-stop filter in the existing feedforward anti-blocking RF receiving front end is formed by up- and down-converting the intermediate frequency high-pass filter through the upper and lower mixers. Since the image noise needs to be eliminated during the up-and-down conversion process, the main branch requires two paths of I and Q. Therefore, compared with the prior art, the present invention does not require the I and Q two-way up-and-down mixers and the intermediate frequency high-pass filter, and has a simple circuit structure, saves circuit area and power consumption, and is low in the two branches. The noise is the same and the matching is good. Since the blocking signal is directly eliminated behind the RF transconductance amplifier and does not affect other circuits, the linearity of the intermediate frequency is not high. In addition, the low noise amplifier can achieve good isolation, and the local oscillator signal is difficult to leak to the antenna to deteriorate the spectrum environment.
  • FIG. 1 is a schematic diagram of an RF receiving front end structure of the present invention
  • FIG. 2 is a functional simulation diagram of a radio frequency receiving front end of the present invention.
  • the figure includes: a first low noise amplifier LNA1, a second low noise amplifier LNA2, a first inductor L1, a first capacitor C1, a first transconductance amplifier Gm1, a first passive switching mixer Pmixer1, and a second passive switch.
  • Mixer Mixer2 first transimpedance amplifier TIA1, second transimpedance amplifier TIA2, local oscillator signal input terminal LO, subtraction circuit S, signal input terminal RFIN, and signal output terminal IFOUT.
  • the fully integrated anti-blocking RF receiving front-end architecture proposed by the present invention is a feedforward structure, which is formed by connecting a RF blocking signal filtering stage and a down mixing frequency stage, and the RF blocking signal filtering stage filters the RF blocking signal. While the radio frequency useful signal is reserved, the downmix frequency stage converts the radio frequency useful signal into an intermediate frequency useful signal.
  • the RF blocking signal filtering stage includes a first low noise amplifier LNA1, a second low noise amplifier LNA2, a subtraction circuit S, and a load stage.
  • the main branch is composed of a first low noise amplifier LNA1
  • the feedforward branch is composed of a second low noise amplifier LNA2, a subtraction circuit S and a load stage.
  • the load stage is connected by a second passive switching mixer Mixer2 and a second transimpedance amplifier TIA2, and the second passive switching mixer Mixer2 will be a second transimpedance
  • the intermediate frequency high-pass characteristic curve of the input impedance of the amplifier TIA2 is moved to the RF local oscillator to form an RF band-stop characteristic.
  • the passive mixer has a shifting characteristic on the impedance in frequency, and a radio frequency band rejection filter is formed in the feedforward branch of the RF blocking signal filtering stage.
  • the first low noise amplifier LNA1 of the main branch is an all-pass RF amplifier.
  • the main branch output stage is connected to a differential end of the subtraction circuit S, and the feedforward branch output stage is connected to another differential end of the subtraction circuit S.
  • the radio frequency component (including the radio frequency blocking signal and the radio frequency useful signal) of the main branch is subtracted from the radio frequency blocking signal of the feedforward branch by the subtraction circuit S, and the radio frequency band pass filter is realized, and the radio frequency blocking signal is filtered to obtain the radio frequency. Useful signal.
  • the output of the subtraction circuit S is also connected to an LC load network to increase the Q value of the RF bandpass filter.
  • the specific connection relationship is: the input ends of the first low noise amplifier LNA1 and the second low noise amplifier LNA2 are connected to the radio frequency input end, and the output ends are respectively connected to one input end of the subtraction circuit S; the second low noise amplifier LNA2 The output terminal is simultaneously connected to the input end of the second passive switching mixer Mixer2; the output end of the second passive switching mixer Mixer2 is connected to the input end of the second transimpedance amplifier TIA2; the LC network is used as the subtraction circuit S The load, the negative terminal of the first inductor L1 and the negative terminal of the first capacitor C1 are connected to the output terminal of the subtraction circuit S, and the positive terminal of the first inductor L1 and the positive terminal of the first capacitor C1 are connected to the power supply voltage.
  • the down mixing stage includes a first transconductance amplifier Gm1, a first passive switching mixer Pmixer1, and a first transimpedance amplifier TIA1 that are sequentially connected.
  • the first transconductance amplifier Gm1 converts the radio frequency useful voltage signal obtained from the RF blocking signal filtering stage into a radio frequency useful current signal, and the first passive switching mixer Pmixer1 modulates the radio frequency useful current signal into an intermediate frequency useful current signal, and then A transimpedance amplifier TIA1 is converted to an intermediate frequency useful voltage signal.
  • the specific connection relationship is: the input end of the first transimpedance amplifier TIA1 is connected to the output end of the subtraction circuit S, and the output end is connected to the input end of the first passive switching mixer Mixer1; the first passive switching mixer The output of Pmixer1 is connected to the input of the first transimpedance amplifier TIA1; the output of the first transimpedance amplifier TIA1 is connected to the intermediate frequency output.
  • FIG. 2 is a functional simulation diagram of the RF receiving front end of the present invention. As can be seen from the figure, the RF front end achieves 20 dB suppression for the blocking signal outside the 40 MHz bandwidth.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

本发明公开一种全集成抗阻塞射频接收前端架构，包括阻塞信号滤波级和下混频级。其中阻塞信号滤波级是一个前馈结构，主支路和前馈支路采用电路结构相同的低噪声放大器以实现匹配。此外，前馈支路利用无源混频器对阻抗具有在频域的搬移特性，在射频本振处产生一个带阻滤波器以滤除有用信号，然后将得到的阻塞信号与主支路的阻塞信号相减，得到射频有用信号。因为在两个低噪声放大器之后直接将阻塞信号滤除，不会对其他电路造成影响，所以避免了带来其他的非理想因素。其后接无源混频器实现下混频，得到中频有用信号。

Description

一种全集成抗阻塞射频接收前端架构 技术领域
本发明属于无线通讯接收机领域，涉及一种全集成抗阻塞射频接收前端架构。
背景技术
现在无限通讯技术被广泛使用，然而由于频谱资源的有限性，使得在公共频段存在大量的用户。像2.4GHz为各国共用的ISM频段，因此无线局域网、蓝牙、ZigBee等无线网络，均工作在2.4GHz频段上。发射机的强发射信号对于所需频带内附近频道的其他接收机来说是一种阻塞信号。大幅度的阻塞信号会使得接收机内晶体管的工作状态偏移，而造成接收机的增益下降，噪声系数和线性度等性能恶化，甚至会使接收机无法工作。为了消除阻塞信号对接收机整体电路造成的影响，就需要从接收机最前端的点射频前端将其消除。
目前国际上有美国博通公司、欧洲微电子研究中心和美国康奈尔大学等国际著名通信半导体公司、微电子研究中心和大学对全集成抗阻塞射频接收前端进行研究，并取得了一定的成果。但是，已有的全集成抗阻塞射频接收前端有着明显的不足，博通的前馈和反馈结构是利用混频器的混频功能将低中频的高通滤波器搬移到射频本振处形成射频带阻滤波器，这样的结构不仅两条支路不匹配，而且阻塞信号会经过前馈支路中的下混频器和低中频的高通滤波器等电路，这会恶化线性度，造成增益压缩，恶化噪声系数。欧洲微电子研究中心的电压模全集成抗阻塞射频接收前端架构，因为是直接采用电压形式，所以对电路的要求很高。为了保证线性度，该研究中心的成果中采用的是一个电源电压的2.5V的LNA。美国康内尔大学的LNA-less结构具有很好的线性度，但是其噪声性能差，而且隔离效果差，本振信号容易泄漏到天线，恶化频域资源环境。
发明内容
技术问题：本发明提出了一种解决了频域环境中阻塞信号对接收机的影响的全集成抗阻塞射频接收前端架构。
技术方案：本发明的全集成抗阻塞射频接收前端架构，包括射频阻塞信号滤波级 和下混频级,所述的射频阻塞信号滤波级包括第一低噪声放大器、第二低噪声放大器、减法运算电路和负载级，所述第一低噪声放大器与减法运算电路的一个差分端连接，所述第二低噪声放大器与减法运算电路的另一个差分端连接，第二低噪声放大器同时还与负载级连接，射频带阻滤波级通过减法运算电路的输出端与下混频级连接。
本发明的优选方案中，所述负载级由第二无源开关混频器和第二跨阻放大器连接而成，第二无源开关混频级的输入端与第二低噪声放大器的输出端连接。
本发明的优选方案中，所述减法运算电路的输出端还连接有LC负载网络。
本发明的优选方案中，所述下混频级包括依次连接的第一跨导放大器、第一无源开关混频器和第一跨阻放大器。
本发明的优选方案中，所述第一低噪声放大器的输出频率响应曲线呈现全通特性，所述第二低噪声放大器和负载级的输出频率响应曲线呈现带阻特性。利用无源混频器的阻抗搬移特性，将跨阻放大器的中频阻抗高通特性搬移到射频本振处，形成射频带阻滤波器。利用前馈结构将射频带阻滤波器与低噪放的输出相减，实现两路信号相减，得到射频有用信号。再经下混频器下变频而得到中频有用信号。
该射频接收前端架构包含阻塞信号滤波级和下混频级。阻塞信号滤波级是一个前馈结构，包含第一低噪声放大器、第二低噪声放大器、第二无源开关混频器、第二跨阻放大器、L1和C1。其中主支路的第一低噪声放大器与前馈支路的第二低噪声放大器是相同的，实现两条支路的高度匹配。第二低噪声放大器、第二无源开关混频器和第二跨阻放大器组成一个无源混频器。由于无源混频器对阻抗具有在频域的搬移特性，所以第二跨阻放大器的输入阻抗特性被第二无源开关混频器搬移到本振频率处，在第二低噪声放大器的输出端对有用信号进行滤除并保留阻塞信号。将第一低噪声放大器和第二低噪声放大器的输出端成分相减得到射频有用信号，而将阻塞信号滤除。该架构在阻塞信号经过第一低噪声放大器和第二低噪声放大器后直接将其滤除，而没有将其引入其他电路模块而带来更多的非理想因素。LC网络作为负载，电感与该点的寄生电容谐振，以减小射频有用电流信号泄露。下混频级为一个无源混频器，包含第一跨导放大器、第一无源开关混频器和第一跨阻放大器，经第一跨导放大器转化为射频有用电流信号，第一无源开关混频器对其进行调制，得到中频有用电流信号，第一跨阻放大器将中频有用电流信号转换为中频有用电压信号。因为无源混频器比传统的有源混频器有线性度和噪声系数等性能的优势，所采用无源混频器可以改善射频前端的性能。
有益效果：与现有的技术相比，本发明具有以下优点：
本发明主支路利用无源混频器在频率上对阻抗具有的搬移特性，将无源混频器的开关混频级和跨阻级作为低噪放的负载，通过工作线性区的开关混频器将跨阻放大器中频高通阻抗特性的输入阻抗搬移到射频本振处而形成射频带阻滤波器。前馈支路将射频有用信号滤除而保留射频阻塞信号。主支路采用与前馈支路相同的低噪放。通过两条支路相减而得到射频有用信号。而现有的前馈式抗阻塞射频接收前端中的射频带阻滤波器是通过上、下混频器将中频高通滤波器上、下变频而形成。由于上下变频过程中需要消除镜像噪声，所以主支路需要I、Q两路。所以，本发明与现有的技术相比，不需要I、Q两路的上、下混频器和中频高通滤波器，电路结构简单，节省电路面积和功耗，两条支路采用的低噪放相同，匹配度好。由于在射频跨导放大器后面直接将阻塞信号消除，不会对其他电路造成影响，所以对中频的线性度要求不高。此外，低噪声放大器能够实现很好的隔离，本振信号难以泄露到天线对频谱环境造成恶化。
附图说明
图1为本发明的射频接收前端架构图；
图2为本发明的射频接收前端的功能仿真图。
图中有：第一低噪声放大器LNA1、第二低噪声放大器LNA2、第一电感L1、第一电容C1、第一跨导放大器Gm1、第一无源开关混频器Pmixer1、第二无源开关混频器Pmixer2、第一跨阻放大器TIA1、第二跨阻放大器TIA2、本振信号输入端LO、减法运算电路S、信号输入端RFIN、信号输出端IFOUT。
具体实施方式
下面结合实施例和说明书附图对本发明作进一步的说明。
如图1所示，本发明提出的全集成抗阻塞射频接收前端架构为前馈式结构，由射频阻塞信号滤波级和下混频级连接而成，射频阻塞信号滤波级将射频阻塞信号滤除而保留射频有用信号，下混频级将射频有用信号变频成为中频有用信号。所述的射频阻塞信号滤波级包括第一低噪声放大器LNA1、第二低噪声放大器LNA2、减法运算电路S和负载级。其中主支路由第一低噪声放大器LNA1构成，前馈支路由第二低噪声放大器LNA2、减法运算电路S和负载级组成。所述负载级由第二无源开关混频器Pmixer2和第二跨阻放大器TIA2连接而成，第二无源开关混频器Pmixer2将第二跨阻 放大器TIA2输入阻抗的中频高通特性曲线搬移至射频本振处，形成射频带阻特性。利用无源混频器在频率上对阻抗具有的搬移特性，在射频阻塞信号滤波级的前馈支路形成射频带阻滤波器。主支路的第一低噪声放大器LNA1为一个全通射频放大器。所述主支路输出级与减法运算电路S的一个差分端连接，所述前馈支路输出级与减法运算电路S的另一个差分端连接。通过减法运算电路S将主支路的射频成分(包括射频阻塞信号和射频有用信号)与前馈支路的射频阻塞信号相减，实现射频带通滤波器，将射频阻塞信号滤除而得到射频有用信号。所述减法运算电路S的输出端还连接有LC负载网络，以增加射频带通滤波器的Q值。其具体的连接关系为：第一低噪声放大器LNA1和第二低噪声放大器LNA2的输入端与射频输入端相连，输出端分别于减法运算电路S的一个输入端相连；第二低噪声放大器LNA2的输出端同时与第二无源开关混频器Pmixer2的输入端相连；第二无源开关混频器Pmixer2的输出端与第二跨阻放大器TIA2的输入端相连；LC网络作为减法运算电路S的负载，第一电感L1负端和第一电容C1负端与减法运算电路S的输出端相连，第一电感L1正端和第一电容C1正端与电源电压相连。
所述下混频级包括依次连接的第一跨导放大器Gm1、第一无源开关混频器Pmixer1和第一跨阻放大器TIA1。第一跨导放大器Gm1将从射频阻塞信号滤波级得到的射频有用电压信号转化为射频有用电流信号，第一无源开关混频器Pmixer1将射频有用电流信号调制成中频有用电流信号，再经第一跨阻放大器TIA1转化为中频有用电压信号。其具体连接关系为：第一跨阻放大器TIA1的输入端与减法运算电路S的输出端相连，输出端与第一无源开关混频器Pmixer1的输入端相连；第一无源开关混频器Pmixer1的输出端与第一跨阻放大器TIA1的输入端相连；第一跨阻放大器TIA1的输出端接中频输出端。
图2所示为本发明的射频接收前端的功能仿真图，从图中可以看出，该射频前端对40MHz带宽外的阻塞信号实现了20dB的抑制。
上述实施例仅是本发明的优选实施方式，应当指出：对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和等同替换，这些对本发明权利要求进行改进和等同替换后的技术方案，均落入本发明的保护范围。

Claims (5)

  1. 一种全集成抗阻塞射频接收前端架构，其特征在于：该架构为前馈式结构，由射频阻塞信号滤波级和下混频级连接而成，所述的射频阻塞信号滤波级包括第一低噪声放大器(LNA1)、第二低噪声放大器(LNA2)、减法运算电路(S)和负载级，所述第一低噪声放大器(LNA1)与减法运算电路(S)的一个差分端连接，所述第二低噪声放大器(LNA2)与减法运算电路的另一个差分端连接，第二低噪声放大器(LNA2)同时还与负载级连接，射频带阻滤波级通过减法运算电路(S)的输出端与下混频级连接。
  2. 根据权利要求1所述的全集成抗阻塞射频接收前端架构，其特征在于：所述负载级由第二无源开关混频器(Pmixer2)和第二跨阻放大器(TIA2)连接而成，第二无源开关混频器(Pmixer2)的输入端与第二低噪声放大器(LNA2)的输出端连接。
  3. 根据权利要求1或2所述的全集成抗阻塞射频接收前端架构，其特征在于：所述减法运算电路(S)的输出端还连接有LC负载网络。
  4. 根据权利要求1或2所述的全集成抗阻塞射频接收前端架构，其特征在于：所述下混频级包括依次连接的第一跨导放大器(LNA1)、第一无源开关混频器(Pmixer1)和第一跨阻放大器(TIA1)。
  5. 根据权利要求1或2所述的全集成抗阻塞射频接收前端架构，其特征在于：所述第一低噪声放大器(LNA1)的输出频率响应曲线呈现全通特性，所述第二低噪声放大器(LNA2)和负载级的输出频率响应曲线呈现带阻特性。
PCT/CN2016/072557 2015-02-10 2016-01-28 一种全集成抗阻塞射频接收前端架构 Ceased WO2016127822A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510066420.4 2015-02-10
CN201510066420.4A CN104617970B (zh) 2015-02-10 2015-02-10 一种全集成抗阻塞射频接收前端架构

Publications (1)

Publication Number Publication Date
WO2016127822A1 true WO2016127822A1 (zh) 2016-08-18

Family

ID=53152282

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/072557 Ceased WO2016127822A1 (zh) 2015-02-10 2016-01-28 一种全集成抗阻塞射频接收前端架构

Country Status (2)

Country Link
CN (1) CN104617970B (zh)
WO (1) WO2016127822A1 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114499562A (zh) * 2022-01-20 2022-05-13 复旦大学 一种带有阻抗映射功能的高灵敏度抗阻塞射频接收机前端
CN116318214A (zh) * 2023-03-23 2023-06-23 福州大学 一种基于n路径滤波技术的宽带抗阻塞射频接收机
CN121530459A (zh) * 2026-01-15 2026-02-13 中国电子科技集团公司第五十五研究所 一种高密度多通道Ku波段射频信道一体化集成微模组

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104617970B (zh) * 2015-02-10 2017-02-22 东南大学 一种全集成抗阻塞射频接收前端架构
CN106059604B (zh) * 2016-05-24 2018-08-10 东南大学 一种基于信号分离的抗阻塞接收射频前端结构
CN106028388B (zh) * 2016-07-18 2023-03-14 摩比天线技术（深圳）有限公司 一种接收机及其改善无线通信基站上行阻塞的电路
CN106888028A (zh) * 2017-04-12 2017-06-23 复旦大学 一种带阻抗映射功能的高灵敏度接收机前端电路
CN109302198B (zh) * 2017-07-24 2020-04-10 深圳市中兴微电子技术有限公司 无线收发机系统及其混频器电路
CN109167607B (zh) * 2018-10-12 2024-01-23 南京屹信航天科技有限公司 一种用于小型化odu接收通道的射频电路
CN109474294B (zh) * 2018-12-24 2024-01-23 南京屹信航天科技有限公司 一种用于星载测控设备的上行通道电路
CN114499415B (zh) * 2020-11-13 2025-03-11 千寻位置网络有限公司 接收机射频前端模块及接收机
US12250010B2 (en) 2021-04-07 2025-03-11 Skyworks Solutions, Inc. Systems and methods for diplexer circuits with leakage cancellation
CN114124123B (zh) * 2021-11-17 2023-03-14 成都信息工程大学 一种宽带集成cmos全局反馈接收机前端电路

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046683A (en) * 1996-12-31 2000-04-04 Lucent Technologies Inc. Modulated backscatter location system
CN101027846A (zh) * 2004-08-13 2007-08-29 诺基亚公司 具有相似谐振电路拓扑和使用相同校准信号来补偿工艺差异的单片lna和vco
CN101101626A (zh) * 2006-03-02 2008-01-09 美国博通公司 一种应用于射频识别系统的阅读器及其操作方法
CN104617970A (zh) * 2015-02-10 2015-05-13 东南大学 一种全集成抗阻塞射频接收前端架构

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE362230T1 (de) * 2002-06-12 2007-06-15 Nokia Corp Mobile elektronische einrichtung mit einem audioverbinder mit antennenfunktion
FR2930093A1 (fr) * 2008-04-10 2009-10-16 Somfy Sas Dispositif de type emetteur et/ou recepteur de signaux radioelectriques
CN101860373B (zh) * 2009-04-10 2013-03-06 晨星软件研发(深圳)有限公司 用于接收器的消除干扰的电路及方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046683A (en) * 1996-12-31 2000-04-04 Lucent Technologies Inc. Modulated backscatter location system
CN101027846A (zh) * 2004-08-13 2007-08-29 诺基亚公司 具有相似谐振电路拓扑和使用相同校准信号来补偿工艺差异的单片lna和vco
CN101101626A (zh) * 2006-03-02 2008-01-09 美国博通公司 一种应用于射频识别系统的阅读器及其操作方法
CN104617970A (zh) * 2015-02-10 2015-05-13 东南大学 一种全集成抗阻塞射频接收前端架构

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114499562A (zh) * 2022-01-20 2022-05-13 复旦大学 一种带有阻抗映射功能的高灵敏度抗阻塞射频接收机前端
CN114499562B (zh) * 2022-01-20 2024-05-24 复旦大学 一种带有阻抗映射功能的高灵敏度抗阻塞射频接收机前端
CN116318214A (zh) * 2023-03-23 2023-06-23 福州大学 一种基于n路径滤波技术的宽带抗阻塞射频接收机
CN116318214B (zh) * 2023-03-23 2025-02-14 福州大学 一种基于n路径滤波技术的宽带抗阻塞射频接收机
CN121530459A (zh) * 2026-01-15 2026-02-13 中国电子科技集团公司第五十五研究所 一种高密度多通道Ku波段射频信道一体化集成微模组

Also Published As

Publication number Publication date
CN104617970B (zh) 2017-02-22
CN104617970A (zh) 2015-05-13

Similar Documents

Publication Publication Date Title
WO2016127822A1 (zh) 一种全集成抗阻塞射频接收前端架构
Lien et al. 24.3 A high-linearity CMOS receiver achieving+ 44dBm IIP3 and+ 13dBm B 1dB for SAW-less LTE radio
CN101436869B (zh) 等效射频带陷滤波电路、射频芯片及接收机
CN101981809B (zh) 高度线性嵌入式滤波无源混频器
CN102201798B (zh) 一种适于纳米尺度工艺的高线性度射频前端
CN110557130B (zh) 一种带外线性度增强的电流模结构的接收机前端电路
CN101202533A (zh) 一种低功耗高性能正交下混频器
CN110661538B (zh) 低功耗全自动调整宽带接收机射频前端
CN102571134B (zh) 一种高频率选择性的射频前端集成电路结构
CN107453775A (zh) 一种零中频接收机
CN111130577B (zh) 一种用于射频收发芯片的抗干扰接收机电路
CN102638227A (zh) 带有片上有源平衡-不平衡变换器的超宽带混频器电路
Montazerolghaem et al. 19.1 a 300MHz-BW, 27-to-38dBm in-band OIP3 sub-7GHz receiver for 5G local area base station applications
WO2020140918A1 (zh) 接收器和低噪声放大器
CN104779917A (zh) 一种基于集成电感噪声相消技术的接收机前端电路
Hedayati et al. A+ 22dBm IIP3 and 3.5 dB NF wideband receiver with RF and baseband blocker filtering techniques
Jiang et al. A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance
Mehrpoo et al. A highly selective LNTA capable of large-signal handling for RF receiver front-ends
Lecchi et al. An Interferer-Tolerant RX with Translational Positive Feedback for 5G NR Applications Achieving 3.4 dB NF and 18 dBm OOB IIP3
Lee et al. A low-power RF front-end with merged LNA, differential power splitter, and quadrature mixer for IEEE 802.15. 4 (ZigBee) applications
CN112003571A (zh) 一种抗干扰网络及其应用
CN203632620U (zh) 一种带双反馈结构的宽带混频器
CN115765772B (zh) 低功耗混频优先型宽带接收机前端模块
Izquierdo et al. Reconfigurable wide-band receiver with positive feed-back translational loop
Khatri et al. A SAW-less CMOS CDMA receiver with active TX filtering

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16748623

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 23/01/2018)

122 Ep: pct application non-entry in european phase

Ref document number: 16748623

Country of ref document: EP

Kind code of ref document: A1