WO2016086432A1 - 自电容触摸面板及其导电层结构 - Google Patents

自电容触摸面板及其导电层结构 Download PDF

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Publication number
WO2016086432A1
WO2016086432A1 PCT/CN2014/093352 CN2014093352W WO2016086432A1 WO 2016086432 A1 WO2016086432 A1 WO 2016086432A1 CN 2014093352 W CN2014093352 W CN 2014093352W WO 2016086432 A1 WO2016086432 A1 WO 2016086432A1
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electrode pattern
layer structure
electrode
conductive layer
electrode patterns
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PCT/CN2014/093352
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English (en)
French (fr)
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张君恺
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深圳市华星光电技术有限公司
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Priority to US14/408,856 priority Critical patent/US20160349870A1/en
Publication of WO2016086432A1 publication Critical patent/WO2016086432A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04186—Touch location disambiguation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04104—Multi-touch detection in digitiser, i.e. details about the simultaneous detection of a plurality of touching locations, e.g. multiple fingers or pen and finger

Definitions

  • the present invention relates to the field of touch screen technologies, and in particular to a conductive layer structure and a self-capacitive touch panel having the same.
  • the principle of the self-capacitance touch technology is to create a capacitive coupling between a touch object such as a finger and a conductive layer structure, and to detect whether a touch event occurs by detecting a change in capacitance of the conductive layer structure.
  • a touch object such as a finger
  • a conductive layer structure to detect whether a touch event occurs by detecting a change in capacitance of the conductive layer structure.
  • how to identify the ghost point (Ghost point) to accurately identify the real touch point has been an urgent problem to be solved in the industry.
  • the technical problem to be solved by the embodiments of the present invention is to provide a self-capacitance touch panel and a conductive layer structure thereof to accurately identify a real touch point.
  • One technical solution adopted by the present invention is to provide a conductive layer structure including a plurality of rectangular first electrode patterns, a plurality of rectangular second electrode patterns, a plurality of rectangular third electrode patterns, and a first electrode pattern
  • the second electrode pattern and the third electrode pattern are correspondingly connected to the plurality of peripheral traces, the plurality of second electrode patterns are relatively spaced apart, and the first electrode pattern and the third electrode pattern are located between the adjacent two columns of the second electrode patterns Interleaved in the column direction, wherein the second electrode patterns in the same column are connected to the same peripheral trace
  • the conductive layer structure further includes a plurality of signals electrically connected to the first electrode pattern, the second electrode pattern and the third electrode pattern
  • the first electrode pattern, the second electrode pattern and the third electrode pattern are respectively connected to the peripheral trace through a signal trace
  • the conductive layer structure further includes a plurality of serially connected traces for serially connecting the first row in the same row
  • the electrode pattern is such that the first electrode patterns located in the same row are connected to the same
  • the peripheral traces connected to the first electrode pattern are disposed in the column direction and are disposed in parallel with the peripheral traces connected to the second electrode pattern.
  • the conductive layer structure further includes an auxiliary electrode pattern, and the auxiliary electrode pattern is disposed at an edge position outside the coverage area of the first electrode pattern and the second electrode pattern.
  • the auxiliary electrode pattern is a rectangular electrode pattern.
  • Another technical solution adopted by the present invention is to provide a conductive layer structure including a plurality of rectangular first electrode patterns, a plurality of rectangular second electrode patterns, a plurality of rectangular third electrode patterns, and a first electrode pattern
  • the second electrode pattern and the third electrode pattern are correspondingly connected to the plurality of peripheral traces, the plurality of second electrode patterns are relatively spaced apart, and the first electrode pattern and the third electrode are located between the adjacent two columns of the second electrode patterns
  • the patterns are staggered along the column direction.
  • the second electrode patterns located in the same column are connected to the same outer trace.
  • the conductive layer structure further includes a plurality of serially connected traces for serially connecting the first electrode patterns in the same row, such that the first electrode patterns located in the same row are connected to the same peripheral trace.
  • the peripheral traces connected to the first electrode pattern are disposed in the column direction and are disposed in parallel with the peripheral traces connected to the second electrode pattern.
  • the conductive layer structure further includes a plurality of serially connected traces for serially connecting the first electrode patterns in the same column, such that the first electrode patterns located in the same column are connected to the same peripheral trace.
  • the peripheral traces connected to the first electrode pattern are disposed in a row direction and are disposed perpendicular to a peripheral trace connected to the second electrode pattern.
  • the conductive layer structure further includes a plurality of signal traces electrically connected to the first electrode pattern, the second electrode pattern and the third electrode pattern, and the first electrode pattern, the second electrode pattern and the third electrode pattern pass the signal trace Connect with the peripheral traces.
  • the conductive layer structure further includes an auxiliary electrode pattern, and the auxiliary electrode pattern is disposed at an edge position outside the coverage area of the first electrode pattern and the second electrode pattern.
  • the auxiliary electrode pattern is a rectangular electrode pattern.
  • Another technical solution adopted by the present invention is to provide a self-capacitive touch panel, comprising a signal detector, a processor and a conductive layer structure, wherein the signal detector is connected with a plurality of peripheral traces to detect the row direction and the column direction.
  • the capacitive touch signal is connected to the signal detector to determine a real touch point in the multi-touch event according to the capacitive touch signal
  • the conductive layer structure includes a plurality of rectangular first electrode patterns and a plurality of rectangular second patterns An electrode pattern, a plurality of rectangular third electrode patterns, and a plurality of peripheral traces correspondingly connected to the first electrode pattern, the second electrode pattern and the third electrode pattern, wherein the plurality of second electrode patterns are relatively spaced apart and adjacent to each other
  • the first electrode pattern and the third electrode pattern between the two columns of second electrode patterns are staggered in the column direction.
  • the second electrode patterns located in the same column are connected to the same outer trace.
  • the conductive layer structure further includes a plurality of serially connected traces for serially connecting the first row in the same row
  • the electrode pattern is such that the first electrode patterns located in the same row are connected to the same peripheral trace.
  • the peripheral traces connected to the first electrode pattern are disposed in the column direction and are disposed in parallel with the peripheral traces connected to the second electrode pattern.
  • the conductive layer structure further includes a plurality of serially connected traces for serially connecting the first electrode patterns in the same column, such that the first electrode patterns located in the same column are connected to the same peripheral trace.
  • the peripheral traces connected to the first electrode pattern are disposed in a row direction and are disposed perpendicular to a peripheral trace connected to the second electrode pattern.
  • the conductive layer structure further includes a plurality of signal traces electrically connected to the first electrode pattern, the second electrode pattern and the third electrode pattern, and the first electrode pattern, the second electrode pattern and the third electrode pattern pass the signal trace Connect with the peripheral traces.
  • the conductive layer structure includes a plurality of rectangular first electrode patterns, a plurality of rectangular second electrode patterns, and a plurality of rectangular third electrodes. a pattern in which a plurality of second electrode patterns are disposed at intervals, and a first electrode pattern and a third electrode pattern located between adjacent two columns of second electrode patterns are alternately arranged in a column direction, and are detected in a row direction and a column direction by detecting Whether the capacitances of the first electrode pattern, the second electrode pattern and the third electrode pattern change, the real touch point and the ghost point can be accurately recognized, and the position of the real touch point can be obtained.
  • FIG. 1 is a first schematic structural view of a conductive layer structure according to a first embodiment of the present invention
  • FIG. 2 is a second schematic structural view of a conductive layer structure according to a first embodiment of the present invention.
  • FIG. 3 is a schematic view showing a first working principle of a conductive layer structure according to an embodiment of the present invention
  • FIG. 4 is a schematic view showing a second working principle of a conductive layer structure according to an embodiment of the present invention.
  • Fig. 5 is a schematic structural view showing a structure of a conductive layer according to a second embodiment of the present invention.
  • the conductive layer structure 10 provided in this embodiment is disposed on the surface of a substrate made of glass or a film material, and includes a plurality of rectangular first electrode patterns R xa1 , R xa2 , . . . .R xn , a plurality of rectangular second electrode patterns T x1 , T x2 , . . . T xm , a plurality of rectangular third electrode patterns R x1 , R x2 , . . . R xz , and the first electrode pattern R xa1 , R xa2 , R xa3 , ...
  • the second electrode patterns T x1 , T x2 , ... T xm and the third electrode patterns R x1 , R x2 , ... R xz correspond to a plurality of connections
  • the outer periphery of the root is M 0 . among them:
  • the plurality of first electrode patterns R xa1 , R xa2 , R xa3 , . . . R xn are arranged in a matrix, and the plurality of third electrode patterns R x1 , R x2 , . . . R xz are also arranged in a matrix, and a plurality of The strip-shaped third electrode patterns R x1 , R x2 , . . . R xz are arranged in parallel at intervals, and the first electrode patterns and the second electrode patterns located between the adjacent two columns of third electrode patterns are staggered in the column direction Settings.
  • the conductive layer structure 10 further includes a first electrode pattern R xa1 , R xa2 , R xa3 , . . . R xn , a second electrode pattern T x1 , T x2 , . . . T xm and a third
  • the electrode patterns R x1 , R x2 , . . . R xz correspond to a plurality of signal lines M 2 electrically connected, and the first electrode patterns R xa1 , R xa2 , R xa3 , . . . R xn , and the second electrode patterns T X1 , T x2 , ... T xm and third electrode patterns R x1 , R x2 , ... R xz are connected to the peripheral trace M 0 via the signal trace M 2 .
  • the second electrode patterns in the same column are connected to the same outer trace M 0 .
  • the conductive layer structure 10 further includes a plurality of serially connected traces M 1 disposed along the row direction, and the second electrode patterns located in the same row are connected in series by the serial traces M 1 so that the same row is
  • the second electrode patterns located in different columns are connected to the same outer trace M 0 , so that the width of the trace region can be reduced, which is advantageous for the narrow border or the borderless design of the liquid crystal display panel.
  • the first electrode patterns located in the same row are connected by the series trace M 1 and connected to the same peripheral trace M 0 , but the first electrode patterns in the same column are connected to different peripheral traces M 0 .
  • the series connection traces M 1 connecting the adjacent two first electrode patterns of the same row span the third electrode pattern, and the series connection trace M 1 is insulated from the corresponding third electrode pattern, and the phases of the same row are connected.
  • the tandem trace M 1 adjacent to the two second electrode patterns spans the third electrode pattern, and the tandem trace M 1 is insulated from the corresponding third electrode pattern.
  • the peripheral traces M 0 connected to the first electrode patterns R xa1 , R xa2 , R xa3 , . . . R xn are arranged in the column direction, and the second electrode patterns T x1 , T x2 , . . .
  • the peripheral trace M 0 of the .T xm connection is also arranged in the column direction, and the two are arranged in parallel.
  • the first electrode patterns R xa1 , R xa2 , R xa3 , . . . R xn , the second electrode patterns T x1 , T x2 , . . . T xm and the third electrode patterns R x1 , R x2 , . .. R xz is made of a transparent conductive material such as ITO (Indium Tin Oxide), and together constitutes a plurality of sensing units of the conductive layer structure 10 (self-capacitive touch screen).
  • ITO Indium Tin Oxide
  • the first electrode pattern and the second electrode pattern respectively form a self-capacitance C 1 to the ground.
  • a capacitance C 2 is formed between the finger 31 and the first electrode pattern or the second electrode pattern, and the capacitor C 2 and the capacitor C 1 form a figure.
  • the parallel circuit shown in 4 increases the capacitance of the corresponding sensing unit. Based on this, it is determined whether a touch event is generated by detecting a change in capacitance of each sensing unit, and the position of the touched point can be determined by the coordinate information of the first electrode pattern and the second electrode pattern on the touch screen.
  • the touch point by detecting whether the touch point corresponds to a change in capacitance of the adjacent first electrode pattern and the second electrode pattern, and the touch point corresponds to an area on the first electrode pattern and the second electrode pattern
  • the ratio of the area, the coordinates of the touch point in the column direction can be calculated.
  • the touch point corresponds to whether the capacitance of the adjacent third electrode pattern and the second electrode pattern or the first electrode pattern changes, and the touch point corresponds to the third electrode pattern and the second electrode pattern or the first
  • the ratio of the area of the area on the electrode pattern calculates the coordinates of the touch point in the row direction.
  • the present invention further provides the conductive layer structure of the second embodiment, which is different from the conductive layer structure 10 of the first embodiment in that the conductive layer structure 20 of the present embodiment is connected in series with the first electrode pattern.
  • the trace M 1 is disposed along the column direction, and the peripheral trace M 0 correspondingly connected to the first electrode pattern is disposed in the row direction.
  • a plurality of series wiring M 1 connected in series between the first electrode patterns in the same row, the first electrode pattern is located in the same column are connected with an outer trace M 0, and connected to the first electrode pattern
  • the peripheral trace M 0 is disposed in the row direction and is disposed perpendicular to the peripheral trace M 0 connected to the second electrode pattern.
  • serially connected traces M 1 connecting adjacent two first electrode patterns of the same column span the second electrode pattern, and the tandem traces M 1 are insulated from the corresponding second electrode patterns.
  • a primary object of an embodiment of the present invention is to design a conductive layer structure including a plurality of rectangular first electrode patterns, a plurality of rectangular second electrode patterns, and a plurality of rectangular third electrode patterns.
  • the plurality of second electrode patterns are disposed at intervals, and the first electrode patterns and the third electrode patterns located between the adjacent two columns of the second electrode patterns are staggered along the column direction, and the row direction and the column direction correspond to the first Whether the capacitance of the one electrode pattern, the second electrode pattern, and the third electrode pattern changes, the position of the real touch point can be recognized.
  • the conductive layer structure of the present invention may have other settings, such as:
  • the conductive layer structure may further include an auxiliary electrode pattern that is preferably rectangular, and the auxiliary electrode pattern is disposed at an edge position outside the first electrode pattern, the second electrode pattern, and the third electrode pattern covering region, that is, as shown in FIG. 1 or FIG.
  • the auxiliary electrode pattern is added to the edge position of the electrode pattern covering area.
  • the area of the touch area of the electrode pattern is compensated by touching the area of the touch area on the auxiliary electrode pattern, which is equivalent to the reduction of the area of the electrode pattern covering area.
  • the lost electrode pattern covers the area of the area, thereby reducing the coordinate offset of the edge position of the touch screen, and effectively improving the tailing phenomenon of the edge of the touch screen.
  • the present invention also provides a self-capacitive touch panel comprising a signal detector, a processor, and a conductive layer structure (including conductive layer structures 10, 20) of the above embodiments.
  • the signal detector is connected to the plurality of peripheral traces to detect the capacitive touch signals in the row direction and the column direction
  • the processor is connected to the signal detector to determine the true touch in the multi-touch event according to the capacitive touch signal. Control the point and get the position of the real touch point.

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  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
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Abstract

本发明提供一种自电容触摸面板及其导电层结构。该导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与第一电极图案、第二电极图案和第三电极图案对应连接的多根外围走线，多个第二电极图案相对间隔设置，且位于相邻两列第二电极图案之间的第一电极图案和第三电极图案沿列方向交错设置。通过上述方式，本发明能够准确识别真实触控点，并且有利于液晶显示面板的窄边框或无边框设计。

Description

自电容触摸面板及其导电层结构 【技术领域】
本发明涉及触摸屏技术领域，具体而言涉及一种导电层结构以及具有该导电层结构的自电容触摸面板。
【背景技术】
自电容触控技术的原理是在手指等触控物与导电层结构之间产生电容耦合，并通过检测导电层结构上的电容变化以确定是否发生触控事件。在多点自电容触控中，如何识别鬼点(Ghost point)，从而准确识别真实触控点，一直是业界亟待解决的问题。
【发明内容】
本发明实施例所要解决的技术问题是提供一种自电容触摸面板及其导电层结构，以准确识别真实触控点。
本发明采用的一个技术方案是：提供一种导电层结构，包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与第一电极图案、第二电极图案和第三电极图案对应连接的多根外围走线，多个第二电极图案相对间隔设置，且位于相邻两列第二电极图案之间的第一电极图案和第三电极图案沿列方向交错设置，其中，位于同一列的第二电极图案连接同一根外围走线，导电层结构还包括与第一电极图案、第二电极图案和第三电极图案对应导电连接的多根信号走线，第一电极图案、第二电极图案和第三电极图案通过信号走线与外围走线对应连接，导电层结构还包括多根串接走线，用于串接位于同一行的第一电极图案，使得位于同一行的第一电极图案连接同一根外围走线。
其中，与第一电极图案连接的外围走线沿列方向设置，且和与第二电极图案连接的外围走线平行间隔设置。
其中，导电层结构还包括辅助电极图案，辅助电极图案设置于第一电极图案和第二电极图案覆盖区域之外的边缘位置。
其中，辅助电极图案为长方形电极图案。
本发明采用的另一个技术方案是：提供一种导电层结构，包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与第一电极图案、第二电极图案和第三电极图案对应连接的多根外围走线，多个第二电极图案相对间隔设置，且位于相邻两列第二电极图案之间的第一电极图案和第三电极图案沿列方向交错设置。
其中，位于同一列的第二电极图案连接同一根外围走线。
其中，导电层结构还包括多根串接走线，用于串接位于同一行的第一电极图案，使得位于同一行的第一电极图案连接同一根外围走线。
其中，与第一电极图案连接的外围走线沿列方向设置，且和与第二电极图案连接的外围走线平行间隔设置。
其中，导电层结构还包括多根串接走线，用于串接位于同一列的第一电极图案，使得位于同一列的第一电极图案连接同一根外围走线。
其中，与第一电极图案连接的外围走线沿行方向设置，且和与第二电极图案连接的外围走线垂直设置。
其中，导电层结构还包括与第一电极图案、第二电极图案和第三电极图案对应导电连接的多根信号走线，第一电极图案、第二电极图案和第三电极图案通过信号走线与外围走线对应连接。
其中，导电层结构还包括辅助电极图案，辅助电极图案设置于第一电极图案和第二电极图案覆盖区域之外的边缘位置。
其中，辅助电极图案为长方形电极图案。
本发明采用的又一个技术方案是：提供一种自电容触摸面板，包括信号检测器、处理器以及导电层结构，信号检测器与多根外围走线对应连接，以检测行方向和列方向的电容触控信号，处理器与信号检测器连接，以根据电容触控信号判断多点触控事件中真实触控点，导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与第一电极图案、第二电极图案和第三电极图案对应连接的多根外围走线，多个第二电极图案相对间隔设置，且位于相邻两列第二电极图案之间的第一电极图案和第三电极图案沿列方向交错设置。
其中，位于同一列的第二电极图案连接同一根外围走线。
其中，导电层结构还包括多根串接走线，用于串接位于同一行的第一 电极图案，使得位于同一行的第一电极图案连接同一根外围走线。
其中，与第一电极图案连接的外围走线沿列方向设置，且和与第二电极图案连接的外围走线平行间隔设置。
其中，导电层结构还包括多根串接走线，用于串接位于同一列的第一电极图案，使得位于同一列的第一电极图案连接同一根外围走线。
其中，与第一电极图案连接的外围走线沿行方向设置，且和与第二电极图案连接的外围走线垂直设置。
其中，导电层结构还包括与第一电极图案、第二电极图案和第三电极图案对应导电连接的多根信号走线，第一电极图案、第二电极图案和第三电极图案通过信号走线与外围走线对应连接。
通过上述技术方案，本发明实施例所产生的有益效果是：本发明实施例设计导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案和多个矩形的第三电极图案，其中多个第二电极图案相对间隔设置，且位于相邻两列第二电极图案之间的第一电极图案和第三电极图案沿列方向交错设置，通过检测在行方向和列方向对应于第一电极图案、第二电极图案和第三电极图案的电容是否发生变化，可准确识别真实触摸点以及鬼点，并得到真实触摸点的位置。
【附图说明】
图1是本发明第一实施例的导电层结构的第一结构示意图；
图2是本发明第一实施例的导电层结构的第二结构示意图；
图3是本发明实施例的导电层结构的第一工作原理示意图；
图4是本发明实施例的导电层结构的第二工作原理示意图；
图5是本发明第二实施例的导电层结构的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，本发明以下所描述的实施例仅仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例，都属 于本发明保护的范围。
请参阅图1和图2所示，本实施例提供的导电层结构10设置于由玻璃或薄膜材料制成的基板的表面，包括多个矩形的第一电极图案Rxa1、Rxa2、...Rxn，多个矩形的第二电极图案Tx1、Tx2、...Txm，多个矩形的第三电极图案Rx1、Rx2、...Rxz，以及与第一电极图案Rxa1、Rxa2、Rxa3、...Rxn，第二电极图案Tx1、Tx2、...Txm和第三电极图案Rx1、Rx2、...Rxz对应连接的多根外围走线M0。其中：
多个第一电极图案Rxa1、Rxa2、Rxa3、...Rxn呈矩阵排布，多个第三电极图案Rx1、Rx2、...Rxz也呈矩阵排布，多个条状的第三电极图案Rx1、Rx2、...Rxz之间平行间隔设置，且位于相邻两列第三电极图案之间的第一电极图案和第二电极图案沿列方向交错设置。
参阅图1所示，导电层结构10还包括与第一电极图案Rxa1、Rxa2、Rxa3、...Rxn，第二电极图案Tx1、Tx2、...Txm和第三电极图案Rx1、Rx2、...Rxz对应导电连接的多根信号走线M2，并且第一电极图案Rxa1、Rxa2、Rxa3、...Rxn，第二电极图案Tx1、Tx2、...Txm和第三电极图案Rx1、Rx2、...Rxz通过信号走线M2与外围走线M0对应连接。
位于同一列的第二电极图案连接同一根外围走线M0。本实施例优选地，导电层结构10还包括沿行方向设置的多根串接走线M1，利用串接走线M1将位于同一行的第二电极图案串接起来，使得位于同一行但位于不同列的第二电极图案连接同一根外围走线M0，因此可减小走线区域的宽度，有利于液晶显示面板的窄边框或无边框设计。
位于同一行的第一电极图案通过串接走线M1连接，并连接于同一根外围走线M0，但位于同一列的第一电极图案连接不同的外围走线M0。
其中，连接同一行的相邻两个第一电极图案的串接走线M1跨越第三电极图案，且串接走线M1与对应的第三电极图案之间绝缘，连接同一行的相邻两个第二电极图案的串接走线M1跨越第三电极图案，且串接走线M1与对应的第三电极图案之间绝缘。
在本实施例中，与第一电极图案Rxa1、Rxa2、Rxa3、...Rxn连接的外围走线M0沿列方向设置，与第二电极图案Tx1、Tx2、...Txm连接的外围走线M0也沿列方向设置，两者平行间隔设置。
本实施例优选第一电极图案Rxa1、Rxa2、Rxa3、...Rxn，第二电极图案Tx1、Tx2、...Txm和第三电极图案Rx1、Rx2、...Rxz由ITO(Indium Tin Oxide，氧化铟锡)等透明导电材料制成，并且共同构成导电层结构10(自电容触摸屏)的多个感应单元。
请进一步结合图3所示，第一电极图案和第二电极图案分别与大地构成对地的自电容C1。当手指31触摸到触摸屏的盖板32时，由于人体可以等效为大地，手指31与第一电极图案或第二电极图案之间形成一个电容C2，电容C2与电容C1形成如图4所示的并联电路使得对应的感应单元的电容量增加。基于此，通过检测每个感应单元的电容变化即可判断是否产生触摸事件，并且通过第一电极图案和第二电极图案在触摸屏上的坐标信息即可判断触摸点的位置。
请再次参阅图2所示，通过检测触摸点对应于相邻的第一电极图案和第二电极图案的电容是否发生变化，以及该触摸点对应于第一电极图案和第二电极图案上的区域面积的比例，可计算得到该触摸点在列方向上的坐标。同理，通过检测触摸点对应于相邻的第三电极图案和第二电极图案或第一电极图案的电容是否发生变化，以及该触摸点对应于第三电极图案和第二电极图案或第一电极图案上的区域面积的比例，可计算得到该触摸点在行方向上的坐标。
本发明还提供第二实施例的导电层结构，与第一实施例的导电层结构10的不同之处在于，在本实施例的导电层结构20中，与第一电极图案对应连接的串接走线M1沿列方向设置，与第一电极图案对应连接的外围走线M0沿行方向设置。
如图5所示，多根串接走线M1串接位于同一列的第一电极图案，使得位于同一列的第一电极图案连接同一根外围走线M0，并且与第一电极图案连接的外围走线M0沿行方向设置，且和与第二电极图案连接的外围走线M0垂直设置。
其中，连接同一列的相邻两个第一电极图案的串接走线M1跨越第二电极图案，且串接走线M1与对应的第二电极图案之间绝缘。
本发明实施例的首要发明目的在于：设计导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案和多个矩形的第三电极图案，其 中多个第二电极图案相对间隔设置，且位于相邻两列第二电极图案之间的第一电极图案和第三电极图案沿列方向交错设置，通过检测在行方向和列方向对应于第一电极图案、第二电极图案和第三电极图案的电容是否发生变化，可识别真实触摸点的位置。
基于此，本发明的导电层结构还可以有其他设置，例如：
导电层结构还可以包括优选为长方形的辅助电极图案，辅助电极图案设置于第一电极图案、第二电极图案和第三电极图案覆盖区域之外的边缘位置，即在图1或图2所示电极图案覆盖区域的边缘位置增设辅助电极图案，当手指触摸到覆盖区域的边缘位置时，利用触摸到辅助电极图案上的触摸区域面积，补偿损失的电极图案覆盖区域的面积，相当于减小了损失的电极图案覆盖区域的面积，从而可降低触摸屏边缘位置的坐标偏移，有效改善触摸屏边缘的甩尾现象。
本发明还提供一种自电容触摸面板，其包括信号检测器、处理器以及上述实施例的导电层结构(包括导电层结构10、20)。其中，信号检测器与多根外围走线对应连接，以检测行方向和列方向的电容触控信号，处理器与信号检测器连接，以根据电容触控信号判断多点触控事件中真实触控点，并得到真实触摸点的位置。
再次说明，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种导电层结构，其中，所述导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与所述第一电极图案、所述第二电极图案和所述第三电极图案对应连接的多根外围走线，所述多个第三电极图案相对间隔设置，且位于相邻两列所述第三电极图案之间的所述第一电极图案和所述第二电极图案沿列方向交错设置，其中，
    位于同一列的所述第二电极图案连接同一根所述外围走线，所述导电层结构还包括与所述第一电极图案、所述第二电极图案和所述第三电极图案对应导电连接的多根信号走线，所述第一电极图案、所述第二电极图案和所述第三电极图案通过所述信号走线与所述外围走线对应连接，所述导电层结构还包括多根串接走线，用于串接位于同一行的所述第一电极图案，使得位于同一行的所述第一电极图案连接同一根所述外围走线。
  2. 根据权利要求1所述的导电层结构，其中，与所述第一电极图案连接的外围走线沿列方向设置，且和与所述第二电极图案连接的外围走线平行间隔设置。
  3. 根据权利要求1所述的导电层结构，其中，所述导电层结构还包括辅助电极图案，所述辅助电极图案设置于所述第一电极图案和所述第二电极图案覆盖区域之外的边缘位置。
  4. 根据权利要求3所述的导电层结构，其中，所述辅助电极图案为长方形电极图案。
  5. 一种导电层结构，其中，所述导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与所述第一电极图案、所述第二电极图案和所述第三电极图案对应连接的多根外围走线，其中，所述多个第三电极图案相对间隔设置，且位于相邻两列所述第三电极图案之间的所述第一电极图案和所述第二电极图案沿列方向交错设置。
  6. 根据权利要求5所述的导电层结构，其中，位于同一列的所述第二电极图案连接同一根所述外围走线。
  7. 根据权利要求5所述的导电层结构，其中，所述导电层结构还包括多根串接走线，用于串接位于同一行的所述第一电极图案，使得位于同一行的所述第一电极图案连接同一根所述外围走线。
  8. 根据权利要求6和7所述的导电层结构，其中，与所述第一电极图案连接的外围走线沿列方向设置，且和与所述第二电极图案连接的外围走线平行间隔设置。
  9. 根据权利要求5所述的导电层结构，其中，所述导电层结构还包括多根串接走线，用于串接位于同一列的所述第一电极图案，使得位于同一列的所述第一电极图案连接同一根所述外围走线。
  10. 根据权利要求6和9所述的导电层结构，其中，与所述第一电极图案连接的外围走线沿行方向设置，且和与所述第二电极图案连接的外围走线垂直设置。
  11. 根据权利要求5所述的导电层结构，其中，所述导电层结构还包括与所述第一电极图案、所述第二电极图案和所述第三电极图案对应导电连接的多根信号走线，所述第一电极图案、所述第二电极图案和所述第三电极图案通过所述信号走线与所述外围走线对应连接。
  12. 根据权利要求5所述的导电层结构，其中，所述导电层结构还包括辅助电极图案，所述辅助电极图案设置于所述第一电极图案和所述第二电极图案覆盖区域之外的边缘位置。
  13. 根据权利要求12所述的导电层结构，其中，所述辅助电极图案为长方形电极图案。
  14. 一种自电容触摸面板，其中，所述自电容触摸面板包括信号检测器、处理器以及导电层结构，所述信号检测器与所述多根外围走线对应连接，以检测所述行方向和所述列方向的电容触控信号，所述处理器与所述信号检测器连接，以根据所述电容触控信号判断多点触控事件中真实触控点，所述导电层结构包括多个矩形的第一电极图案、多个矩形的第二电极图案、多个矩形的第三电极图案以及与所述第一电极图案、所述第二电极图案和所述第三电极图案对应连接的多根外围走线，其中，所述多个第三电极图案相对间隔设置，且位于相邻两列所述第三电极图案之间的所述第一电极图案和所述第二电极图案沿列方向交错设置。
  15. 根据权利要求14所述的自电容触摸面板，其中，位于同一列的所述第二电极图案连接同一根所述外围走线。
  16. 根据权利要求14所述的自电容触摸面板，其中，所述导电层结构还包括多根串接走线，用于串接位于同一行的所述第一电极图案，使得位于同一行的所述第一电极图案连接同一根所述外围走线。
  17. 根据权利要求15和16所述的自电容触摸面板，其中，与所述第一电极图案连接的外围走线沿列方向设置，且和与所述第二电极图案连接的外围走线平行间隔设置。
  18. 根据权利要求1所述的自电容触摸面板，其中，所述导电层结构还包括多根串接走线，用于串接位于同一列的所述第一电极图案，使得位于同一列的所述第一电极图案连接同一根所述外围走线。
  19. 根据权利要求15和18所述的自电容触摸面板，其中，与所述第一电极图案连接的外围走线沿行方向设置，且和与所述第二电极图案连接的外围走线垂直设置。
  20. 根据权利要求14所述的自电容触摸面板，其中，所述导电层结构还包括与所述第一电极图案、所述第二电极图案和所述第三电极图案对应导电连接的多根信号走线，所述第一电极图案、所述第二电极图案和所述第三电极图案通过所述信号走线与所述外围走线对应连接。
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US11816298B2 (en) * 2020-08-14 2023-11-14 Synaptics Incorporated Single layer capacitive imaging sensors

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270077A (zh) * 2011-07-20 2011-12-07 信利半导体有限公司 一种电容式触摸屏
CN103164091A (zh) * 2012-08-31 2013-06-19 敦泰科技有限公司 单层电极互电容触摸屏
CN103699278A (zh) * 2013-10-22 2014-04-02 敦泰科技有限公司 用于触摸屏的自电容变化检测方法及自电容传感装置
CN104020912A (zh) * 2014-05-30 2014-09-03 京东方科技集团股份有限公司 电容式触摸结构、内嵌式触摸屏、显示装置及其扫描方法
CN104035638A (zh) * 2014-05-27 2014-09-10 上海天马微电子有限公司 触控电极结构、触控面板、显示装置和定位触控点的方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8576193B2 (en) * 2008-04-25 2013-11-05 Apple Inc. Brick layout and stackup for a touch screen
US8217913B2 (en) * 2009-02-02 2012-07-10 Apple Inc. Integrated touch screen
CN102200866B (zh) * 2010-03-24 2015-11-25 上海天马微电子有限公司 互电容触摸感应装置及其检测方法、触摸显示装置
TWI536231B (zh) * 2011-05-09 2016-06-01 陞達科技股份有限公司 多點觸碰偵測方法及其裝置
EP2538313B1 (en) * 2011-06-20 2015-05-20 Melfas, Inc. Touch sensor panel
CN103116431B (zh) * 2013-02-06 2016-07-06 敦泰科技有限公司 一种自电容触摸屏及电子设备

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270077A (zh) * 2011-07-20 2011-12-07 信利半导体有限公司 一种电容式触摸屏
CN103164091A (zh) * 2012-08-31 2013-06-19 敦泰科技有限公司 单层电极互电容触摸屏
CN103699278A (zh) * 2013-10-22 2014-04-02 敦泰科技有限公司 用于触摸屏的自电容变化检测方法及自电容传感装置
CN104035638A (zh) * 2014-05-27 2014-09-10 上海天马微电子有限公司 触控电极结构、触控面板、显示装置和定位触控点的方法
CN104020912A (zh) * 2014-05-30 2014-09-03 京东方科技集团股份有限公司 电容式触摸结构、内嵌式触摸屏、显示装置及其扫描方法

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