WO2016078343A1 - 一种设备调度方法、任务管理器及存储介质 - Google Patents

一种设备调度方法、任务管理器及存储介质 Download PDF

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Publication number
WO2016078343A1
WO2016078343A1 PCT/CN2015/077709 CN2015077709W WO2016078343A1 WO 2016078343 A1 WO2016078343 A1 WO 2016078343A1 CN 2015077709 W CN2015077709 W CN 2015077709W WO 2016078343 A1 WO2016078343 A1 WO 2016078343A1
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task
descriptor
parameter
atomic
completed
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PCT/CN2015/077709
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English (en)
French (fr)
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马超
王劲松
林文琼
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深圳市中兴微电子技术有限公司
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Priority to US15/528,145 priority Critical patent/US20170329632A1/en
Publication of WO2016078343A1 publication Critical patent/WO2016078343A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5021—Priority

Definitions

  • the present invention relates to a device scheduling related technology in the field of signal processing, and in particular, to a device scheduling method, a task manager, and a storage medium.
  • LTE Long Term Evolution
  • LTE-A Long Term Evolution-Advanced
  • ASIC application-specific integrated circuit
  • the scheduling efficiency is low.
  • the main processor needs to query various startup conditions of the computing device. Since the processor is a serial execution instruction, the item-by-item query is inefficient.
  • the embodiment of the present invention is to provide a device scheduling method, a task manager, and a storage medium, which can solve the problem of low scheduling efficiency and poor real-time performance of the device in the prior art.
  • An embodiment of the present invention provides a device scheduling method, where the method includes:
  • the preset parameters are obtained according to the task information, and the parameter is configured to be completed. device of.
  • the task information includes: an input buffer number (IBN, Input Buffer Number), an output buffer number (OBN, Output Buffer Number), an input data number (IDS, Input Data Size), and a data output by the task.
  • IBN input buffer number
  • OBN Input Buffer Number
  • OBN output buffer number
  • IDS Input Data Size
  • DID Device IDentity
  • the determining that the task has met the startup condition comprises: determining that the data in the cache is not less than the IDS, the storage space occupied by the ODS is not greater than the storage space in the cache, and the device is in an idle or configurable state.
  • the task information includes: a parameter address (PA, Parameter Address) and a data transmission type;
  • Obtaining the preset parameters according to the task information, and configuring the parameter to the device to be completed and starting the device includes: controlling a clock of the device to be completed, according to the parameter address Obtaining preset parameters, and configuring the parameters to the device to be completed according to the data transmission type to start the device.
  • the task information includes: a repetition configuration number and a parameter address repetition type
  • the method further includes: repeatedly determining, according to the number of repeated configurations, whether the start condition of the task is satisfied, whether the priority is the highest, and determining that the task has met the start condition each time, and the task is currently satisfied.
  • the parameter is configured to the device when the task with the highest priority among the tasks in the condition is started;
  • the repeated configuration times repeatedly determining whether the startup condition of the task is satisfied, whether the priority is the highest, and determining that the task has met the startup condition each time, and the task is a task that currently meets the startup condition.
  • the parameters are read in the manner of increasing the address, and the read parameters are configured to the device.
  • the task information includes: atomic task descriptor packet information
  • the method further includes: waiting for a task corresponding to the next atomic task descriptor in the atomic task descriptor packet to satisfy a start condition, acquiring a parameter corresponding to the next atomic task descriptor, and configuring the acquired parameter to the task to be completed.
  • the device starts the device until the last atomic task descriptor processing in the atomic task descriptor packet ends.
  • the embodiment of the present invention further provides a task manager, where the task manager includes: a queue manager (QMAN, Queue Manager) and a task loader (TLOADER, Task LOADER);
  • the task manager includes: a queue manager (QMAN, Queue Manager) and a task loader (TLOADER, Task LOADER);
  • the QMAN is configured to read and parse a task descriptor in the task queue, obtain task information of the task corresponding to the task descriptor, and determine that the task has met a startup condition, and the task is that the current start condition is met.
  • the TLOADER is triggered when the task with the highest priority among the tasks is the highest priority;
  • the TLOADER is configured to acquire preset parameters according to the task information, and configure the parameters to the device to be completed.
  • the task information includes: IBN, OBN, IDS, ODS, and DID;
  • the QMAN is configured to determine that the data in the cache is not less than the IDS, the storage space occupied by the ODS is not greater than the storage space in the cache, and the device is in an idle or configurable state;
  • the task manager further includes: a buffer manager (BMAN, Buffer Manager) and a device manager (DMAN, Device Manager);
  • BMAN buffer manager
  • DMAN Device Manager
  • the BMAN is configured to monitor the cached data status and output the cached data status to the QMAN;
  • the DMAN is configured to detect a status of the device and output a status of the device to the QMAN.
  • the task information includes: a PA and a data transmission type
  • the TLOADER is configured to: when the clock of the device to be completed is turned on, obtain a preset parameter according to the parameter address, and configure the parameter to the device to be completed according to the data transmission type, To activate the device;
  • the DMAN is further configured to control a clock of the device to be completed.
  • the task information includes: a repetition configuration number and a parameter address repetition type
  • the QMAN is further configured to repeatedly determine, according to the repeated configuration times, whether the start condition of the task is met, whether the priority is the highest, and each time the task is determined to have met the start condition, and the task is current.
  • the TLOADER is triggered when the task with the highest priority among the tasks satisfying the start condition is met;
  • the TLOADER is further configured to repeatedly configure the parameter to the device; or, read the parameter in an incremental manner, and configure the read parameter to the device.
  • the task information includes: atomic task descriptor packet information
  • the TLOADER is further configured to wait for the next atomic task descriptor corresponding task in the atomic task descriptor packet to satisfy the start condition, and obtain the parameter corresponding to the next atomic task descriptor. And configuring the acquired parameters to the device to be completed and starting the device until the last atomic task descriptor processing in the atomic task descriptor packet ends.
  • the embodiment of the present invention further provides a computer storage medium, where the computer storage medium stores a computer program, and the computer program is used to execute the device scheduling method of the embodiment of the present invention.
  • the device scheduling method, the task manager, and the storage medium provided by the embodiments of the present invention set a dedicated task manager, and the task manager reads and parses the task descriptor (TD, Task Description) in the task queue to obtain the
  • the task descriptor corresponds to the task information of the task; when it is determined that the task has met the start condition, and the task is the task with the highest priority among the tasks that meet the start condition, the preset parameters are obtained according to the task information, and the task is obtained.
  • the parameters are configured for the device to be completed.
  • the dedicated hardware task manager and the parametric design are used to schedule the device, which can solve the problems of low efficiency and poor real-time performance caused by software scheduling the device in the prior art.
  • FIG. 1 is a schematic flowchart of a device scheduling method according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a task queue according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a task queue read empty according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a task queue full in accordance with an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a bit field definition manner of a task descriptor according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of correspondence between a device ID and a device base address register according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of device registration according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a cache defined by an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of an incremental transmission mode transmission according to an embodiment of the present invention.
  • FIG. 10 is a schematic diagram of transmission of a fixed address transmission mode according to an embodiment of the present invention.
  • FIG. 11 is a schematic diagram of transmission of a discrete address transmission mode according to an embodiment of the present invention.
  • FIG. 12 is a schematic diagram of transmission of an information transmission mode according to an embodiment of the present invention.
  • FIG. 13 is a schematic diagram of parameter repetition configuration according to an embodiment of the present invention.
  • FIG. 14 is a schematic diagram of an atomic task descriptor package according to an embodiment of the present invention.
  • 15 is a schematic diagram of an abstract definition of a device according to an embodiment of the present invention.
  • 16 is a schematic structural diagram of a task manager according to an embodiment of the present invention.
  • FIG. 17 is a schematic diagram of a device scheduling system including a task manager according to an embodiment of the present invention.
  • FIG. 18 is a schematic diagram of internal connection of a task manager supporting three task queues, two devices, and four cache management according to an embodiment of the present invention.
  • FIG. 19 is a schematic diagram of an apparatus having two sets of control interfaces according to an embodiment of the present invention.
  • FIG. 20 is a schematic diagram of task interruption reporting according to an embodiment of the present invention.
  • a dedicated task manager is set, and the task manager reads and parses the task descriptor in the task queue, acquires task information of the task corresponding to the task descriptor, and determines that the task has met the startup condition. And if the task is the task with the highest priority among the tasks that meet the start condition, the preset parameters are obtained according to the task information, and the parameters are configured to the device to be completed.
  • FIG. 1 is a schematic flowchart of a device scheduling method according to an embodiment of the present invention. As shown in FIG. 1 , a device scheduling method according to an embodiment of the present invention includes:
  • Step 101 Read and parse a task descriptor in the task queue, and obtain task information of the task corresponding to the task descriptor.
  • a dedicated task manager is preset; the task manager includes QMAN, BMAN, DMAN, and TLOADER; correspondingly, this step is completed by QMAN;
  • the method further includes: the QMAN controls the task queue read enable;
  • the QMAN can control the task queue read enable through the QY_ENABLE register; only when the task queue read enable is enabled, the QMAN can The task descriptor is read in the task queue. Otherwise, QMAN does not read the task descriptor.
  • the method before the QMAN controls the task queue read enable, the method further includes: the processor filling in the task descriptor to the task queue, calculating the task parameters, and placing the task parameters in the data storage (DM) , Data Memory);
  • the task queue is a queue of task descriptors stored in the DM; for Queue Y, the starting address and size of the queue Y in the DM can be defined by the QY_START_ADDR and QY_SIZE registers; as shown in FIG. 2;
  • the task queue reads and writes in a ring-like manner, and the hardware registers QY_WPTR and QY_RPTR identify the current read and write position; QY_WPTR points to the next position to be filled in the task descriptor, and QY_RPTR points to the next task to be read. The location of the descriptor;
  • the processor fills the task descriptor to the task queue, it fills in from the current QY_WPTR position, and can sequentially fill in one or more task descriptors at a time, and then updates QY_WPTR to point to the next fillable position, and wraps around when the task queue boundary is encountered. Go back to the QY_START_ADDR location to continue;
  • QMAN When QMAN reads the task descriptor in the task queue, it reads out one task descriptor each time, and then updates QY_RPTR to the next task descriptor position after reading. Wraps around to the QY_START_ADDR start position when the task queue boundary is encountered;
  • QY_RPTR After reading the task descriptor and updating QY_RPTR, if QY_RPTR and QY_WPTR are coincident, it indicates that Queue Y is empty, and the queue is no longer read, and QMAN sets the QY_EMPTY signal to "1"; as shown in FIG. 3;
  • the processor may control the task queue to be paused at any time according to actual needs, so that the tasks in the queue can be cleared and adjusted, that is, when the tasks in the queue need to be adjusted.
  • the queue can be paused first, then arbitrarily adjusted by modifying QY_WPTR and QY_RPTR, and the task descriptor in the task queue; when the task queue is controlled to pause, the task descriptor that has been read from the task queue will continue to execute Process.
  • the task information includes: DID, IBN, OBN, IDS, ODS, task ID (TID, Task ID), PA of the configuration device, Device Offset Address (DOA), and configuration device.
  • Parameter length PS, Parameter Size
  • transmission type BT, Burst Type
  • number of repeated configurations task priority
  • Atomic Task Description Package ATDP information, and information on whether or not the interrupt is reported after the task is completed.
  • Etc as shown in Figure 5 is a schematic diagram of a bit field definition of the task descriptor;
  • the function of the device ID includes: registering a device, so that the device can be scheduled and managed; identifying a device that performs the task; and corresponding to a physical address of a control interface of the device; for example, through a device base address register DZ_BASE_ADDR is used to configure the base address of the control interface of Device Z.
  • Each DID corresponds to a DZ_BASE_ADDR register, as shown in Figure 6.
  • the device of the TLOADER configuration parameter is a device that has been registered on the DMAN; the registration method is to assign a DID to the device to correspond to the physical address of the device control interface; for example:
  • the physical addresses of the two devices, DEV0, DEV1, and their control interfaces are: 0x000, 0x100. If you want to register DEV0 so that it can be scheduled, set D0_BASE_ADDR to the physical address of the DEV0 control interface, ie 0x000; If you want to keep DEV1 directly scheduled by the processor, do not set any DZ_BASE_ADDR to the physical address 0x100 of the DEV1 control interface, as shown in Figure 7;
  • the TID size may be 14 bits to ensure that the TID does not repeat for a sufficiently long time; the TID may also reflect the priority of the task.
  • Step 102 Determine that the task has met the start condition, and the task is the task with the highest priority among the tasks that meet the start condition, obtain the preset parameters according to the task information, and configure the parameter to be completed.
  • the device of the task and the device is activated;
  • the determining that the task has met the start condition includes:
  • the QMAN determines that the data in the cache is not less than the IDS, the storage space occupied by the ODS is not greater than the storage space in the cache, and the device is in an idle or configurable state;
  • the cache is set in the DM, and the cached data state can be monitored in real time by a buffer manager (BMAN, Buffer Manager), and the start address and size of the Buffer X in the DM are defined by BX_START_ADDR and BX_SIZE, and the data counter BX_DATA_CNT records how much data is stored in the current Buffer X.
  • BX_SPACE_CNT is used to indicate how much remaining memory is still present in Buffer X
  • BX_SIZE BX_DATA_CNT+BX_SPACE_CNT; as shown in Figure 8, a block diagram of the buffer defined in the data memory DM ;
  • the device performing the task performs a task and reads data from Buffer X
  • the device is the consumer of the data, and the value of BX_DATA_CNT is reduced by the number of data read;
  • the device performing the task performs a task and writes data to Buffer X
  • the device is the producer of the data, and the value of BX_DATA_CNT is increased by the number of data written, and the corresponding BX_SPACE_CNT becomes smaller.
  • the method further includes: the BMAN updating the data size in the cache according to a preset data update mode;
  • the data update mode includes: a real-time update mode and a non-real-time update mode; when the data update mode is the real-time update mode, the BMAN updates the data size in the cache in real time according to its own clock monitoring period, that is, updates BX_DATA_CNT When the data update mode is the non-real time update mode, the BMAN updates the data size in the cache only when one task is executed, that is, updates BX_DATA_CNT.
  • the determining that the data in the cache is not less than the IDS includes: the value of the BX_DATA_CNT output by the QMAN comparison BMAN and the size of the IDS value, when the value of the BX_DATA_CNT is greater than or equal to the IDS When determining the value, determining that the data in the cache is not less than the IDS;
  • Determining that the storage space occupied by the ODS is not greater than the storage space in the cache includes: comparing, by the QMAN, the value of the BX_SPACE_CNT output by the BMAN and the size of the ODS value, when the value of the BX_SPACE_CNT is greater than or equal to the ODS value, determining The storage space occupied by the ODS is not greater than the storage space in the cache;
  • the value of the register DZ_CTRL_IF_FULL is used to determine the configurable condition of the control interface of Device Z;
  • the value of the control interface counter in the TLOADER is automatically incremented by one.
  • the control interface counter is automatically decremented by one; usually, the device interface has a depth of at most 2 Therefore, the maximum value of the control interface counter is also 2;
  • the DZ_CTRL_IF_DEPTH register is used to indicate the control interface depth of Device Z.
  • the TLOADER when the TLOADER determines that the corresponding control interface counter of the device is zero, indicating that the device does not currently have a task to perform, the TLOADER triggers the DMAN to control the clock of the device to be turned off.
  • the task information includes: a parameter address PA and a data transmission type, the acquiring a preset parameter according to the task information, configuring the parameter to a device to be completed, and starting the Equipment includes:
  • the TLOADER obtains a preset parameter according to the parameter address, and configures the parameter to the device to be completed according to the transmission type to start the device to execute.
  • the DMAN is further configured to control a clock of the device to be completed
  • the transmission type includes: Increment transfer mode, Fixed address transfer mode, Discrete address transfer mode, and Message transfer mode;
  • the incremental transmission mode is a mode in which the transmission address is automatically increased, that is, the address of the parameter read from the buffer and the address of the parameter written to the control interface of the device are sequentially increased; as shown in FIG. schematic diagram;
  • the transmission destination address of the fixed address transmission mode is fixed, and is applicable to a configuration of a first in first out queue (FIFO) interface; in this transmission mode, the configuration module sequentially reads parameters from the DM, but Write parameters to the fixed address of the device control interface; 10 shows a schematic diagram of transmission in a fixed address transmission mode;
  • FIFO first in first out queue
  • the transmission address is given in the parameter, that is, one parameter is 64 bits, the upper 32 bits are the values of the parameters, and the lower 32 bits are the destination addresses of the parameters.
  • the address of the register to be configured is not a sequential order; in this transmission mode, the parameter in the cache contains the address information at the same time, and the configuration module configures the parameter according to the destination address information of the parameter; as shown in FIG. Schematic diagram of transmission in discrete address transmission mode;
  • the information transmission mode is to transmit a 32-bit Message constant; in the transmission mode, the configuration module does not need to read the configuration parameters in the cache, but directly configures the 32-bit constant to the device corresponding to the DID.
  • the offset address DOA here, the 32-bit constant is a 32-bit constant of the parameter address of the multiplexing task descriptor, as shown in FIG. 12 is a schematic diagram of the information transmission mode transmission.
  • the task information includes: a repetition configuration number and a parameter address repetition type
  • the task descriptor is a Repeat Task Descriptor (RTD)
  • the method further includes:
  • the repeated configuration times repeatedly determining whether the startup condition of the task is satisfied, whether the priority is the highest, and determining that the task has met the startup condition each time, and the task is a task that currently meets the startup condition.
  • the parameter is read in the manner of increasing the address, and the read parameter is configured to the device; as shown in FIG. 13(b);
  • the REPEAT field of the task descriptor is used to set the number of times the task is executed, and when the number of repetitions is N, it means that the number of repetitions is N+1 times;
  • the PART field of the task descriptor is used to set the parameter address repetition type; here,
  • the parameter address repetition type includes: repeating the reading parameter and the address incrementing manner to read the parameter; wherein the repeatedly reading the parameter, that is, reading the same parameter multiple times to configure the device; and the address increasing manner is read.
  • the parameters are taken, that is, the parameters are read in such a manner that each address is incremented by a fixed interval of PS, and the read parameters are configured to the device.
  • the task information includes: ATDP information; when the QMAN determines that the task descriptor is an Atomic Task Description (ATD) in the ATDP according to the ATDP information, configuring the parameter to After the device of the task is completed and the device is started, the method further includes:
  • ATDP Atomic Task Description
  • the QMAN waits for the next atomic task descriptor corresponding task in the atomic task descriptor package to satisfy the start condition, and starts TLOADER, acquires the parameter corresponding to the next atomic task descriptor, and configures the acquired parameter to the task to be completed.
  • Device starts the device until the last atomic task descriptor processing in the atomic task descriptor packet ends; thus, the tasks in the ATDP can be guaranteed to be executed continuously without being subjected to high priority tasks other than the ATDP interrupt;
  • the ATOMIC field in the task descriptor TD is used to implement the ATDP setting. If there are N ATDs in the ATDP packet, the ATOMIC bit in the first N-1 TDs is set to 1, and the ATOMIC bit of the last TD is 0. , indicating that the TD is the last atomic task descriptor in the ATDP; the ATD in the ATDP is the task descriptor in the same task queue; FIG. 14 is a schematic diagram of the definition of the ATDP.
  • the task information includes: information about whether the interrupt is reported after the task is completed, the TID, the number of repeated configurations, and the parameter address repetition type; and determining, according to the task information, that the number of repeated configurations is not zero and the task is completed.
  • the method further includes: after each task is completed, the DMAN reports the interruption;
  • the TIE bit in the task descriptor is used to set whether an interrupt is generated after the current task is completed, for example, when it is determined that the number of repeated configurations included in the task information is not zero, and When the TIE bit is set to "1", the DMAN will report an interrupt every time the task is completed;
  • the TLOADER will save the task's TID and TIE when the task is delivered to the device.
  • the DMAN determines the value of the TIE corresponding to the task. If 1, the corresponding TID is added to the interrupt TID FIFO. As long as the interrupt TID FIFO is not empty, the DMAN will report the interrupt, and when the reported interrupt is received by the processor, the processor can read the interrupt TID FIFO. The TID in the middle determines which task was interrupted.
  • the device refers to any hardware component having a certain function
  • An abstract device includes: a control interface: device parameter configuration, startup, reset, etc. can be completed through the control interface; an Execution Unit: parsing parameters configured from the control interface to implement a certain computing function; Interface): The device accesses the DM through the bus interface, reads the input data required to execute the task, and outputs the result of the operation; as shown in Figure 15, the abstract definition map of the device.
  • FIG. 16 is a schematic structural diagram of a task manager according to an embodiment of the present invention
  • FIG. 17 is a schematic diagram of a device scheduling system using a task manager according to an embodiment of the present invention
  • the component manager of the embodiment of the present invention includes: QMAN161 and TLOADER162; among them,
  • the QMAN 161 is configured to read and parse a task descriptor in the task queue, obtain task information of the task corresponding to the task descriptor, and determine that the task has met a startup condition, and the task is that the current start condition is met.
  • the TLOADER 162 is triggered when the task with the highest priority among the tasks is the highest priority;
  • the TLOADER 162 is configured to acquire preset parameters according to the task information, and configure the parameters to the device to be completed.
  • the QMAN 161 is further configured to control the task queue read enable; when the queue is Queue Y, the QMAN 161 can control the QY_ENABLE register.
  • the task queue read enable; the QMAN 161 can read the task descriptor from the task queue only when the task queue read enable; otherwise, the QMAN 161 does not read the task descriptor;
  • the processor is configured to fill in a task descriptor to the task queue, and calculate task parameters and place the task parameters in the DM;
  • the work of the processor, task manager and device can be parallel;
  • the task queue is a queue of task descriptors stored in the DM; for the queue Queue Y, the starting address and size of the Queue Y in the DM can be defined by the QY_START_ADDR and QY_SIZE registers; as shown in FIG. 2;
  • the task queue reads and writes in a ring-like manner, and the hardware registers QY_WPTR and QY_RPTR identify the current read and write position; QY_WPTR points to the next position to be filled in the task descriptor, and QY_RPTR points to the next task to be read. The location of the descriptor;
  • the processor fills the task descriptor to the task queue, it fills in from the current QY_WPTR position, and can sequentially fill in one or more task descriptors at a time, and then updates QY_WPTR to point to the next fillable position, and wraps around when the task queue boundary is encountered. Go back to the QY_START_ADDR location to continue;
  • QMAN 161 When QMAN 161 reads the task descriptor in the task queue, it reads out one task descriptor each time, and then updates QY_RPTR to the next task descriptor position after reading. Wraps around to the QY_START_ADDR start position when the task queue boundary is encountered;
  • QY_RPTR After reading the task descriptor and updating QY_RPTR, if QY_RPTR and QY_WPTR are coincident, it indicates that Queue Y is empty, and the queue is no longer read, and QMAN sets the QY_EMPTY signal to "1"; as shown in FIG. 3;
  • the QMAN 161 is further configured to control the task queue pause at any time according to actual needs, so that the task in the queue can be cleared and adjusted, that is, when the processor needs to adjust the queue.
  • Task you can pause the queue first, then modify QY_WPTR and QY_RPTR, and the task descriptor in the task queue to achieve arbitrary adjustment; when controlling the task queue pause, the task descriptor has been read from the task queue The follow-up process will continue.
  • the task information includes: an input buffer number IBN, an output buffer number OBN, a data input number IDS of the task, a data output number ODS of the task output, and a device identification code DID;
  • the QMAN 161 is configured to determine that the data in the cache is not less than the IDS, the storage space occupied by the ODS is not greater than the storage space in the cache, and the device is in an idle or configurable state;
  • the task manager further includes: BMAN 163 and DMAN 164; wherein
  • the BMAN 163 is configured to monitor the cached data status, and output the cached data status to the QMAN 161;
  • the DMAN 164 is configured to detect a status of the device, and output a status of the device to the QMAN 161;
  • the device performing the task performs a task to read data from Buffer X
  • the device For the consumer of the data the value of BX_DATA_CNT will be smaller than the number of data read
  • the device performing the task performs a task and writes data to Buffer X
  • the device is the producer of the data, and the value of BX_DATA_CNT is increased by the number of data written, and the corresponding BX_SPACE_CNT becomes smaller.
  • the function of the device ID includes: registering a device, so that the device can be scheduled and managed; identifying a device that performs the task; corresponding to a physical address of a control interface of the device; for example, through a device base address register DZ_BASE_ADDR Configure the base address of the control interface of Device Z.
  • Each DID corresponds to a DZ_BASE_ADDR register, as shown in Figure 6.
  • the devices scheduled by the task manager are all devices that have been registered on the DMAN 164; the registration method is to assign a DID to the device to correspond to the physical address of the device control interface; for example: There are two devices, DEV0, DEV1, whose physical addresses correspond to the control interfaces: 0x000, 0x100. If you want to register DEV0 so that it can be scheduled, set D0_BASE_ADDR to the physical address of the DEV0 control interface, which is 0x000. If you want to keep DEV1 directly scheduled by the processor, do not set any DZ_BASE_ADDR to the physics of the DEV1 control interface.
  • the address 0x100 can be as shown in FIG. 7; that is, the task manager in the embodiment of the present invention can only schedule the device in the registered state, and the scheduling of the unregistered device or the device in the logout state, It can be executed by the processor.
  • the QMAN 161 includes: an arbiter (TD_ARBITOR) 1611, and at least one sub-queue manager QMANy 1612; wherein the QMANy 1612, configured to determine that the task satisfies a start condition, triggers the arbiter 1611 to determine The priority of the task, when the arbiter 1611 determines that the task is the task with the highest priority among the tasks currently satisfying the start condition, triggers TLOADER 162; as shown in FIG. 18, to support 3 queues, 2 devices, 4 The internal connection diagram of the task manager of the cache management;
  • the QMAN 161 determines that the data in the cache is not less than the IDS packet.
  • the QMAN 161 compares the value of the BX_DATA_CNT outputted by the BMAN 163 with the size of the IDS value, and when the value of the BX_DATA_CNT is greater than or equal to the IDS value, determining that the data in the cache is not less than the IDS;
  • the QMAN 161 determines that the storage space occupied by the ODS is not greater than the storage space in the cache, and the QMAN 161 compares the value of the BX_SPACE_CNT outputted by the BMAN 163 with the size of the ODS value, when the value of the BX_SPACE_CNT is greater than or equal to the When the ODS value is determined, it is determined that the storage space occupied by the ODS is not greater than the storage space in the cache;
  • the QMAN 161 Determining, by the QMAN 161, that the device is in an idle or configurable state, the QMAN 161 sends a device status request that carries the DID in the task information to the DMAN 164, and determines the value according to the value of DZ_CTRL_IF_FULL corresponding to the DID fed back by the DMAN 164.
  • the value of the register DZ_CTRL_IF_FULL is used to determine the configurable condition of the control interface of Device Z;
  • the value of the control interface counter in the TLOADER 162 is automatically incremented by one.
  • the control interface counter is automatically decremented by one; usually, the device interface has a depth of at most 2 Therefore, the maximum value of the control interface counter is also 2;
  • the DZ_CTRL_IF_DEPTH register is used to indicate the control interface depth of Device Z.
  • the device When the time when you want to configure the parameters and the execution time of the tasks can be paralleled, the device is in the process of When the previous task is executed, TLOADER can configure the parameters of the next task to the control interface.
  • the device itself may support two sets of control interfaces. The physical addresses of the two sets of control interfaces may be multiplexed, and the ping-pong control is performed internally by the device; or there may be different offsets corresponding to the physical addresses of the same device, as shown in FIG. 19, and two or more control interfaces are unnecessary. .
  • the BMAN 163 is further configured to update a data size in the cache according to a preset data update mode.
  • the data update mode includes: a real-time update mode and a non-real-time update mode; when the data update mode is the real-time update mode, the BMAN 163 updates the data size in the cache in real time according to its own clock monitoring period, that is, updates the BX_DATA_CNT. When the data update mode is the non-real time update mode, the BMAN 163 updates the data size in the cache only when one task is executed, that is, updates the BX_DATA_CNT.
  • the task information includes: a parameter address PA and a data transmission type
  • the TLOADER 162 is configured to: when the clock of the device to be completed is turned on, obtain a preset parameter according to the parameter address, and configure the parameter to the device to be completed according to the transmission type, and Triggering DMAN 164 to control clocking of the device to activate the device;
  • the QMAN is further configured to control a clock of the device to be completed
  • the transmission type includes: an incremental transmission mode, a fixed address transmission mode, a discrete address transmission mode, and an information transmission mode.
  • the task information includes: a repetition configuration number and a parameter address repetition type; the TLOADER 162 is further configured to repeatedly configure the parameter to the device according to the repeated configuration times;
  • the REPEAT field of the task descriptor is used to set the number of times the task is executed, and when the number of repetitions is N, it means that the number of repetitions is N+1 times;
  • the PART field of the task descriptor is used to set the parameter address repetition type; where the parameter address repetition type includes: repeating the reading parameter and the address incrementing manner to read the parameter; wherein the repeatedly reading the parameter, That is, the device is configured by reading the same parameter multiple times; the parameter is read in an incremental manner, that is, the parameter is read in a manner that each address is incremented by a fixed interval of PS, and the read parameter is configured to the device.
  • the task information includes: atomic task descriptor package information
  • the TLOADER 162 is further configured to wait for a next atomic task description in the atomic task descriptor packet The corresponding task meets the start condition, acquires the parameter corresponding to the next atomic task descriptor, configures the obtained parameter to the device to be completed, and starts the device until the last one in the atomic task descriptor package
  • the atomic task descriptor processing ends; in this way, it can be ensured that the tasks in the ATDP are continuously executed without being interrupted by high priority tasks other than the ATDP;
  • the ATOMIC field in the task descriptor TD is used to implement the ATDP setting. If there are N ATDs in the ATDP packet, the ATOMIC bit in the first N-1 TDs is set to 1, and the ATOMIC bit of the last TD is 0. , indicating that the TD is an atomic task descriptor in the ATDP; the ATD in the ATDP is a task descriptor in the same task queue.
  • the DMAN 164 is triggered to control the clock of the device to be turned off.
  • the task information includes: information about whether the interrupt is reported after the task is completed, the TID, the number of repeated configurations, and the parameter address repetition type;
  • the DMAN 164 is further configured to: when the number of repeated configurations is not zero and the interrupt is to be reported after the task is completed, determining that the interrupt is reported after each task is completed;
  • the TLOADER 162 will save the TID and TIE of the task when the task is handed over to the device.
  • the DMAN 164 determines the value of the TIE corresponding to the task. If 1, the corresponding TID is added to the interrupt TID FIFO. As long as the interrupt TID FIFO is not empty, the DMAN 164 will report the interrupt, and when the reported interrupt is received by the processor, the processor can read the interrupt TID FIFO. The TID in the middle determines which task has been interrupted; as shown in Figure 20.
  • the device refers to any hardware component having a certain function
  • An abstract device includes: a control interface: the control interface can complete the configuration, startup, reset and other control of the device parameters; the arithmetic unit: parses the parameters configured from the control interface to implement a certain computing function; the bus interface: the device accesses through the bus interface The DM reads the input data required to execute the task and outputs the result of the operation; as shown in Figure 15, the abstract definition map of the device.
  • the QMAN, TLOADER, BMAN and DMAN proposed in the embodiments of the present invention can be implemented by a processor, and can also be implemented by a specific logic circuit; wherein the processor can be a mobile terminal or a processor on a server, in practice
  • the processor can be a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP), or a field programmable gate array (FPGA).
  • the device scheduling method described above is implemented in the form of a software function module and sold or used as a stand-alone product, it may also be stored in a computer readable storage medium.
  • the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions.
  • a computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention.
  • the foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk. This As such, embodiments of the invention are not limited to any specific combination of hardware and software.
  • the embodiment of the present invention further provides a computer storage medium, where the computer storage medium stores a computer program, and the computer program is configured to execute the device scheduling method of the embodiment of the present invention.

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Abstract

本发明公开了一种设备调度方法，读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息；确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。本发明还同时公开了一种任务管理器及存储介质。

Description

一种设备调度方法、任务管理器及存储介质 技术领域
本发明涉及信号处理领域中的设备调度相关技术，尤其涉及一种设备调度方法、任务管理器及存储介质。
背景技术
随着无线通信领域不断发展，各种通信标准层出不穷，出现了多种通信体制并存的现象。如目前的终端通常需要同时支持2G/3G，长期演进(LTE，Long Term Evolution)/演进LTE(LTE-A，LTE-Advanced)也正在成为终端必须要支持的标准。
传统的以硬件为主、面向特定用途的集成电路(ASIC，Application Specific Integrated Circuit)终端设备已经不适应这种局面，ASIC设备对单一的通信协议实现可以做到性能/功耗/成本的最优，但是在多模情况下，则只能通过硬件模块叠加来支持，导致芯片面积和功耗不断膨胀，且很不灵活，升级成本很高。
在这种背景下，如何将多个运算设备，例如矢量处理器和硬件加速器，互联实现灵活的数据交互；以及如何灵活又高效的调度多个运算设备协同工作，以完成不同场景下的运算任务显得至关重要。目前普遍采用的方法是，用一个主处理器通过软件调度和中断反馈对多个运算设备进行调度，这种方式存在以下问题：
1、中断开销大，占用主处理器的处理能力，这个问题在频繁调度时显得尤为突出。
2、调度效率低，主处理器需要查询运算设备的各项启动条件，由于处理器是串行执行指令，因此逐项查询效率低。
3、实时性差，由于各个运算设备是独立并行运行的，主处理器难以做到及时发现所有设备的空闲状态并及时的下发新的任务给设备。
发明内容
有鉴于此，本发明实施例期望提供一种设备调度方法、任务管理器及存储介质，能够解决现有技术中设备调度效率低、实时性差的问题。
为达到上述目的，本发明实施例的技术方案是这样实现的：
本发明实施例提供了一种设备调度方法，所述方法包括：
读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息；
确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。
上述方案中，所述任务信息包括：输入缓存号(IBN，Input Buffer Number)、输出缓存号(OBN，Output Buffer Number)、任务输入的数据个数(IDS，Input Data Size)、任务输出的数据个数(ODS，Output Data Size)，以及设备身份识别码(DID，Device IDentity)；
所述确定所述任务已满足启动条件包括：确定缓存中的数据不少于所述IDS、所述ODS占用的存储空间不大于缓存中的存储空间、且所述设备处于空闲或可配置状态。
上述方案中，所述任务信息包括：参数地址(PA，Parameter Address)及数据传输类型；
所述依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备并启动所述设备包括：控制待完成所述任务的设备的时钟开启，依据所述参数地址获取预置的参数，并依据所述数据传输类型将所述参数配置给待完成所述任务的设备，以启动所述设备。
上述方案中，所述任务信息包括：重复配置次数及参数地址重复类型；
所述方法还包括：依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，将所述参数配置给所述设备；
或者，依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，按照地址递增的方式读取参数，并将读取的参数配置给所述设备。
上述方案中，所述任务信息包括：原子任务描述符包信息；
依据所述原子任务描述符包信息确定所述任务描述符为原子任务描述符包中的原子任务描述符时，将所述参数配置给待完成所述任务的设备并启动所述设备之后，所述方法还包括：等待所述原子任务描述符包中下一个原子任务描述符对应任务满足启动条件，获取所述下一个原子任务描述符对应的参数，将获取的参数配置给待完成所述任务的设备并启动所述设备，直至所述原子任务描述符包中最后一个原子任务描述符处理结束。
本发明实施例还提供了一种任务管理器，所述任务管理器包括：队列管理器(QMAN，Queue Manager)及任务加载器(TLOADER，Task LOADER)；其中，
所述QMAN，配置为读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息，以及确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，触发所述TLOADER；
所述TLOADER，配置为依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。
上述方案中，所述任务信息包括：IBN、OBN、IDS、ODS，以及DID；
所述QMAN，配置为确定缓存中的数据不少于所述IDS、所述ODS占用的存储空间不大于缓存中的存储空间，且所述设备处于空闲或可配置状态；
相应的，所述任务管理器还包括：缓存管理器(BMAN，Buffer Manager)和设备管理器(DMAN，Device Manager)；其中，
所述BMAN，配置为监测所述缓存数据状态，并输出所述缓存数据状态给所述QMAN；
所述DMAN，配置为检测所述设备的状态，并输出所述设备的状态给所述QMAN。
上述方案中，所述任务信息包括：PA及数据传输类型；
所述TLOADER，配置为在待完成所述任务的设备的时钟开启时，依据所述参数地址获取预置的参数，依据所述数据传输类型将所述参数配置给待完成所述任务的设备，以启动所述设备；
相应的，所述DMAN，还配置为控制待完成所述任务的设备的时钟开启。
上述方案中，所述任务信息包括：重复配置次数及参数地址重复类型；
所述QMAN，还配置为依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，触发所述TLOADER；
相应的，所述TLOADER，还配置为将所述参数重复配置给所述设备；或者，按照地址递增的方式读取参数，并将读取的参数配置给所述设备。
上述方案中，所述任务信息包括：原子任务描述符包信息；
依据所述原子任务描述符包信息确定所述任务描述符为原子任务描述 符包中的原子任务描述符时，所述TLOADER，还配置为等待所述原子任务描述符包中下一个原子任务描述符对应任务满足启动条件，获取所述下一个原子任务描述符对应的参数，将获取的参数配置给待完成所述任务的设备并启动所述设备，直至所述原子任务描述符包中最后一个原子任务描述符处理结束。
本发明实施例还提供了一种计算机存储介质，所述计算机存储介质存储有计算机程序，该计算机程序用于执行本发明实施例的上述设备调度方法。
本发明实施例所提供的设备调度方法、任务管理器及存储介质，设置专用的任务管理器，由任务管理器读取并解析任务队列中的任务描述符(TD，Task Description)，获取所述任务描述符对应任务的任务信息；确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。如此，采用专用的硬件任务管理器及参数化设计对设备进行调度，能解决现有技术中由软件对设备进行调度造成的效率低、实时性差等问题。
附图说明
图1为本发明实施例设备调度方法流程示意图；
图2为本发明实施例任务队列示意图；
图3为本发明实施例任务队列读空示意图；
图4为本发明实施例任务队列写满示意图；
图5为本发明实施例任务描述符的一种比特域定义方式示意图；
图6为本发明实施例设备ID和设备基地址寄存器的对应关系示意图；
图7为本发明实施例设备注册示意图；
图8为本发明实施例定义的缓存示意图；
图9为本发明实施例递增传输模式传输示意图；
图10为本发明实施例固定地址传输模式传输示意图；
图11为本发明实施例离散地址传输模式传输示意图；
图12为本发明实施例信息传输模式传输示意图；
图13为本发明实施例参数重复配置示意图；
图14为本发明实施例原子任务描述符包示意图；
图15为本发明实施例设备的抽象定义示意图；
图16为本发明实施例任务管理器组成结构示意图；
图17为本发明实施例包含任务管理器的设备调度系统示意图；
图18为本发明实施例支持三个任务队列、两个设备、四个缓存管理的任务管理器内部连接示意图；
图19为本发明实施例具有两套控制接口的设备示意图；
图20为本发明实施例任务中断上报示意图。
具体实施方式
在本发明实施例中，设置专用的任务管理器，由任务管理器读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息；确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。
图1为本发明实施例设备调度方法流程示意图，如图1所示，本发明实施例设备调度方法包括：
步骤101：读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息；
本步骤之前，会预先设置专用的任务管理器；所述任务管理器中包括QMAN、BMAN、DMAN和TLOADER；相应的，本步骤由QMAN完成；
本步骤之前，所述方法还包括：QMAN控制所述任务队列读使能；
这里，以所述任务队列为任意一个任务队列(Queue)Y为例，QMAN可通过QY_ENABLE寄存器控制所述任务队列读使能；只有当所述任务队列读使能时，QMAN才可以从所述任务队列中读取任务描述符，否则，QMAN不会读取任务描述符。
在一实施例中，QMAN控制所述任务队列读使能之前，所述方法还包括：处理器填写任务描述符至所述任务队列，计算任务参数并将所述任务参数放置于数据存储器(DM，Data Memory)中；
这里，所述任务队列是存储于DM中的任务描述符的队列；对于Queue Y，可以通过QY_START_ADDR和QY_SIZE寄存器定义Queue Y在DM中的起始地址和大小；如图2所示；
所述任务队列以类似环形的方式进行读写，由硬件寄存器QY_WPTR和QY_RPTR来标识当前读写的位置；QY_WPTR指向下一个将被填入任务描述符的位置，QY_RPTR指向下一个将被读出任务描述符的位置；
处理器填充任务描述符至所述任务队列时，从当前QY_WPTR位置开始填写，一次可以顺序填写一个或多个任务描述符，然后更新QY_WPTR指向下一个可填写位置，当遇到任务队列边界时绕回至QY_START_ADDR位置继续填写；
QMAN读取任务队列中的任务描述符时，每次读出一个任务描述符，读出之后更新QY_RPTR到下一个任务描述符位置。当遇到任务队列边界时绕回至QY_START_ADDR起始位置；
这里，读取任务描述符并更新QY_RPTR之后，若使QY_RPTR和QY_WPTR重合，则表明Queue Y为空，此时不再继续读取队列，QMAN置QY_EMPTY信号为“1”；如图3所示；
处理器写入任务描述符并更新QY_WPTR之后，若使QY_RPTR和 QY_WPTR重合，且QY_EMPTY信号不为“1”，则表明Queue Y已满，此时不能再继续填写队列，否则会导致待执行的有效任务描述符被覆盖；如图4所示。
在一实施例中，在实际应用中，依据实际需要，所述处理器可随时控制所述任务队列暂停，如此，可实现队列中任务的清除和调整，即当需要调整队列中的任务时，可以先暂停队列，然后通过修改QY_WPTR和QY_RPTR，以及任务队列中的任务描述符实现任意的调整；当控制所述任务队列暂停时，已经从所述任务队列读取的任务描述符会继续执行后续流程。
在一实施例中，所述任务信息包括：DID、IBN、OBN、IDS、ODS、任务ID(TID，Task ID)、配置设备的PA、设备偏移地址(DOA，Device Offset Address)、配置设备的参数长度(PS，Parameter Size)、传输类型(BT，Burst Type)、重复配置次数、任务优先级、原子任务描述符包(ATDP，Atomic Task Description Package)信息以及任务完成后是否上报中断的信息等；如图5所示为任务描述符的一种比特域定义方式示意图；
其中，所述设备ID的作用包括：注册一个设备，使所述设备可以被调度和管理；标识执行所述任务的设备；对应所述设备的控制接口的物理地址；例如：通过设备基地址寄存器DZ_BASE_ADDR来配置Device Z的控制接口的基地址，每个DID对应一个DZ_BASE_ADDR寄存器，如图6所示；
在本发明实施例中，所述TLOADER配置参数的设备均为在DMAN上已经注册过的设备；注册的方式为分配一个DID给这个设备，使之对应该设备控制接口的物理地址；例如：有两个设备，DEV0，DEV1，它们的控制接口对应的物理地址分别为：0x000，0x100。如果想注册DEV0，使之可以被调度，则将D0_BASE_ADDR设置为DEV0控制接口的物理地址，即 0x000；而如果想保留DEV1由处理器直接调度，则不要把任意一个DZ_BASE_ADDR设置为DEV1控制接口的物理地址0x100即可，如图7所示；
所述TID大小可以为14比特，以确保在足够长的时间内，所述TID不会重复；所述TID还可以体现任务的优先级。
步骤102：确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备并启动所述设备；
这里，所述确定所述任务已满足启动条件包括：
QMAN确定缓存中的数据不少于所述IDS、所述ODS占用的存储空间不大于缓存中的存储空间、且所述设备处于空闲或可配置状态；
其中，所述缓存设置于所述DM中，可由缓存管理器(BMAN，Buffer Manager)实时监测所述缓存的数据状态，通过BX_START_ADDR和BX_SIZE定义Buffer X在DM中的起始地址和大小，数据计数器BX_DATA_CNT记录当前Buffer X中存储了多少数据，相应的，BX_SPACE_CNT用来表示Buffer X中还存在多少剩余存储空间，BX_SIZE＝BX_DATA_CNT+BX_SPACE_CNT；如图8所示为数据存储器DM中定义的一块缓存的示意图；
当执行任务的设备执行一个任务，从Buffer X中读取数据时，该设备为数据的消费者，则BX_DATA_CNT的值会减去读出的数据个数而变小；
当执行任务的设备执行一个任务，向Buffer X中写入数据时，该设备为数据的生产者，则BX_DATA_CNT的值会加上写入的数据个数而变大，相应的BX_SPACE_CNT则会变小。
在一实施例中，所述方法还包括：BMAN依据预设的数据更新模式更新所述缓存中的数据大小；
这里，所述数据更新模式包括：实时更新模式和非实时更新模式；当数据更新模式为实时更新模式时，所述BMAN依据自身的时钟监测周期，实时的更新缓存中的数据大小，即更新BX_DATA_CNT；当数据更新模式为非实时更新模式时，所述BMAN只在执行完一个任务时才更新缓存中的数据大小，即更新BX_DATA_CNT。
在一实施例中，所述确定缓存中的数据不少于所述IDS包括：QMAN比较BMAN输出的所述BX_DATA_CNT的值与所述IDS值的大小，当所述BX_DATA_CNT的值大于等于所述IDS值时，确定缓存中的数据不少于所述IDS；
确定所述ODS占用的存储空间不大于缓存中的存储空间包括：QMAN比较BMAN输出的所述BX_SPACE_CNT的值与所述ODS值的大小，当所述BX_SPACE_CNT的值大于等于所述ODS值时，确定所述ODS占用的存储空间不大于缓存中的存储空间；
确定所述设备处于空闲或可配置状态包括：发送携带所述任务信息中DID的设备状态请求给DMAN，依据所述DMAN反馈的所述DID对应的DZ_CTRL_IF_FULL的值确定所述设备的状态，例如：若DZ_CTRL_IF_FULL＝0，表示所述设备处于空闲或可配置状态；若DZ_CTRL_IF_FULL＝1，表示所述设备的控制接口已经被填满，无法再接受新的任务；
这里，所述寄存器DZ_CTRL_IF_FULL的值用来判断Device Z的控制接口的可配置情况；
当所述TLOADER为设备配置一次参数完成时，所述TLOADER中的控制接口计数器的值自动加1，当设备执行完成这个任务时，控制接口计数器会自动减1；通常设备接口的深度最多为2，因此控制接口计数器的最大值也为2；
DZ_CTRL_IF_DEPTH寄存器用来表示Device Z的控制接口深度，当控制接口计数器的值等于DZ_CTRL_IF_DEPTH时，表示设备的控制接口已经被填满，设备不能再接受新的参数配置，即DZ_CTRL_IF_FULL＝1；当控制接口计数器的值小于DZ_CTRL_IF_DEPTH时，表示设备有剩余控制接口可配置，即DZ_CTRL_IF_FULL＝0。
在一实施例中，当所述TLOADER确定所述设备对应的控制接口计数器为零时，表明所述设备当前没有任务需要执行，所述TLOADER触发DMAN控制所述设备的时钟关闭。
在一实施例中，所述任务信息包括：参数地址PA及数据传输类型，所述依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备并启动所述设备包括：
TLOADER在待完成所述任务的设备的时钟开启时，依据所述参数地址获取预置的参数，依据所述传输类型将所述参数配置给待完成所述任务的设备，以启动所述设备执行所述任务；
相应的，所述DMAN，还配置为控制所述待完成所述任务的设备的时钟开启；
这里，所述传输类型包括：递增传输模式(Increment transfer)、固定地址传输模式(Fixed address transfer)、离散地址传输模式(Disperse address transfer)及信息传输模式(Message transfer)；
其中，所述递增传输模式为传输地址自动增加的模式，即从缓存中读取参数的地址和向设备的控制接口写参数的地址都是顺序增加的；如图9所示为递增传输模式传输示意图；
所述固定地址传输模式的传输目的地址固定不变，适用于先入先出队列(FIFO，First In First Out)接口的配置；在这种传输模式下，配置模块从DM中顺序读取参数，但是向设备控制接口的固定地址写入参数；如图 10所示为固定地址传输模式传输示意图；
所述离散地址传输模式，传输地址在参数中给出，即一个参数为64比特，高32比特为参数的值，低32比特为参数的目的地址。一般用于要配置的寄存器的地址不是连续顺序的情况；在这种传输模式下，缓存中的参数同时包含地址信息，所述配置模块根据参数的目的地址信息配置参数；如图11所示为离散地址传输模式传输示意图；
所述信息传输模式为传输一个32比特Message常数；在这种传输模式下，所述配置模块无需去缓存中读取配置参数，而是直接将所述32比特常数配置到所述DID对应的设备的偏移地址DOA；这里，所述32比特常数为复用任务描述符的参数地址的32个比特常数，如图12所示为信息传输模式传输示意图。
在一实施例中，所述任务信息包括：重复配置次数及参数地址重复类型，所述任务描述符为重复任务描述符(RTD，Repeat Task Descriptor)，所述方法还包括：
依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，将所述参数重复配置给所述设备；如图13(a)所示；
或者，依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，按照地址递增的方式读取参数，并将读取的参数配置给所述设备；如图13(b)所示；
所述任务描述符的REPEAT域用于设置所述任务执行的次数，当所述重复次数为N时，表示重复N+1次；
所述任务描述符的PART域用于设置所述参数地址重复类型；这里， 所述参数地址重复类型包括：重复读取参数和地址递增的方式读取参数；其中，所述重复读取参数，即多次读取相同的参数配置所述设备；所述地址递增的方式读取参数，即以每次地址递增PS固定间隔的方式读取参数，并将读取的参数配置给所述设备。
在一实施例中，所述任务信息包括：ATDP信息；QMAN依据所述ATDP信息确定所述任务描述符为ATDP中的原子任务描述符(ATD，Atomic Task Description)时，将所述参数配置给待完成所述任务的设备并启动所述设备之后，所述方法还包括：
QMAN等待所述原子任务描述符包中下一个原子任务描述符对应任务满足启动条件，并启动TLOADER，获取所述下一个原子任务描述符对应的参数，将获取的参数配置给待完成所述任务的设备并启动所述设备，直至所述原子任务描述符包中最后一个原子任务描述符处理结束；如此，可以保证所述ATDP中的任务连续执行，不被所述ATDP以外的高优先级任务打断；
这里，任务描述符TD中的ATOMIC域，用于实现ATDP的设置，如果ATDP包中共有N个ATD，则设置前N-1个TD中的ATOMIC比特为1，最后一个TD的ATOMIC比特为0，表示该TD是ATDP中最后一个原子任务描述符；所述ATDP中的ATD为同一个任务队列中的任务描述符；如图14为ATDP的定义示意图。
在一实施例中，所述任务信息包括：任务完成后是否上报中断的信息、TID、重复配置次数及参数地址重复类型；当依据所述任务信息确定所述重复配置次数不为零且任务完成后需上报中断时，所述方法还包括：每次任务完成之后，DMAN均上报中断；
这里，任务描述符中的TIE比特用于设置当前任务完成之后是否产生中断，例如：当确定所述任务信息中包含的重复配置次数不为零，且所述 TIE比特设置为“1”时，每次任务完成，所述DMAN都会上报中断；
由于各个设备执行任务所需的时间长短不同，因此并不是先被执行的任务就会先完成。为了区分当前产生的中断是哪个任务完成后产生的，所述TLOADER将一个任务交给设备执行时，DMAN会保存任务的TID以及TIE，当任务被执行完成时，DMAN确定任务对应的TIE的值为1，则将对应的TID加入中断TID FIFO，只要中断TID FIFO不为空，所述DMAN便会上报中断，而当上报的中断被处理器接收时，处理器便可通过读取中断TID FIFO中的TID确定是哪个任务发生了中断。
在本发明实施例中，所述设备指的是具有一定功能的任意硬件部件；
一个抽象的设备包括：控制接口：通过控制接口可以完成设备参数的配置，启动，复位等控制；运算单元(Execution Unit)：解析从控制接口配置的参数，实现一定的运算功能；总线接口(Bus Interface)：设备通过总线接口访问DM，读取执行任务所需的输入数据，输出运算的结果；如图15所示为设备的抽象定义图。
图16为本发明实施例任务管理器组成结构示意图，图17为本发明实施例采用任务管理器的设备调度系统示意图；如图16、17所示，本发明实施例任务管理器组成结构包括：QMAN161及TLOADER162；其中，
所述QMAN161，配置为读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息，以及确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，触发所述TLOADER162；
所述TLOADER162，配置为依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。
在一实施例中，所述QMAN161，还配置为控制所述任务队列读使能；当所述队列为Queue Y时，QMAN161可通过QY_ENABLE寄存器控制所 述任务队列读使能；只有当所述任务队列读使能时，QMAN161才可以从所述任务队列中读取任务描述符，否则，QMAN161不会读取任务描述符；
相应的，在图17所示设备调度系统中，处理器，配置为填写任务描述符至所述任务队列，以及计算任务参数并将所述任务参数放置于DM中；在图17所示设备调度系统中，处理器、任务管理器及设备的工作可以是并行的；
这里，所述任务队列是存储于DM中的任务描述符的队列；对于队列Queue Y，可以通过QY_START_ADDR和QY_SIZE寄存器定义Queue Y在DM中的起始地址和大小；如图2所示；
所述任务队列以类似环形的方式进行读写，由硬件寄存器QY_WPTR和QY_RPTR来标识当前读写的位置；QY_WPTR指向下一个将被填入任务描述符的位置，QY_RPTR指向下一个将被读出任务描述符的位置；
处理器填充任务描述符至所述任务队列时，从当前QY_WPTR位置开始填写，一次可以顺序填写一个或多个任务描述符，然后更新QY_WPTR指向下一个可填写位置，当遇到任务队列边界时绕回至QY_START_ADDR位置继续填写；
QMAN161读取任务队列中的任务描述符时，每次读出一个任务描述符，读出之后更新QY_RPTR到下一个任务描述符位置。当遇到任务队列边界时绕回至QY_START_ADDR起始位置；
这里，读取任务描述符并更新QY_RPTR之后，若使QY_RPTR和QY_WPTR重合，则表明Queue Y为空，此时不再继续读取队列，QMAN置QY_EMPTY信号为“1”；如图3所示；
处理器写入任务描述符并更新QY_WPTR之后，若使QY_RPTR和QY_WPTR重合，且QY_EMPTY信号不为“1”，则表明Queue Y已满，此时不能再继续填写队列，否则会导致待执行的有效任务描述符被覆盖； 如图4所示。
在一实施例中，在实际应用中，依据实际需要，所述QMAN161，还配置为随时控制所述任务队列暂停，如此，可实现队列中任务的清除和调整，即当处理器需要调整队列中的任务时，可以先暂停队列，然后通过修改QY_WPTR和QY_RPTR，以及任务队列中的任务描述符实现任意的调整；当控制所述任务队列暂停时，已经从所述任务队列读取的任务描述符会继续执行后续流程。
在一实施例中，所述任务信息包括：输入缓存号IBN、输出缓存号OBN、任务输入的数据个数IDS、任务输出的数据个数ODS，以及设备身份识别码DID；
所述QMAN161，配置为确定缓存中的数据不少于所述IDS、所述ODS占用的存储空间不大于缓存中的存储空间，且所述设备处于空闲或可配置状态；
相应的，所述任务管理器还包括：BMAN163和DMAN164；其中，
所述BMAN163，配置为监测所述缓存数据状态，并输出所述缓存数据状态给所述QMAN161；
所述DMAN164，配置为检测所述设备的状态，并输出所述设备的状态给所述QMAN161；
这里，所述缓存设置于所述DM中，由BMAN实时监测所述缓存的数据状态，通过BX_START_ADDR和BX_SIZE定义Buffer X在DM中的起始地址和大小，数据计数器BX_DATA_CNT记录当前Buffer X中存储了多少数据，相应的，BX_SPACE_CNT用来表示Buffer X中还存在多少剩余存储空间，BX_SIZE＝BX_DATA_CNT+BX_SPACE_CNT；如图8所示为数据存储器DM中定义的一块缓存的示意图；
当执行任务的设备执行一个任务，从Buffer X中读取数据时，该设备 为数据的消费者，则BX_DATA_CNT的值会减去读出的数据个数而变小；
当执行任务的设备执行一个任务，向Buffer X中写入数据时，该设备为数据的生产者，则BX_DATA_CNT的值会加上写入的数据个数而变大，相应的BX_SPACE_CNT则会变小；
所述设备ID的作用包括：注册一个设备，使所述设备可以被调度和管理；标识执行所述任务的设备；对应所述设备的控制接口的物理地址；例如：通过设备基地址寄存器DZ_BASE_ADDR来配置Device Z的控制接口的基地址，每个DID对应一个DZ_BASE_ADDR寄存器，如图6所示；
在本发明实施例中，所述任务管理器调度的设备均为在DMAN164上已经注册过的设备；注册的方式为分配一个DID给这个设备，使之对应该设备控制接口的物理地址；例如：有两个设备，DEV0，DEV1，它们的控制接口对应的物理地址分别为：0x000，0x100。如果想注册DEV0，使之可以被调度，则将D0_BASE_ADDR设置为DEV0控制接口的物理地址，即0x000；而如果想保留DEV1由处理器直接调度，则不要把任意一个DZ_BASE_ADDR设置为DEV1控制接口的物理地址0x100即可，如图7所示；也就是说，本发明实施例中的任务管理器仅可以调度处于已注册状态的设备，而对于未注册的设备或处于注销状态的设备的调度，则可以由处理器来执行。
在一实施例中，所述QMAN161包括：仲裁器(TD_ARBITOR)1611，以及至少一个子队列管理器QMANy1612；其中，所述QMANy1612，配置为确定所述任务满足启动条件时，触发仲裁器1611判断所述任务的优先级，当仲裁器1611确定所述任务为当前满足启动条件的任务中优先级最高的任务时，触发TLOADER162；如图18所示，为支持3个队列，2个设备，4个缓存管理的任务管理器的内部连接图；
在一实施例中，所述QMAN161确定缓存中的数据不少于所述IDS包 括：QMAN161比较BMAN163输出的所述BX_DATA_CNT的值与所述IDS值的大小，当所述BX_DATA_CNT的值大于等于所述IDS值时，确定缓存中的数据不少于所述IDS；
所述QMAN161确定所述ODS占用的存储空间不大于缓存中的存储空间包括：所述QMAN161比较BMAN163输出的所述BX_SPACE_CNT的值与所述ODS值的大小，当所述BX_SPACE_CNT的值大于等于所述ODS值时，确定所述ODS占用的存储空间不大于缓存中的存储空间；
所述QMAN161确定所述设备处于空闲或可配置状态包括：所述QMAN161发送携带所述任务信息中DID的设备状态请求给DMAN164，依据所述DMAN164反馈的所述DID对应的DZ_CTRL_IF_FULL的值确定所述设备的状态，例如：若DZ_CTRL_IF_FULL＝0，表示所述设备处于空闲或可配置状态；若DZ_CTRL_IF_FULL＝1，表示所述设备的控制接口已经被填满，无法再接受新的任务；
这里，所述寄存器DZ_CTRL_IF_FULL的值用来判断Device Z的控制接口的可配置情况；
当所述TLOADER162为设备配置一次参数完成时，所述TLOADER162中的控制接口计数器的值自动加1，当设备执行完成这个任务时，控制接口计数器会自动减1；通常设备接口的深度最多为2，因此控制接口计数器的最大值也为2；
DZ_CTRL_IF_DEPTH寄存器用来表示Device Z的控制接口深度，当控制接口计数器的值等于DZ_CTRL_IF_DEPTH时，表示设备的控制接口已经被填满，设备不能再接受新的参数配置，即DZ_CTRL_IF_FULL＝1；当控制接口计数器的值小于DZ_CTRL_IF_DEPTH时，表示设备有剩余控制接口可配置，即DZ_CTRL_IF_FULL＝0；
当希望配置参数的时间和任务的执行时间能够并行起来，使设备在执 行前一个任务时，TLOADER可以配置下一个任务的参数到控制接口时，设备本身可能支持两套控制接口。两套控制接口的物理地址可能是复用的，由设备内部做乒乓控制；也有可能是对应同一设备物理地址的不同偏移，如图19所示，而两套以上的控制接口是不必要的。
在一实施例中，所述BMAN163，还配置为依据预设的数据更新模式更新所述缓存中的数据大小；
这里，所述数据更新模式包括：实时更新模式和非实时更新模式；当数据更新模式为实时更新模式时，所述BMAN163依据自身的时钟监测周期，实时的更新缓存中的数据大小，即更新BX_DATA_CNT；当数据更新模式为非实时更新模式时，所述BMAN163只在执行完一个任务时才更新缓存中的数据大小，即更新BX_DATA_CNT。
在一实施例中，所述任务信息包括：参数地址PA及数据传输类型；
所述TLOADER162，配置为在待完成所述任务的设备的时钟开启时，依据所述参数地址获取预置的参数，依据所述传输类型将所述参数配置给待完成所述任务的设备，并触发DMAN164控制所述设备的时钟开启，以启动所述设备；
相应的，所述QMAN，还配置为控制待完成所述任务的设备的时钟开启；
这里，所述传输类型包括：递增传输模式、固定地址传输模式、离散地址传输模式及信息传输模式。
在一实施例中，所述任务信息包括：重复配置次数及参数地址重复类型；所述TLOADER162，还配置为按照所述重复配置次数，将所述参数重复配置给所述设备；
或者，依据所述重复配置次数，按照地址递增的方式读取参数，并将读取的参数配置给所述设备；
这里，所述任务描述符的REPEAT域用于设置所述任务执行的次数，当所述重复次数为N时，表示重复N+1次；
所述任务描述符的PART域用于设置所述参数地址重复类型；这里，所述参数地址重复类型包括：重复读取参数和地址递增的方式读取参数；其中，所述重复读取参数，即多次读取相同的参数配置所述设备；所述地址递增的方式读取参数，即以每次地址递增PS固定间隔的方式读取参数，并将读取的参数配置给所述设备。
在一实施例中，所述任务信息包括：原子任务描述符包信息；
依据所述原子任务描述符包信息确定所述任务描述符为原子任务描述符包中的原子任务描述符时，所述TLOADER162，还配置为等待所述原子任务描述符包中下一个原子任务描述符对应任务满足启动条件，获取所述下一个原子任务描述符对应的参数，将获取的参数配置给待完成所述任务的设备并启动所述设备，直至所述原子任务描述符包中最后一个原子任务描述符处理结束；如此，可以保证所述ATDP中的任务连续执行，不被所述ATDP以外的高优先级任务打断；
这里，任务描述符TD中的ATOMIC域，用于实现ATDP的设置，如果ATDP包中共有N个ATD，则设置前N-1个TD中的ATOMIC比特为1，最后一个TD的ATOMIC比特为0，表示该TD是ATDP中一个原子任务描述符；所述ATDP中的ATD为同一个任务队列中的任务描述符。
在一实施例中，当所述TLOADER162，还配置为确定所述设备对应的控制接口计数器为零时，触发DMAN164控制所述设备的时钟关闭。
在一实施例中，所述任务信息包括：任务完成后是否上报中断的信息、TID、重复配置次数及参数地址重复类型；
所述DMAN164，还配置为在所述重复配置次数不为零且任务完成后需上报中断时，确定每次任务完成之后均上报中断；
由于各个设备执行任务所需的时间长短不同，因此并不是先被执行的任务就会先完成。为了区分当前产生的中断是哪个任务完成后产生的，所述TLOADER162将一个任务交给设备执行时，DMAN164会保存任务的TID以及TIE，当任务被执行完成时，DMAN164确定任务对应的TIE的值为1，则将对应的TID加入中断TID FIFO，只要中断TID FIFO不为空，所述DMAN164便会上报中断，而当上报的中断被处理器接收时，处理器便可通过读取中断TID FIFO中的TID确定是哪个任务发生了中断；如图20所示。
在本发明实施例中，所述设备指的是具有一定功能的任意硬件部件；
一个抽象的设备包括：控制接口：通过控制接口可以完成设备参数的配置，启动，复位等控制；运算单元：解析从控制接口配置的参数，实现一定的运算功能；总线接口：设备通过总线接口访问DM，读取执行任务所需的输入数据，输出运算的结果；如图15所示为设备的抽象定义图。
本发明实施例中提出的QMAN、TLOADER、BMAN及DMAN都可以通过处理器来实现，当然也可通过具体的逻辑电路实现；其中所述处理器可以是移动终端或服务器上的处理器，在实际应用中，处理器可以为中央处理器(CPU)、微处理器(MPU)、数字信号处理器(DSP)或现场可编程门阵列(FPGA)等。
本发明实施例中，如果以软件功能模块的形式实现上述设备调度方法，并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。基于这样的理解，本发明实施例的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机、服务器、或者网络设备等)执行本发明各个实施例所述方法的全部或部分。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read Only Memory，ROM)、磁碟或者光盘等各种可以存储程序代码的介质。这 样，本发明实施例不限制于任何特定的硬件和软件结合。
相应地，本发明实施例还提供一种计算机存储介质，该计算机存储介质中存储有计算机程序，该计算机程序配置为执行本发明实施例的上述设备调度方法。
以上所述仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。

Claims (11)

  1. 一种设备调度方法，所述方法包括：
    读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息；
    确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。
  2. 根据权利要求1所述方法，其中，所述任务信息包括：输入缓存号IBN、输出缓存号OBN、任务输入的数据个数IDS、任务输出的数据个数ODS，以及设备身份识别码DID；
    所述确定所述任务已满足启动条件包括：确定缓存中的数据不少于所述IDS、所述ODS占用的存储空间不大于缓存中的存储空间，且所述设备处于空闲或可配置状态。
  3. 根据权利要求1所述方法，其中，所述任务信息包括：参数地址PA及数据传输类型；
    所述依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备并启动所述设备包括：控制待完成所述任务的设备的时钟开启，依据所述参数地址获取预置的参数，并依据所述数据传输类型将所述参数配置给待完成所述任务的设备，以启动所述设备。
  4. 根据权利要求1所述方法，其中，所述任务信息包括：重复配置次数及参数地址重复类型；所述方法还包括：
    依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，将所述参数配置给所述设备；
    或者，依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，按照地址递增的方式读取参数，并将读取的参数配置给所述设备。
  5. 根据权利要求1所述方法，其中，所述任务信息包括：原子任务描述符包信息；
    依据所述原子任务描述符包信息确定所述任务描述符为原子任务描述符包中的原子任务描述符时，将所述参数配置给待完成所述任务的设备并启动所述设备之后，所述方法还包括：
    等待所述原子任务描述符包中下一个原子任务描述符对应任务满足启动条件，获取所述下一个原子任务描述符对应的参数，将获取的参数配置给待完成所述任务的设备并启动所述设备，直至所述原子任务描述符包中最后一个原子任务描述符处理结束。
  6. 一种任务管理器，所述任务管理器包括：队列管理器QMAN及任务加载器TLOADER；其中，
    所述QMAN，配置为读取并解析任务队列中的任务描述符，获取所述任务描述符对应任务的任务信息，以及确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，触发所述TLOADER；
    所述TLOADER，配置为依据所述任务信息获取预置的参数，将所述参数配置给待完成所述任务的设备。
  7. 根据权利要求6所述任务管理器，其中，所述任务信息包括：IBN、OBN、IDS、ODS，以及DID；
    所述QMAN，配置为确定缓存中的数据不少于所述IDS、所述ODS占用的存储空间不大于缓存中的存储空间，且所述设备处于空闲或可配置状 态；
    相应的，所述任务管理器还包括：缓存管理器BMAN和设备管理器DMAN；其中，
    所述BMAN，配置为监测所述缓存数据状态，并输出所述缓存数据状态给所述QMAN；
    所述DMAN，配置为检测所述设备的状态，并输出所述设备的状态给所述QMAN。
  8. 根据权利要求7所述任务管理器，其中，所述任务信息包括：PA及数据传输类型；
    所述TLOADER，配置为在待完成所述任务的设备的时钟开启时，依据所述参数地址获取预置的参数，依据所述数据传输类型将所述参数配置给待完成所述任务的设备，以启动所述设备；
    相应的，所述DMAN，还配置为控制待完成所述任务的设备的时钟开启。
  9. 根据权利要求6所述任务管理器，其中，所述任务信息包括：重复配置次数及参数地址重复类型；
    所述QMAN，还配置为依据所述重复配置次数，重复判断所述任务的启动条件是否满足、优先级是否为最高，并在每次确定所述任务已满足启动条件，且所述任务为当前满足启动条件的任务中优先级最高的任务时，触发所述TLOADER；
    相应的，所述TLOADER，还配置为将所述参数重复配置给所述设备；或者，按照地址递增的方式读取参数，并将读取的参数配置给所述设备。
  10. 根据权利要求6所述任务管理器，其中，所述任务信息包括：原子任务描述符包信息；
    依据所述原子任务描述符包信息确定所述任务描述符为原子任务描述 符包中的原子任务描述符时，所述TLOADER，还配置为等待所述原子任务描述符包中下一个原子任务描述符对应任务满足启动条件，获取所述下一个原子任务描述符对应的参数，将获取的参数配置给待完成所述任务的设备并启动所述设备，直至所述原子任务描述符包中最后一个原子任务描述符处理结束。
  11. 一种计算机存储介质，所述计算机存储介质中存储有计算机可执行指令，该计算机可执行指令配置为执行权利要求1至5任一项所述的设备调度方法。
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