WO2016074181A1 - 阵列基板、液晶面板以及液晶显示器 - Google Patents
阵列基板、液晶面板以及液晶显示器 Download PDFInfo
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- WO2016074181A1 WO2016074181A1 PCT/CN2014/090950 CN2014090950W WO2016074181A1 WO 2016074181 A1 WO2016074181 A1 WO 2016074181A1 CN 2014090950 W CN2014090950 W CN 2014090950W WO 2016074181 A1 WO2016074181 A1 WO 2016074181A1
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 66
- 239000000758 substrate Substances 0.000 title claims abstract description 65
- 239000010409 thin film Substances 0.000 claims description 13
- 230000007547 defect Effects 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 17
- 238000000034 method Methods 0.000 description 5
- 238000003491 array Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133514—Colour filters
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G02F1/1362—Active matrix addressed cells
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
-
- G—PHYSICS
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
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- G—PHYSICS
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
Definitions
- the present invention relates to the field of liquid crystal display technologies, and in particular, to an array substrate, a liquid crystal panel, and a liquid crystal display.
- the liquid crystal panel includes at least an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer between the array substrate and the filter substrate, wherein the array substrate is provided with a pixel array and mutually intersecting data lines and A scan line, the data line provides a data signal to the pixel array, and the scan line provides a scan signal to the pixel unit.
- the array substrate is provided with a pixel array and mutually intersecting data lines and A scan line, the data line provides a data signal to the pixel array, and the scan line provides a scan signal to the pixel unit.
- pixels of the same column are connected to the same data line, and the data line is responsible for providing data signals to all pixels of the column; pixels of the same row are connected to the same scan line, and the scan line is responsible for A scan signal is provided to all pixels of the row.
- the array substrate there are many ways to arrange the data lines and scan lines, one of which is to reduce the number of data lines to half of the original, that is, the shared data line (Data
- FIG. 1 A schematic diagram of a partial structure of a conventional DLS array substrate as shown in FIG.
- the array substrate is provided with pixel arrays P11, P12, P13, P22, P23 and mutually intersecting data lines D1 to D5 and scan lines G1 G G6, and the left and right adjacent sub-pixels of the pixel array share one data line (as shown in the figure).
- P12 and P13 share the data line D2
- P22 and P23 share the data line D2) such that the number of data lines is halved with respect to the number of data lines of the conventional liquid crystal drive pixel array.
- Adjacent sub-pixels of the same row are connected to different scan lines (P12 and P13 are connected to scan lines G1 and G2, respectively), and sub-pixels of one sub-pixel are connected to the same scan line in the same row (P11 and P13 in the figure). Both are connected to the scanning line G2), so that the upper and lower adjacent sub-pixels are connected to different scanning lines (P12 and P22 are connected to the scanning lines G2 and G3, respectively). This doubles the number of scan lines relative to the number of scan lines of a conventional drive pixel array.
- the liquid crystal panel usually adopts a dot inversion driving method, that is, the signals of the adjacent two data lines have opposite polarities, and the signals of the same data line have opposite polarities when adjacent rows. Due to the number The data line has a certain impedance, and the data signal will cause delay distortion of the waveform during transmission, which results in a difference in the charging rate of the sub-pixels in the adjacent columns of the data line.
- the driving signal waveform diagram D (odd) is the signal waveform of the odd data line
- D (even) is the signal waveform of the even data line
- the signal polarities of D (odd) and D (even) are opposite.
- the broken line is a theoretical signal waveform diagram
- the implementation is partially an actual waveform diagram formed due to delay distortion.
- the first charged sub-pixels P12 and P22 are insufficiently charged, and the brightness is low, and the post-charged sub-pixels P13 and P23 are better charged and the brightness is higher. From the whole column, there will be obvious bright and dark lines. Similarly, a plurality of vertical bright lines appearing in the entire liquid crystal panel will affect the display quality.
- the present invention provides an array substrate, which is arranged in a vertical direction of a liquid crystal panel including the array substrate by an arrangement arrangement of sub-pixels and data lines and scan lines in the array substrate.
- the bright and dark lines are improved.
- An array substrate comprising:
- each column of data lines forming a column group, each column group comprising two columns of sub-pixels; wherein, the sub-pixels of the odd column group are connected to the data lines closer to the sub-pixels on both sides of the column group a sub-pixel of an odd-numbered row of even-numbered columns connected to a data line closer to the sub-pixel on both sides of the column group; a sub-pixel of an even-numbered row of even-numbered columns connected to both sides of the column group a data line that is farther away from the pixel;
- a plurality of scan lines, above and below each row of sub-pixels, are provided with scan lines for driving only the row of sub-pixels; dividing the sub-pixel array into a plurality of row groups, each row group comprising one or two rows a pixel; wherein, in the nth and n+6th row groups, a sub-pixel of each row of even-column groups is connected to a scan line above the row of sub-pixels, and an odd-numbered column of each of the nth and n+6th row groups a group of sub-pixels connected to the scan line below the row of sub-pixels; in the n+1th and n+5th row groups, the i-th and i-th-th sub-pixels of each row are connected above the row of sub-pixels Scan line, the nth and n+5th line groups, the jth of each line And the j+3th sub-pixel is connected to the scan line below the row of sub-pixels; in the n+
- n 1, 5, 9, ..., n-4, n;
- i 2, 6, 10, ..., i-4, i;
- j 1, 5, 9, ..., j-4, j.
- Each sub-pixel is connected to a corresponding data line and a corresponding scan line through a switching element.
- the switching element is a thin film transistor, a gate of the thin film transistor is electrically connected to the corresponding scan line, a source thereof is electrically connected to the corresponding data line, a drain thereof and the corresponding sub-pixel Electrical connection.
- the present invention also provides a liquid crystal panel including a display unit, the display unit includes an array substrate and a filter substrate disposed opposite to each other, and a liquid crystal layer between the array substrate and the filter substrate, wherein the array substrate comprises:
- each column of data lines forming a column group, each column group comprising two columns of sub-pixels; wherein, the sub-pixels of the odd column group are connected to the data lines closer to the sub-pixels on both sides of the column group a sub-pixel of an odd-numbered row of even-numbered columns connected to a data line closer to the sub-pixel on both sides of the column group; a sub-pixel of an even-numbered row of even-numbered columns connected to both sides of the column group a data line that is farther away from the pixel;
- a plurality of scan lines, above and below each row of sub-pixels, are provided with scan lines for driving only the row of sub-pixels; dividing the sub-pixel array into a plurality of row groups, each row group comprising one or two rows a pixel; wherein, in the nth and n+6th row groups, a sub-pixel of each row of even-column groups is connected to a scan line above the row of sub-pixels, and an odd-numbered column of each of the nth and n+6th row groups a group of sub-pixels connected to the scan line below the row of sub-pixels; in the n+1th and n+5th row groups, the i-th and i-th-th sub-pixels of each row are connected above the row of sub-pixels In the scan line, in the n+1th and n+5th row groups, the jth and j+3th subpixels of each row are connected to the scan line below the row of subpixels; the n+
- n 1, 5, 9, ..., n-4, n;
- i 2, 6, 10, ..., i-4, i;
- j 1, 5, 9, ..., j-4, j.
- Each sub-pixel is connected to a corresponding data line and a corresponding scan line through a switching element.
- the switching element is a thin film transistor, a gate of the thin film transistor is electrically connected to the corresponding scan line, a source thereof is electrically connected to the corresponding data line, a drain thereof and the corresponding sub-pixel Electrical connection.
- the liquid crystal panel further includes a gate driver and a source driver, the gate driver provides a scan signal to the sub-pixel array through a scan line, and the source driver supplies a data signal to the sub-pixel array through the data line.
- the sub-pixel includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
- the liquid crystal panel is driven by a point flip.
- a liquid crystal display including a liquid crystal panel and a backlight module.
- the liquid crystal panel is disposed opposite to the backlight module, and the backlight module provides a display light source to the liquid crystal panel, so that The liquid crystal panel displays an image, wherein the liquid crystal panel is a liquid crystal panel as described above.
- the array substrate provided in the embodiment of the present invention by the arrangement design of the connection manner of the sub-pixels and the data lines and the scan lines in the array substrate, each column of sub-pixels is driven when using the dot flip mode.
- FIG. 1 is a partial schematic structural view of a conventional shared data line array substrate.
- Fig. 2 is a signal waveform diagram of the dot flip driving method.
- FIG. 3 is a schematic partial structural diagram of a shared data line array substrate according to Embodiment 1 of the present invention.
- FIG. 4 is a schematic view showing the structure of a sub-pixel and a data line and a scan line connected through a thin film transistor in the embodiment of the invention.
- FIG. 5 is a schematic diagram of the array substrate according to Embodiment 1 of the present invention after being charged.
- FIG. 6 is a schematic partial structural diagram of a shared data line array substrate according to Embodiment 2 of the present invention.
- FIG. 7 is a schematic diagram of the array substrate according to Embodiment 2 of the present invention after being charged.
- FIG. 8 is a schematic structural diagram of a liquid crystal display according to Embodiment 3 of the present invention.
- FIG. 9 is a schematic structural diagram of a liquid crystal panel according to Embodiment 3 of the present invention.
- FIG. 10 is a schematic structural diagram of a display unit according to Embodiment 3 of the present invention.
- the object of the present invention is to improve the defect that a liquid crystal panel of a Data Line Share (DLS) type has a bright dark line in a vertical direction, and provides an array substrate including the sub-substrate.
- the pixel array and the plurality of data lines and scan lines crossing each other are arranged by the connection manner of the sub-pixels and the data lines and the scan lines in the array substrate, and are driven by the dot flip mode when each column sub-pixel is spaced apart from each other. There are sub-pixels that are better charged and less charged.
- connection mode of the sub-pixel and the data line among the plurality of data lines, one column group is formed between each two data lines, and each column group includes two columns of sub-pixels.
- each sub-pixel is connected to a data line closer to the sub-pixel on both sides of the column group; and for a sub-pixel of an odd-numbered column group, each sub-pixel is connected to the sub-pixel A data line closer to the sub-pixel on both sides of the column group; for a sub-pixel of an even-numbered column group, each sub-pixel is connected to a data line farther from the sub-pixel on both sides of the column group.
- closer and farther are relative.
- a scan line for driving only the row of sub-pixels is disposed above and below each row of sub-pixels; and then the sub-pixel array is divided into multiple Row groups, each row group consisting of one or two rows of sub-pixels.
- each row of even column groups of subpixels each subpixel is connected to the scan line above the row of subpixels, for each of the nth and n+6th row groups A sub-pixel of an odd column group, each sub-pixel being connected to a scan line below the row of sub-pixels.
- each sub-pixel is connected to the scan line above the row of sub-pixels, for the n+1th and nthth In the +5 line group, the jth and j+3th sub-pixels of each line, each sub-pixel is connected to the scan line below the row of sub-pixels.
- each row of odd column groups of subpixels each subpixel is connected to the scan line above the row of subpixels
- each sub-pixel is connected to the scan line above the row of subpixels
- a sub-pixel of each row of even-column groups each sub-pixel being connected to a scan line below the row of sub-pixels.
- each sub-pixel is connected to the scan line above the row of sub-pixels, for the i-th and i-th of each row of the n+3th row group +1 sub-pixels, each sub-pixel connected to a scan line below the row of sub-pixels.
- connection manner of the sub-pixel and the scan line when each row group includes two rows of sub-pixels, one row of sub-pixels in one row group is connected with the data line and the scan line and another row of sub-pixels and data lines and sweep
- the upper lines are connected in the same way, that is, two rows of sub-pixels are used as one repeating unit.
- FIG. 3 is a partial schematic structural view of the array substrate provided by the embodiment.
- P11 is the first sub-pixel at the upper left
- P78 is the last sub-pixel at the lower right.
- each column group 11, 12, 13, 14 is formed between each two data lines, and each column group includes two columns of sub-pixels (as shown in the figure, the column group 11 includes the first and the 2 columns of subpixels).
- each sub-pixel is connected to a data line closer to the sub-pixel on both sides of the column group (such as the sub-pixel of the column group 11 in the figure, the sub-pixel P1y is connected to a data line D1, the sub-pixel P2y is connected to the data line D2); for the sub-pixels of the odd-numbered rows of the even-numbered column groups 12, 14, each sub-pixel is connected to a data line closer to the sub-pixel on both sides of the column group ( As shown in the column 12 in the figure 1 row of sub-pixels P13, P14, sub-pixel P13 connected to data line D2, sub-pixel P14 connected to data line D3); for even-numbered sub-pixels of even-numbered column groups 12, 14, each sub-pixel is connected to the column Data lines on the two sides of the group that are farther from the sub-pixel (such as the sub-pixels P23, P24 of the second row in the column group 12, the sub-pixel P23 are connected to the
- each line group includes one row of sub-pixels, that is, the line group 21 includes the first row of sub-pixels, and the row group 22 Includes the second row of subpixels...
- the sub-pixels are connected to the scan lines as follows:
- each sub-pixel is connected to the scan line above the row sub-pixel (such as the sub-pixel P13, P14, sub-pixel P13 of the row group 21 even column group 12 in the row group 21).
- each sub-pixel is connected to a scan line below the row of sub-pixels (such as the sub-pixels P11, P12 of the odd-numbered column group 11 of the row group 21, the sub-pixels P11, P12 are connected to the scan line G21, the odd-numbered column of the row group 27
- the sub-pixels P71, P72, and the sub-pixels P71, P72 of the group 11 are all connected to the scanning line G27).
- each sub-pixel is connected to a scan line above the row of sub-pixels (as shown in the row group 22, the second and third sub-pixels P22, P23, The sub-pixels P22, P23 are connected to the scanning line G12, the second and third sub-pixels P62, P63 of the line group 26, the sub-pixels P62, P63 are connected to the scanning line G16), and the jth and the first for each line of the line groups 22 and 26 j + 3 sub-pixels, each sub-pixel is connected to a scan line below the row of sub-pixels (as shown in the row group 22, the first and fourth sub-pixels P21, P24, the sub-pixels P21, P24 are connected to the scan line G22, the row group 26 first and fourth sub-pixels P61, P64, and sub-pixels P61, P64 are connected to the scanning line G26).
- i 2, 6; j
- each sub-pixel is connected to the scan line above the row of sub-pixels (such as the sub-pixels P31, P32, sub-pixels of the row group 23 odd-numbered column group 11 in the row group 23 and 25)
- the pixels P31, P32 are each connected to the scanning line G13
- the sub-pixels P51, P52 are all connected to the scanning line G15
- the even-numbered column group 12 for each of the row groups 23 and 25 , 14 sub-pixels, each sub-pixel is connected to the scan line below the row of sub-pixels (as shown in the row group 23 even
- the sub-pixels P33, P34 of the column group 12, the sub-pixels P33, P34 are all connected to the scanning line G23, the sub-pixels P53, P54 of the even-group 12 of the row group 25, and the sub-pixels P
- each sub-pixel is connected to a scan line above the row of sub-pixels (as shown in the row group 24, the first and fourth sub-pixels P41, P44, sub-pixels) P41 and P44 are connected to the scan line G14).
- each sub-pixel is connected to the scan line below the row of sub-pixels (as shown in the second group of the row group 24).
- the third sub-pixels P42, P43, and the sub-pixels P42, P43 are connected to the scanning line G24).
- Each sub-pixel Pxy is connected to a corresponding data line and a corresponding scan line through a switching element 10.
- the sub-pixel P13 is taken as an example.
- the switching element 10 in this embodiment is a thin film transistor (TFT), and the gate 10a of the thin film transistor is electrically connected to the corresponding scan line G11.
- the source 10b is electrically connected to the corresponding data line D2, and the drain 10c thereof is electrically connected to the sub-pixel P13.
- the sub-pixels P12, P13, P22, P23, P32, P33, P42, P43, P52, P53, P62, P63, P72, P73 on both sides of the data line D2 are charged.
- the sub-pixels P12, P13, P22, P32, P33, P42, P52, P53, P62, P72, P73 are charged by data line D2.
- the sub-pixels P23, P43, and P63 are charged by the data line D3.
- P12, P42 and P72 are sub-pixels with better charging
- P22, P32, P52 and P62 are sub-pixels with poor charging
- P33, P43 and P53 is a sub-pixel with better charging
- P13, P23, P63 and P73 are sub-pixels with poor charging.
- FIG. 5 is a diagram showing a distribution diagram of sub-pixels with better charging and poor charging in a frame of the above-structured array substrate.
- the white portion indicates a sub-pixel with better charging
- the shaded portion indicates a sub-pixel with poor charging. It can be seen that in the sub-pixels of the same column, there are sub-pixels with better charging and poor charging, and in the sub-pixels of the same row, there are also better charging and poor charging. Subpixel. Therefore, in the liquid crystal panel including the array substrate, the brightness of each portion as a whole is balanced, and the defect of the bright dark line in the vertical direction can be improved.
- the array substrate provided in this embodiment can be regarded as obtained by repeating the partial structure shown in FIG. 3 multiple times in the lateral direction and the longitudinal direction.
- FIG. 6 is a partial schematic structural view of the array substrate provided by the embodiment. Different from Embodiment 1 In this embodiment, in the direction in which the scan lines are arranged, the row groups 21a, 22a, 23a, 24a, 25a, 26a, 27a of the sub-pixel array are divided into two rows of sub-pixels, such as In FIG.
- the row group 21a includes the first row and the second row of sub-pixels
- the row group 22a includes the third row and the fourth row of the sub-pixel row group 23a including the fifth row and the sixth row of sub-pixels
- the row group 24a includes the 7 rows and 8 rows of sub-pixels
- row group 25a includes 9th row and 10th row sub-pixels
- row group 26a includes 11th row and 12th row sub-pixels
- row group 27a includes 13th row and 14th row of sub-pixels .
- a row of sub-pixels in one row group is connected to the data line and the scanning line in the same manner as the other row of sub-pixels and the data line and the scanning line, that is, two rows of sub-pixels are used as one repeating unit.
- the two sub-pixels adjacent to each other for example, P11 and P21
- the connection manner with the data line and the scan line is the same as that of the line group 21 in the first embodiment, and details are not described herein again.
- the row group 22a corresponds to the row group 21 in the embodiment 1
- the row group 23a corresponds to the row group 23 in the embodiment 1
- the row group 24a corresponds to the row group 24 in the embodiment 1
- the row group 25a corresponds to the first embodiment.
- the row group 25, the row group 26a corresponds to the row group 26 in the embodiment 1
- the row group 27a corresponds to the row group 27 in the embodiment 1.
- FIG. 7 is a diagram showing a distribution diagram of sub-pixels with better charging and poor charging in a frame of the above-structured array substrate. Among them, the white portion indicates a sub-pixel with better charging, and the shaded portion indicates a sub-pixel with poor charging.
- the array substrate provided in this embodiment can be regarded as obtained by repeating the partial structure shown in FIG. 6 a plurality of times in the lateral direction and the longitudinal direction.
- the embodiment provides a liquid crystal panel and a liquid crystal display including the same.
- the liquid crystal display includes a liquid crystal panel 100 and a backlight module 200.
- the liquid crystal panel 100 is disposed opposite to the backlight module 200.
- the backlight module 200 provides a display light source to the liquid crystal panel 100 to display the image on the liquid crystal panel 100.
- the liquid crystal panel 100 includes a display unit 1, a gate driver 2, and a source driver 3 provided with a sub-pixel array.
- the gate driver 2 supplies a scan signal Gate to the sub-pixel array through a scan line
- the source driver 3 supplies a data signal Data to the sub-pixel array through the data line.
- the display unit 1 includes a liquid crystal layer 1c including an array substrate 1a and a color filter substrate 1b disposed between the array substrate 1a and the filter substrate 1b.
- the array substrate 1a adopts an embodiment as 1 or the array substrate provided in Embodiment 2, wherein the sub-pixel Pxy includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
- each column of sub-pixels is mutually There are sub-pixels with better charging and poor charging at intervals (here, charging is better and charging is relatively inferior), so that the brightness of each part in the liquid crystal panel including the array substrate is balanced, and the improvement is improved. There is a defect of a bright dark line in the vertical direction.
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Abstract
Description
Claims (15)
- 一种阵列基板,其中,包括:子像素阵列;多条数据线,每两条数据线之间形成一列组,每一列组包括两列子像素;其中,奇数列组的子像素,连接到该列组两侧的与该子像素较近的数据线;偶数列组的奇数行的子像素,连接到该列组两侧的与该子像素较近的数据线;偶数列组的偶数行的子像素,连接到该列组两侧的与该子像素较远的数据线;多条扫描线,每一行子像素的上方和下方均设置有仅用于驱动该行子像素的扫描线;将所述子像素阵列划分为多个行组,每一行组包括一行或两行子像素;其中,第n和第n+6行组中,每一行偶数列组的子像素,连接到该行子像素上方的扫描线,第n和第n+6行组中,每一行奇数列组的子像素,连接到该行子像素下方的扫描线;第n+1和第n+5行组中,每一行的第i和第i+1个子像素,连接到该行子像素上方的扫描线,第n+1和第n+5行组中,每一行的第j和第j+3个子像素,连接到该行子像素下方的扫描线;第n+2和第n+4行组中,每一行奇数列组的子像素,连接到该行子像素上方的扫描线,第n+2和第n+4行组中,每一行偶数列组的子像素,连接到该行子像素下方的扫描线;第n+3行组每一行的第j和第j+3个子像素,连接到该行子像素上方的扫描线,第n+3行组每一行的第i和第i+1个子像素,连接到该行子像素下方的扫描线;其中:n=1、5、9、…、n-4、n;i=2、6、10、…、i-4、i;j=1、5、9、…、j-4、j。
- 根据权利要求1所述的阵列基板,其中,每一子像素通过一开关元件连接到对应的数据线和对应的扫描线。
- 根据权利要求2所述的阵列基板,其中,所述开关元件为薄膜晶体管,所述薄膜晶体管的栅极与所述对应的扫描线电连接,其源极与所述对应的数据线电连接,其漏极与所述对应的子像素电连接。
- 一种液晶面板,包括显示单元,所述显示单元包括相对设置的阵列基板和滤光基板以及位于阵列基板和滤光基板之间的液晶层,其中,所述阵列基板包括:子像素阵列;多条数据线,每两条数据线之间形成一列组,每一列组包括两列子像素;其中,奇数列组的子像素,连接到该列组两侧的与该子像素较近的数据线;偶数列组的奇数行的子像素,连接到该列组两侧的与该子像素较近的数据线;偶数列组的偶数行的子像素,连接到该列组两侧的与该子像素较远的数据线;多条扫描线,每一行子像素的上方和下方均设置有仅用于驱动该行子像素的扫描线;将所述子像素阵列划分为多个行组,每一行组包括一行或两行子像素;其中,第n和第n+6行组中,每一行偶数列组的子像素,连接到该行子像素上方的扫描线,第n和第n+6行组中,每一行奇数列组的子像素,连接到该行子像素下方的扫描线;第n+1和第n+5行组中,每一行的第i和第i+1个子像素,连接到该行子像素上方的扫描线,第n+1和第n+5行组中,每一行的第j和第j+3个子像素,连接到该行子像素下方的扫描线;第n+2和第n+4行组中,每一行奇数列组的子像素,连接到该行子像素上方的扫描线,第n+2和第n+4行组中,每一行偶数列组的子像素,连接到该行子像素下方的扫描线;第n+3行组每一行的第j和第j+3个子像素,连接到该行子像素上方的扫描线,第n+3行组每一行的第i和第i+1个子像素,连接到该行子像素下方的扫描线;其中:n=1、5、9、…、n-4、n;i=2、6、10、…、i-4、i;j=1、5、9、…、j-4、j。
- 根据权利要求4所述的液晶面板,其中,每一子像素通过一开关元件连接到对应的数据线和对应的扫描线。
- 根据权利要求5所述的液晶面板,其中,所述开关元件为薄膜晶体管,所述薄膜晶体管的栅极与所述对应的扫描线电连接,其源极与所述对应的数据线电连接,其漏极与所述对应的子像素电连接。
- 根据权利要求4所述的液晶面板,其中,所述液晶面板还包括栅驱动器 和源驱动器,所述栅驱动器通过扫描线向所述子像素阵列提供扫描信号,所述源驱动器通过数据线向所述子像素阵列提供数据信号。
- 根据权利要求4所述的液晶面板,其中,所述子像素包括红色子像素、绿色子像素和蓝色子像素。
- 根据权利要求4所述的液晶面板,其中,所述液晶面板采用点翻转的方式驱动。
- 一种液晶显示器,包括液晶面板及背光模组,所述液晶面板与所述背光模组相对设置,所述背光模组提供显示光源给所述液晶面板,以使所述液晶面板显示影像,其中,所述液晶面板包括显示单元,所述显示单元包括相对设置的阵列基板和滤光基板以及位于阵列基板和滤光基板之间的液晶层,其中,所述阵列基板包括:子像素阵列;多条数据线,每两条数据线之间形成一列组,每一列组包括两列子像素;其中,奇数列组的子像素,连接到该列组两侧的与该子像素较近的数据线;偶数列组的奇数行的子像素,连接到该列组两侧的与该子像素较近的数据线;偶数列组的偶数行的子像素,连接到该列组两侧的与该子像素较远的数据线;多条扫描线,每一行子像素的上方和下方均设置有仅用于驱动该行子像素的扫描线;将所述子像素阵列划分为多个行组,每一行组包括一行或两行子像素;其中,第n和第n+6行组中,每一行偶数列组的子像素,连接到该行子像素上方的扫描线,第n和第n+6行组中,每一行奇数列组的子像素,连接到该行子像素下方的扫描线;第n+1和第n+5行组中,每一行的第i和第i+1个子像素,连接到该行子像素上方的扫描线,第n+1和第n+5行组中,每一行的第j和第j+3个子像素,连接到该行子像素下方的扫描线;第n+2和第n+4行组中,每一行奇数列组的子像素,连接到该行子像素上方的扫描线,第n+2和第n+4行组中,每一行偶数列组的子像素,连接到该行子像素下方的扫描线;第n+3行组每一行的第j和第j+3个子像素,连接到该行子像素上方的扫描线,第n+3行组每一行的第i和第i+1个子像素,连接到该行子像素下方的扫描线;其中:n=1、5、9、…、n-4、n;i=2、6、10、…、i-4、i;j=1、5、9、…、j-4、j。
- 根据权利要求10所述的液晶显示器,其中,每一子像素通过一开关元件连接到对应的数据线和对应的扫描线。
- 根据权利要求11所述的液晶显示器,其中,所述开关元件为薄膜晶体管,所述薄膜晶体管的栅极与所述对应的扫描线电连接,其源极与所述对应的数据线电连接,其漏极与所述对应的子像素电连接。
- 根据权利要求10所述的液晶显示器,其中,所述液晶面板还包括栅驱动器和源驱动器,所述栅驱动器通过扫描线向所述子像素阵列提供扫描信号,所述源驱动器通过数据线向所述子像素阵列提供数据信号。
- 根据权利要求10所述的液晶显示器,其中,所述子像素包括红色子像素、绿色子像素和蓝色子像素。
- 根据权利要求10所述的液晶显示器,其中,所述液晶面板采用点翻转的方式驱动。
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JP2017525020A JP6369925B2 (ja) | 2014-11-10 | 2014-11-12 | 配列基板及び液晶パネル及び液晶ディスプレイ |
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CN109188749B (zh) * | 2018-09-19 | 2021-02-26 | 重庆惠科金渝光电科技有限公司 | 显示装置 |
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CN104298041A (zh) | 2015-01-21 |
DE112014007153B4 (de) | 2022-03-10 |
JP6369925B2 (ja) | 2018-08-08 |
GB201707166D0 (en) | 2017-06-21 |
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RU2673705C2 (ru) | 2018-11-29 |
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