WO2016054232A1 - A METHOD FOR GaN VERTICAL MICROCAVITY SURFACE EMITTING LASER (VCSEL) - Google Patents

A METHOD FOR GaN VERTICAL MICROCAVITY SURFACE EMITTING LASER (VCSEL) Download PDF

Info

Publication number
WO2016054232A1
WO2016054232A1 PCT/US2015/053254 US2015053254W WO2016054232A1 WO 2016054232 A1 WO2016054232 A1 WO 2016054232A1 US 2015053254 W US2015053254 W US 2015053254W WO 2016054232 A1 WO2016054232 A1 WO 2016054232A1
Authority
WO
WIPO (PCT)
Prior art keywords
gallium
approximately
nitride
porous
nitride layer
Prior art date
Application number
PCT/US2015/053254
Other languages
French (fr)
Inventor
Jung Han
Cheng Zhang
Original Assignee
Yale University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yale University filed Critical Yale University
Priority to CN201580060899.9A priority Critical patent/CN107078190B/en
Priority to KR1020177011945A priority patent/KR102425935B1/en
Priority to EP15846362.0A priority patent/EP3201952B1/en
Priority to JP2017517111A priority patent/JP7016259B6/en
Priority to US15/515,302 priority patent/US11043792B2/en
Publication of WO2016054232A1 publication Critical patent/WO2016054232A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/34Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/34333Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers
    • H01L21/02507Alternating layers, e.g. superlattice
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02513Microstructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • H01L21/30635Electrolytic etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/1042Optical microcavities, e.g. cavity dimensions comparable to the wavelength
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18308Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18361Structure of the reflectors, e.g. hybrid mirrors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/185Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only horizontal cavities, e.g. horizontal cavity surface-emitting lasers [HCSEL]
    • H01S5/187Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only horizontal cavities, e.g. horizontal cavity surface-emitting lasers [HCSEL] using Bragg reflection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18361Structure of the reflectors, e.g. hybrid mirrors
    • H01S5/18369Structure of the reflectors, e.g. hybrid mirrors based on dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/305Structure or shape of the active region; Materials used for the active region characterised by the doping materials used in the laser structure

Definitions

  • the technology relates to forming nanoporous gallium-nitride materials.
  • the porous gallium nitride may be used in integrated optical devices such as vertical-cavity surface- emitting lasers and light-emitting diodes. Discussion of the Related Art
  • etching of semiconductor materials is an important technique that is used in microfabrication processes.
  • Various kinds of etching recipes have been developed for many materials used in semiconductor manufacturing.
  • Si and certain oxides may be etched using dry (e.g., reactive-ion etching) or wet chemical etching techniques that yield desired etch rates and etch morphologies.
  • Ill-nitride materials such as gallium nitride (GaN) and its alloys, have recently emerged as attractive materials for some semiconductor applications, because of the material' s physical and electronic properties.
  • Ill-nitride materials include micro-photonic devices, such as light-emitting diodes (LEDs) and semiconductor lasers for various lighting applications. Because of its wide band gap, GaN -based devices can produce light in the blue region of the visible spectrum and can therefore be used in the production of white light.
  • LEDs light-emitting diodes
  • GaN -based devices can produce light in the blue region of the visible spectrum and can therefore be used in the production of white light.
  • One type of semiconductor light-emitting device that offers some advantages in terms of manufacturability and performance is the vertical cavity surface emitting laser (VCSEL).
  • VCSEL vertical cavity surface emitting laser
  • a vertical cavity surface emitting laser is a class of semiconductor lasers that was conceptualized and developed during the 1980' s and 1990's.
  • a general structure of a VCSEL is depicted in FIG. 1.
  • VCSELs are unlike early semiconductor laser diodes, known as edge- emitting laser diodes, for which the direction of the laser cavity and the direction of the lasing beam are parallel to the planar surface of the semiconductor substrate.
  • edge-emitting lasers the laser light travels transverse to the direction of the laser' s semiconductor junction, and emits from an edge of the chip.
  • the laser cavity 170 and emitting laser beam 175 are oriented perpendicular to the planar surface of the substrate 105 on which the VCSEL is fabricated, and the laser beam travels in a direction of the p-n junction.
  • a VCSEL 100 Compared with conventional edge-emitting laser diodes, a VCSEL 100 has several advantages that include (1) on- wafer testing of device performance, (2) better beam profile and far-field patterns, (3) better mode stability and wider free spectral range, (4) possibility of a very low threshold current, (5) a generally higher manufacturing yield, (6) a higher packing density and therefore lower cost, and (7) improved compatibility with planar microfabrication processes.
  • VCSELs in the infrared and red spectral ranges are currently being used for telecommunication and industrial applications.
  • the described technology relates to methods and structures associated with forming uniform, nanoporous layers in gallium-nitride semiconductor materials.
  • the nanoporous layers may be used for forming integrated, optically-reflective structures such as distributed Bragg reflector (DBR) structures.
  • the nanoporous layers may be formed using electrochemical (EC) etching techniques at room temperature. The EC etching does not require ultraviolet or optical illumination to etch the gallium-nitride material.
  • the inventors have found that the pore morphology and uniformity of the etching process depends on several parameters ⁇ e.g., material doping, material composition, applied bias, etchant or electrolyte composition and concentration, and current spreading at the region to be etched).
  • Highly reflective DBR structures suitable for use in VCSELs, have been fabricated using the described technology.
  • a porous gallium-nitride layer may have a majority of its pores with a maximum transverse width less than approximately 100 nm and have a volumetric porosity greater than 30%. In some aspects, more than 90% of the pores of the porous gallium-nitride layer have a maximum transverse width less than approximately 100 nm. In some aspects, over half of the pores of the gallium-nitride layer may have a maximum transverse width between approximately 30 nm and approximately 90 nm. In some aspects, more than 70% of the pores of the gallium-nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm. According to some aspects, the pores have walls with a root-mean- square surface roughness less than approximately 10 nm.
  • nitride layer is between approximately 5x10 cm “ and approximately 2x10 cm " .
  • a dopant in the porous gallium-nitride layer for the w-type doping is germanium.
  • the volumetric porosity of the porous gallium-nitride layer is greater than 60%.
  • a porous gallium-nitride layer having any of the foregoing characteristics may be included in a distributed Bragg reflector. In some aspects, a porous gallium-nitride layer having any of the foregoing characteristics may be included in a vertical- cavity surface-emitting laser. In some aspects, a porous gallium-nitride layer having any of the foregoing characteristics may be included in a light-emitting diode. According to some implementations, a porous gallium-nitride layer having any of the foregoing characteristics may be included in an electrode.
  • a semiconductor light emitting device may comprise at least one buried porous gallium- nitride layer wherein a majority of the pores of the at least one buried porous gallium- nitride layer have a maximum transverse width less than approximately 100 nm and the at least one buried porous gallium-nitride layer has a volumetric porosity greater than 30%. In some aspects, over 70% of the pores of the at least one buried porous gallium- nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm.
  • the at least one buried porous gallium-nitride layer comprises a plurality of porous gallium-nitride layers separated by non-porous gallium- nitride layers arranged in a first distributed Bragg reflector (DBR).
  • the plurality of porous gallium-nitride layers may include non-porous regions located centrally within the DBR that form a pillar of non-porous gallium nitride.
  • the first DBR is arranged as an w-side reflector for a vertical-cavity surface-emitting laser (VCSEL).
  • VCSEL vertical-cavity surface-emitting laser
  • the first DBR has a reflectance greater than 99% for a lasing wavelength of the VCSEL.
  • the first DBR has reflectance values greater than 98% over a bandwidth greater than approximately 20 nm.
  • the pores of the at least one buried porous gallium-nitride layer have walls with a root-mean-square surface roughness less than approximately 10 nm.
  • the at least one buried porous gallium- nitride layer has an w-type doping density between approximately 5x10 19 cm - " 3 and
  • a dopant for the w-type doping in the at least one buried porous gallium-nitride layer is germanium.
  • a semiconductor light emitting device may further include a cavity region having a length L and a second DBR, wherein the cavity region is located between the first DBR and the second DBR.
  • the cavity region includes multiple quantum wells or a superlattice.
  • the length L of the cavity region is between approximately one and five optical wavelengths of a lasing wavelength for the VCSEL.
  • a semiconductor light emitting device may further comprise a current- spreading layer having a doping density greater than
  • a method for forming porous gallium nitride may comprise acts of exposing heavily-doped gallium nitride to an etchant, wherein the heavily-doped gallium nitride has an w-type doping density between approximately 5x10 19 cm - " 3 and approximately 2x1020 cm - " 3 , applying an electrical bias between the etchant and the heavily-doped gallium nitride, wherein the electrical bias has a value between approximately 1.3 volts and 3 volts, and electrochemically etching the heavily-doped gallium nitride to produce porous gallium nitride having a volumetric porosity greater than approximately 30% and a majority of pores with a maximum transverse width less than approximately 100 nm.
  • the etchant comprises nitric acid having a concentration between 60% and approximately 80% by weight. In some aspects, the etchant comprises nitric acid having a concentration of approximately 70% by weight.
  • the heavily-doped gallium nitride may be arranged in a plurality of layers that are separated by undoped gallium- nitride layers.
  • a method may further comprise spreading etching current during the electrochemical etching with a current- spreading layer of doped gallium nitride located adjacent to the DBR.
  • a method may further comprise etching vias into the plurality of layers and the undoped gallium-nitride layers to expose edges of the plurality of layers.
  • the electrochemical etching comprises lateral etching of the plurality of layers.
  • a method for forming porous gallium nitride may further include depositing the plurality of layers and the undoped or moderately-doped gallium-nitride layers to form a first distributed Bragg reflector (DBR) for a vertical-cavity surface-emitting laser (VCSEL).
  • a method may further comprise stopping the electrochemical etching to leave a pillar of unetched gallium nitride centrally within the first DBR.
  • a method may further comprise forming a cavity region having multiple quantum wells or a superlattice adjacent to the first DBR.
  • a method for forming porous gallium nitride may further comprise forming a second DBR on an opposite side of the cavity region from the first DBR.
  • FIG. 1 is a simplified depiction of a vertical cavity surface-emitting laser (VCSEL), according to some embodiments;
  • VCSEL vertical cavity surface-emitting laser
  • FIG. 2 depicts a distributed Bragg reflector that includes porous layers, according to some embodiments
  • FIG. 3 illustrates etching characteristics of GaN under various etching conditions
  • FIG. 4A shows a first pore morphology obtained when etching germanium-doped GaN under first etching conditions
  • FIG. 4B shows a second pore morphology obtained when etching germanium-doped GaN under second etching conditions
  • FIG. 4C shows a third pore morphology obtained when etching germanium-doped GaN under third etching conditions
  • FIG. 4D shows a fourth pore morphology obtained when etching germanium-doped GaN under fourth etching conditions
  • FIG. 5A depicts a multilayer structure that may be used to form a high-reflective, n- side DBR, according to some embodiments
  • FIGS. 5B-5E depict structures associated with a process for forming a high-reflective DBR, according to some embodiments
  • FIG. 5F depicts a cavity region formed on a high-reflective DBR, according to some embodiments.
  • FIG. 5G depicts a second DBR formed on a cavity region for a VCSEL, for example
  • FIG. 6 is an optical micrograph showing etched openings into a multilayer stack and DBR regions adjacent to the etched openings
  • FIG. 7 is a scanning-electron micrograph (SEM) showing pore morphology of EC- etched gallium- nitride layers in a DBR structure, according to some embodiments;
  • FIG. 8 shows measured reflectance from a GaN DBR having nanoporous gallium- nitride layers
  • FIG. 9 shows measured reflectance greater than 99% from a GaN DBR having nanoporous gallium- nitride layers.
  • nanoporous gallium nitride materials can be very useful for improving performance of light-emitting devices such as light-emitting diodes (LEDs) and vertical cavity surface emitting lasers (VCSELs). Efficient LEDs and VCSELs are useful for high-end lighting applications such as automobile headlights, micro-projectors, displays, and low-droop, high-power lamps.
  • LEDs light-emitting diodes
  • VCSELs vertical cavity surface emitting lasers
  • Efficient LEDs and VCSELs are useful for high-end lighting applications such as automobile headlights, micro-projectors, displays, and low-droop, high-power lamps.
  • the inventors have conceived and developed techniques for forming highly uniform, nanoporous gallium-nitride layers for light-emitting devices using electrochemical (EC) etching at room temperature.
  • EC electrochemical
  • the inventors have recognized and appreciated that high porosity, high uniformity, small pore size, and smooth wall surfaces can improve the optical performance of reflective structures that incorporate such porous layers.
  • the inventors investigated a wide range of etching conditions and material modifications. The inventors have discovered that a desirable pore morphology can be obtained with EC etching under limited etching conditions and material composition.
  • a VCSEL may include an active region 130 located between a first semiconductor layer 140 of a first conductivity type (e.g., p-type) and a second semiconductor layer 120 of a second conductivity type (e.g. , w-type).
  • the active region 130 may comprise multiple-quantum- well (MQW) layers or a superlattice (SL).
  • the laser cavity 170 of the VCSEL may include the active region and adjacent layers, and may be located between a first bottom-side reflector 110 and a second top-side reflector 150.
  • the bottom side of the device may be the ⁇ -conductivity side
  • the top side of the device may be the ⁇ -conductivity side.
  • Electrical contact to the VCSEL 100 may be made through the substrate 105 on the bottom side and through a deposited conductive contact 160 on the top side of the device.
  • the top-side contact may connect to an external current or voltage source through one or more wire bonds 165.
  • current is applied to the VCSEL 100, electrons and holes recombine in the active region 130 to produce photons.
  • the photons travel back and forth between the reflectors 110, 150 and may be amplified by stimulated emission. A portion of the circulating photons are transmitted through the top-side reflector 150 to produce the laser beam 175.
  • Nichia Chemical used a laser lift-off (LLO) technique to separate an InGaN/GaN p-n epitaxial structure having a top-side dielectric reflector from a sapphire substrate, and to expose the bottom side (w-side) for the deposition of another dielectric mirror.
  • LLO laser lift-off
  • the use of LLO adds processing complexity and essentially voids an advantage of on- wafer testing for VCSELs.
  • the LLO process typically needs a relatively thick active region, which increases the laser cavity length and reduces the optical mode spacing. Reduced mode spacing can make it more difficult to obtain single-mode operation or to match a wavelength of a laser cavity mode with the wavelength for which the laser's DBRs are designed.
  • Nichia and NCTU used dielectric current blocking layers on the /?-side, these research groups did not demonstrate current blocking on the w-side where lateral current diffusion could seriously degrade the VCSEL's performance.
  • the structure may comprise nanoporous layers 220 interleaved with non-porous layers 210, where each layer corresponds to a quarter wavelength of the central lasing wavelength for the VCSEL, according to some embodiments.
  • the nanoporous layers 220 can have a low refractive index n compared to the non-porous layers, giving a significantly higher refractive index contrast than is possible for solid InGaN/GaN layer pairs.
  • the inventors have recognized and appreciated that a high reflectivity can be achieved with a reduced number of layer pairs (e.g. , 6 - 20) provided the volumetric porosity (ratio of air volume in a porous layer to total volume of the porous layer) is high.
  • the inventors have also recognized that the optical quality of the reflector will be improved if the pore size is small (less than one-quarter the lasing wavelength), the porosity is uniform across the device, and the pores have smooth walls.
  • Ill-nitride materials can be chemically inert to wet etchants, microfabrication of integrated optical or integrated electronic devices based on these materials poses
  • etching techniques e.g. , dry reactive-ion etching or photoelectrochemical (PEC) etching
  • PEC photoelectrochemical
  • these processes can be costly and/or difficult to implement.
  • these processes may not be useable for DBR structures or structures where a buried porous layer is desired.
  • PEC etching may produce non-uniform etching due to spatial intensity variations, and may not be able to etch buried layers or shadowed regions of a substrate.
  • the inventors have conceived of electrochemical (EC) etching processes (illumination not required) that can be implemented at room temperature and provide uniform etching of highly porous (e.g. , greater than 60% volumetric porosity) buried layers with sub- 100-nm pore sizes and smooth wall surfaces. Buried layers may be laterally etched over distances greater than 50 microns. Several etching parameters and material properties are controlled to obtain a desired pore morphology.
  • the EC etching processes may be used to selectively etch gallium- nitride materials that have been doped to tune, in part, the etching properties of the materials.
  • a very high doping level and low etching bias is used to obtain a desired pore morphology for gallium-nitride materials.
  • germanium is used as an w-type dopant for GaN to obtain the high level of doping and smooth etched surfaces.
  • the level of doping may be between 19 -3 20 -3
  • the terms “approximately” and “about” may be used to mean within +20% of a target value (e.g. , an explicitly stated value) in some embodiments, within +10% of a target value in some embodiments, within +5% of a target value in some embodiments, and yet within +2% of a target value in some embodiments.
  • the terms “approximately” and “about” also include the target value, so that a ranges expressed as "between approximately A and approximately B” may also be expressed as “between A and B” and a value stated as “approximately A” may also be expressed as "A”.
  • etching characteristics were mapped by the inventors and are illustrated in the graph of FIG. 3. Pore morphologies corresponding to some of the etched samples are depicted in the scanning-electron micrographs of FIGS. 4A-4D. The etching involved lateral etching of alternate layers in a stack of GaN layers. Improved results were found when highly concentrated nitric acid was used as the electrolyte or etchant.
  • the concentration of nitric acid (HNO 3 ) in water is between approximately 60% and approximately 80% by weight. According to some embodiments, the concentration of nitric acid in water is between approximately 65% and approximately 75% by weight.
  • the concentration of nitric acid in water is approximately 70% by weight or approximately 16.7 molar (M).
  • material doping and applied bias were varied to etch the gallium-nitride layers.
  • the doping and applied bias strongly influenced pore morphology.
  • the etching behavior is roughly divided into three regions: no etching (labeled region I), complete etching or electro-polishing (labeled region III), and the formation of nanoporous GaN (labeled region II).
  • etching was characterized by mapping approximate iso-porosity contours from 10% to 90%.
  • a volumetric porosity greater than approximately 60% can be obtained at applied bias voltages between approximately 2.0 V and approximately 3 V. In some implementations, a volumetric porosity greater than approximately 30% can be obtained at applied bias voltages between approximately 1.3 V and approximately 3 V.
  • Such low applied bias values are desirable, because a low bias can reduced any parasitic etching that might otherwise occur in other regions of a VCSEL or LED structure. Additionally at the low bias values, the transverse width of the pores is found to be small (e.g., less than approximately 120 nm) and highly uniform. Under some etching conditions, porosities greater than 80% and 90% are obtained. Such high porosity can appreciably lower the effective refractive index of a porous gallium- nitride layer.
  • FIGS. 4A-4D Examples of pore morphologies are shown in FIGS. 4A-4D for the four etching conditions indicated by the data points A, B, C, and D in FIG. 3.
  • low volumetric porosity less than 10%
  • high porosity greater than 60 %
  • the pore morphology is fairly uniform.
  • the average transverse pore width is less than approximately 100 nm.
  • the porosity is less than about 30%, and the pore morphology is non-uniform.
  • Some pores have large transverse dimensions (e.g., greater than 150 nm).
  • FIG. 4C and FIG. 4D indicate a susceptibility for delamination of the layers. Accordingly, a very high dopant density is preferred for purification of gallium nitride.
  • quality reflective structures may be formed in gallium-nitride materials.
  • one or more porous layers may be formed below an LED to improve light extraction from the LED.
  • a highly-reflective DBR structure may be formed on a substrate for a VCSEL using a plurality of nanoporous layers having high volumetric porosity.
  • Example structures associated with a process for forming a DBR from layers of gallium-nitride materials are depicted in FIGS. 5A-5E.
  • a process for making a DBR may use a multilayer stack 500 formed on a substrate 505, as depicted in FIG. 5A.
  • the substrate may comprise sapphire, gallium nitride, silicon carbide, or any other suitable material upon which gallium nitride may be epitaxially grown.
  • the multilayer stack may include a buffer layer 510 formed on the substrate.
  • the buffer layer may comprise gallium nitride or other Ill-nitride material and may have a thickness between approximately 500 nm and approximately 2 ⁇ .
  • the buffer layer 510 may be formed using an epitaxial growth process on the substrate 505, and may be undoped in some cases.
  • the buffer layer may be used as a transition layer between the substrate 505 of a first material type and quality gallium-nitride layers formed for the VCSEL (e.g., to relieve stress and reduce defects that arise from a lattice mismatch between the substrate 505 and epitaxially grown gallium-nitride layers of the VCSEL).
  • the multilayer stack 500 may also include a conductive layer 515 formed of silicon- doped gallium nitride.
  • the conductive layer 515 may be used in some embodiments to carry current to the VCSEL, and may also be used spread current during EC etching while forming porous GaN layers.
  • the conductive layer may have a doping density between approximately lxlO 18 cm 3 and approximately lxlO 19 cm “3 .
  • a thickness of the conductive layer 515 may be between approximately 250 nm and approximately 750 nm.
  • a DBR structure may further include a layer of undoped gallium nitride 520 that is formed on the conductive layer.
  • the layer of undoped gallium nitride may have a thickness between 250 nm and approximately 750 nm.
  • Above the layer of undoped gallium nitride 520 multiple layer pairs for a DBR may be formed.
  • the layer pairs may be deposited by epitaxial growth, according to some embodiments, and may include undoped or moderately-doped gallium-nitride layers 530 and heavily-doped gallium- nitride layers of 535.
  • a moderately-doped gallium-nitride layer may have a doping density between approximately lxlO 17 cm 3 and approximately 2xl0 19 cm “3 .
  • the layers may be deposited using metal-organic chemical vapor deposition (MOCVD) and/or atomic layer deposition (ALD).
  • the heavily-doped layers 535 may be n- type conductivity ⁇ e.g., n++ doping).
  • the doping density of the heavily-doped gallium-nitride layers may be between approximately 4xl0 19 cm 3 and approximately 2x10 20 cm 3 .
  • the heavily doped layers may be doped with germanium.
  • silicon doping results in a rough etched surfaces
  • germanium doping allows high doping levels and also results in a smooth surface topology of the etched gallium nitride surfaces for doping levels on the order of
  • the pore walls ⁇ e.g., at an interface with a non-porous layer
  • the pore walls have a root-mean- square surface roughness less than approximately 10 nm.
  • the buffer layer 510, conductive layer 515, undoped layer 520, and/or layer pairs may comprise GaN.
  • the buffer layer 510, conductive layer 515, undoped layer 520, and/or layer pairs may comprise alloys of gallium nitride.
  • one or more of the layers may include aluminum and/or indium.
  • GaN is used to refer to a semiconductor composition comprising substantially only Ga and N or doped GaN.
  • gallium-nitride may be used to refer to GaN, doped GaN, and alloys or doped alloys of GaN, e.g., InGaN, AlGaN, InAlGaN.
  • the layers may be deposited by one or a combination of deposition techniques, e.g., chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), metal organic CVD (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE) or atomic layer deposition (ALD), according to some embodiments.
  • CVD chemical vapor deposition
  • PECVD plasma enhanced CVD
  • MOCVD metal organic CVD
  • HVPE hydride vapor phase epitaxy
  • MBE molecular beam epitaxy
  • ALD atomic layer deposition
  • a deposited layer may be subsequently annealed to improve crystal quality.
  • additional layers may be deposited that may comprise materials other than gallium nitride or III- nitrides.
  • the thicknesses of the undoped or moderately-doped gallium-nitride layers 530 for the DBR may correspond to approximately 1 ⁇ 4 wavelength of the VCSEL' s designed operating wavelength.
  • the thickness for each undoped or moderately- doped gallium-nitride layer may also correspond to an odd-number multiple of quarter wavelengths, e.g., 3/4, 5/4, 7/4, etc.
  • a thickness tj of an undoped or moderately- doped gallium-nitride layer in the DBR structure may be determined approximately from the following relation:
  • the thickness of an undoped or moderately-doped gallium-nitride layer 530 may be between approximately 40 nm and approximately 60 nm or an odd number multiple thereof.
  • the thickness of a heavily-doped gallium-nitride layer 535 may be greater than the thickness of an undoped or moderately-doped gallium-nitride layer in each layer pair. This is because the heavily-doped gallium-nitride layers will be converted to porous gallium nitride, which has a lower refractive index than that for the solid undoped or moderately-doped gallium-nitride layers.
  • the refractive index n p for the porous gallium nitride may be determined from the following expression: n p ⁇ 2.4— lAp where p is the volumetric porosity of the porous gallium nitride.
  • the thicknesses 3 ⁇ 4 of the heavily-doped gallium-nitride layers 535 may be selected such that after being etched to form porous layers, the resulting thickness of each layer corresponds to approximately 1 ⁇ 4 wavelength (or an odd-number multiple thereof) of the VCSEL' s designed lasing wavelength.
  • the thickness 3 ⁇ 4 may be determined approximately from the following relation: ⁇ ⁇
  • a hard mask 540 may be deposited over the DBR structure, as illustrated in FIG. 5B.
  • the hard mask may comprise an oxide (e.g. , silicon oxide) or any other suitable inorganic material that can be etched by reactive ion etching, for example.
  • the hard mask may be resistant to etching by nitric acid, or the etchant used to porosify the heavily-doped gallium- nitride layers 535. The inventors found that a polymeric resist was undesirably etched by the concentrated nitric acid.
  • the hard mask 540 may be deposited by plasma-enhanced chemical vapor deposition (PECVD), though other deposition processes may be used.
  • PECVD plasma-enhanced chemical vapor deposition
  • a thickness of the hard mask may be between approximately 50 nm and
  • a layer of resist 542 (e.g. , photoresist) may be deposited over the hard mask 540 and patterned using any suitable lithographic process to open up vias 545 in the resist. The resulting structure may appear as illustrated in FIG. 5B.
  • the vias 545 in the photoresist may be used to etch vias through the hard mask 540, as indicated in FIG. 5C.
  • the etching process to open vias in the hard mask may comprise a selective dry etch (e.g. , an anisotropic reactive ion etch that selectively removes the hard mask without removing the photoresist) or a selective wet etch.
  • the selective etch may transfer the via pattern to the hard mask 540.
  • subsequent selective, anisotropic dry etching may be used to form vias 545 through the undoped and heavily-doped layer pairs of the DBR structure. According to some
  • a chlorine-based etch recipe is used to etch vias 545 through the gallium-nitride layer pairs.
  • the vias may extend down to, and possibly into, the undoped layer 520, according to some embodiments.
  • the etch through the layer pairs may be a timed etch.
  • the etched vias 545 may be larger than depicted in FIG. 5C, and may remove a large region of layer pairs around the DBR structure. For example, the removal of layer pairs may leave a mesa on the substrate 505 comprising the undoped or moderately- doped and heavily doped layer pairs at the location of each VCSEL. Regardless of their size, the vias may expose edges of undoped or moderately-doped and heavily-doped layer pairs in the DBR structure.
  • the DBR structure may then be subjected to an electrochemical etch using
  • the etch may be performed at room temperature, and with an applied bias between the etchant bath and the substrate 505 or the conductive layer 515.
  • the applied bias may be between approximately 1.3 V and approximately 3 V.
  • the EC etching may last between approximately 2 minutes and approximately 30 minutes. According to some embodiments, the etching may continue for a time period of up to 10 hours, depending upon the extent of lateral etching desired and bias voltage.
  • the EC etching converts the heavily doped gallium-nitride layers 535 to porous gallium-nitride layers 550, as depicted in FIG. 5D. The etch may proceed laterally from the vias 545 or exposed edges of the layer pairs toward the center of the DBR structure.
  • the etch may proceed laterally across the entire DBR structure and convert each heavily-doped layer to porous gallium nitride. In other embodiments, the etch may be timed to stop before etching entirely through the layers, and a central region of the heavily doped layers may not be etched. The central region may form a pillar 555 of solid gallium-nitride layers. The remaining pillar 555 may provide added structural support to the DBR structure, and may provide a low-resistance current path centrally to an optical axis of the VCSEL, so that carriers injected from the ⁇ -conductivity side of the VCSEL overlap efficiently with the laser's optical cavity mode.
  • a transverse dimension D of the pillar 555 may be less than one-half wavelength of the VCSEL' s emission wavelength modified by the refractive index of the pillar. In some cases, a transverse dimension D of the pillar 555 may be less than one-quarter wavelength of the VCSEL' s emission wavelength modified by the refractive index of the pillar.
  • the hard mask 540 may be removed from the substrate, as depicted in FIG. 5E.
  • a wet buffered oxide etch may be used to remove the hard mask 540.
  • the resulting substrate may then be cleaned and subjected to further processing to form a cavity region above the bottom- side DBR structure and a top- side DBR reflector.
  • fabrication of the cavity region may comprise depositing an w-type gallium-nitride layer 560, multiple quantum wells 565 or superlattice (SL) for the active region, and a /?-type gallium-nitride layer 570 to form a structure as depicted in FIG. 5F.
  • the w-type gallium-nitride layer, multiple quantum wells, and a /?-type gallium- nitride layer may be formed by epitaxial growth, which may comprise metal-organic chemical vapor deposition and/or atomic layer deposition.
  • a planarization step and patterned hard mask may be used to prepare the substrate for subsequent epitaxial growth of the cavity region.
  • a resist may be patterned over layers used to form the cavity region, and selective etching may be used to remove the layers in areas around the cavity region.
  • the cavity region may have a length L, which may be between approximately one wavelength and approximately five wavelengths of the VCSEL' s emission wavelength (as modified by the refractive index of the cavity region).
  • the length L approximately determines a cavity length for the VCSEL.
  • the VCSEL may comprise a microcavity that may support one or a few longitudinal optical modes. In some implementations, the cavity length L may be longer than five wavelengths.
  • a top-side DBR 580 may be deposited to produce a VCSEL cavity as depicted in FIG. 5G.
  • the top-side DBR may comprise a stack of dielectric layers.
  • the dielectric layers may include layer pairs of an oxide (e.g., silicon oxide) having a first refractive index value and a second dielectric layer (e.g., silicon nitride) having a second refractive index value.
  • the dielectric layers may be deposited by an MOCVD and/or ALD process. There may be between 10 and 20 dielectric layer pairs in a VCSEL, though some embodiments may include fewer layer pairs and other embodiments may include more layer pairs.
  • the resulting GaN VCSEL may produce coherent radiation in the violet/blue spectral range (e.g., between approximately 400 nm and
  • highly porous gallium-nitride with small pore sizes include, but are not limited to, high-surface area electrodes for water splitting or other electrochemical reactions and stress-relief layers for multilayer epitaxial structures.
  • Multilayer DBR structures were etched and characterized.
  • different striped vias 610 were etched through multiple GaN layer pairs formed on a substrate.
  • the vias appear as dark stripes, and were etched by reactive ion etching in a chlorine-based plasma.
  • the GaN layer pairs included undoped layers
  • the EC etchant used to porosify the heavily-doped layers was nitric acid (HN0 3 ) having a concentration of approximately 16.7 M, and the applied bias was approximately 3 volts.
  • FIG. 6 is an optical image of the electrochemically etched GaN structure obtained with a microscope. Extending radially and laterally around the striped vias 610 are regions having nanoporous GaN layers. The regions containing the nanoporous GaN layers appear lighter under the optical microscope due to an increased reflectivity. A uniform color shading in the microscope image indicates good spatial uniformity of the nanoporous GaN layers.
  • the microscopic morphology of the etched nanoporous GaN was examined by scanning electron microscopy (SEM), and an exemplary micrograph is shown in FIG. 7.
  • the micrograph shows an elevation view of the porous and non-porous GaN layers near a via 610.
  • the non-porous layer corresponds to the undoped GaN
  • the porous layers correspond to the heavily-doped GaN layers.
  • the micrograph also indicates high uniformity and high volumetric porosity (greater than about 80%) of the EC-etched layers. More than half of the pores have a maximum transverse width W t less than about 100 nm, with some smaller than about 30 nm.
  • Measurements indicate that more than 70% of the pores, and even more than 90% of its pores, have a maximum transverse width less than about 100 nm.
  • the maximum transverse width may be less than a length of the pores (e.g. , the pores may extend into the page along a lateral etching direction by a distance greater than their transverse width.
  • the transverse dimensions are very uniform, with over 70%, and even over 90%, having a maximum transverse dimension between 30 nm and 90 nm.
  • the reflectance of the nanoporous/non-porous GaN DBR was measured by a micro- reflectance setup. For these measurements, the optical spot size used to probe the DBR had a diameter of approximately 10 ⁇ , and was incident on an etched region adjacent to a via 610.
  • the absolute reflectance was calibrated with measurements made for a silver mirror and a sapphire substrate, both having well-established reflectance spectra. The estimated accuracy of the reflectance measurement is better than 0.5%. Measurements were made on samples etched under different EC etching conditions and having different doping densities.
  • FIG. 8 shows a reflectance spectrum 810 measured for one sample that included 10 layer pairs in which the
  • the reflectance spectrum 810 shows a peak reflectance that is well over 95%.
  • calibration spectra for silver (curve 820) and sapphire (curve 830) are also plotted.
  • the peak reflectance for the sample is shown in higher resolution in FIG. 9. With correct doping levels and under selected EC etching conditions, a peak reflectance of more than 99% can be reproducibly obtained for a gallium-nitride DBR structure.
  • the bandwidth over which the reflectance is greater than 98% is approximately 27 nm and is centered at approximately 480 nm. Accordingly, the DBR structure is very suitable for a cavity mirror of a VCSEL designed to emit blue light.
  • the technology described herein may be embodied as a method of fabrication, of which at least one example has been provided.
  • the acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than described, which may include performing some acts simultaneously, even though described as sequential acts in illustrative embodiments.
  • a method may include more acts than those described, in some embodiments, and fewer acts than those described in other embodiments.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Lasers (AREA)
  • Surface Treatment Of Optical Elements (AREA)
  • Weting (AREA)

Abstract

Structures and methods for forming highly uniform and high-porosity gallium-nitride layers with sub-100-nm pore sizes are described. Electrochemical etching of heavily-doped gallium nitride at low bias voltages in concentrated nitric acid is used to form the porous gallium nitride. The porous layers may be used in reflective structures for integrated optical devices such as VCSELs and LEDs.

Description

A METHOD FOR GaN VERTICAL MICROCAVITY SURFACE EMITTING LASER
(VCSEL)
RELATED APPLICATIONS This application claims the benefit of U.S. provisional application Ser. No. 62/057,543 titled "A Method for GaN Vertical Microcavity Surface Emitting Laser (VSCEL)," filed on September 30, 2014, which is incorporated herein by reference in its entirety.
BACKGROUND Technical Field
The technology relates to forming nanoporous gallium-nitride materials. The porous gallium nitride may be used in integrated optical devices such as vertical-cavity surface- emitting lasers and light-emitting diodes. Discussion of the Related Art
The etching of semiconductor materials is an important technique that is used in microfabrication processes. Various kinds of etching recipes have been developed for many materials used in semiconductor manufacturing. For example, Si and certain oxides may be etched using dry (e.g., reactive-ion etching) or wet chemical etching techniques that yield desired etch rates and etch morphologies. Ill-nitride materials, such as gallium nitride (GaN) and its alloys, have recently emerged as attractive materials for some semiconductor applications, because of the material' s physical and electronic properties.
Some desirable uses for Ill-nitride materials include micro-photonic devices, such as light-emitting diodes (LEDs) and semiconductor lasers for various lighting applications. Because of its wide band gap, GaN -based devices can produce light in the blue region of the visible spectrum and can therefore be used in the production of white light. One type of semiconductor light-emitting device that offers some advantages in terms of manufacturability and performance is the vertical cavity surface emitting laser (VCSEL).
A vertical cavity surface emitting laser is a class of semiconductor lasers that was conceptualized and developed during the 1980' s and 1990's. A general structure of a VCSEL is depicted in FIG. 1. VCSELs are unlike early semiconductor laser diodes, known as edge- emitting laser diodes, for which the direction of the laser cavity and the direction of the lasing beam are parallel to the planar surface of the semiconductor substrate. For edge-emitting lasers, the laser light travels transverse to the direction of the laser' s semiconductor junction, and emits from an edge of the chip. In contrast for a VCSEL 100, the laser cavity 170 and emitting laser beam 175 are oriented perpendicular to the planar surface of the substrate 105 on which the VCSEL is fabricated, and the laser beam travels in a direction of the p-n junction.
Compared with conventional edge-emitting laser diodes, a VCSEL 100 has several advantages that include (1) on- wafer testing of device performance, (2) better beam profile and far-field patterns, (3) better mode stability and wider free spectral range, (4) possibility of a very low threshold current, (5) a generally higher manufacturing yield, (6) a higher packing density and therefore lower cost, and (7) improved compatibility with planar microfabrication processes. VCSELs in the infrared and red spectral ranges are currently being used for telecommunication and industrial applications.
SUMMARY
The described technology relates to methods and structures associated with forming uniform, nanoporous layers in gallium-nitride semiconductor materials. According to some embodiments, the nanoporous layers may be used for forming integrated, optically-reflective structures such as distributed Bragg reflector (DBR) structures. The nanoporous layers may be formed using electrochemical (EC) etching techniques at room temperature. The EC etching does not require ultraviolet or optical illumination to etch the gallium-nitride material. The inventors have found that the pore morphology and uniformity of the etching process depends on several parameters {e.g., material doping, material composition, applied bias, etchant or electrolyte composition and concentration, and current spreading at the region to be etched). Highly reflective DBR structures, suitable for use in VCSELs, have been fabricated using the described technology.
According to some embodiments, a porous gallium-nitride layer, fabricated according to the present embodiments, may have a majority of its pores with a maximum transverse width less than approximately 100 nm and have a volumetric porosity greater than 30%. In some aspects, more than 90% of the pores of the porous gallium-nitride layer have a maximum transverse width less than approximately 100 nm. In some aspects, over half of the pores of the gallium-nitride layer may have a maximum transverse width between approximately 30 nm and approximately 90 nm. In some aspects, more than 70% of the pores of the gallium-nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm. According to some aspects, the pores have walls with a root-mean- square surface roughness less than approximately 10 nm.
According to some implementations, an w-type doping density of the porous gallium-
19 -3 20 -3
nitride layer is between approximately 5x10 cm" and approximately 2x10 cm" . In some aspects, a dopant in the porous gallium-nitride layer for the w-type doping is germanium. In some implementations, the volumetric porosity of the porous gallium-nitride layer is greater than 60%.
In some implementations, a porous gallium-nitride layer having any of the foregoing characteristics may be included in a distributed Bragg reflector. In some aspects, a porous gallium-nitride layer having any of the foregoing characteristics may be included in a vertical- cavity surface-emitting laser. In some aspects, a porous gallium-nitride layer having any of the foregoing characteristics may be included in a light-emitting diode. According to some implementations, a porous gallium-nitride layer having any of the foregoing characteristics may be included in an electrode.
In some embodiments, a semiconductor light emitting device may comprise at least one buried porous gallium- nitride layer wherein a majority of the pores of the at least one buried porous gallium- nitride layer have a maximum transverse width less than approximately 100 nm and the at least one buried porous gallium-nitride layer has a volumetric porosity greater than 30%. In some aspects, over 70% of the pores of the at least one buried porous gallium- nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm.
According to some implementations, the at least one buried porous gallium-nitride layer comprises a plurality of porous gallium-nitride layers separated by non-porous gallium- nitride layers arranged in a first distributed Bragg reflector (DBR). The plurality of porous gallium-nitride layers may include non-porous regions located centrally within the DBR that form a pillar of non-porous gallium nitride. In some implementations, the first DBR is arranged as an w-side reflector for a vertical-cavity surface-emitting laser (VCSEL). In some aspects, the first DBR has a reflectance greater than 99% for a lasing wavelength of the VCSEL. In some implementations, the first DBR has reflectance values greater than 98% over a bandwidth greater than approximately 20 nm. In some aspects, the pores of the at least one buried porous gallium-nitride layer have walls with a root-mean-square surface roughness less than approximately 10 nm. In some implementations, the at least one buried porous gallium- nitride layer has an w-type doping density between approximately 5x10 19 cm -"3 and
approximately 2x10 20 cm -"3. According to some aspects, a dopant for the w-type doping in the at least one buried porous gallium-nitride layer is germanium.
According to some implementations, a semiconductor light emitting device may further include a cavity region having a length L and a second DBR, wherein the cavity region is located between the first DBR and the second DBR. In some aspects, the cavity region includes multiple quantum wells or a superlattice. According to some implementations, the length L of the cavity region is between approximately one and five optical wavelengths of a lasing wavelength for the VCSEL. In some implementations, a semiconductor light emitting device may further comprise a current- spreading layer having a doping density greater than
1x10 18 cm -"3 located adjacent to the distributed Bragg reflector.
Also described are method embodiments that may be used to fabricate one or more of the foregoing structures or devices. According to some embodiments, a method for forming porous gallium nitride may comprise acts of exposing heavily-doped gallium nitride to an etchant, wherein the heavily-doped gallium nitride has an w-type doping density between approximately 5x10 19 cm -"3 and approximately 2x1020 cm -"3 , applying an electrical bias between the etchant and the heavily-doped gallium nitride, wherein the electrical bias has a value between approximately 1.3 volts and 3 volts, and electrochemically etching the heavily-doped gallium nitride to produce porous gallium nitride having a volumetric porosity greater than approximately 30% and a majority of pores with a maximum transverse width less than approximately 100 nm.
In some implementations, over 70% of the pores of the etched gallium nitride have a maximum transverse width between approximately 30 nm and approximately 90 nm. In some aspects, the electrochemical etching does not require illumination of the heavily-doped gallium nitride. According to some implementations, a dopant for the heavily-doped gallium nitride is germanium. In some implementations, the etchant comprises nitric acid having a concentration between 60% and approximately 80% by weight. In some aspects, the etchant comprises nitric acid having a concentration of approximately 70% by weight.
According to some implementations of a method for forming porous gallium nitride, the heavily-doped gallium nitride may be arranged in a plurality of layers that are separated by undoped gallium- nitride layers. A method may further comprise spreading etching current during the electrochemical etching with a current- spreading layer of doped gallium nitride located adjacent to the DBR. A method may further comprise etching vias into the plurality of layers and the undoped gallium-nitride layers to expose edges of the plurality of layers. In some aspects, the electrochemical etching comprises lateral etching of the plurality of layers.
According to some aspects, a method for forming porous gallium nitride may further include depositing the plurality of layers and the undoped or moderately-doped gallium-nitride layers to form a first distributed Bragg reflector (DBR) for a vertical-cavity surface-emitting laser (VCSEL). A method may further comprise stopping the electrochemical etching to leave a pillar of unetched gallium nitride centrally within the first DBR. In some aspects, a method may further comprise forming a cavity region having multiple quantum wells or a superlattice adjacent to the first DBR. In some implementations, a method for forming porous gallium nitride may further comprise forming a second DBR on an opposite side of the cavity region from the first DBR.
The foregoing and other aspects, embodiments, and features of the present teachings can be more fully understood from the following description in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
The skilled artisan will understand that the figures, described herein, are for illustration purposes only. It is to be understood that in some instances various aspects of the
embodiments may be shown exaggerated or enlarged to facilitate an understanding of the embodiments. In the drawings, like reference characters generally refer to like features, functionally similar and/or structurally similar elements throughout the various figures. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the teachings. Directional references ("above," "top," "on," "below," etc.) made in connection with the drawings are for illustration purposes only. Structures may be fabricated in orientations other than those depicted in the drawings. Where the drawings relate to microfabrication of integrated devices, only one device may be shown of a large plurality of devices that may be fabricated in parallel on a same substrate. The drawings are not intended to limit the scope of the present teachings in any way.
FIG. 1 is a simplified depiction of a vertical cavity surface-emitting laser (VCSEL), according to some embodiments;
FIG. 2 depicts a distributed Bragg reflector that includes porous layers, according to some embodiments;
FIG. 3 illustrates etching characteristics of GaN under various etching conditions;
FIG. 4A shows a first pore morphology obtained when etching germanium-doped GaN under first etching conditions;
FIG. 4B shows a second pore morphology obtained when etching germanium-doped GaN under second etching conditions;
FIG. 4C shows a third pore morphology obtained when etching germanium-doped GaN under third etching conditions;
FIG. 4D shows a fourth pore morphology obtained when etching germanium-doped GaN under fourth etching conditions;
FIG. 5A depicts a multilayer structure that may be used to form a high-reflective, n- side DBR, according to some embodiments;
FIGS. 5B-5E depict structures associated with a process for forming a high-reflective DBR, according to some embodiments;
FIG. 5F depicts a cavity region formed on a high-reflective DBR, according to some embodiments;
FIG. 5G depicts a second DBR formed on a cavity region for a VCSEL, for example;
FIG. 6 is an optical micrograph showing etched openings into a multilayer stack and DBR regions adjacent to the etched openings;
FIG. 7 is a scanning-electron micrograph (SEM) showing pore morphology of EC- etched gallium- nitride layers in a DBR structure, according to some embodiments;
FIG. 8 shows measured reflectance from a GaN DBR having nanoporous gallium- nitride layers; and
FIG. 9 shows measured reflectance greater than 99% from a GaN DBR having nanoporous gallium- nitride layers.
The features and advantages of the embodiments will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. DETAILED DESCRIPTION
Nanoporous semiconductor has several useful applications in the field of
semiconductor technology. These applications include, but are not limited to, stress-relief layers for heteroepitaxy, oxidation-conversion layers, electrodes with high surface areas, and multilayer reflective structures. With regard to this last application, the inventors have recognized and appreciated that nanoporous gallium nitride materials can be very useful for improving performance of light-emitting devices such as light-emitting diodes (LEDs) and vertical cavity surface emitting lasers (VCSELs). Efficient LEDs and VCSELs are useful for high-end lighting applications such as automobile headlights, micro-projectors, displays, and low-droop, high-power lamps.
As described further below, the inventors have conceived and developed techniques for forming highly uniform, nanoporous gallium-nitride layers for light-emitting devices using electrochemical (EC) etching at room temperature. The inventors have recognized and appreciated that high porosity, high uniformity, small pore size, and smooth wall surfaces can improve the optical performance of reflective structures that incorporate such porous layers. To obtain high uniformity, high porosity, small pore size, and smooth wall surfaces in GaN, the inventors investigated a wide range of etching conditions and material modifications. The inventors have discovered that a desirable pore morphology can be obtained with EC etching under limited etching conditions and material composition.
Referring again to FIG. 1 and in overview, a VCSEL may include an active region 130 located between a first semiconductor layer 140 of a first conductivity type (e.g., p-type) and a second semiconductor layer 120 of a second conductivity type (e.g. , w-type). The active region 130 may comprise multiple-quantum- well (MQW) layers or a superlattice (SL). The laser cavity 170 of the VCSEL may include the active region and adjacent layers, and may be located between a first bottom-side reflector 110 and a second top-side reflector 150. In some cases, the bottom side of the device may be the ^-conductivity side, and the top side of the device may be the ^-conductivity side. Electrical contact to the VCSEL 100 may be made through the substrate 105 on the bottom side and through a deposited conductive contact 160 on the top side of the device. The top-side contact may connect to an external current or voltage source through one or more wire bonds 165. When current is applied to the VCSEL 100, electrons and holes recombine in the active region 130 to produce photons. The photons travel back and forth between the reflectors 110, 150 and may be amplified by stimulated emission. A portion of the circulating photons are transmitted through the top-side reflector 150 to produce the laser beam 175.
To date, there have been a few demonstrations of Ill-nitride VCSELs, because of technical challenges in fabricating a working device. These challenges include (1) forming an efficient active region 130 for carrier-to-photon conversion, (2) fabricating high-quality planar reflectors 110, 150 for the laser cavity 170, and (3) controlling spatial current flow through the active region 130 such that photons produced by carrier recombination will overlap efficiently with optical laser-cavity modes. Although the technology relating to the active region 130 is reasonably mature, the mirror technology (item 2) continues to pose a challenge. Two teams (one at Tokyo University and a joint effort by Sandia Labs and Brown University) separately demonstrated the use of solid epitaxial AlGaN/GaN layer pairs in a distributed Bragg reflector (DBR) as the bottom-side reflector 110, and used a dielectric oxide stack as the top-side reflector 150 above the active region 130. This hybrid configuration of dielectric-epitaxial reflectors was further developed by NCTU in Taiwan, leading to the first demonstration of an electrically-injected Ill-nitride VCSEL in 2008.
Conventional preparation of a bottom- side DBR 110 by epitaxy, however, can be exceedingly difficult. A large number (40 to 60) of AlGaN/GaN layer pairs having stringent thickness tolerances are typically required to achieve a high reflectivity (R~99 ) due to the low contrast of index of refraction between AlGaN and GaN. Additionally, the large number of dissimilar layers can develop appreciable strain in the DBR, which can pose fabrication challenges and degrade device performance. Finally, the resulting AlGaN/GaN epitaxial mirror has a narrow bandwidth (Δλ~15ηιη). These aspects of an AlGaN/GaN DBR can make optical mode-matching with a laser cavity mode a significant challenge.
In an effort to avoid the complexity associated with DBR mirrors, Nichia Chemical used a laser lift-off (LLO) technique to separate an InGaN/GaN p-n epitaxial structure having a top-side dielectric reflector from a sapphire substrate, and to expose the bottom side (w-side) for the deposition of another dielectric mirror. In this case, the use of LLO adds processing complexity and essentially voids an advantage of on- wafer testing for VCSELs. Also, the LLO process typically needs a relatively thick active region, which increases the laser cavity length and reduces the optical mode spacing. Reduced mode spacing can make it more difficult to obtain single-mode operation or to match a wavelength of a laser cavity mode with the wavelength for which the laser's DBRs are designed. Although Nichia and NCTU used dielectric current blocking layers on the /?-side, these research groups did not demonstrate current blocking on the w-side where lateral current diffusion could seriously degrade the VCSEL's performance.
To overcome some of the difficulties associated with DBR fabrication, the inventors have proposed forming nanoporous/non-porous gallium-nitride layer pairs, as depicted in
FIG. 2. The structure may comprise nanoporous layers 220 interleaved with non-porous layers 210, where each layer corresponds to a quarter wavelength of the central lasing wavelength for the VCSEL, according to some embodiments. The nanoporous layers 220 can have a low refractive index n compared to the non-porous layers, giving a significantly higher refractive index contrast than is possible for solid InGaN/GaN layer pairs. The inventors have recognized and appreciated that a high reflectivity can be achieved with a reduced number of layer pairs (e.g. , 6 - 20) provided the volumetric porosity (ratio of air volume in a porous layer to total volume of the porous layer) is high. The inventors have also recognized that the optical quality of the reflector will be improved if the pore size is small (less than one-quarter the lasing wavelength), the porosity is uniform across the device, and the pores have smooth walls.
Because Ill-nitride materials can be chemically inert to wet etchants, microfabrication of integrated optical or integrated electronic devices based on these materials poses
manufacturing challenges. Although some etching techniques (e.g. , dry reactive-ion etching or photoelectrochemical (PEC) etching) have been developed to etch these materials, these processes can be costly and/or difficult to implement. In some cases, these processes may not be useable for DBR structures or structures where a buried porous layer is desired. For example, PEC etching may produce non-uniform etching due to spatial intensity variations, and may not be able to etch buried layers or shadowed regions of a substrate.
The inventors have conceived of electrochemical (EC) etching processes (illumination not required) that can be implemented at room temperature and provide uniform etching of highly porous (e.g. , greater than 60% volumetric porosity) buried layers with sub- 100-nm pore sizes and smooth wall surfaces. Buried layers may be laterally etched over distances greater than 50 microns. Several etching parameters and material properties are controlled to obtain a desired pore morphology. The EC etching processes may be used to selectively etch gallium- nitride materials that have been doped to tune, in part, the etching properties of the materials. According to some embodiments, a very high doping level and low etching bias is used to obtain a desired pore morphology for gallium-nitride materials. In some implementations, germanium is used as an w-type dopant for GaN to obtain the high level of doping and smooth etched surfaces. According to some implementations, the level of doping may be between 19 -3 20 -3
approximately 5x10 cm" and approximately 2x10 cm" .
The terms "approximately" and "about" may be used to mean within +20% of a target value (e.g. , an explicitly stated value) in some embodiments, within +10% of a target value in some embodiments, within +5% of a target value in some embodiments, and yet within +2% of a target value in some embodiments. The terms "approximately" and "about" also include the target value, so that a ranges expressed as "between approximately A and approximately B" may also be expressed as "between A and B" and a value stated as "approximately A" may also be expressed as "A".
Following extensive research, etching characteristics were mapped by the inventors and are illustrated in the graph of FIG. 3. Pore morphologies corresponding to some of the etched samples are depicted in the scanning-electron micrographs of FIGS. 4A-4D. The etching involved lateral etching of alternate layers in a stack of GaN layers. Improved results were found when highly concentrated nitric acid was used as the electrolyte or etchant. In some implementations, the concentration of nitric acid (HNO3) in water is between approximately 60% and approximately 80% by weight. According to some embodiments, the concentration of nitric acid in water is between approximately 65% and approximately 75% by weight. In some implementations, the concentration of nitric acid in water is approximately 70% by weight or approximately 16.7 molar (M). Using such highly concentrated nitric acid, material doping and applied bias were varied to etch the gallium-nitride layers. The doping and applied bias strongly influenced pore morphology.
With reference to FIG. 3, the etching behavior is roughly divided into three regions: no etching (labeled region I), complete etching or electro-polishing (labeled region III), and the formation of nanoporous GaN (labeled region II). Within the nanoporous GaN etching region, etching was characterized by mapping approximate iso-porosity contours from 10% to 90%.
19 -3 20 -3 At ultrahigh doping levels between approximately 5x10 cm" and approximately 2x10 cm" , a volumetric porosity greater than approximately 60% can be obtained at applied bias voltages between approximately 2.0 V and approximately 3 V. In some implementations, a volumetric porosity greater than approximately 30% can be obtained at applied bias voltages between approximately 1.3 V and approximately 3 V. Such low applied bias values are desirable, because a low bias can reduced any parasitic etching that might otherwise occur in other regions of a VCSEL or LED structure. Additionally at the low bias values, the transverse width of the pores is found to be small (e.g., less than approximately 120 nm) and highly uniform. Under some etching conditions, porosities greater than 80% and 90% are obtained. Such high porosity can appreciably lower the effective refractive index of a porous gallium- nitride layer.
Examples of pore morphologies are shown in FIGS. 4A-4D for the four etching conditions indicated by the data points A, B, C, and D in FIG. 3. In FIG. 4A, low volumetric porosity (less than 10%) is obtained in the heavily-doped layers of GaN at low bias values. For the conditions of FIG. 4B, high porosity (greater than 60 %) is achieved, and the pore morphology is fairly uniform. The average transverse pore width is less than approximately 100 nm. For the conditions of FIG. 4C and FIG. 4D, the porosity is less than about 30%, and the pore morphology is non-uniform. Some pores have large transverse dimensions (e.g., greater than 150 nm). Large pore sizes can act as scattering centers and degrade the quality of a coherent optical beam and lead to excessive loss in a semiconductor laser. Also, FIG. 4C and FIG. 4D indicate a susceptibility for delamination of the layers. Accordingly, a very high dopant density is preferred for purification of gallium nitride.
Based upon the observed etching characteristics, quality reflective structures may be formed in gallium-nitride materials. For example, one or more porous layers may be formed below an LED to improve light extraction from the LED. Also, a highly-reflective DBR structure may be formed on a substrate for a VCSEL using a plurality of nanoporous layers having high volumetric porosity. Example structures associated with a process for forming a DBR from layers of gallium-nitride materials are depicted in FIGS. 5A-5E.
According to some embodiments, a process for making a DBR may use a multilayer stack 500 formed on a substrate 505, as depicted in FIG. 5A. The substrate may comprise sapphire, gallium nitride, silicon carbide, or any other suitable material upon which gallium nitride may be epitaxially grown. The multilayer stack may include a buffer layer 510 formed on the substrate. The buffer layer may comprise gallium nitride or other Ill-nitride material and may have a thickness between approximately 500 nm and approximately 2 μιη. The buffer layer 510 may be formed using an epitaxial growth process on the substrate 505, and may be undoped in some cases. The buffer layer may be used as a transition layer between the substrate 505 of a first material type and quality gallium-nitride layers formed for the VCSEL (e.g., to relieve stress and reduce defects that arise from a lattice mismatch between the substrate 505 and epitaxially grown gallium-nitride layers of the VCSEL).
The multilayer stack 500 may also include a conductive layer 515 formed of silicon- doped gallium nitride. The conductive layer 515 may be used in some embodiments to carry current to the VCSEL, and may also be used spread current during EC etching while forming porous GaN layers. In some cases, the conductive layer may have a doping density between approximately lxlO18 cm 3 and approximately lxlO19 cm"3. A thickness of the conductive layer 515 may be between approximately 250 nm and approximately 750 nm.
In some embodiments, a DBR structure may further include a layer of undoped gallium nitride 520 that is formed on the conductive layer. The layer of undoped gallium nitride may have a thickness between 250 nm and approximately 750 nm. Above the layer of undoped gallium nitride 520, multiple layer pairs for a DBR may be formed. The layer pairs may be deposited by epitaxial growth, according to some embodiments, and may include undoped or moderately-doped gallium-nitride layers 530 and heavily-doped gallium- nitride layers of 535. A moderately-doped gallium-nitride layer may have a doping density between approximately lxlO17 cm 3 and approximately 2xl019 cm"3. According to some embodiments, there may be 6 to 20 layer pairs of undoped or moderately-doped and heavily-doped gallium-nitride layers in a DBR structure. The layers may be deposited using metal-organic chemical vapor deposition (MOCVD) and/or atomic layer deposition (ALD). The heavily-doped layers 535 may be n- type conductivity {e.g., n++ doping). According to some embodiments the doping density of the heavily-doped gallium-nitride layers may be between approximately 4xl019 cm3 and approximately 2x10 20 cm3. To achieve such high doping density, the heavily doped layers may be doped with germanium. Whereas silicon doping results in a rough etched surfaces, the inventors discovered that germanium doping allows high doping levels and also results in a smooth surface topology of the etched gallium nitride surfaces for doping levels on the order of
10 20 cm -"3. With germanium doping, the pore walls {e.g., at an interface with a non-porous layer) have a root-mean- square surface roughness less than approximately 10 nm.
In some implementations, the buffer layer 510, conductive layer 515, undoped layer 520, and/or layer pairs may comprise GaN. In some embodiments, the buffer layer 510, conductive layer 515, undoped layer 520, and/or layer pairs may comprise alloys of gallium nitride. For example, one or more of the layers may include aluminum and/or indium. The term "GaN" is used to refer to a semiconductor composition comprising substantially only Ga and N or doped GaN. The term gallium-nitride may be used to refer to GaN, doped GaN, and alloys or doped alloys of GaN, e.g., InGaN, AlGaN, InAlGaN. The layers may be deposited by one or a combination of deposition techniques, e.g., chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), metal organic CVD (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE) or atomic layer deposition (ALD), according to some embodiments. According to some embodiments, a deposited layer may be subsequently annealed to improve crystal quality. In some embodiments, additional layers may be deposited that may comprise materials other than gallium nitride or III- nitrides.
According to some embodiments the thicknesses of the undoped or moderately-doped gallium-nitride layers 530 for the DBR may correspond to approximately ¼ wavelength of the VCSEL' s designed operating wavelength. The thickness for each undoped or moderately- doped gallium-nitride layer may also correspond to an odd-number multiple of quarter wavelengths, e.g., 3/4, 5/4, 7/4, etc. For example, a thickness tj of an undoped or moderately- doped gallium-nitride layer in the DBR structure may be determined approximately from the following relation:
Μλ,
where λ1 is the free-space lasing wavelength for the VCSEL, n is the refractive index value for the undoped or moderately-doped gallium- nitride layers at the lasing wavelength, and M = 1, 3, 5, .... For a VCSEL that is designed to lase in the violet or blue blue region of the spectrum, the thickness of an undoped or moderately-doped gallium-nitride layer 530 may be between approximately 40 nm and approximately 60 nm or an odd number multiple thereof.
The thickness of a heavily-doped gallium-nitride layer 535 may be greater than the thickness of an undoped or moderately-doped gallium-nitride layer in each layer pair. This is because the heavily-doped gallium-nitride layers will be converted to porous gallium nitride, which has a lower refractive index than that for the solid undoped or moderately-doped gallium-nitride layers. The refractive index np for the porous gallium nitride may be determined from the following expression: np ~ 2.4— lAp where p is the volumetric porosity of the porous gallium nitride. The thicknesses ¾ of the heavily-doped gallium-nitride layers 535 may be selected such that after being etched to form porous layers, the resulting thickness of each layer corresponds to approximately ¼ wavelength (or an odd-number multiple thereof) of the VCSEL' s designed lasing wavelength. For example, the thickness ¾ may be determined approximately from the following relation: Μλι
4n v
Following deposition of the undoped or moderately-doped and heavily-doped layer pairs, a hard mask 540 may be deposited over the DBR structure, as illustrated in FIG. 5B. The hard mask may comprise an oxide (e.g. , silicon oxide) or any other suitable inorganic material that can be etched by reactive ion etching, for example. The hard mask may be resistant to etching by nitric acid, or the etchant used to porosify the heavily-doped gallium- nitride layers 535. The inventors found that a polymeric resist was undesirably etched by the concentrated nitric acid. In some embodiments, the hard mask 540 may be deposited by plasma-enhanced chemical vapor deposition (PECVD), though other deposition processes may be used. A thickness of the hard mask may be between approximately 50 nm and
approximately 400 nm. A layer of resist 542 (e.g. , photoresist) may be deposited over the hard mask 540 and patterned using any suitable lithographic process to open up vias 545 in the resist. The resulting structure may appear as illustrated in FIG. 5B.
The vias 545 in the photoresist may be used to etch vias through the hard mask 540, as indicated in FIG. 5C. The etching process to open vias in the hard mask may comprise a selective dry etch (e.g. , an anisotropic reactive ion etch that selectively removes the hard mask without removing the photoresist) or a selective wet etch. The selective etch may transfer the via pattern to the hard mask 540. After the vias 545 have been transferred to the hard mask 540, subsequent selective, anisotropic dry etching may be used to form vias 545 through the undoped and heavily-doped layer pairs of the DBR structure. According to some
embodiments, a chlorine-based etch recipe is used to etch vias 545 through the gallium-nitride layer pairs. The vias may extend down to, and possibly into, the undoped layer 520, according to some embodiments. The etch through the layer pairs may be a timed etch.
In some cases, the etched vias 545 may be larger than depicted in FIG. 5C, and may remove a large region of layer pairs around the DBR structure. For example, the removal of layer pairs may leave a mesa on the substrate 505 comprising the undoped or moderately- doped and heavily doped layer pairs at the location of each VCSEL. Regardless of their size, the vias may expose edges of undoped or moderately-doped and heavily-doped layer pairs in the DBR structure.
The DBR structure may then be subjected to an electrochemical etch using
concentrated nitric acid as described above in connection with FIG. 3. The etch may be performed at room temperature, and with an applied bias between the etchant bath and the substrate 505 or the conductive layer 515. In some implementations, the applied bias may be between approximately 1.3 V and approximately 3 V. In some cases, the EC etching may last between approximately 2 minutes and approximately 30 minutes. According to some embodiments, the etching may continue for a time period of up to 10 hours, depending upon the extent of lateral etching desired and bias voltage. In various embodiments, the EC etching converts the heavily doped gallium-nitride layers 535 to porous gallium-nitride layers 550, as depicted in FIG. 5D. The etch may proceed laterally from the vias 545 or exposed edges of the layer pairs toward the center of the DBR structure.
In some embodiments, the etch may proceed laterally across the entire DBR structure and convert each heavily-doped layer to porous gallium nitride. In other embodiments, the etch may be timed to stop before etching entirely through the layers, and a central region of the heavily doped layers may not be etched. The central region may form a pillar 555 of solid gallium-nitride layers. The remaining pillar 555 may provide added structural support to the DBR structure, and may provide a low-resistance current path centrally to an optical axis of the VCSEL, so that carriers injected from the ^-conductivity side of the VCSEL overlap efficiently with the laser's optical cavity mode. The surrounding porous regions in the DBR may have higher electrical resistivity and effectively function as current-blocking layers on the w-side of the device. According to some embodiments, a transverse dimension D of the pillar 555 may be less than one-half wavelength of the VCSEL' s emission wavelength modified by the refractive index of the pillar. In some cases, a transverse dimension D of the pillar 555 may be less than one-quarter wavelength of the VCSEL' s emission wavelength modified by the refractive index of the pillar.
After the heavily doped layers 535 have been converted to porous layers 550, the hard mask 540 may be removed from the substrate, as depicted in FIG. 5E. In some
implementations, a wet buffered oxide etch (BOE) may be used to remove the hard mask 540. The resulting substrate may then be cleaned and subjected to further processing to form a cavity region above the bottom- side DBR structure and a top- side DBR reflector.
According to some embodiments, fabrication of the cavity region may comprise depositing an w-type gallium-nitride layer 560, multiple quantum wells 565 or superlattice (SL) for the active region, and a /?-type gallium-nitride layer 570 to form a structure as depicted in FIG. 5F. The w-type gallium-nitride layer, multiple quantum wells, and a /?-type gallium- nitride layer may be formed by epitaxial growth, which may comprise metal-organic chemical vapor deposition and/or atomic layer deposition. In some embodiments, a planarization step and patterned hard mask may be used to prepare the substrate for subsequent epitaxial growth of the cavity region. In some implementations, a resist may be patterned over layers used to form the cavity region, and selective etching may be used to remove the layers in areas around the cavity region.
The cavity region may have a length L, which may be between approximately one wavelength and approximately five wavelengths of the VCSEL' s emission wavelength (as modified by the refractive index of the cavity region). The length L approximately determines a cavity length for the VCSEL. When the cavity length L is on the order of a few wavelengths, the VCSEL may comprise a microcavity that may support one or a few longitudinal optical modes. In some implementations, the cavity length L may be longer than five wavelengths.
After the cavity region has been formed, a top-side DBR 580 may be deposited to produce a VCSEL cavity as depicted in FIG. 5G. In some implementations, the top-side DBR may comprise a stack of dielectric layers. The dielectric layers may include layer pairs of an oxide (e.g., silicon oxide) having a first refractive index value and a second dielectric layer (e.g., silicon nitride) having a second refractive index value. The dielectric layers may be deposited by an MOCVD and/or ALD process. There may be between 10 and 20 dielectric layer pairs in a VCSEL, though some embodiments may include fewer layer pairs and other embodiments may include more layer pairs. The resulting GaN VCSEL may produce coherent radiation in the violet/blue spectral range (e.g., between approximately 400 nm and
approximately 490 nm).
Other applications of highly porous gallium-nitride with small pore sizes include, but are not limited to, high-surface area electrodes for water splitting or other electrochemical reactions and stress-relief layers for multilayer epitaxial structures.
EXAMPLES
Multilayer DBR structures were etched and characterized. In a first example, for which an etched sample is shown in FIG. 6, different striped vias 610 were etched through multiple GaN layer pairs formed on a substrate. The vias appear as dark stripes, and were etched by reactive ion etching in a chlorine-based plasma. The GaN layer pairs included undoped layers
19 -3 and heavily-doped GaN:Ge layers having a doping density of approximately 5x10 cm" . The EC etchant used to porosify the heavily-doped layers was nitric acid (HN03) having a concentration of approximately 16.7 M, and the applied bias was approximately 3 volts.
FIG. 6 is an optical image of the electrochemically etched GaN structure obtained with a microscope. Extending radially and laterally around the striped vias 610 are regions having nanoporous GaN layers. The regions containing the nanoporous GaN layers appear lighter under the optical microscope due to an increased reflectivity. A uniform color shading in the microscope image indicates good spatial uniformity of the nanoporous GaN layers.
The microscopic morphology of the etched nanoporous GaN was examined by scanning electron microscopy (SEM), and an exemplary micrograph is shown in FIG. 7. The micrograph shows an elevation view of the porous and non-porous GaN layers near a via 610. The non-porous layer corresponds to the undoped GaN, and the porous layers correspond to the heavily-doped GaN layers. The micrograph also indicates high uniformity and high volumetric porosity (greater than about 80%) of the EC-etched layers. More than half of the pores have a maximum transverse width Wt less than about 100 nm, with some smaller than about 30 nm. Measurements indicate that more than 70% of the pores, and even more than 90% of its pores, have a maximum transverse width less than about 100 nm. The maximum transverse width may be less than a length of the pores (e.g. , the pores may extend into the page along a lateral etching direction by a distance greater than their transverse width. The transverse dimensions are very uniform, with over 70%, and even over 90%, having a maximum transverse dimension between 30 nm and 90 nm.
The reflectance of the nanoporous/non-porous GaN DBR was measured by a micro- reflectance setup. For these measurements, the optical spot size used to probe the DBR had a diameter of approximately 10 μιη, and was incident on an etched region adjacent to a via 610. The absolute reflectance was calibrated with measurements made for a silver mirror and a sapphire substrate, both having well-established reflectance spectra. The estimated accuracy of the reflectance measurement is better than 0.5%. Measurements were made on samples etched under different EC etching conditions and having different doping densities. FIG. 8 shows a reflectance spectrum 810 measured for one sample that included 10 layer pairs in which the
19 -3
heavily-doped layers had a doping density of 5x10 cm" . The bias for the EC etching was approximately 3 V, and the resulting volumetric porosity of the anodized layers was over 60%. The reflectance spectrum 810 shows a peak reflectance that is well over 95%. For reference, calibration spectra for silver (curve 820) and sapphire (curve 830) are also plotted.
The peak reflectance for the sample is shown in higher resolution in FIG. 9. With correct doping levels and under selected EC etching conditions, a peak reflectance of more than 99% can be reproducibly obtained for a gallium-nitride DBR structure. The bandwidth over which the reflectance is greater than 98% is approximately 27 nm and is centered at approximately 480 nm. Accordingly, the DBR structure is very suitable for a cavity mirror of a VCSEL designed to emit blue light.
The technology described herein may be embodied as a method of fabrication, of which at least one example has been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than described, which may include performing some acts simultaneously, even though described as sequential acts in illustrative embodiments.
Additionally, a method may include more acts than those described, in some embodiments, and fewer acts than those described in other embodiments.
Having thus described at least one illustrative embodiment of the invention, various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the invention. Accordingly, the foregoing description is by way of example only and is not intended as limiting. The invention is limited only as defined in the following claims and the equivalents thereto.
What is claimed is:

Claims

1. A porous gallium-nitride layer having a majority of its pores with a maximum transverse width less than approximately 100 nm and having a volumetric porosity greater than 30%.
2. The porous gallium-nitride layer of claim 1, wherein more than 90% of the pores have a maximum transverse width less than approximately 100 nm.
3. The porous gallium-nitride layer of claim 1, wherein over half of the pores of the gallium-nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm.
4. The porous gallium-nitride layer of claim 1, wherein more than 70% of the pores of the gallium-nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm.
5. The porous gallium-nitride layer of claim 1, wherein the pores have walls with a root- mean-square surface roughness less than approximately 10 nm.
6. The porous gallium-nitride layer of claim 1, wherein an n-type doping density of the
19 -3 20 porous gallium-nitride layer is between approximately 5x10 cm" and approximately 2x10 cm"3.
7. The porous gallium-nitride layer of any one of claims 1-6, wherein a dopant in the porous gallium-nitride layer for the n-type doping is germanium.
8. The porous gallium-nitride layer of any one of claims 1-6, wherein the volumetric porosity is greater than 60%.
9. The porous gallium-nitride layer of claim 7 included in a distributed Bragg reflector.
10. The porous gallium-nitride layer of claim 9 included in a vertical-cavity surface-emitting laser.
11. The porous gallium-nitride layer of any one of claims 1-8 included in a light-emitting diode.
12. The porous gallium-nitride layer of any one of claims 1-8 included in an electrode.
13. A semiconductor light emitting device comprising:
at least one buried porous gallium-nitride layer wherein a majority of the pores of the at least one buried porous gallium-nitride layer have a maximum transverse width less than approximately 100 nm and the at least one buried porous gallium-nitride layer has a volumetric porosity greater than 30%.
14. The semiconductor light emitting device of claim 13, wherein over 70% of the pores of the at least one buried porous gallium-nitride layer have a maximum transverse width between approximately 30 nm and approximately 90 nm.
15. The semiconductor light emitting device of claim 13 or 14, wherein the at least one buried porous gallium-nitride layer comprises a plurality of porous gallium-nitride layers separated by non-porous gallium-nitride layers arranged in a first distributed Bragg reflector (DBR).
16. The semiconductor light emitting device of claim 15, wherein the plurality of porous gallium-nitride layers include non-porous regions located centrally within the DBR that form a pillar of non-porous gallium nitride.
17. The semiconductor light emitting device of claim 15 or claim 16, wherein the first DBR is arranged as an w-side reflector for a vertical-cavity surface-emitting laser (VCSEL).
18. The semiconductor light emitting device of claim 17, wherein the first DBR has a reflectance greater than 99% for a lasing wavelength of the VCSEL.
19. The semiconductor light emitting device of claim 18, wherein the first DBR has reflectance values greater than 98% over a bandwidth greater than approximately 20 nm.
20. The semiconductor light emitting device of claim 17, further including a cavity region having a length L and a second DBR, wherein the cavity region is located between the first DBR and the second DBR.
21. The semiconductor light emitting device of claim 20, wherein the cavity region includes multiple quantum wells or a superlattice.
22. The semiconductor light emitting device of claim 20 or claim 21, wherein the length L of the cavity region is between approximately one and five optical wavelengths of an lasing wavelength for the VCSEL.
23. The semiconductor light emitting device of claim 15, further comprising a current-
18 -3
spreading layer having a doping density greater than 1x10 cm" located adjacent to the distributed Bragg reflector.
24. The semiconductor light emitting device of claim 13 or claim 15, wherein the pores of the at least one buried porous gallium-nitride layer have walls with a root-mean-square surface roughness less than approximately 10 nm.
25. The semiconductor light emitting device of claim 13 or claim 15, wherein the at least one buried porous gallium-nitride layer has an w-type doping density between approximately 5x1019 cm"3 and approximately 2xl020 cm"3.
26. The semiconductor light emitting device of claim 25, wherein a dopant for the w-type doping in the at least one buried porous gallium-nitride layer is germanium.
27. A method for forming porous gallium nitride, the method comprising:
exposing heavily-doped gallium nitride to an etchant, wherein the heavily-doped gallium nitride has an w-type doping density between approximately 5x10 19 cm -"3 and
20 -3
approximately 2x10 cm" ;
applying an electrical bias between the etchant and the heavily-doped gallium nitride, wherein the electrical bias has a value between approximately 1.3 volts and 3 volts; and
electrochemically etching the heavily-doped gallium nitride to produce porous gallium nitride having a volumetric porosity greater than approximately 30% and a majority of pores with a maximum transverse width less than approximately 100 nm.
28. The method of claim 27, wherein over 70% of the pores of the etched gallium nitride have a maximum transverse width between approximately 30 nm and approximately 90 nm.
29. The method of claim 27, wherein the electrochemical etching does not require illumination of the heavily-doped gallium nitride.
30. The method of claim 27, wherein a dopant for the heavily-doped gallium nitride is germanium.
31. The method of any one of claims 27-30, wherein the etchant is nitric acid having a concentration between 60% and approximately 80% by weight.
32. The method of any one of claims 27-30, wherein the etchant is nitric acid having a concentration of approximately 70% by weight.
33. The method of claim 32, wherein the heavily-doped gallium nitride is arranged in a plurality of layers that are separated by undoped or moderately-doped gallium-nitride layers.
34. The method of claim 33, further comprising spreading etching current during the electrochemical etching with a current-spreading layer of doped gallium nitride located adjacent to the DBR.
35. The method of claim 33, further comprising etching vias into the plurality of layers and the undoped or moderately-doped gallium-nitride layers to expose edges of the plurality of layers.
36. The method of claim 35, wherein the electrochemical etching comprises lateral etching of the plurality of layers.
37. The method of claim 33, further comprising depositing the plurality of layers and the undoped or moderately-doped gallium-nitride layers to form a first distributed Bragg reflector (DBR) for a vertical-cavity surface-emitting laser (VCSEL).
38. The method of claim 37, further comprising stopping the electrochemical etching to leave a pillar of unetched gallium nitride centrally within the first DBR.
39. The method of claim 37, further comprising forming a cavity region having multiple quantum wells or a superlattice adjacent to the first DBR.
40. The method of claim 39, further comprising forming a second DBR on an opposite side of the cavity region from the first DBR.
PCT/US2015/053254 2014-09-30 2015-09-30 A METHOD FOR GaN VERTICAL MICROCAVITY SURFACE EMITTING LASER (VCSEL) WO2016054232A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN201580060899.9A CN107078190B (en) 2014-09-30 2015-09-30 Method for GaN vertical microcavity surface emitting laser (VCSEL)
KR1020177011945A KR102425935B1 (en) 2014-09-30 2015-09-30 A METHOD FOR GaN VERTICAL MICROCAVITY SURFACE EMITTING LASER (VCSEL)
EP15846362.0A EP3201952B1 (en) 2014-09-30 2015-09-30 A method for gan vertical microcavity surface emitting laser
JP2017517111A JP7016259B6 (en) 2014-09-30 2015-09-30 Porous gallium nitride layer and semiconductor light emitting device containing the same
US15/515,302 US11043792B2 (en) 2014-09-30 2015-09-30 Method for GaN vertical microcavity surface emitting laser (VCSEL)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201462057543P 2014-09-30 2014-09-30
US62/057,543 2014-09-30

Publications (1)

Publication Number Publication Date
WO2016054232A1 true WO2016054232A1 (en) 2016-04-07

Family

ID=55631442

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2015/053254 WO2016054232A1 (en) 2014-09-30 2015-09-30 A METHOD FOR GaN VERTICAL MICROCAVITY SURFACE EMITTING LASER (VCSEL)

Country Status (6)

Country Link
US (1) US11043792B2 (en)
EP (1) EP3201952B1 (en)
JP (1) JP7016259B6 (en)
KR (1) KR102425935B1 (en)
CN (1) CN107078190B (en)
WO (1) WO2016054232A1 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106848838A (en) * 2017-04-06 2017-06-13 中国科学院半导体研究所 GaN base VCSEL chips and preparation method based on porous DBR
CN106848016A (en) * 2017-04-06 2017-06-13 中国科学院半导体研究所 The preparation method of the porous DBR of GaN base
CN107046071A (en) * 2017-04-06 2017-08-15 中国科学院半导体研究所 InGaN based resonant cavity enhanced detector chips based on porous DBR
WO2018064177A1 (en) * 2016-09-27 2018-04-05 Lumileds Llc Reflective structure for light emitting devices
WO2019063957A1 (en) * 2017-09-27 2019-04-04 Cambridge Enterprise Ltd Method for porosifying a material and semiconductor structure
US20190221993A1 (en) * 2018-01-18 2019-07-18 Iqe Plc Porous distributed bragg reflectors for laser applications
WO2021013642A1 (en) * 2019-07-19 2021-01-28 The University Of Sheffield Led arrays
US11631782B2 (en) 2018-01-26 2023-04-18 Cambridge Enterprise Limited Method for electrochemically etching a semiconductor structure
GB2612040A (en) * 2021-10-19 2023-04-26 Iqe Plc Porous distributed Bragg reflector apparatuses, systems, and methods
WO2024155528A1 (en) * 2023-01-17 2024-07-25 Snap Inc. Resonant cavity micro-led fabrication

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130007557A (en) 2010-01-27 2013-01-18 예일 유니버시티 Conductivity based selective etch for gan devices and applications thereof
US11095096B2 (en) 2014-04-16 2021-08-17 Yale University Method for a GaN vertical microcavity surface emitting laser (VCSEL)
US11018231B2 (en) 2014-12-01 2021-05-25 Yale University Method to make buried, highly conductive p-type III-nitride layers
JP6961225B2 (en) 2015-05-19 2021-11-05 イェール ユニバーシティーYale University Methods and Devices for High Confinement Coefficient III Nitride End Face Emitting Laser Diodes with Lattice Matched Clad Layers
DE102015108876B3 (en) * 2015-06-04 2016-03-03 Otto-Von-Guericke-Universität Magdeburg, Ttz Patentwesen Group III nitride light-emitting device
CN109072451B (en) 2016-03-18 2021-08-03 麻省理工学院 Nanoporous semiconductor materials and their manufacture
US10732036B2 (en) * 2016-06-07 2020-08-04 The Texas A&M University System Apparatus for detecting a substance and method of operating the same
CN108091744B (en) * 2018-01-19 2024-01-09 福建工程学院 Ge light-emitting device with transverse p-n-n microcavity structure and preparation method thereof
CN108376730A (en) * 2018-02-07 2018-08-07 赛富乐斯股份有限公司 Light-emitting device and its manufacturing method
CN108376731A (en) * 2018-02-07 2018-08-07 赛富乐斯股份有限公司 Light-emitting device and its manufacturing method
CN108389942A (en) * 2018-02-07 2018-08-10 赛富乐斯股份有限公司 Light-emitting device and its manufacturing method
US11004943B2 (en) 2018-04-05 2021-05-11 Massachusetts Institute Of Technology Porous and nanoporous semiconductor materials and manufacture thereof
CN108520911A (en) * 2018-04-11 2018-09-11 山东大学 A kind of preparation method of the InGaN base blue LEDs with nanoporous GaN distribution Bragg reflectors
CN109440180B (en) * 2018-10-10 2021-01-05 中国科学院半导体研究所 Porous group III nitride and method for producing same
CN109830583B (en) * 2019-01-31 2020-10-27 西安工程大学 Preparation method of blue light emitting diode with GaN/nanometer cavity
CN109873297B (en) * 2019-04-26 2020-06-30 山东大学 GaN-based vertical cavity surface emitting laser and preparation method thereof
US11652188B2 (en) * 2019-10-28 2023-05-16 Unm Rainforest Innovations Method of fabricating broad-band lattice-matched omnidirectional distributed Bragg reflectors using random nanoporous structures
FR3105568B1 (en) * 2019-12-19 2021-12-17 Commissariat Energie Atomique PROCESS FOR MANUFACTURING A SUBSTRATE INCLUDING A RELAXED INGAN LAYER
FR3105567B1 (en) * 2019-12-19 2021-12-17 Commissariat Energie Atomique PROCESS FOR MANUFACTURING A RELAXED GAN / INGAN STRUCTURE
WO2021144665A1 (en) 2020-01-13 2021-07-22 King Abdullah University Of Science And Technology Wavelength-division multiplexing visible-light communication and lighting device and method
GB202000951D0 (en) * 2020-01-22 2020-03-04 Poro Tech Ltd Semiconductor device and method of manufacture
US20210273412A1 (en) * 2020-02-25 2021-09-02 Unm Rainforest Innovations Non-c-plane group iii-nitride-based vcsels with nanoporous distributed bragg reflector mirrors
GB2593693B (en) 2020-03-30 2022-08-03 Plessey Semiconductors Ltd LED precursor
GB2599065B (en) 2020-05-22 2023-05-10 Plessey Semiconductors Ltd Light emitting device array
CN112133643B (en) * 2020-08-18 2021-09-07 华芯半导体研究院(北京)有限公司 Novel Vcsel epitaxial structure and method for testing corresponding oxidation aperture thereof
KR20220032917A (en) * 2020-09-08 2022-03-15 삼성전자주식회사 Micro light emitting device and display apparatus having the same
DE102020128678A1 (en) * 2020-10-30 2022-05-05 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung METHOD OF MAKING A SEMICONDUCTOR BODY AND SEMI-CONDUCTOR ARRANGEMENT
DE102020128680A1 (en) * 2020-10-30 2022-05-05 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung METHOD OF MAKING A SEMICONDUCTOR BODY AND SEMICONDUCTOR ARRANGEMENT
KR20220060049A (en) 2020-11-02 2022-05-11 삼성디스플레이 주식회사 Light emitting element, manufacturing method for light emitting element, and display device including the same
CN116472653A (en) * 2020-11-23 2023-07-21 苏州晶湛半导体有限公司 Preparation method of resonant cavity light-emitting diode
US11688829B2 (en) 2020-12-30 2023-06-27 Meta Platforms Technologies, Llc Engineered substrate architecture for InGaN red micro-LEDs
CN113206173A (en) * 2021-04-20 2021-08-03 三明学院 GaN-based DBR and preparation method thereof
KR20220149880A (en) * 2021-04-30 2022-11-09 삼성디스플레이 주식회사 Display device and method of manufacturing the display device
WO2024006967A2 (en) * 2022-07-01 2024-01-04 Yale University Structures for in-situ reflectance measurement during homo-epitaxy
FR3144413A1 (en) * 2022-12-21 2024-06-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives MESA POROSIFICATION PROCESS FACILITATING CONTACT RESETTING
WO2024155494A1 (en) * 2023-01-17 2024-07-25 Snap Inc. Micro-led dbr fabrication by electrochemical etching
WO2024185050A1 (en) * 2023-03-07 2024-09-12 Sanoh Industrial Co.,Ltd. Surface emitting laser
WO2024185049A1 (en) * 2023-03-07 2024-09-12 Sanoh Industrial Co.,Ltd. Surface emitting laser, method for fabricating surface emitting laser

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818861A (en) * 1996-07-19 1998-10-06 Hewlett-Packard Company Vertical cavity surface emitting laser with low band gap highly doped contact layer
US20050224816A1 (en) * 2004-03-30 2005-10-13 Kim Sun W Nitride based semiconductor having improved external quantum efficiency and fabrication method thereof
US7989323B2 (en) * 2009-06-19 2011-08-02 Rohm And Haas Electronic Materials Llc Doping method
US20130011656A1 (en) * 2010-01-27 2013-01-10 Yale University Conductivity Based on Selective Etch for GaN Devices and Applications Thereof
US20130210180A1 (en) * 2010-07-26 2013-08-15 Seren Photonics Limited Light emitting diodes
US20140003458A1 (en) 2012-06-28 2014-01-02 Yale University Lateral electrochemical etching of iii-nitride materials for microfabrication

Family Cites Families (111)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4202454C1 (en) 1992-01-29 1993-07-29 Siemens Ag, 8000 Muenchen, De
US5307361A (en) 1992-11-05 1994-04-26 Eastman Kodak Company Ridge waveguide laser diode with a depressed-index cladding layer
JP3080831B2 (en) 1994-02-03 2000-08-28 日本電気株式会社 Multiple quantum well semiconductor laser
JPH08148280A (en) 1994-04-14 1996-06-07 Toshiba Corp Semiconductor device and manufacture therefor
US5502787A (en) 1995-05-22 1996-03-26 At&T Corp. Article comprising a semiconductor waveguide structure
US6324192B1 (en) 1995-09-29 2001-11-27 Coretek, Inc. Electrically tunable fabry-perot structure utilizing a deformable multi-layer mirror and method of making the same
JPH10135500A (en) 1996-03-18 1998-05-22 Sony Corp Manufacture of thin film semiconductor, solar cell and light emission element
US5919430A (en) 1996-06-19 1999-07-06 Degussa Aktiengesellschaft Preparation of crystalline microporous and mesoporous metal silicates, products produced thereby and use thereof
US20030189963A1 (en) 1996-11-12 2003-10-09 Deppe Dennis G. Low threshold microcavity light emitter
KR100413792B1 (en) 1997-07-24 2004-02-14 삼성전자주식회사 Short wavelength surface emitting laser device including dbr having stacked structure of gan layer and air layer and fabricating method thereof
JP4075021B2 (en) 1997-12-26 2008-04-16 ソニー株式会社 Semiconductor substrate manufacturing method and thin film semiconductor member manufacturing method
US6233267B1 (en) 1998-01-21 2001-05-15 Brown University Research Foundation Blue/ultraviolet/green vertical cavity surface emitting laser employing lateral edge overgrowth (LEO) technique
JP2000124552A (en) 1998-10-16 2000-04-28 Agilent Technol Inc Nitride semiconductor laser element
KR100480764B1 (en) 1998-12-10 2005-06-16 삼성전자주식회사 A method for manufacturing a optical device having DBR based on GaN system material
US6320206B1 (en) 1999-02-05 2001-11-20 Lumileds Lighting, U.S., Llc Light emitting devices having wafer bonded aluminum gallium indium nitride structures and mirror stacks
JP3453544B2 (en) 1999-03-26 2003-10-06 キヤノン株式会社 Manufacturing method of semiconductor member
JP2000349393A (en) 1999-03-26 2000-12-15 Fuji Xerox Co Ltd Semiconductor device, surface emitting semiconductor laser, and edge emitting semiconductor laser
JP2001188264A (en) 2000-01-05 2001-07-10 Toshiba Corp Electrochromic display device
JP2001223165A (en) 2000-02-10 2001-08-17 Hitachi Cable Ltd Nitride semiconductor and method of manufacturing the same
JP2002176226A (en) 2000-09-22 2002-06-21 Toshiba Corp Optical element and its manufacturing method
US20020070125A1 (en) 2000-12-13 2002-06-13 Nova Crystals, Inc. Method for lift-off of epitaxially grown semiconductors by electrochemical anodic etching
US6434180B1 (en) 2000-12-19 2002-08-13 Lucent Technologies Inc. Vertical cavity surface emitting laser (VCSEL)
FR2823596B1 (en) 2001-04-13 2004-08-20 Commissariat Energie Atomique SUBSTRATE OR DISMOUNTABLE STRUCTURE AND METHOD OF MAKING SAME
US20020158265A1 (en) 2001-04-26 2002-10-31 Motorola, Inc. Structure and method for fabricating high contrast reflective mirrors
US6537838B2 (en) 2001-06-11 2003-03-25 Limileds Lighting, U.S., Llc Forming semiconductor structures including activated acceptors in buried p-type III-V layers
AU2002359779A1 (en) 2001-12-21 2003-07-30 Regents Of The University Of California, The Office Of Technology Transfer Implantation for current confinement in nitride-based vertical optoelectronics
US7919791B2 (en) 2002-03-25 2011-04-05 Cree, Inc. Doped group III-V nitride materials, and microelectronic devices and device precursor structures comprising same
EP1508922B1 (en) 2002-05-15 2009-03-11 Panasonic Corporation Semiconductor light emitting element and production method therefor
US7535100B2 (en) 2002-07-12 2009-05-19 The United States Of America As Represented By The Secretary Of The Navy Wafer bonding of thinned electronic materials and circuits to high performance substrates
JP2004055611A (en) 2002-07-16 2004-02-19 Fuji Photo Film Co Ltd Semiconductor light-emitting device
TW200409378A (en) 2002-11-25 2004-06-01 Super Nova Optoelectronics Corp GaN-based light-emitting diode and the manufacturing method thereof
AU2003295880A1 (en) 2002-11-27 2004-06-23 University Of Toledo, The Integrated photoelectrochemical cell and system having a liquid electrolyte
US6990132B2 (en) 2003-03-20 2006-01-24 Xerox Corporation Laser diode with metal-oxide upper cladding layer
US6972438B2 (en) 2003-09-30 2005-12-06 Cree, Inc. Light emitting diode with porous SiC substrate and method for fabricating
US7271896B2 (en) 2003-12-29 2007-09-18 Intel Corporation Detection of biomolecules using porous biosensors and raman spectroscopy
US7553371B2 (en) 2004-02-02 2009-06-30 Nanosys, Inc. Porous substrates, articles, systems and compositions comprising nanofibers and methods of their use and production
JP2005244089A (en) 2004-02-27 2005-09-08 Canon Inc Anode forming device, treatment method, and manufacturing method of semiconductor substrate
JP5336075B2 (en) 2004-04-28 2013-11-06 バーティクル,インク Vertical semiconductor device
US7768023B2 (en) 2005-10-14 2010-08-03 The Regents Of The University Of California Photonic structures for efficient light extraction and conversion in multi-color light emitting devices
EP1780849B1 (en) 2004-06-11 2013-01-30 Ricoh Company, Ltd. Surface emitting laser diode and its manufacturing method
US8119537B2 (en) 2004-09-02 2012-02-21 Micron Technology, Inc. Selective etching of oxides to metal nitrides and metal oxides
TWI249966B (en) * 2004-10-20 2006-02-21 Genesis Photonics Inc Light-emitting device having porous light-emitting layer
US7550395B2 (en) 2004-11-02 2009-06-23 The Regents Of The University Of California Control of photoelectrochemical (PEC) etching by modification of the local electrochemical potential of the semiconductor structure relative to the electrolyte
GB0424957D0 (en) 2004-11-11 2004-12-15 Btg Int Ltd Methods for fabricating semiconductor devices and devices fabricated thereby
US7751455B2 (en) 2004-12-14 2010-07-06 Palo Alto Research Center Incorporated Blue and green laser diodes with gallium nitride or indium gallium nitride cladding laser structure
WO2006113808A2 (en) 2005-04-20 2006-10-26 University Of Rochester Methods of making and modifying porous devices for biomedical applications
JP4027392B2 (en) 2005-04-28 2007-12-26 キヤノン株式会社 Vertical cavity surface emitting laser device
US7483466B2 (en) 2005-04-28 2009-01-27 Canon Kabushiki Kaisha Vertical cavity surface emitting laser device
US8254423B2 (en) 2008-05-30 2012-08-28 The Regents Of The University Of California (Al,Ga,In)N diode laser fabricated at reduced temperature
JP4933193B2 (en) 2005-08-11 2012-05-16 キヤノン株式会社 Surface emitting laser and method for producing two-dimensional photonic crystal in the surface emitting laser
KR100706796B1 (en) * 2005-08-19 2007-04-12 삼성전자주식회사 Nitride-based top emitting light emitting device and Method of fabricating the same
TWI426620B (en) 2005-09-29 2014-02-11 Sumitomo Chemical Co Method for making a iii-v family nitride semiconductor and a method for making a luminescent element
TWI451597B (en) 2010-10-29 2014-09-01 Epistar Corp Optoelectronic device and method for manufacturing the same
US7655489B2 (en) 2005-10-19 2010-02-02 The University Of Notre Dame Du Lac Monolithically-pumped erbium-doped waveguide amplifiers and lasers
US7501299B2 (en) 2005-11-14 2009-03-10 Palo Alto Research Center Incorporated Method for controlling the structure and surface qualities of a thin film and product produced thereby
US7737451B2 (en) 2006-02-23 2010-06-15 Cree, Inc. High efficiency LED with tunnel junction layer
CN101443887B (en) 2006-03-10 2011-04-20 Stc.Unm公司 Pulsed growth of GAN nanowires and applications in group III nitride semiconductor substrate materials and devices
US7974327B2 (en) 2006-03-14 2011-07-05 Furukawa Electric Co., Ltd. Surface emitting laser element array
JP4967463B2 (en) 2006-06-06 2012-07-04 富士ゼロックス株式会社 Surface emitting semiconductor laser device
US8174025B2 (en) 2006-06-09 2012-05-08 Philips Lumileds Lighting Company, Llc Semiconductor light emitting device including porous layer
US7915624B2 (en) 2006-08-06 2011-03-29 Lightwave Photonics, Inc. III-nitride light-emitting devices with one or more resonance reflectors and reflective engineered growth templates for such devices, and methods
WO2008075692A1 (en) 2006-12-20 2008-06-26 International Business Machines Corporation Surface-emitting laser and method for manufacturing the same
JP2008211164A (en) 2007-01-29 2008-09-11 Matsushita Electric Ind Co Ltd Nitride semiconductor light-emitting device and method for fabricating the same
JP2008226974A (en) 2007-03-09 2008-09-25 Canon Inc Multifilm structure, surface-emitting laser composed of multifilm structure, and manufacturing method therefor
US8920625B2 (en) 2007-04-27 2014-12-30 Board Of Regents Of The University Of Texas System Electrochemical method of making porous particles using a constant current density
WO2008153829A1 (en) 2007-05-29 2008-12-18 Transphorm, Inc. Electrolysis transistor
US20090001416A1 (en) 2007-06-28 2009-01-01 National University Of Singapore Growth of indium gallium nitride (InGaN) on porous gallium nitride (GaN) template by metal-organic chemical vapor deposition (MOCVD)
JP5056299B2 (en) 2007-09-18 2012-10-24 日立電線株式会社 Nitride semiconductor base substrate, nitride semiconductor multilayer substrate, and method of manufacturing nitride semiconductor base substrate
JP2009094360A (en) 2007-10-10 2009-04-30 Rohm Co Ltd Semiconductor laser diode
WO2009048265A1 (en) 2007-10-12 2009-04-16 Industry Foundation Of Chonnam National University Method of selectively etching semiconductor region, separation method of semiconductor layer and separation method of semiconductor device from substrate
US7928448B2 (en) * 2007-12-04 2011-04-19 Philips Lumileds Lighting Company, Llc III-nitride light emitting device including porous semiconductor layer
US20090173373A1 (en) 2008-01-07 2009-07-09 Wladyslaw Walukiewicz Group III-Nitride Solar Cell with Graded Compositions
JP4404162B2 (en) 2008-02-27 2010-01-27 住友電気工業株式会社 Nitride semiconductor wafer
JP4395812B2 (en) 2008-02-27 2010-01-13 住友電気工業株式会社 Nitride semiconductor wafer-processing method
US8569794B2 (en) 2008-03-13 2013-10-29 Toyoda Gosei Co., Ltd. Group III nitride semiconductor device and method for manufacturing the same, group III nitride semiconductor light-emitting device and method for manufacturing the same, and lamp
JP5205098B2 (en) 2008-03-27 2013-06-05 Dowaエレクトロニクス株式会社 Semiconductor light emitting device and manufacturing method thereof
US9070827B2 (en) 2010-10-29 2015-06-30 Epistar Corporation Optoelectronic device and method for manufacturing the same
US8946736B2 (en) 2010-10-29 2015-02-03 Epistar Corporation Optoelectronic device and method for manufacturing the same
JP4968232B2 (en) 2008-10-17 2012-07-04 日立電線株式会社 Manufacturing method of nitride semiconductor
US8062916B2 (en) 2008-11-06 2011-11-22 Koninklijke Philips Electronics N.V. Series connected flip chip LEDs with growth substrate removed
JP5191934B2 (en) 2009-03-19 2013-05-08 アズビル株式会社 Status monitoring system and status monitoring method
JP4902682B2 (en) 2009-03-27 2012-03-21 キヤノン株式会社 Nitride semiconductor laser
JP2012522388A (en) 2009-03-31 2012-09-20 西安▲電▼子科技大学 Ultraviolet light emitting diode device and manufacturing method thereof
WO2010132552A1 (en) 2009-05-12 2010-11-18 The Board Of Trustees Of The University Of Illinois Printed assemblies of ultrathin, microscale inorganic light emitting diodes for deformable and semitransparent displays
CN102474077B (en) 2009-07-31 2014-08-06 日亚化学工业株式会社 Nitride semiconductor laser diode
US8409998B2 (en) 2009-09-30 2013-04-02 Furukawa Electric Co., Ltd Method of manufacturing vertical-cavity surface emitting laser
KR101082788B1 (en) 2009-10-16 2011-11-14 한국산업기술대학교산학협력단 High Quality Non-polar/Semi-polar Semiconductor Device on Porous Nitride Semiconductor and Manufacturing Method thereof
US20110188528A1 (en) 2010-02-04 2011-08-04 Ostendo Technologies, Inc. High Injection Efficiency Polar and Non-Polar III-Nitrides Light Emitters
JP2012049292A (en) * 2010-08-26 2012-03-08 Panasonic Corp Surface-emitting semiconductor laser element and method of manufacturing the same
TWI501421B (en) 2010-09-21 2015-09-21 Epistar Corp Optoelectronic device and method for manufacturing the same
US20130207237A1 (en) 2010-10-15 2013-08-15 The Regents Of The University Of California Method for producing gallium nitride substrates for electronic and optoelectronic devices
US8519430B2 (en) 2010-10-29 2013-08-27 Epistar Corporation Optoelectronic device and method for manufacturing the same
TWI419367B (en) 2010-12-02 2013-12-11 Epistar Corp Optoelectronic device and method for manufacturing the same
KR101550117B1 (en) 2011-02-18 2015-09-03 에피스타 코포레이션 Photoelectric element and manufaturing method thereof
US8343788B2 (en) 2011-04-19 2013-01-01 Epistar Corporation Light emitting device and manufacturing method thereof
US20130140517A1 (en) 2011-06-29 2013-06-06 Purdue Research Foundation Thin and Flexible Gallium Nitride and Method of Making the Same
JP2013038394A (en) 2011-07-14 2013-02-21 Rohm Co Ltd Semiconductor laser element
US9335262B2 (en) 2011-08-25 2016-05-10 Palo Alto Research Center Incorporated Gap distributed Bragg reflectors
FR2980784B1 (en) 2011-10-04 2013-10-25 Swisstex France DEVICE FOR LOWERING THE VOLTAGE OF A WIRE BETWEEN A SYSTEM FOR TRANSFORMING SAID THREAD AND A WINDING SYSTEM OF SAID THREAD
JP5956604B2 (en) * 2011-12-14 2016-07-27 ソウル バイオシス カンパニー リミテッドSeoul Viosys Co.,Ltd. Light emitting diode
KR101278063B1 (en) 2012-02-06 2013-06-24 전남대학교산학협력단 Separation method of semiconductor device using nanoporous gan
JP6574130B2 (en) 2012-03-19 2019-09-11 ルミレッズ ホールディング ベーフェー Light-emitting devices grown on silicon substrates
KR101351484B1 (en) 2012-03-22 2014-01-15 삼성전자주식회사 Light emitting device having nitride-based semiconductor omnidirectional reflector
US8497171B1 (en) 2012-07-05 2013-07-30 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET method and structure with embedded underlying anti-punch through layer
JP6195205B2 (en) 2012-10-19 2017-09-13 パナソニックIpマネジメント株式会社 Semiconductor laser
JP6170300B2 (en) 2013-01-08 2017-07-26 住友化学株式会社 Nitride semiconductor devices
KR102015907B1 (en) * 2013-01-24 2019-08-29 삼성전자주식회사 Semiconductor light emitting device
US9048387B2 (en) * 2013-08-09 2015-06-02 Qingdao Jason Electric Co., Ltd. Light-emitting device with improved light extraction efficiency
US11095096B2 (en) 2014-04-16 2021-08-17 Yale University Method for a GaN vertical microcavity surface emitting laser (VCSEL)
US11018231B2 (en) 2014-12-01 2021-05-25 Yale University Method to make buried, highly conductive p-type III-nitride layers
JP6961225B2 (en) 2015-05-19 2021-11-05 イェール ユニバーシティーYale University Methods and Devices for High Confinement Coefficient III Nitride End Face Emitting Laser Diodes with Lattice Matched Clad Layers

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818861A (en) * 1996-07-19 1998-10-06 Hewlett-Packard Company Vertical cavity surface emitting laser with low band gap highly doped contact layer
US20050224816A1 (en) * 2004-03-30 2005-10-13 Kim Sun W Nitride based semiconductor having improved external quantum efficiency and fabrication method thereof
US7989323B2 (en) * 2009-06-19 2011-08-02 Rohm And Haas Electronic Materials Llc Doping method
US20130011656A1 (en) * 2010-01-27 2013-01-10 Yale University Conductivity Based on Selective Etch for GaN Devices and Applications Thereof
US20130210180A1 (en) * 2010-07-26 2013-08-15 Seren Photonics Limited Light emitting diodes
US20140003458A1 (en) 2012-06-28 2014-01-02 Yale University Lateral electrochemical etching of iii-nitride materials for microfabrication

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
AGAM P. VAJPEYI ET AL.: "High Optical Quality Nanoporous GaN Prepared by Photoelectrochemical Etching", ELECTROCHEMICAL AND SOLID-STATE LETTERS, vol. 8, no. 4, January 2005 (2005-01-01), XP055412200, DOI: 10.1149/1.1861037
GAEL GAUTIER ET AL.: "Observations of Macroporous Gallium Nitride Electrochemically Etched from High Doped Single Crystal Wafers in HF Based Electrolytes", ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, vol. 2, no. 4, January 2013 (2013-01-01), pages 146,148, XP002780039
See also references of EP3201952A4

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018064177A1 (en) * 2016-09-27 2018-04-05 Lumileds Llc Reflective structure for light emitting devices
US10665759B2 (en) 2016-09-27 2020-05-26 Lumileds Llc Reflective structure for light emitting devices
US10964829B2 (en) 2017-04-06 2021-03-30 Institute Of Semiconductors, Chinese Academy Of Sciences InGaN-based resonant cavity enhanced detector chip based on porous DBR
CN106848016A (en) * 2017-04-06 2017-06-13 中国科学院半导体研究所 The preparation method of the porous DBR of GaN base
CN107046071A (en) * 2017-04-06 2017-08-15 中国科学院半导体研究所 InGaN based resonant cavity enhanced detector chips based on porous DBR
WO2018184288A1 (en) * 2017-04-06 2018-10-11 中国科学院半导体研究所 Porous dbr- and gan-based vcsel chip, and manufacturing method
CN106848838A (en) * 2017-04-06 2017-06-13 中国科学院半导体研究所 GaN base VCSEL chips and preparation method based on porous DBR
US11258231B2 (en) 2017-04-06 2022-02-22 Institute Of Semiconductors, Chinese Academy Of Sciences GaN-based VCSEL chip based on porous DBR and manufacturing method of the same
CN106848838B (en) * 2017-04-06 2019-11-29 中国科学院半导体研究所 GaN base VCSEL chip and preparation method based on porous DBR
CN106848016B (en) * 2017-04-06 2019-12-03 中国科学院半导体研究所 The preparation method of the porous DBR of GaN base
JP2022058745A (en) * 2017-09-27 2022-04-12 ケンブリッジ エンタープライズ リミテッド Porousing method of material and semiconductor structure
WO2019063957A1 (en) * 2017-09-27 2019-04-04 Cambridge Enterprise Ltd Method for porosifying a material and semiconductor structure
US11651954B2 (en) 2017-09-27 2023-05-16 Cambridge Enterprise Ltd Method for porosifying a material and semiconductor structure
JP2021511662A (en) * 2018-01-18 2021-05-06 アイキューイー ピーエルシーIQE plc Porous dispersion Bragg reflector for laser applications
US11201451B2 (en) * 2018-01-18 2021-12-14 Iqe Plc Porous distributed Bragg reflectors for laser applications
US20190221993A1 (en) * 2018-01-18 2019-07-18 Iqe Plc Porous distributed bragg reflectors for laser applications
US11631782B2 (en) 2018-01-26 2023-04-18 Cambridge Enterprise Limited Method for electrochemically etching a semiconductor structure
WO2021013642A1 (en) * 2019-07-19 2021-01-28 The University Of Sheffield Led arrays
GB2612040A (en) * 2021-10-19 2023-04-26 Iqe Plc Porous distributed Bragg reflector apparatuses, systems, and methods
WO2024155528A1 (en) * 2023-01-17 2024-07-25 Snap Inc. Resonant cavity micro-led fabrication

Also Published As

Publication number Publication date
JP7016259B6 (en) 2023-12-15
EP3201952A1 (en) 2017-08-09
KR102425935B1 (en) 2022-07-27
JP7016259B2 (en) 2022-02-04
KR20170063919A (en) 2017-06-08
JP2018502436A (en) 2018-01-25
US20170237234A1 (en) 2017-08-17
EP3201952B1 (en) 2023-03-29
US11043792B2 (en) 2021-06-22
CN107078190A (en) 2017-08-18
EP3201952A4 (en) 2018-05-23
CN107078190B (en) 2020-09-08

Similar Documents

Publication Publication Date Title
US11043792B2 (en) Method for GaN vertical microcavity surface emitting laser (VCSEL)
US11095096B2 (en) Method for a GaN vertical microcavity surface emitting laser (VCSEL)
US11133652B2 (en) Optical devices and methods of manufacture and operation
KR101944893B1 (en) Heterostructure including anodic aluminum oxide layer
US9583353B2 (en) Lateral electrochemical etching of III-nitride materials for microfabrication
US11348908B2 (en) Contact architectures for tunnel junction devices
WO2018184288A1 (en) Porous dbr- and gan-based vcsel chip, and manufacturing method
US10554017B2 (en) Method and device concerning III-nitride edge emitting laser diode of high confinement factor with lattice matched cladding layer
JP4928866B2 (en) Nitride semiconductor vertical cavity surface emitting laser
JP7438323B2 (en) LED array
TWI714146B (en) Led utilizing internal color conversion with light extraction enhancements
US20230011230A1 (en) Devices comprising distributed bragg reflectors and methods of making the devices
KR101550200B1 (en) light-emitting diode including DBR layer pattern and manufacturing method thereof
Holder et al. Demonstration of nonpolar GaN-based vertical-cavity surface-emitting lasers
KR20150089548A (en) Vertical light emitting diode including porous GaN layer and method for thereof
WO2023233541A1 (en) Surface emitting laser, method for fabricating surface emitting laser
Zhang Nanoporous GaN and Its Application in Vertical-Cavity Surface-Emitting Lasers
WO2024044567A2 (en) Iii-nitride-based vertical cavity surface emitting laser (vcsel) with a dielectric p-side lens and an activated tunnel junction

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15846362

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2017517111

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

REEP Request for entry into the european phase

Ref document number: 2015846362

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2015846362

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 20177011945

Country of ref document: KR

Kind code of ref document: A