WO2016017884A1

WO2016017884A1 - Light-emitting device and lighting system

Info

Publication number: WO2016017884A1
Application number: PCT/KR2015/001518
Authority: WO
Inventors: 백광선; 백지현; 황정현; 한대섭
Original assignee: 엘지이노텍 주식회사
Priority date: 2014-07-31
Filing date: 2015-02-16
Publication date: 2016-02-04
Also published as: KR20160015761A; KR102315594B1

Abstract

Examples relate to a light-emitting device, a method for manufacturing a light-emitting device, a light-emitting device package, and a lighting system. The light-emitting device according to the examples may comprise: a first semiconductor layer of a first conductivity type of a first concentration; a second semiconductor layer of a first conductivity type of a second concentration on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer, the third semiconductor layer comprising pits; an active layer on the third semiconductor layer; and a semiconductor layer of a second conductivity type on the active layer.

Description

Light emitting device and lighting system

Embodiments relate to a light emitting device, a method of manufacturing the light emitting device, a light emitting device package and an illumination system.

A light emitting device is a p-n junction diode in which electrical energy is converted into light energy, and may be formed by combining elements of group III and group V on the periodic table. LED can realize various colors by adjusting the composition ratio of compound semiconductors.

When the forward voltage is applied, the n-layer electrons and the p-layer holes combine to emit energy corresponding to the energy gap of the conduction band and the valence band. It is mainly emitted in the form of heat or light, and when it is emitted in the form of light, it becomes a light emitting device.

For example, nitride semiconductors are receiving great attention in the field of optical devices and high power electronic devices due to their high thermal stability and wide bandgap energy. In particular, blue light emitting devices, green light emitting devices, and ultraviolet light emitting devices using nitride semiconductors are commercially used and widely used.

On the other hand, the light emitting device according to the related art has a lattice constant difference between a growth substrate, for example, a sapphire substrate and a GaN layer, which is a nitride semiconductor, and has a large potential in the crystal due to a difference in thermal expansion coefficient. There are defects such as dislocations, and many of these potentials create leakage currents that deteriorate the ESD (Electrical Static Discharge) immunity.

On the other hand, in the prior art, a pit structure is introduced to improve ESD resistance. However, since the crystal quality of the active layer formed in the pit region is generally lowered, the luminous intensity of the light emitting region which substantially contributes to light emission is reduced. there is a problem.

The embodiment provides a light emitting device, a manufacturing method of a light emitting device, a light emitting device package, and an illumination system that can improve or prevent ESD and improve brightness.

The light emitting device according to the embodiment may include a first conductivity type first semiconductor layer 112 having a first concentration; A first conductivity type second semiconductor layer 122 having a second concentration on the first semiconductor layer 112; A third semiconductor layer 123 including a pit P2 on the second semiconductor layer 122; An active layer 114 on the third semiconductor layer 123; And a second conductivity type semiconductor layer 116 on the active layer 114.

Alternatively, the light emitting device according to the embodiment may include a first conductivity type first semiconductor layer 112 having a first concentration; A third semiconductor layer 123 including a pit P3 on the first semiconductor layer 112; A first conductivity type second semiconductor layer 122 having a second concentration on the third semiconductor layer 123; An active layer 114 on the second semiconductor layer 122; And a second conductivity type semiconductor layer 116 on the active layer 114.

Alternatively, the lighting system according to the embodiment may include a light emitting unit having the light emitting device.

According to the light emitting device, the manufacturing method of the light emitting device, the light emitting device package and the lighting system according to the embodiment, it is possible to improve the ESD resistance and to reduce or improve the brightness.

1 is a cross-sectional view of a light emitting device according to the first embodiment.

2 is a partially enlarged view of a light emitting device according to the prior art.

3 is an enlarged first view of a light emitting device according to the first embodiment;

Figure 4 is a ESD yield improvement comparison table of the light emitting device according to the embodiment.

5 is an enlarged view of a second part of the light emitting device according to the first embodiment;

6 is a sectional view of a light emitting device according to a second embodiment;

7 is an enlarged third view of a light emitting device according to the second embodiment;

8 is an enlarged view of a fourth portion of the light emitting device according to the second embodiment;

9 to 13 is a manufacturing process of the light emitting device according to the embodiment.

In the description of an embodiment, each layer, region, pattern, or structure is “on / over” or “under” the substrate, each layer, layer, pad, or pattern. In the case where it is described as being formed at, "on / over" and "under" include both "directly" or "indirectly" formed. do. In addition, the criteria for the above / above or below of each layer will be described based on the drawings.

(Example)

1 is a cross-sectional view of a light emitting device 100 according to the first embodiment.

The light emitting device 100 according to the embodiment includes a first conductivity type first semiconductor layer 112 having a first concentration, and a second conductivity type second semiconductor layer having a second concentration on the first semiconductor layer 112 ( 122, a third semiconductor layer 123 including a pit P2 on the second semiconductor layer 122, and an active layer 114 and the active layer 114 on the third semiconductor layer 123. The second conductive semiconductor layer 116 may be included thereon. The third semiconductor layer 123 may be a first conductivity type semiconductor layer. The first concentration or the second concentration refers to the concentration of the first conductivity type element doped in the first semiconductor layer 112 or the second semiconductor layer 122. The active layer 114 may include a plurality of active layers each having a quantum well and a quantum wall. For example, as shown in FIG. 3, the active layer 114 may include a first active layer 114a, a second active layer 114b, and a third active layer 114c, but is not limited thereto.

The light emitting device according to the embodiment may be applied to a horizontal light emitting device. For example, as shown in FIG. 1, an embodiment provides a light emitting structure 110 including a first conductivity type first semiconductor layer 112, an active layer 114, and a second conductivity type semiconductor layer 116 on a substrate 105. It may include. An aluminum gallium-based nitride semiconductor layer 140 may be disposed between the active layer 114 and the second conductive semiconductor layer 116.

An embodiment may include a buffer layer 106 between the substrate 105 and the light emitting structure 110, and on the ohmic layer 142, ohmic layer 142 on the second conductive semiconductor layer 116. The first electrode 151 may be included on the second electrode 152 and the exposed first semiconductor layer 112.

On the other hand, the embodiment is not only applicable to the horizontal light emitting device, but also to the vertical light emitting device.

2 is a partially enlarged view of a light emitting device R according to the prior art.

According to the related art, the pit P1 is introduced on the first conductive semiconductor layer 12 to improve the ESD resistance, and the active layer 14 is formed on the first conductive semiconductor layer 12. The structure of the 2nd conductivity type semiconductor layer 18 which fills (P1) is included.

In the prior art, in order to improve ESD resistance, the density of the pit P1 must be secured, and the size S1 of the pit P1 must be 120 nm or more to secure the density of the pit P1. The size S1 of the pit P1 may mean the maximum horizontal width of the pit P1.

On the other hand, since crystal growth in the pit P1 region decreases, the first thickness t1 of the active layer 14 formed in the pit P1 is lower than that of the active layer 14 formed in the region other than the pit P1. It is formed smaller than the second thickness t2.

As a result, the crystal quality of the active layer 14 formed in the pit P1 is lowered, so that the actual light emitting region becomes the active layer region A1 formed in the region other than the pit P1, thereby reducing the actual light emitting region and lowering the brightness. there is a problem.

According to the prior art, the pit P1 size S1 should exceed about 120 nm in order to improve ESD resistance, and this pit P1 size limitation is a technical contradiction which causes a substantial reduction of the emission area A1. There is this.

Accordingly, the embodiment is to provide a light emitting device that can improve the ESD resistance and at the same time does not reduce or improve the brightness.

To this end, as shown in FIG. 3, the light emitting device according to the embodiment includes a first conductivity type second semiconductor layer 122 having a second concentration and a first conductivity type first semiconductor layer 112 having a first concentration. An organic coupling relationship between the third semiconductor layer 123 including the pit P2 on the second semiconductor layer 122 and the active layer 114 may be included on the third semiconductor layer 123.

The active layer 114 may include a plurality of active layers, for example, a first active layer 114a, a second active layer 114b, and a third active layer 114c. Each of the first active layer 114a, the second active layer 114b, and the third active layer 114c may include a quantum well (not shown) and a quantum wall (not shown), respectively.

In an embodiment, the third semiconductor layer 123 may include a pit P2 recessed from an upper surface thereof. Accordingly, the pits P2 may be formed in the first active layer 114a, the second active layer 114b, and the third active layer 114c formed on the third semiconductor layer 123.

Side cross-sections of the pits P2 may be formed in a V shape, and a planar shape may be formed in a hexagonal shape. In addition, the pit P may be formed in a hexagonal horn pillar shape, but is not limited thereto. One or a plurality of potentials (not shown) to be propagated may be connected to each pit P2.

When the third semiconductor layer 123 is grown in the range of about 500 ° C. to 1000 ° C., pits P2 may be formed. Alternatively, the pits P2 may be formed when the third semiconductor layer 123 is formed to a predetermined thickness and then grown using a mask pattern. The third semiconductor layer 123 may have a thickness greater than the depth of the pit P2.

According to the embodiment, the pit P2 which reduces the light emitting area is minimized to maintain the brightness and at the same time to enhance the ESD resistance, the second under the third semiconductor layer 123 including the pit P2. By disposing the first conductivity type second semiconductor layer 122, the ESD resistance may be improved by increasing the pit density and the internal capacitance of the pit P2.

Specifically, the first conductivity type second semiconductor layer 122 having the third concentration or the second concentration having the higher doping concentration is disposed below the third semiconductor layer 123 having the third concentration, and the first conductivity type second is formed. Since the first conductivity-type second concentration of the semiconductor layer 122 is higher than the third concentration of the third semiconductor layer 123, the pit P2 of the third semiconductor layer 123 may be formed due to the implantation of impurities at a high concentration. The density increases, and the increase in the density of the pits P2 leads to an increase in internal capacitance, and as the internal capacitance increases, the ESD resistance may improve.

For example, in an embodiment, the size S2 of the pit P2 formed in the third semiconductor layer 123 may be about 100 nm or less, for example, about 50 nm to about 100 nm. According to the exemplary embodiment, as the size S2 of the pit P2 formed in the third semiconductor layer 123 is formed in a range of about 50 nm to 100 nm, the size S2 of the pit P2 is minimized and optimized to substantially emit light. The high quality active layer region A2 that contributes to can be significantly increased.

That is, any one of the active layers 114 formed in the pit P2, for example, the third thickness t3 of the third active layer 114c may be formed in the region other than the pit P2. It is formed smaller than the fourth thickness t4, and the high quality active layer region A2 having the fourth thickness t4 can be significantly increased compared to the prior art.

In an embodiment, the first conductivity type second semiconductor layer 122 of the second concentration is doped at a higher concentration than the first conductivity type first semiconductor layer 112 of the first concentration, so that the density of the pit P2 is increased to prevent ESD. As the resistance is improved and the first conductive element is doped to a high concentration, the electron injection efficiency can be increased to increase the internal light emitting efficiency.

For example, the second concentration of the first conductivity type element of the second semiconductor layer 122 may range from about 7 × 10 ⁻¹⁸ to 9 × 10 ⁻¹⁸ (atoms / cm ³ ). When the second concentration of the second semiconductor layer 122 is less than 7 × 10 ^−18, the amount of the dopant may be small, which may result in insufficient contribution to the improvement of the ESD resistance, and the second concentration of the second semiconductor layer 122 may be 9 ×. If it exceeds 10 ^-18 , it may cause the overflow of electrons and lower the overall brightness.

In an embodiment, the second semiconductor layer 122 may include an n-type GaN semiconductor layer having a second concentration, and the third semiconductor layer 123 may include an n-type GaN semiconductor layer having a third concentration. . The third concentration of the third semiconductor layer 123 may be lower than the second concentration of the second semiconductor layer 122.

In the prior art, a pit is formed in an InGaN / GaN structure, and a large crystal structure of In is introduced into the GaN semiconductor layer, thereby causing lattice bonding. In an embodiment, lattice defects are caused by forming a pit in the GaN semiconductor layer. By minimizing and forming a high quality thin film can contribute to the luminous efficiency.

4 is an ESD yield improvement comparison table of the light emitting device according to the embodiment. According to an experimental example according to the embodiment, a third semiconductor layer 123 including a pit P2 on the first conductivity-type second semiconductor layer 122 having a second concentration, and an upper portion of the third semiconductor layer 123. Including the organic bonding of the active layer 114 in the ESD yield was significantly increased to 80.3% compared to 52.7% of the comparative example. In addition, the light emitting device of the embodiment has the advantage that the ESD yield is improved and the high quality active layer region is increased, so that the low current characteristic (Vf) is excellent.

FIG. 5 is an enlarged view of a second portion E2 of the light emitting device of the modified embodiment of the first embodiment.

Referring to FIG. 5, in the embodiment, the second semiconductor layer 122a having the second concentration is formed in a region overlapping the pit P2, thereby minimizing and optimizing the size S2 of the pit P2, thereby providing an ESD yield. This improvement and luminous efficiency can be increased.

In example embodiments, the second semiconductor layer 122a having the second concentration may be formed to have a size greater than or equal to the size S2 of the pit P2. That is, the width of the second semiconductor layer 122a may be equal to or greater than the width of the pit P2.

According to the embodiment, by disposing the second semiconductor layer 122a having the second concentration in the region overlapping the pit P2, the ESD resistance can be improved by increasing the pit P2 density.

Next, FIG. 6 is a cross-sectional view of the light emitting device 102 according to the second embodiment, and FIG. 7 is an enlarged view of a third portion E3 of the light emitting device according to the second embodiment.

The light emitting device 102 according to the second exemplary embodiment includes a first conductive type first semiconductor layer 112 having a first concentration and a third semiconductor layer including pits P3 on the first semiconductor layer 112. 123, a first conductivity type second semiconductor layer 122 having a second concentration on the third semiconductor layer 123, and an active layer 114 and the active layer (on the second semiconductor layer 122). The second conductive semiconductor layer 116 may be included on the 114.

The second embodiment can employ the technical features of the first embodiment.

As illustrated in FIG. 7, the light emitting device 102 according to the second embodiment includes a third semiconductor layer 123 including a pit P3 and a first conductivity having a second concentration on the third semiconductor layer 123. An organic coupling relationship between the type second semiconductor layer 122 and the active layer 114 may be formed on the second semiconductor layer 122.

In an embodiment, the third semiconductor layer 123 may include a plurality of pits P3 recessed from an upper surface thereof. For example, a first pit forming layer 123a and a second pit forming layer 123b may be included on the third semiconductor layer 123, and the first pit forming layer 123a and the second pit forming layer 123b may be included. A plurality of pits P3 may be formed in the.

The first pit forming layer 123a and the second pit forming layer 123b may be formed of the same material as that of the third semiconductor layer 123, and may be formed by growing at a temperature lower than that of the third semiconductor layer 123. (P3) can be formed.

According to the second embodiment, the upper portion of the third semiconductor layer 123 including the pit P3 to maintain the brightness while minimizing the pit P3 size S2 that reduces the light emitting area and at the same time enhances the ESD resistance. By disposing the first conductivity type second semiconductor layer 122 at the second concentration, the ESD resistance may be improved by increasing the density and the internal capacitance of the pit P3.

According to the second embodiment, the pit P3 is formed on the active layer 114 by arranging the first conductivity type second semiconductor layer 122 having the second concentration on the third semiconductor layer 123 including the pit P3. By not expanding, the area of the high quality active layer 114 contributing to light emission can be maximized.

In FIG. 9, the active layer 114 is illustrated as if there is no pit P3, but a pit smaller than the pit P3 formed in the third semiconductor layer may be provided.

In the second embodiment, the first conductivity type second semiconductor layer 122 of the second concentration is doped at a higher concentration than the first conductivity type first semiconductor layer 112 of the first concentration, thereby improving ESD resistance and injecting electrons. The internal luminous efficiency can be increased by increasing the efficiency.

In an embodiment, the second semiconductor layer 122 may include an n-type GaN semiconductor layer having a second concentration, and the third semiconductor layer 123 having the pits P3 may be an n-type GaN semiconductor layer having a third concentration. It may include. The third concentration of the third semiconductor layer 123 may be lower than the second concentration of the second semiconductor layer 122.

8 is an enlarged view of a fourth portion E4 of the light emitting device 102 according to the second embodiment.

As shown in FIG. 8, the second semiconductor layer 122 in the second embodiment may include a n-GaN 122a / u-GaN1 122b superlattice structure having a second concentration. For example, the second semiconductor layer 122 may include a superlattice structure of an n-type GaN semiconductor layer (n-GaN) 122a and an undoped GaN semiconductor layer (u-GaN1 122b) having a second concentration. Can be.

In the prior art, by forming a pit in the InGaN / GaN structure, In has a problem that lattice bonding is caused by introducing In into a GaN semiconductor layer with a large crystal structure. In the second embodiment, n-GaN 122a / u-GaN1 122b is used. By forming the pit (P4) in the superlattice structure, the occurrence of lattice defects can be minimized to form a high quality thin film, thereby improving the ESD resistance and significantly increasing the luminous efficiency.

Hereinafter, the technical features of the embodiment will be described in detail with reference to FIGS. 9 to 13. 9 to 13 are described based on the first embodiment, but the manufacturing method is not limited thereto.

First, the substrate 105 is prepared as shown in FIG. 9. The substrate 105 may be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate.

For example, the substrate 105 may use at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ 0 ₃ . An uneven structure may be formed on the substrate 105, but is not limited thereto.

Thereafter, a buffer layer 106 may be formed on the substrate 105. The buffer layer 106 may mitigate lattice mismatch between the material of the light emitting structure 110 and the substrate 105 to be formed later, and the material of the buffer layer may be a Group III-V compound semiconductor such as GaN, InN, AlN, It may be formed of at least one of InGaN, AlGaN, InAlGaN, AlInN.

Next, a first conductivity type first semiconductor layer 112 having a first concentration may be formed on the substrate 105 or the buffer layer 106.

The first conductivity type first semiconductor layer 112 may be formed of a semiconductor compound. It may be implemented as a compound semiconductor, such as Group 3-5, Group 2-6, and the first conductivity type dopant may be doped. When the first conductivity type first semiconductor layer 112 is an n-type semiconductor layer, the first conductive dopant is an n-type dopant and may include Si, Ge, Sn, Se, Te, but is not limited thereto. .

The first conductivity type first semiconductor layer 112 may include a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). It may include.

The first conductivity type first semiconductor layer 112 may be formed of any one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, InP. have.

Next, as shown in FIGS. 10 and 3, the first conductive second semiconductor layer 122 having the second concentration and the second semiconductor layer 122 having the second concentration are formed on the first conductive first semiconductor layer 112 having the first concentration. The third semiconductor layer 123 including the pits P2 and the active layer 114 may be formed on the third semiconductor layer 123.

The active layer 114 may be formed of at least one of a single quantum well structure, a multi quantum well structure (MQW), a quantum-wire structure, or a quantum dot structure. For example, the active layer 114 may be formed by injecting trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) to form a multi-quantum well structure. It is not limited to this.

The quantum wells / barrier barriers of the active layer 114 are at least one pair of InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InGaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs, GaP (InGaP) / AlGaP. It may be formed as a structure, but is not limited thereto.

In an embodiment, the active layer 114 may include a plurality of active layers, for example, a first active layer 114a, a second active layer 114b, and a third active layer 114c. Each of the first active layer 114a, the second active layer 114b, and the third active layer 114c may include a quantum well (not shown) and a quantum wall (not shown), respectively.

Side cross-sections of the pits P2 may be formed in a V shape, and a planar shape may be formed in a hexagonal shape. In addition, the pit P may be formed in a hexagonal horn pillar shape, but is not limited thereto.

One or a plurality of potentials (not shown) to be propagated may be connected to each pit P2.

When the third semiconductor layer 123 is grown in the range of about 500 ° C. to 1000 ° C., the pits P2 having a V shape may be formed. As another example, when the third semiconductor layer 123 is formed to a predetermined thickness and then grown using a mask pattern, V-shaped pits P2 may be formed. The third semiconductor layer 123 may have a thickness greater than the depth of the pit P2.

In example embodiments, the second semiconductor layer 122 may be formed of an n-type GaN semiconductor layer having a second concentration ranging from about 7 × 10 ⁻¹⁸ to 9 × 10 ⁻¹⁸ (atoms / cm ³ ). When the second concentration of the second semiconductor layer 122 is less than 7 × 10 ^−18, the amount of the dopant may be small, which may result in insufficient contribution to the improvement of the ESD resistance, and the second concentration of the second semiconductor layer 122 may be 9 ×. If it exceeds 10 ^-18 , it may cause the overflow of electrons and lower the overall brightness.

In the embodiment, the first conductivity type second semiconductor layer 122 of the second concentration is doped at a higher concentration than the first conductivity type first semiconductor layer 112 of the first concentration, thereby increasing the density of the pit P2. In addition to improving the ESD resistance, the electron injection efficiency can be increased to increase the internal light emitting efficiency.

In addition, in an embodiment, the size S2 of the pit P2 formed in the third semiconductor layer 123 may be about 100 nm or less, for example, about 50 nm to about 100 nm. According to the exemplary embodiment, as the size S2 of the pit P2 formed in the third semiconductor layer 123 is formed in a range of about 50 nm to 100 nm, the size S2 of the pit P2 is minimized and optimized to substantially emit light. The high quality active layer region A2 that contributes to can be significantly increased.

Accordingly, according to the exemplary embodiment, the lower portion of the third semiconductor layer 123 including the pit P2 to maintain the brightness while minimizing the pit P2 size S2 that reduces the emission area and at the same time enhance the ESD resistance. By disposing the first conductivity type second semiconductor layer 122 at the second concentration, the ESD resistance may be improved by increasing the density and internal capacitance of the pit P2.

Alternatively, as shown in FIG. 5, the second semiconductor layer 122a having the second concentration is formed in an area overlapping the pit P2, thereby minimizing and optimizing the size S2 of the pit P2. Therefore, the ESD yield can be improved and the luminous efficiency can be increased. In example embodiments, the second semiconductor layer 122a having the second concentration may be formed to have a size greater than or equal to the size S2 of the pit P2.

6 and 7, the light emitting device 102 according to the second embodiment includes a third semiconductor layer 123 including a pit P3 and a second concentration on the third semiconductor layer 123. The first conductive type second semiconductor layer 122 and the second semiconductor layer 122 may include an organic coupling relationship between the active layer 114.

According to the second embodiment, the upper portion of the third semiconductor layer 123 including the pit P3 to maintain the brightness while minimizing the pit P3 size S2 that reduces the light emitting area and at the same time enhances the ESD resistance. By disposing the first conductivity type second semiconductor layer 122 at the second concentration, the ESD resistance may be improved by increasing the pit density and internal capacitance of the pit P2.

Alternatively, as shown in FIG. 8, the second semiconductor layer 122 in the second embodiment may include a n-GaN 122a / u-GaN1 122b superlattice structure having a second concentration. For example, the second semiconductor layer 122 may include a superlattice structure of an n-type GaN semiconductor layer (n-GaN) 122a and an undoped GaN semiconductor layer (u-GaN1 122b) having a second concentration. Can be.

Next, as shown in FIG. 11, an aluminum gallium-based nitride semiconductor layer 140 is formed on the active layer 114 to improve luminous efficiency by acting as electron blocking and cladding of the active layer. Can be.

For example, the aluminum gallium-based nitride semiconductor layer 140 may be formed of Al _x In _y Ga _(1-xy) N (0 ≦ _x ≦ 1,0 ≦ _y ≦ 1) based semiconductor, and the active layer ( It may have a higher energy band gap than the energy band gap of 114).

Thereafter, the second conductivity-type semiconductor layer 116 may be formed of a semiconductor compound on the aluminum gallium-based nitride semiconductor layer 140.

The second conductivity type semiconductor layer 116 may include a semiconductor material having a composition formula of In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). Can be. When the second conductive semiconductor layer 116 is a p-type semiconductor layer, the second conductive dopant may be a p-type dopant and may include Mg, Zn, Ca, Sr, and Ba.

In an embodiment, the first conductivity type first semiconductor layer 112 may be an n-type semiconductor layer, and the second conductivity type semiconductor layer 116 may be a p-type semiconductor layer, but is not limited thereto.

In addition, a semiconductor, for example, an n-type semiconductor layer (not shown) having a polarity opposite to that of the second conductive type may be formed on the second conductive type semiconductor layer 116. Accordingly, the light emitting structure 110 may be implemented as any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure.

Thereafter, an ohmic layer 142 is formed on the second conductivity type semiconductor layer 116.

For example, the ohmic layer 142 may be formed by stacking a single metal, a metal alloy, a metal oxide, or the like in multiple layers so as to efficiently inject holes.

For example, the ohmic layer 142 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), or IGTO. (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt At least one of Au, Hf, and the like may be formed, and the material is not limited thereto.

Next, as shown in FIG. 12, the ohmic layer 142, the second conductivity-type semiconductor layer 116, and the aluminum gallium-based nitride semiconductor have a exposed region H through which the first conductivity-type first semiconductor layer 112 is exposed. A portion of the layer 140, the active layer 114, the third semiconductor layer 123, and the second semiconductor layer 122 may be removed.

Next, as shown in FIG. 13, the second electrode 152 is formed on the ohmic layer 142 and the first electrode 151 is formed on the exposed first conductive type first semiconductor layer 112. According to the light emitting device can be formed.

A plurality of light emitting devices according to the embodiment may be arranged on a substrate in the form of a package, and a light guide plate, a prism sheet, a diffusion sheet, a fluorescent sheet, or the like, which is an optical member, may be disposed on a path of light emitted from the light emitting device package.

The light emitting device according to the embodiment may be applied to a backlight unit, a lighting unit, a display device, an indicator device, a lamp, a street lamp, a vehicle lighting device, a vehicle display device, a smart watch, but is not limited thereto.

Features, structures, effects, etc. described in the above embodiments are included in at least one embodiment, but are not necessarily limited to one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be interpreted that the contents related to this combination and modification are included in the scope of the embodiments.

Although the above description has been made with reference to the embodiments, these are merely examples and are not intended to limit the embodiments, and those of ordinary skill in the art to which the embodiments pertain may have various examples that are not illustrated above without departing from the essential characteristics of the embodiments. It will be appreciated that eggplant modifications and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the embodiments set forth in the appended claims.

Claims

A first conductivity type first semiconductor layer having a first concentration;

A first conductivity type second semiconductor layer having a second concentration on the first semiconductor layer;

A third semiconductor layer including pits on the second semiconductor layer;

An active layer on the third semiconductor layer; And

And a second conductivity type semiconductor layer on the active layer.
According to claim 1,

And a second concentration of the second semiconductor layer is higher than a first concentration of the first semiconductor layer.
The method of claim 1,

The light emitting device having a size of the pits formed in the third semiconductor layer is 50 nm to 100 nm.
According to claim 1,

The second semiconductor layer is formed in the region overlapping the pit.
The method of claim 4, wherein

And the second semiconductor layer has a width greater than or equal to the width of the pit.
According to claim 1,

The second semiconductor layer

A light emitting device comprising an n-type GaN semiconductor layer of a second concentration in the range of 7 × 10 −18 to 9 × 10 −18 (atoms / cm 3 ).
A first conductivity type first semiconductor layer having a first concentration;

A third semiconductor layer including pits on the first semiconductor layer;

A first conductivity type second semiconductor layer having a second concentration on the third semiconductor layer;

An active layer on the second semiconductor layer; And

And a second conductivity type semiconductor layer on the active layer.
The method of claim 7, wherein

And a second concentration of the second semiconductor layer is higher than a first concentration of the first semiconductor layer.
The method of claim 7, wherein

The light emitting device having a size of the pits formed in the third semiconductor layer is 50 nm to 100 nm.
The method of claim 7, wherein

The second semiconductor layer

A light emitting device comprising an n-type GaN semiconductor layer of a second concentration in the range of 7 × 10 −18 to 9 × 10 −18 (atoms / cm 3 ).
The method of claim 7, wherein

The second semiconductor layer

A light emitting device comprising a n-GaN / u-GaN superlattice structure of a second concentration.
The method of claim 7, wherein

And the second semiconductor layer and the active layer include pits.
An illumination system comprising a light emitting unit comprising the light emitting element according to claim 1.