WO2016008196A1 - 显示面板及其彩色滤光片基板 - Google Patents

显示面板及其彩色滤光片基板 Download PDF

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Publication number
WO2016008196A1
WO2016008196A1 PCT/CN2014/084818 CN2014084818W WO2016008196A1 WO 2016008196 A1 WO2016008196 A1 WO 2016008196A1 CN 2014084818 W CN2014084818 W CN 2014084818W WO 2016008196 A1 WO2016008196 A1 WO 2016008196A1
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Prior art keywords
transparent conductive
conductive layer
coplanar
coplanar transparent
array substrate
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PCT/CN2014/084818
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English (en)
French (fr)
Inventor
柴立
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深圳市华星光电技术有限公司
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Priority to US14/416,342 priority Critical patent/US9740064B2/en
Publication of WO2016008196A1 publication Critical patent/WO2016008196A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G02F1/134354—Subdivided pixels, e.g. for grey scale or redundancy the sub-pixels being capacitively coupled
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a display panel and a color filter substrate thereof.
  • BACKGROUND OF THE INVENTION With the development of the information society, the demand for display devices has increased, and this has also promoted the rapid development of the liquid crystal display panel industry. Moreover, users are increasingly demanding a wide viewing angle, low power consumption, display quality, etc., making the development of liquid crystal display panels more diversified.
  • PSVA Polymer Sustained Vertical Alignment
  • a reactive monomer is added to the liquid crystal material, and after the panel is composed, an electric field is applied to tilt the liquid crystal, and then the ultraviolet light is used to react the monomer in the liquid crystal, thereby causing the liquid crystal to have an inclination angle with respect to the driving direction of the electric field to reach a multi-domain.
  • the transparent electrode in the color filter (Color Fiiier, CF) substrate in PSVA mode consists of a single transparent conductive layer without any pattern.
  • the voltages of the respective regions on the transparent conductive layer of the CF substrate are uniform, and the transparent electrode is generally 6 V as a common electrode.
  • the inventors of the present invention have found that at least the following technical defects exist in the prior art:
  • In the PSVA mode there is a certain voltage between the voltage on the transparent conductive layer of the CF substrate and the voltage of the outline of the array substrate. The voltage difference, thus forming a capacitor with a certain charge storage capacity, which will cause the RC delay effect of the gate line on the array substrate, which will cause serious distortion of the driving signal on the anode line, thereby affecting the display quality of the product.
  • One of the technical problems to be solved by the present invention is to provide a color filter substrate capable of avoiding the RC delay effect of the gate lines on the array substrate and improving the display quality of the product. Further, a display panel including the color filter substrate is also provided.
  • the present invention provides a color filter substrate comprising a disconnected coplanar transparent conductive layer and a second coplanar transparent conductive layer, wherein each of the first coplanar The transparent conductive layer is disposed corresponding to the region of the gate line of the array substrate, and is applied with the same signal synchronous with the driving signal of the corresponding gate line: each of the second coplanar transparent conductive layer and the array substrate
  • the pixel regions are correspondingly disposed, and as a common electrode, the first coplanar transparent conductive layer and the second coplanar transparent conductive layer are unpatterned transparent conductive layers.
  • each of the first coplanar transparent conductive layers is applied thereto
  • the driving signals of the gate lines of the corresponding main pixel regions are synchronized and the same signal.
  • the first coplanar transparent conductive layer and the second coplanar transparent conductive layer are both made of indium tin oxide.
  • the first coplanar transparent conductive layer and the second coplanar transparent conductive layer have a breaking interval of 2.5 ⁇ to 15 ⁇ .
  • the present invention further provides a display panel including an array substrate and a color filter substrate disposed in parallel with the array substrate, the color filter substrate including a first total of disconnected settings a transparent conductive layer and a second coplanar transparent conductive layer, wherein each of the first coplanar transparent conductive layers is disposed corresponding to a region of a pole line of the array substrate, and is driven by a corresponding line of the electrode Signals are synchronous and identical; each of the second coplanar transparent conductive layers is disposed corresponding to a pixel region of the array substrate, and as a common electrode, the first coplanar transparent conductive layer and the second coplanar
  • the transparent conductive layer is a patternless transparent conductive layer.
  • each of the first coplanar transparent conductive layers is applied thereto
  • the driving signals of the polar lines of the corresponding main pixel regions are synchronized and the same signal.
  • the first coplanar transparent conductive layer and the second coplanar transparent conductive layer are each made of indium tin oxide.
  • the first coplanar transparent conductive layer and the second coplanar transparent conductive layer have a breaking interval of 2.5 m to 5 M .m.
  • the embodiment of the present invention separates the transparent electrode on the CF substrate into the gate line region on the corresponding array substrate.
  • the transparent electrode and the transparent electrode corresponding to the pixel region on the array substrate are given different signals so that there is no pressure difference between the gate line on the array substrate and the transparent electrode on the CF substrate, thus avoiding
  • the signal of the gate line on the array substrate is attenuated due to the coupling capacitance generated therebetween, thereby improving the display quality of the display panel.
  • FIG. 2 is a schematic structural view of a display panel according to an embodiment of the present invention
  • FIG. 2 is a schematic structural view of a sub-pixel as shown in FIG. 2
  • FIG. 3 is an equivalent of a sub-pixel according to FIG. 4
  • FIG. 5 is a schematic diagram of a transparent conductive layer on a CF substrate corresponding to the sub-pixel shown in FIG. 2.
  • FIG. 1 is a schematic structural view of a display fascia according to an embodiment of the invention.
  • the display panel includes an image display area 100, a source driver 200, and a gate driver 300.
  • the image display area 100 includes an array substrate and a CF substrate, wherein the array substrate includes a plurality of data lines (N data lines DL1 DLN as shown) and a plurality of outline lines (M gate lines as shown) GLI ⁇ GLM)
  • the source driver 200 transmits the supplied data signal to the array substrate through a plurality of data lines coupled thereto.
  • the outline driver 300 transmits the supplied scan signals to the array substrate through a plurality of «pole lines coupled thereto.
  • the "pixel structure" referred to herein includes a plurality of sub-pixels, and each of the sub-pixels is respectively disposed in a plurality of sub-pixel regions formed by orthogonally configuring a plurality of data lines and a plurality of scanning lines.
  • the "sub-pixel” may be a sub-pixel of a different color such as a red (R) sub-pixel, a green (G) sub-pixel, or a blue (B) sub-pixel.
  • Fig. 2 is a schematic view showing the structure of a sub-pixel as an example, which is applied to the display panel shown in Fig. 1.
  • the sub-pixel is divided into two regions of a main pixel region ⁇ and a sub-pixel region S.
  • the sub-pixel includes a main pixel region gate line 1 1 , a sub-pixel region gate line 1 ⁇ , a common line 12 , a data line 13 , a main pixel region switching element 14 , a sub-pixel region switching element 15 , a shared switching element 16 , and a pull-down Capacitor 17.
  • the above-described scheme pulls down the voltage of the sub-pixel region S by the shared switching element 16 and the pull-down capacitor 17 with the sub-pixel region switching element 15 turned on, thereby causing the liquid crystal rotation amount of the main pixel region ⁇ and the sub-pixel region S to be generated. Differences, and thus achieve the purpose of a wide viewing angle.
  • FIG. 2 and FIG. 3 Please refer to FIG. 2 and FIG. 3 simultaneously to explain the entire structure of the sub-pixel.
  • FIG. 3 is a schematic diagram of an equivalent circuit of the sub-pixel shown in FIG.
  • the sub-pixels include switching elements ( ⁇ , ⁇ 2, and ⁇ 3), storage capacitors (Cstlhei) Cst2), and liquid crystal capacitors (Qc! and Cic2).
  • the switching elements T1, ⁇ 2, and ⁇ 3 are each preferably fabricated as a thin film transistor. As shown in FIG. 3, the gates of the main pixel area switching element T1 and the sub-pixel area switching element ⁇ 2 are simultaneously connected to the scanning line Gate n, and the sources of the two are simultaneously connected to the data line Data n.
  • the source of the shared switching element T3 is connected to the drain of the sub-pixel region switching element T2, the drain of the shared switching element T3 is connected to the pull-down capacitor Cdown, and the gate thereof is connected to the scan line Gate n+1 (or Gate n+2, Gaie n+ 3 - ).
  • T1 and T2 are simultaneously turned on so that the main pixel region M and the sub-pixel region S receive the data signal on the data line Data n to have the first potential, and the main pixel region M after the end of charging
  • the voltage V_A and the voltage V_B of the sub-pixel region S are equal.
  • FIG. 4 is a schematic structural view of a CF substrate according to an embodiment of the present invention, and the CF base will be described below with reference to FIG. 4. The various components of the board.
  • the CF substrate 40 includes a glass substrate 430, a black matrix BM 420, an RGB color layer 410, and a transparent conductive layer 400.
  • the black matrix BM 420 is disposed on the glass substrate 430
  • the RGB color layer 410 is disposed in each gap of the black matrix BM 420
  • the transparent conductive layer 400 is disposed on the black matrix BM 420 and the RGB color layer 410.
  • the transparent conductive layer 400 on the CF substrate is not formed as a whole transparent conductive layer as in the prior art, but is formed by dividing the complete transparent conductive layer.
  • the transparent conductive layer 400 includes a plurality of first coplanar transparent conductive layers and a plurality of second coplanar transparent conductive layers, and the first coplanar transparent conductive layer and the second coplanar transparent conductive layer are disposed apart from each other.
  • Each of the first coplanar transparent conductive layers is disposed corresponding to a region where the gate lines of the array substrate are located, and is applied with the same signal synchronized with the driving signal of the corresponding Yang line.
  • Each of the second coplanar transparent conductive layers is disposed corresponding to the pixel region of the array substrate, and as the common electrode, the first coplanar transparent conductive layer and the second coplanar transparent conductive layer are both unpatterned transparent conductive layers.
  • the first coplanar transparent conductive layer and the second coplanar transparent conductive layer are each made of indium tin oxide.
  • the structure of a transparent conductive layer corresponding to a certain sub-pixel of the array substrate will be described below with reference to FIG.
  • Fig. 5 is a schematic view showing a transparent conductive layer on a CF substrate corresponding to the sub-pixel shown in Fig. 2.
  • the sub-pixel includes a main pixel region, a sub-pixel region S, and a main pixel region gate line 1 1 and a sub-pixel region separating the main pixel region M and the sub-pixel region S.
  • Gate line 1 1 ' As shown in FIG. 5, the transparent conductive layer corresponding to the sub-pixel includes an M-region transparent conductive layer 401 corresponding to the main pixel region M, a polar-polar region transparent conductive layer 403 and a corresponding sub-pixel region disposed corresponding to the region where the gate line is located.
  • S-zone transparent conductive layer 405 set by S.
  • the M-region transparent conductive layer 401 and the S-region transparent conductive layer 405 are connected together as a common electrode.
  • the voltage of the gate line region transparent conductive layer 403 is synchronized with the driving signal of the main pixel region pole line 1 1 .
  • the gap between the M-region transparent conductive layer 401 (or the S-region transparent conductive layer 405) and the gate-line transparent conductive layer 403 is 2, 5 ⁇ ! ⁇ 15 ⁇ .
  • FIG. 5 is only one embodiment, and the present invention is not limited thereto.
  • Other transparent conductive layers of the CF substrate using the principles of the present invention are also included in the protection of the present invention.
  • the embodiment of the present invention separates the transparent electrode on the CF substrate into a transparent electrode corresponding to the drain line region on the array substrate and a transparent electrode corresponding to the pixel region on the array substrate, and gives different signals. There is no pressure difference between the gate lines on the array substrate and the transparent electrodes on the CF substrate, thus avoiding The signal attenuation of the pole line on the array substrate caused by the generated coupling capacitance improves the display quality of the display panel.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种显示面板及其彩色滤光片基板。该彩色滤光片基板包括断开设置的第一共面透明导电层（403）和第二共面透明导电层（401，405），其中，每一所述第一共面透明导电层（403）与阵列基板的栅极线所在区域对应设置，且被施加与其所对应的栅极线的驱动信号同步且相同的信号；每一所述第二共面透明导电层（401，405）与所述阵列基板的像素区域对应设置，且作为公共电极，所述第一共面透明导电层（403）和所述第二共面透明导电层（401，405）为无图案透明导电层。该彩色滤光片基板能够避免阵列基板上的栅极线的RC延时效应，提升产品的显示品质。

Description

显示面板及其彩色滤光片基板 本申请要求享有 2014年 7月 17日提交的名称为 "显示面板及其彩色滤光片基板" 的 中国专利申请 CN201410341 70.6的优先权， 其全部内容通过引用并入本文中。
技术领域 本发明涉及液晶显示技术领域， 尤其涉及一种显示面板及其彩色滤光片基板。 背景技术 随着信息社会的发展，人们对显示设备的需求得到了增长， 因而也推动了液晶显示面 板行业的快速发展。 而且， 用户对广视角、 低能耗、 显示品质等要求也越来越高， 使得液 晶显示面板的发展也越发多样化。 目前， 聚合物稳定型垂直配向模式 (Polymer Sustained Vertical Alignment, PSVA) 广泛应用于液晶显示面板中。 在该模式下， 于液晶材料中添加反应单体， 待面板组成后， 施加电场使液晶倾倒，再利用紫外光使液晶内单体反应，进而使液晶隨着电场驱动方向产 生倾角， 达到多畴的特性。
PSVA模式下的彩色滤光片 （Color Fiiier, CF)基板中的透明电极由一整块透明导电 层构成， 旦没有任何图案。 这样， CF基板的透明导电层上各个区域的电压一致， 该透明 电极作为公共电极一般为 6V。 本发明的发明人在实现本发明的过程中， 发现现有技术至少存在如下技术缺陷： 在 PSVA模式下， CF基板的透明导电层上的电压与阵列基板的概极线的电压之间具有一定 的压差， 因此形成了具有一定电荷存储能力的电容， 这样会产生阵列基板上栅极线的 RC 延时效应， 就会引起機极线上驱动信号的严重失真， 从而影响产品的显示品质。
因此， 亟需提供一种解决方案， 以避免阵列基板上的極极线的 RC 延时效应， 提 产品的显示品质。 发明内容 本发明所要解决的技术问题之一是需要提供一种彩色滤光片基板，该彩色滤光片基板 能够避免阵列基板上的栅极线的 RC 延时效应， 提升产品的显示品质。 另外， 还提供了 一种具备该彩色滤光片基板的显示面板。
1 ) 为了解决上述技术问题， 本发明提供了一种彩色滤光片基板， 包括断开设置的第 共面透明导电层和第二共面透明导电层，其中，每一所述第一共面透明导电层与阵列基 板的栅极线所在区域对应设置，且被施加与其所对应的栅极线的驱动信号同步且相同的信 号:每一所述第二共面透明导电层与所述阵列基板的像素区域对应设置,且作为公共电极， 所述第一共面透明导电层和所述第二共面透明导电层为无图案透明导电层。
2 ) 在本发明的第 1 ) 项的一个优选实施方式中， 在所述阵列基板的子像素包括主像 素区和次像素区时,每一所述第一共面透明导电层被施加与其所对应的主像素区的栅极线 的驱动信号同步且相同的信号。
3 )在本发明的第 1 )或 2 )项的一个优选实施方式中， 所述第一共面透明导电层和所 述第二共面透明导电层均由铟锡氧化物制成。
4)在本发明的第 1 )至 3 )项中任一个优选实施方式中， 所述第一共面透明导电层和 所述第二共面透明导电层的断开间隔在 2.5μη〜15μηι。
5 ) 另一方面， 本发明还提供了一种显示面板， 包括阵列基板和与所述阵列基板相对 平行设置的彩色滤光片基板，所述彩色滤光片基板包括断开设置的第一共面透明导电层和 第二共面透明导电层，其中，每一所述第一共面透明导电层与阵列基板的極极线所在区域 对应设置，且被施加与其所对应的機极线的驱动信号同步且相同的信号；每一所述第二共 面透明导电层与所述阵列基板的像素区域对应设置，且作为公共电极，所述第一共面透明 导电层和所述第二共面透明导电层为无图案透明导电层。
6) 在本发明的第 5 ) 项的一个优选实施方式中， 在所述阵列基板的子像素包括主像 素区和次像素区时,每一所述第一共面透明导电层被施加与其所对应的主像素区的極极线 的驱动信号同步且相同的信号。
7 )在本发明的第 5 )或 6)项的一个优选实施方式中， 所述第一共面透明导电层和所 述第二共面透明导电层均由铟锡氧化物制成。
8 )在本发明的第 5 )至 7)项中的任一个优选实施方式中， 所述第一共面透明导电层 和所述第二共面透明导电层的断幵间隔在 2.5 m~ 5M.m。 与现有技术相比， 上述方案中的一个或多个实施 ί到可以具有如下优点或有益效果： 本发明实施例通过将 CF基板上的透明电极分开为对应阵列基板上的栅极线区域的透 明电极和对应阵列基板上的像素区域的透明电极，并给与不同的信号，使得阵列基板上的 栅极线与 CF基板上的透明电极之间不存在压差，这样就避免了由于二者之间产生的耦合 电容而引起的阵列基板上栅极线的信号衰减， 从而改善了显示面板的显示品质。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显 而易见， 或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要 求书以及附图中所特别指出的结构来实现和获得。 图说明 图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例 共同用于解释本发明， 并不构成对本发明的限制。 在附图中： 图〗是根据本发明一实施例的显示面板的结构示意图； 图 2是作为一示 ί到的子像素的结构示意图； 图 3是根据图 2所示的子像素的等效电路示意图； 图 4是根据本发明一实施例的 CF基板的结构示意图； 图 5是对应图 2所示子像素的 CF基板上透明导电层的示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术 手段来解决技术 ^题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是， 只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形 成的技术方案均在本发明的保护范围之内。 以下各实施例的说明是参考 W加的图式， 用以例示本发明可用以实施的特定实施例。 本发明所提到的方向用语， 例如 "上" 、 "下" 、 "左"、 "右"等， 仅是参考 加图式 的方向。 因此， 使用的方向用语是用以说明及理解本发明， 而非用以限制本发明。 另外， 为了清晰起见， Pf†图中示出的每个元件的尺寸和厚度是任意示出的， 本发明不 限于此。 请参考图 1 , 图 1是根据本发明一实施例的显示靣板的结构示意图。 该显示面板包括 影像显示区 100、 源极驱动器 200以及栅极驱动器 300。 影像显示区 100包括阵列基板和 CF基板， 其中阵列基板包括由多条数据线 （如图所示的 N条数据线 DL1 DLN) 与多条 概极线（如图所示的 M条栅极线 GLI〜GLM )正交配置形成的阵列以及多个像素结构 1 10。 源极驱动器 200通过与其耦接的多条数据线将所提供的数据信号传输至阵列基板上。概极 驱动器 300通过与其耦接的多条 «极线将所提供的扫描信号传输至阵列基板上。
需要说明的是， 本文中涉及到的 "像素结构"包括多个子像素， 且各个子像素被分别 配置在由多条数据线和多条扫描线正交配置形成的多个子像素区中。在该实施例中，所谓 "子像素"可以为红色 （R ) 子像素、 绿色 （G ) 子像素或蓝色 （B ) 子像素等不同颜色 的子像素。
图 2是作为一示 ί到的子像素的结构示意图， 该子像素应用于图 1所示的显示面板中。 如图 2所示， 该子像素被分为主像素区 Μ和次像素区 S这两个区域。 该子像素包括 主像素区栅极线 1 1、次像素区栅极线 1 Γ、 公共线 12、数据线 13、主像素区开关元件 14、 次像素区开关元件 15、共享开关元件 16和下拉电容 17。上述这种方案通过共享开关元件 16和下拉电容 17在子像素区开关元件 15开启的情况下将次像素区 S的电压拉下来， 从 而使得主像素区 Μ和次像素区 S的液晶旋转量产生差异， 进而达到广视角的目的。
请同时参照图 2及图 3 , 来说明该子像素的整个结构。
图 3是根据图 2所示的子像素的等效电路示意图。 该子像素包括开关元件 （Τ 、 Τ2 和 Τ3 ) 、 存储电容 （Cstl禾 i] Cst2 ) 以及液晶电容 （Qc!和 Cic2 ) 。 开关元件 Tl、 Τ2和 Τ3均优选以薄膜晶体管制作而成。如图 3所示，主像素区开关元件 T1和次像素区开关元 件 Τ2的栅极同时连接扫描线 Gate n, 且二者的源极同时连接数据线 Data n。 共享开关元 件 T3的源极连接次像素区开关元件 T2的漏极， 共享开关元件 T3的漏极连接下拉电容 Cdown, 其栅极连接扫描线 Gate n+1 (或者 Gate n+2、 Gaie n+3 - ) 。 在向扫描线 Gate n 输入开启电压时， T1和 T2同时开 进而使主像素区 M和次像素区 S接收数据线 Data n上的数据信号而具有第一电位， 充电结束后主像素区 M的电压 V—A和次像素区 S的电 压 V— B相等。在向扫描线 Gate n+1输入开启电压时， T3开启， 进而通过下拉电容 Cdown 将次像素区 S的电压 V— B的电压下拉， 使得次像素区 S的电压 V— B和主像素区 M的电 压 V— A具有电压差， 进而实现低色偏的效果。
图 4是根据本发明一实施例的 CF基板的结构示意图， 下面参考图 4来说明该 CF基 板的各个组成。
如图 4所示， 该 CF基板 40包括玻璃基板 430、 黑色矩阵 BM 420、 RGB色层 410和 透明导电层 400。其中， 黑色矩阵 BM 420设置在玻璃基板 430上， RGB色层 410设置在 黑色矩阵 BM 420的各个间隙中， 透明导电层 400设置在黑色矩阵 BM 420和 RGB色层 410之上。 需要说明的是， 在本实施例中， CF基板上的透明导电层 400并非如现有技术那样为 一整块完整的透明导电层构成，而是通过对完整的透明导电层进行分割而成。该透明导电 层 400包括多个第一共面透明导电层和多个第二共面透明导电层,第一共面透明导电层和 第二共面透明导电层彼此断开设置。其中，每一第一共面透明导电层与阵列基板的栅极线 所在区域对应设置，且被施加与其所对应的楊极线的驱动信号同步且相同的信号。每一第 二共面透明导电层与阵列基板的像素区域对应设置，且作为公共电极，这些第一共面透明 导电层和第二共面透明导电层均为无图案透明导电层。优选地，第一共面透明导电层和第 二共面透明导电层均由铟锡氧化物制成。 为了进一步说明本实施例，下面参照图 5来说明对应阵列基板某一子像素的透明导电 层的结构。
图 5是对应图 2所示子像素的 CF基板上透明导电层的示意图。通过上面对图 2的描 述， 了解到该子像素包括主像素区1^、 次像素区 S以及隔开主像素区 M和次像素区 S的 主像素区栅极线 1 1和次像素区栅极线 1 1'。 如图 5所示，对应该子像素的透明导电层包括对应主像素区 M设置的 M区透明导电 层 401、 对应栅极线所在区域设置的極极线区透明导电层 403和对应次像素区 S设置的 S 区透明导电层 405。在外围电路处， M区透明导电层 401和 S区透明导电层 405被连接在 一起， 作为公共电极。 而栅极线区透明导电层 403的电压与主像素区極极线 1 1的驱动信 号同步且相同。 另外， M区透明导电层 401 (或者 S区透明导电层 405 ) 与栅极线区透明 导电层 403的断开间隔在 2,5μη！〜 15μΐΉ。
值的一提的是， 图 5仅是一个实施例， 本发明不以此为限， 其他采用了本发明原理的 CF基板的透明导电层也属于本发明保护范圏。 综上所述， 本发明实施例通过将 CF基板上的透明电极分开为对应阵列基板上的搠极 线区域的透明电极和对应阵列基板上的像素区域的透明电极，并给与不同的信号，使得阵 列基板上的栅极线与 CF基板上的透明电极之间不存在压差，这样就避免了由于二者之间 产生的耦合电容而引起的阵列基板上極极线的信号衰减， 认而改善了显示面板的显示品 质。
以上所述， 仅为本发明较佳的具体实施方式， 但本发明的保护范围并不局限于此， 任 何熟悉该技术的人员在本发明所公开的技术范围内，可轻易想到的变化或替换，都应涵盖 在本发明的保护范 ID之内。 因此， 本发明的保护范圈应该以权利要求的保护范圈为准。

Claims

权利要求书
1、 一种彩色滤光片基板， 其中， 包括- 断开设置的第一共面透明导电层和第二共面透明导电层， 其中，每一所述第一共面透明导电层与阵列基板的機极线所在区域对应设置，且被施 加与其所对应的極极线的驱动信号同步且相同的信号；每一所述第二共面透明导电层与所 述阵列基板的像素区域对应设置，且 为公共电极，所述第一共面透明导电层和所述第二 共面透明导电层为无图案透明导电层。
2、 根据权利要求 1所述的彩色滤光片基板， 其中， 在所述阵列基板的子像素包括主像素区和次像素区 B寸，每一所述第一共面透明导电层 被施加与其所对应的主像素区的栅极线的驱动信号同歩且相同的信号。
3、 根据权利要求〗所述的彩色滤光片基板， 其中， 所述第一共面透明导电层和所述第二共面透明导电层均由铟锡氧化物制成。
4、 根据权利要求 1所述的彩色滤光片基板， 其中， 所述第一共靣透明导电层和所述第二共面透明导电层的断开间隔在 2.5μπι〜15μτη。
5、 根据权利要求 2所述的彩色滤光片基板， 其中， 所述第一共面透明导电层和所述第二共面透明导电层的断开间隔在 2.5M.m~15|im。
6、 根据权利要求 3所述的彩色滤光片基板， 其中， 所述第一共面透明导电层和所述第二共面透明导电层的断开间隔在 2.5μπι~15μηι。
7、 一种显示面板， 其中， 包括阵列基板和与所述阵列基板相对平行设置的彩色滤光 片基板， 所述彩色滤光片基板包括断开设置的第一共面透明导电层和第二共面透明导电层， 其中， 每一所述第一共面透明导电层与阵列基板的栅极线所在区域对应设置， 被施加与其所对应的榲极线的驱动信号同步且相同的信号： 每一所述第二共面透 明导电层与所述阵列基板的像素区域对应设置， 且作为公共电极， 所述第一共面透 明导电层和所述第二共面透明导电层为无图案透明导电层。
8、 根据权利要求 7所述的显示面板， 其中， 在所述阵列基板的子像素包括主像素区和次像素区^ ,每一所述第一共面透明导电层 被施加与其所对应的主像素区的 «极线的驱动信号同步且相同的信号。
9、 根据权利要求 7所述的显示面板， 其中， 所述第一共面透明导电层和所述第二共面透明导电层均由铟锡氧化物制成。
10、 根据权利要求 7所述的显示面板， 其中， 所述第一共靣透明导电层和所述第二共面透明导电层的断开间隔在 2.5μπ！〜 15μιιι。
1 1、 根据权利要求 8所述的显示面板， 其中， 所述第一共面透明导电层和所述第二共面透明导电层的断开间隔在 2,5μιι！〜 15μηι。
12、 根据权利要求 9所述的显示面板， 其中， 所述第一共靣透明导电层和所述第二共面透明导电层的断开间隔在 2.5μπι〜15μτη。
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