WO2015196632A1 - 直流电源的浪涌电流抑制方法及电路 - Google Patents

直流电源的浪涌电流抑制方法及电路 Download PDF

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Publication number
WO2015196632A1
WO2015196632A1 PCT/CN2014/088519 CN2014088519W WO2015196632A1 WO 2015196632 A1 WO2015196632 A1 WO 2015196632A1 CN 2014088519 W CN2014088519 W CN 2014088519W WO 2015196632 A1 WO2015196632 A1 WO 2015196632A1
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circuit
voltage
energy storage
power supply
constant current
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PCT/CN2014/088519
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English (en)
French (fr)
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严永红
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中兴通讯股份有限公司
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Publication of WO2015196632A1 publication Critical patent/WO2015196632A1/zh

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/36Means for starting or stopping converters
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof

Definitions

  • the present invention relates to the field of communication power supply devices, and in particular to a method and circuit for suppressing surge current of a DC power supply.
  • the power supply is a system device that supplies power to the secondary power source in different ways, and an energy storage unit is connected between the secondary power supply and the power supply, and the energy storage unit is connected to the power supply circuit.
  • an inrush current will be generated transiently. The transient change of this current will cause the input power supply voltage to drop, or the arcing phenomenon occurs when the secondary device is connected to the power supply, causing an impact on the internal components of the power supply, such as a slow start switch. The transient power is too large.
  • the inrush current analog circuit of the power input is widely used in communication equipment.
  • the power supply input starts the capacitive load current suppression circuit is an important part of the power supply front-end circuit.
  • the inrush current suppression circuit can slow down the impact of the power supply on the input port and the internal circuit, input the slow-start switch transient power suppression, and make the current as much as possible. Slowly rise to protect it.
  • Solution 1 In the input low-power circuit, a thermistor with a negative temperature coefficient is inserted to suppress the inrush current, so that the input current changes as the temperature of the thermistor rises and the resistance decreases, but the application range of this solution is too Small, heat-sensitive resistors have a large heat loss and have a large impact on the efficiency of the system.
  • the NTC in the circuit suppresses the inrush current at the moment of the switch closing, and the suppression effect of the scheme on the inrush current Very good, but in the normal load of the system, with the increase of temperature, the resistance of NTC drops to about 1 ohm (temperature is less than 100 degrees), the power consumption of this resistor increases with the increase of load current, the thermal stress of the resistor Very large, so it is limited to low-power circuit applications, and NTC has a greater impact on line efficiency.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • the MOSFET By controlling the gate voltage rise time of the MOSFET, the MOSFET is high impedance. The region slowly changes to the switching state. The MOSFET generates a large amount of heat loss during the turn-on transient, which increases the stress transient of the MOSFET and even damages the avalanche energy of the device.
  • the delay charging circuit composed of resistors R1, R2, and C2 causes Vgs of Q1 to rise slowly, and Vgs is greater than the Vth (switching threshold voltage) voltage of the MOSFET.
  • the storage capacitor C1 When entering the switch state, the storage capacitor C1 is charged during this process, at Vgs Before rising to Vth, the MOSFET passes through the amplification region, because the Miller capacitance of the semiconductor device will rise during the Vgs rise process, during which the MOSFET passes a very short time of high current (maximum inrush current) and maximum voltage (basic and The current and voltage of the input power supply voltage are equal to each other.
  • the transient power of the MOSFET at this time may exceed the safe working area or avalanche energy, which greatly reduces the reliability of the circuit.
  • Solution 3 On the basis of the second scheme, the DS in Q1 is connected to the shunt resistor R3. As shown in Figure 3, at the instant of K1 closing, Q1 exhibits high impedance before Vgs rises to Vth. Part of the charging current is charged by R3 for C1. When Q1 rises to Vth after Vgs, Q1 is fully turned on, Q1 continues to charge large current for C1, and the DC on-resistance of Q1 is milliohm level. The actual charging current basically passes through Q1 switch. . This process is very good to reduce the input surge current. Q1 starts with the transient voltage or the input power supply voltage is basically the same, so that the inrush current is reduced and the transient power of the tube is also reduced.
  • the resistance of the Q1 GS parallel connection is unexpectedly damaged in Q1 when the system is under normal load current.
  • Q1 When the Vgs voltage changes, Q1 exhibits high impedance, and the load current is supplied through the resistor. At this time, the parallel heat dissipation is very large. A serious failure occurs in which the resistor body is burned out and the PCB is burnt.
  • the inrush current suppression circuit between the input power source and the secondary power source and reducing the switching transient power firstly, the input current can be slowly changed, and the impact and malfunction of the interface and other devices of the circuit are reduced, and the reliability of the circuit operation is provided. .
  • the heat consumption should be reduced as much as possible. If the above scheme is adopted, the demand of the high current circuit cannot be met, and the system efficiency is seriously affected, the reliability of the system is lowered, and the energy saving of the system cannot be satisfied. demand.
  • the invention provides a method for suppressing a surge current of a DC power source, comprising: a secondary power source connected to a power supply source, and charging the energy storage unit through a constant current source circuit; and the voltage detection circuit detecting the energy storage capacitor in the energy storage unit After the voltage reaches the predetermined voltage value, the delay circuit is driven; the delay circuit drives the switch unit to slowly open until the switch unit is completely turned on; the switch unit bypasses the constant current source circuit and charges the energy storage unit.
  • the secondary power source is connected to the power supply, and the secondary power source is directly connected to the power supply, or the secondary power is connected to the power supply through the control of the switch.
  • the delay circuit drives the switch unit to be slowly turned on until the fully turned on the switch unit specifically includes: the delay circuit drives the Vgs voltage of the switch unit to rise slowly, and completely turns on the switch unit after the Vgs voltage is greater than the turn-on voltage of the switch unit. .
  • the delay circuit comprises: an electronic delay switch;
  • the constant current source circuit comprises: a constant current source circuit composed of a semiconductor, a resistor, and a capacitor, or a constant current source circuit composed of an integrated chip and an operational amplifier; and voltage detection
  • the circuit includes: an inspection circuit composed of a resistor, a semiconductor device, and an operational amplifier.
  • the switching unit is a transistor.
  • the invention also provides a surge current suppression circuit of a DC power source, comprising: a constant current source circuit, connected in series with the energy storage unit, configured to charge the energy storage unit after the secondary power source is connected to the power supply; the voltage detection circuit Parallel to the energy storage unit, configured to detect the voltage of the storage capacitor in the energy storage unit, and drive the delay circuit after the voltage reaches a predetermined voltage value; the delay circuit is connected in parallel with the energy storage unit to be set as the drive switch unit Slowly open until the switch unit is fully turned on; the switch unit, in series with the energy storage unit, in parallel with the constant current source circuit, is configured to bypass the constant current source circuit after full conduction and to charge the energy storage unit.
  • the secondary power source is directly connected to the power supply, or the secondary power source is connected to the power supply through the switch.
  • the delay circuit is configured to: the Vgs voltage of the driving switch unit is slowly increased, and the switching unit is completely turned on after the Vgs voltage is greater than the turn-on voltage of the switching unit.
  • the delay circuit comprises: an electronic delay switch;
  • the constant current source circuit comprises: a constant current source circuit composed of a semiconductor, a resistor, and a capacitor, or a constant current source circuit composed of an integrated chip and an operational amplifier; and voltage detection
  • the circuit includes: an inspection circuit composed of a resistor, a semiconductor device, and an operational amplifier.
  • the switching unit is a transistor.
  • the beneficial effects of the present invention are as follows:
  • the technical solution of the embodiment of the present invention improves the slow start process of the serial switch unit into a segmented charging.
  • the constant current source circuit is charged first, and then the voltage of the storage capacitor is detected.
  • the delay circuit is turned on to drive the switching power supply in series to be charged.
  • the inrush current can be suppressed, and the voltage drop when the slow start switch is turned on is reduced, and the circuit is simple to implement. Easy to select, does not affect the efficiency of the system, is not affected by the load current, so that the reliability and efficiency of the circuit work is greatly improved.
  • FIG. 1 is a schematic diagram of a circuit structure of a first scheme in the prior art
  • FIG. 3 is a schematic structural diagram of a circuit of the third method in the prior art
  • FIG. 4 is a flowchart of a method for suppressing a surge current of a DC power supply according to an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a constant current source circuit according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of a voltage detecting circuit and a delay driving circuit according to an embodiment of the present invention.
  • FIG. 7 is a first schematic structural diagram of a circuit of a surge current suppression circuit of a DC power supply according to an embodiment of the present invention.
  • FIG. 8 is a second schematic structural diagram of a circuit of a surge current suppression circuit of a DC power supply according to an embodiment of the present invention.
  • FIG. 9 is a third schematic structural diagram of a circuit of a surge current suppression circuit of a DC power supply according to an embodiment of the present invention.
  • Fig. 10 is a block diagram showing the structure of a surge current suppressing circuit of a DC power supply according to an embodiment of the present invention.
  • the circuit first charges the storage capacitor.
  • the peak current of charging which is about the input maximum supply voltage / (line impedance + DC equivalent resistance of the capacitor), the impedance of the line and the electrolytic capacitor in the -48V system.
  • Equivalent Series Resistance (ESR) is milliohm.
  • the present invention provides a method and a circuit for suppressing a surge current of a DC power source caused by an excessive transient power of the switch, and the secondary power source is connected to the power supply or is connected to the power supply through a switch. After the power is supplied, the energy storage unit is charged through the constant current source circuit.
  • the constant current source circuit charges the energy storage unit, when the storage capacitor voltage rises to a certain voltage (this voltage can be set), the voltage detection circuit drives the delay circuit to operate, and the driving switch device is slowly opened to switch to the switching device pair. The storage capacitor is charged.
  • the switching unit is fully turned on, the constant current source circuit is bypassed by the switching device, and the energy storage unit is shorted to the circuit by the switching unit.
  • the process of suppressing the inrush current of the storage capacitor and the transient power consumption of the switching device at the time of starting the power supply is completed.
  • FIG. 4 is a flowchart of a method for suppressing a surge current of a DC power supply according to an embodiment of the present invention.
  • the inrush current suppression method of the DC power supply of the example includes the following processing:
  • Step 401 The secondary power source is connected to the power supply source, and the energy storage unit is charged by the constant current source circuit; wherein the secondary power source can directly access the power supply, or the secondary power source can also be connected to the power supply through the control of the switch.
  • the constant current source circuit may be: a constant current source circuit composed of a semiconductor, a resistor, and a capacitor, or may be a constant current source circuit composed of an integrated chip and an operational amplifier;
  • Step 402 after detecting that the voltage of the storage capacitor in the energy storage unit reaches a predetermined voltage value, driving the delay circuit;
  • the delay circuit may be an electronic delay switch;
  • the voltage detection circuit may be a resistor, a semiconductor device, and An inspection circuit consisting of an operational amplifier.
  • Step 403 the delay circuit drives the switch unit to slowly open until the switch unit is completely turned on; the delay circuit drives the Vgs voltage of the switch unit to rise slowly, and completely turns on the switch unit after the Vgs voltage is greater than the turn-on voltage of the switch unit.
  • the above switching unit is a transistor. Where Vgs is the voltage between the gate and source of the transistor;
  • step 404 the switching unit bypasses the constant current source circuit and charges the energy storage unit.
  • the constant current source circuit, the voltage detecting circuit, and the delay circuit of the embodiment of the present invention have various circuit configurations, as long as the circuit structure can perform the above corresponding functions.
  • the structure of each of the above circuits will be exemplified below with reference to the drawings.
  • R1, R2, Q2, and Q3 form a constant current source circuit, and the storage capacitor C2 is charged, and R1 is connected to the base of Q2 and The emitter, the voltage across R1 is clamped by the PN junction voltage between the base and the emitter, so that the current that can pass through R1 is limited to the PN junction voltage divided by R1, and the storage capacitor C2 is charged with the maximum PN junction voltage. Divided by the current of R1.
  • the e pole of Q2 can also clamp the voltage of the input ground, and also clamp the Vds of the slow-up MOSFET, reducing the voltage of the slow-start switch during the main switch or hot plugging.
  • the stress suppresses the inrush current of the circuit when the switch is turned on or hot-swapped. Since the charging current is limited, the parallel power consumption of the device can be controlled within the range that the circuit can withstand.
  • FIG. 6 is a schematic diagram of a voltage detecting circuit and a delay driving circuit according to an embodiment of the present invention.
  • R4, D1, and Q4 form a storage capacitor C2 voltage detecting circuit.
  • the switch When the switch is closed, the storage capacitor C2 is charged.
  • Q4 turns on and the drive delay circuit is turned on.
  • R3, R5, R8, C1, and Q5 form a delay driving circuit.
  • the circuit charges capacitor C1 through R5 and Q5.
  • the Vgs voltage of Q1 rises slowly until Vgs is greater than its turn-on voltage. Turning on, during this process, the secondary charging of the storage capacitor is completed.
  • FIG. 7 is a schematic diagram showing a preferred circuit configuration of a surge current suppressing circuit of a DC power supply according to an embodiment of the present invention
  • FIG. 8 is a schematic diagram showing a preferred circuit configuration of a surge current suppressing circuit of a DC power supply according to an embodiment of the present invention
  • FIG. FIG. 3 is a schematic diagram showing a preferred circuit structure of a surge current suppression circuit of a DC power supply according to an embodiment of the present invention.
  • FIGS. 7, 8, and 9 a constant current source circuit in a surge current suppression circuit of a DC power supply is provided.
  • the voltage detection circuit and the various circuit structures of the delay circuit can achieve the corresponding functions.
  • the following is a detailed description of the circuit structure of FIG. 7 as an example:
  • the R1, R2, Q2, and Q3 constant current sources start to charge C1.
  • the set value is composed of R3, Q4, and D1.
  • Q4 is turned on, and R6, Q5, and C2 form a pair of Q1 to the gate-source charging circuit.
  • the Q1-Vds voltage decreases with the charging time, and Q1 starts to conduct and charges.
  • Switching from the constant current source circuit to the Q1-Id current charges the capacitor C1 until Q1 is fully turned on.
  • the input DC power supply starts the capacitive load inrush current, which can be well suppressed to a low level. In the range, and the transient power of Q1 is reduced a lot, it has a good protection for the circuit, does not affect the efficiency of the circuit, and improves the reliability of the circuit.
  • circuit structure shown in FIG. 8 and FIG. 9 and the circuit structure shown in FIG. 7 are different, the functions realized by the respective circuits are the same as those realized by the circuit structure shown in FIG. 7, and are no longer used here.
  • the circuit structure of Figs. 8 and 9 will be described in detail.
  • FIG. 10 is a schematic structural diagram of a surge current suppression circuit of a DC power supply according to an embodiment of the present invention.
  • the inrush current suppression circuit of the DC power supply of the example includes a constant current source circuit 10, a voltage detection circuit 12, a delay circuit 14, and a switching unit 16.
  • the constant current source circuit 10 is connected in series with the energy storage unit, and is configured to charge the energy storage unit after the secondary power source is connected to the power supply; wherein the secondary power source is directly connected to the power supply, or the secondary power source is switched and powered. Power connection.
  • the constant current source circuit 10 includes: a constant current source circuit 10 composed of a semiconductor, a resistor, and a capacitor, or a constant current source circuit 10 composed of an integrated chip and an operational amplifier;
  • the voltage detecting circuit 12 is arranged in parallel with the energy storage unit, and is configured to detect the voltage of the storage capacitor in the energy storage unit, and after the voltage reaches a predetermined voltage value, drive the delay circuit 14; the voltage detecting circuit 12 includes: a resistor, a semiconductor device And an inspection circuit composed of an operational amplifier.
  • the delay circuit 14 is connected in parallel with the energy storage unit, and is arranged to drive the switch unit 16 to slowly open until the switch unit 16 is completely turned on; the delay circuit 14 is set to: the Vgs voltage of the drive switch unit 16 rises slowly, and the Vgs voltage is greater than After the turn-on voltage of the switching unit 16, the switching unit 16 is completely turned on.
  • the delay circuit 14 includes: an electronic delay switch;
  • the switching unit 16 in series with the energy storage unit, is connected in parallel with the constant current source circuit 10, and is arranged to bypass the constant current source circuit 10 after fully conducting, and to charge the energy storage unit.
  • the switching unit 16 is a transistor.
  • the above-mentioned various circuits of the embodiments of the present invention may have various circuit configurations, and the preferred three circuit configurations are as shown in FIG. 7 , FIG. 8 and FIG. 9 , and can be understood by referring to the contents of the above embodiments, and details are not described herein again.
  • the technical solution of the embodiment of the present invention can suppress the inrush current and reduce the voltage drop when the slow start switch is turned on, the circuit is simple to implement, the switching device is easy to select, and the efficiency of the system is not affected. Unaffected by the load current, the reliability and efficiency of the circuit operation are greatly improved.
  • the inrush current can be suppressed, and the voltage drop when the slow start switch is turned on is reduced, the circuit is simple to implement, the switching device is easily selected, the efficiency of the system is not affected, and the load is not affected.
  • the influence of current greatly improves the reliability and efficiency of circuit operation.

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Abstract

一种直流电源的浪涌电流抑制方法及电路。该方法包括:二次电源接入供电电源,并通过恒流源电路(10)为储能单元充电;电压检测电路(12)在检测到储能单元中储能电容(C2)的电压达到预定电压值后,驱动延时电路(14);延时电路(14)驱动开关单元(16)缓慢打开,直到完全导通开关单元(16);开关单元(16)将恒流源电路(10)旁路,并为储能单元进行充电。借助于上述技术方案,即能够抑制冲击电流,又降低了缓启动开关的开启时的压降。

Description

直流电源的浪涌电流抑制方法及电路 技术领域
本发明涉及通讯电源设备领域,特别是涉及一种直流电源的浪涌电流抑制方法及电路。
背景技术
在通信设备中,供电电源是以不同的方式为二次电源供电的系统设备,在二次电源与供电电源之间会有接入的储能单元,该储能单元接入供电电路中,在系统上电过程中会瞬态产生冲击电流,此电流的瞬态变化会造成输入电源电压的跌落,或者二次设备接入供电电源时出现电弧现象,对于电源内部器件造成冲击,例如缓启动开关的瞬态功率过大。电源输入的冲击电流拟制电路在通信设备中应用广泛。
电源输入启动容性负载电流的抑制电路是电源前端电路的重要组成部分,冲击电流抑制电路可以减缓电源上电对输入端口及内部电路的冲击,输入缓启动开关瞬态功率抑制,尽可能使电流缓慢上升,使其得到保护。
在现有技术中,抑制的方案常用的有三种:
方案一:在输入小功率的电路中,串入负温度系数的热敏电阻来抑制冲击电流,使输入电流随热敏电阻温度升高,阻值下降的变化而变化,但此方案应用范围太小,热敏的电阻的热耗较大,而且对系统的效率影响较大。如图1所示,在开关K1闭合瞬间,电路中的NTC(负温度系数的热敏电阻,一般几欧姆~十几欧姆)抑制在开关闭合瞬间的冲击电流,此方案对冲击电流的抑制效果很好,但是在系统正常负载时,随温度升高,NTC的阻值下降到1欧姆左右(温度低于100度),此电阻的功耗随负载电流的增大而上升,电阻的热应力非常大,因此只限于小功率电路应用,而且NTC对线路的效率影响较大。
方案二:在二次输入的-48V线路中串入金氧半场效晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,简称为MOSFET),通过控制MOSFET的门极电压上升时间,使MOSFET从高阻区缓慢变化到开关状态,该方案MOSFET在开启瞬态产生大量的热耗,从而使MOSFET的应力瞬态增加,甚至超过器件的雪崩能量而损坏。如图2所示,当V1的电压通过K1闭合加到电路中时,电阻R1,R2,C2组成的延时充电电路,使Q1的Vgs缓慢上升,Vgs大于MOSFET的Vth(开关门限电压)电压时进入开关状态,在此过程中对储能电容C1进行充电,在Vgs 上升到Vth前,MOSFET经过放大区,由于半导体器件的米勒电容会在Vgs上升过程中米勒平台,在此期间MOSFET经过一个很短时间的大电流(最大冲击电流)和最大电压(基本和输入电源电压相等)的电流电压同时存在,MOSFET这个时间的瞬态功率有可能会超出安全工作区或雪崩能量,极大降低了电路的可靠性。
方案三:在方案二的基础上的一种方案,在Q1的D-S并接分流电阻R3,如图3所示,在K1闭合瞬间,Q1的在Vgs上升到Vth前,Q1呈现高阻抗,大部分充电电流由R3为C1充电,当Q1的在Vgs上升到Vth后,Q1完全导通,Q1继续大电流为C1充电,Q1的直流导通电阻毫欧级,实际充电电流基本均通过Q1开关。此过程很好的降低输入的冲击电流,Q1启动是瞬态的电压还是和输入电源电压基本一致,使得冲击电流降低,管子的瞬态功率也降低。但是Q1的G-S并接的电阻在系统正常负载电流时,在Q1受到意外的损伤,Vgs电压变化时,Q1出现高阻抗,而负载电流通过电阻提供,此时并接的电阻热耗非常大,出现电阻本体被烧坏和PCB被烧的严重故障。
作为输入电源和二次电源之间的冲击电流抑制电路和降低开关瞬态功率,首先要满足输入电流能够缓慢变化,降低对接口及电路其他的器件的冲击、误动作,提供电路工作的可靠性。其次在正常工作时,系统的大电流工作时,尽量降低热耗,如果采用上述方案,都无法满足大电流电路的需求,而且严重影响系统效率,降低系统的可靠性,并且不能满足系统的节能需求。
发明内容
为了解决现有技术中输入电源和二次电源之间的冲击电流和开关瞬态功率过大导致的对电源内部器件造成冲击的问题,提出了一种直流电源的浪涌电流抑制方法及电路。
本发明提供一种直流电源的浪涌电流抑制方法,包括:二次电源接入供电电源,并通过恒流源电路为储能单元充电;电压检测电路在检测到储能单元中储能电容的电压达到预定电压值后,驱动延时电路;延时电路驱动开关单元缓慢打开,直到完全导通开关单元;开关单元将恒流源电路旁路,并为储能单元进行充电。
优选地,二次电源接入供电电源具体包括:二次电源直接接入供电电源,或者,二次电源通过开关的控制接入供电电源。
优选地,延时电路驱动开关单元缓慢打开,直到完全导通开关单元具体包括:延时电路驱动开关单元的Vgs电压缓慢上升,并在Vgs电压大于开关单元的开启电压后,完全导通开关单元。
优选地,延时电路包括:电子延时开关;恒流源电路包括:由半导体、电阻、以及电容组成的恒流源电路,或者,由集成芯片和运算放大器组成的恒流源电路;电压检测电路包括:电阻、半导体器件、以及运算放大器组成的检查电路。
优选地,开关单元为晶体管。
本发明还提供了一种直流电源的浪涌电流抑制电路,包括:恒流源电路,与储能单元串联,设置为在二次电源接入供电电源后,为储能单元充电;电压检测电路,与储能单元并联,设置为检测储能单元中储能电容的电压,并在该电压达到预定电压值后,驱动延时电路;延时电路,与储能单元并联,设置为驱动开关单元缓慢打开,直到完全导通开关单元;开关单元,与储能单元串联,与恒流源电路并联,设置为在完全导通后将恒流源电路旁路,并为储能单元进行充电。
优选地,二次电源直接与供电电源连接,或者,二次电源通过开关与供电电源连接。
优选地,延时电路设置为:驱动开关单元的Vgs电压缓慢上升,并在Vgs电压大于开关单元的开启电压后,完全导通开关单元。
优选地,延时电路包括:电子延时开关;恒流源电路包括:由半导体、电阻、以及电容组成的恒流源电路,或者,由集成芯片和运算放大器组成的恒流源电路;电压检测电路包括:电阻、半导体器件、以及运算放大器组成的检查电路。
优选地,开关单元为晶体管。
本发明有益效果如下:本发明实施例的技术方案将串联开关单元缓启动过程改进为分段式充电,当开关闭合时,先由恒流源电路充电,再通过检测储能电容的电压到设定值时,打开延时电路,驱动串联的开关电源充电,借助本发明实施例的技术方案,即能够抑制冲击电流,又降低了缓启动开关的开启时的压降,电路实现简单,开关器件容易选型,不影响系统的效率,不受负载电流的影响,使电路工作的可靠性及效率有很大的提高。
上述说明仅是本发明技术方案的概述,为了能够更清楚了解本发明的技术手段,而可依照说明书的内容予以实施,并且为了让本发明的上述和其它目的、特征和优点能够更明显易懂,以下特举本发明的具体实施方式。
附图说明
通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本发明的限制。而且在整个附图中,用相同的参考符号表示相同的部件。在附图中:
图1是现有技术中方案一的电路结构示意图;
图2是现有技术中方案二的电路结构示意图;
图3是现有技术中方案三的电路结构示意图;
图4是本发明实施例的直流电源的浪涌电流抑制方法的流程图;
图5是本发明实施例的恒流源电路的示意图;
图6是本发明实施例的电压检测电路和延时驱动电路的示意图;
图7是本发明实施例的直流电源的浪涌电流抑制电路的优选电路结构示意图一;
图8是本发明实施例的直流电源的浪涌电流抑制电路的优选电路结构示意图二;
图9是本发明实施例的直流电源的浪涌电流抑制电路的优选电路结构示意图三;
图10是本发明实施例的直流电源的浪涌电流抑制电路的结构示意图。
具体实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例,然而应当理解,可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反,提供这些实施例是为了能够更透彻地理解本公开,并且能够将本公开的范围完整的传达给本领域的技术人员。
一般在供电直流电源和负载之间都会有储能单元,其作用稳定输入电源电压的波动,平衡负载端的输入阻抗,但储能单元的引入,在输入电源启动时,电路首先对储能电容充电,在充电开始有非常大的di/dt,充电的峰值电流,其值约为输入最高电源电压/(线路阻抗+电容的直流等效电阻),在-48V系统中线路的阻抗和电解电容的等效串联电阻(Equivalent Series Resistance,简称为ESR)毫欧级,当开关闭合和热插拔时,冲击电流可以达到几十安培电流,如此大的峰值电流会对输入电源,及线路里其他元件会有冲击。因此,为了解决现有技术中输入电源和二次电源之间的冲击电流 和开关瞬态功率过大导致的对电源内部器件造成冲击的问题,本发明提供了一种直流电源的浪涌电流抑制方法及电路:二次电源在接入供电电源或通过开关接入到供电电源后,通过恒流源电路为储能单元充电。恒流源电路在给储能单元充电时,当储能电容电压上升到一定电压(此电压可以设定),电压检测电路驱动延时电路动作,驱动开关器件慢慢打开,切换到开关器件对储能电容充电。开关单元完全导通,恒流源电路被开关器件旁路,储能单元被开关单元短接到电路中。完成对电源起动时储能电容的冲击电流及开关器件的瞬态功耗的抑制过程。
以下结合附图以及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不限定本发明。
方法实施例
根据本发明的实施例,提供了一种直流电源的浪涌电流抑制方法,图4是本发明实施例的直流电源的浪涌电流抑制方法的流程图,如图4所示,根据本发明实施例的直流电源的浪涌电流抑制方法包括如下处理:
步骤401,二次电源接入供电电源,并通过恒流源电路为储能单元充电;其中,二次电源可以直接接入供电电源,或者,二次电源还可以通过开关的控制接入供电电源。上述恒流源电路可以为:由半导体、电阻、以及电容组成的恒流源电路,或者,也可以为由集成芯片和运算放大器组成的恒流源电路;
步骤402,电压检测电路在检测到储能单元中储能电容的电压达到预定电压值后,驱动延时电路;延时电路可以为电子延时开关;电压检测电路可以为电阻、半导体器件、以及运算放大器组成的检查电路。
步骤403,延时电路驱动开关单元缓慢打开,直到完全导通开关单元;延时电路驱动开关单元的Vgs电压缓慢上升,并在Vgs电压大于开关单元的开启电压后,完全导通开关单元。上述开关单元为晶体管。其中,Vgs是指晶体管栅极和源极间的电压;
步骤404,开关单元将恒流源电路旁路,并为储能单元进行充电。
需要说明的是,本发明实施例的恒流源电路、电压检测电路、以及延时电路的电路结构有多种,只要其电路结构能够完成上述相应功能均可以。下面会结合附图对上述各个电路的结构进行举例说明。
以下结合附图,对本发明实施例的技术方案进行详细说明。
图5是本发明实施例的恒流源电路的示意图,如图5所示,R1、R2、Q2、Q3组成恒流源电路,对储能电容C2充电,R1并接在Q2的基极和发射极,R1两端的电压被基-射极之间的PN节电压箝位,使R1上能通过的电流被限定在PN节电压除以R1内,储能电容C2充电电流以最大PN节电压除以R1的电流充电。恒流源电路充电时,Q2的e极对输入地的电压也可以起到箝位作用,同时对缓起MOSFET的Vds也箝位,降低缓启动开关在主路开关或热插拔时的电压应力,抑制了电路在开关开启或热插拔时的冲击电流。由于对充电电流进行了限定,此处并联对器件功耗可以控制在电路能承受对范围内。
图6是本发明实施例的电压检测电路和延时驱动电路的示意图,如图6所示,R4、D1、Q4组成储能电容C2电压检测电路,当开关闭合后,储能电容C2充电电压达到设置值时,Q4导通,开启驱动延时电路动作。图6中的R3、R5、R8、C1、Q5组成延时驱动电路,在Q4导通后,电路通过R5、Q5为电容C1充电,Q1的Vgs电压出现缓慢上升,直到Vgs大于其开启电压完全导通,在此过程中完成对储能电容的二次充电。在恒流源的第一次充电和Q1开启过程中的二次充电中,冲击电流得到很好的抑制,同时Q1的Vds也被箝位,因此Q1的瞬态功率应力也降低很多,提高Q1开关器件的可靠性。
图7是本发明实施例的直流电源的浪涌电流抑制电路的优选电路结构示意图一,图8是本发明实施例的直流电源的浪涌电流抑制电路的优选电路结构示意图二,图9是本发明实施例的直流电源的浪涌电流抑制电路的优选电路结构示意图三,可以看出,如图7、8、9所示,给出了直流电源的浪涌电流抑制电路中恒流源电路、电压检测电路、以及延时电路的多种电路结构,上述三种结构均能够实现相应的功能。下面以图7的电路结构为例进行详细说明:
如图7所示,在开关闭合或热插拔时,R1、R2、Q2、Q3恒流源开始为C1充电,当充电电压充到设定值,(设定值由R3、Q4、D1组成对充电电压检测电路确定),Q4导通,R6、Q5、C2组成对Q1对栅源极充电电路动作,在充电的过程中,Q1-Vds电压随充电时间而下降,Q1开始导通,充电由恒流源电路切换到Q1-Id电流给电容C1充电,直到Q1完全导通,在此两个阶段充电过程中,将输入直流电源启动容性负载冲击电流可以很好的抑制到较低的范围内,而且Q1的瞬态功率降低很多,对电路有很好的保护作用,不影响电路的使用效率,同时提高了电路的可靠性。
图8、图9所示的电路结构和图7所示的电路结构虽然有所区别,但其组成的各个电路所实现的功能与图7所示电路结构所实现的功能相同,在此不再对图8、9的电路结构进行详述。
装置实施例
根据本发明的实施例,提供了一种直流电源的浪涌电流抑制电路,图10是本发明实施例的直流电源的浪涌电流抑制电路的结构示意图,如图10所示,根据本发明实施例的直流电源的浪涌电流抑制电路包括:恒流源电路10、电压检测电路12、延时电路14、以及开关单元16,以下对本发明实施例的各个模块进行详细的说明。
恒流源电路10,与储能单元串联,设置为在二次电源接入供电电源后,为储能单元充电;其中,二次电源直接与供电电源连接,或者,二次电源通过开关与供电电源连接。恒流源电路10包括:由半导体、电阻、以及电容组成的恒流源电路10,或者,由集成芯片和运算放大器组成的恒流源电路10;
电压检测电路12,与储能单元并联,设置为检测储能单元中储能电容的电压,并在该电压达到预定电压值后,驱动延时电路14;电压检测电路12包括:电阻、半导体器件、以及运算放大器组成的检查电路。
延时电路14,与储能单元并联,设置为驱动开关单元16缓慢打开,直到完全导通开关单元16;延时电路14设置为:驱动开关单元16的Vgs电压缓慢上升,并在Vgs电压大于开关单元16的开启电压后,完全导通开关单元16。延时电路14包括:电子延时开关;
开关单元16,与储能单元串联,与恒流源电路10并联,设置为在完全导通后将恒流源电路10旁路,并为储能单元进行充电。开关单元16为晶体管。
本发明实施例的上述各个电路可以有多种电路结构,其优选的三种电路结构如图7、8、9所示,可以参照上面实施例的内容进行理解,在此不再赘述。
综上所述,借助于本发明实施例的技术方案,即能够抑制冲击电流,又降低了缓启动开关的开启时的压降,电路实现简单,开关器件容易选型,不影响系统的效率,不受负载电流的影响,使电路工作的可靠性及效率有很大的提高。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
工业实用性
如上所述,通过上述实施例及优选实施方式,能够抑制冲击电流,又降低了缓启动开关的开启时的压降,电路实现简单,开关器件容易选型,不影响系统的效率,不受负载电流的影响,使电路工作的可靠性及效率有很大的提高。

Claims (10)

  1. 一种直流电源的浪涌电流抑制方法,包括:
    二次电源接入供电电源,并通过恒流源电路为储能单元充电;
    电压检测电路在检测到所述储能单元中储能电容的电压达到预定电压值后,驱动延时电路;
    所述延时电路驱动开关单元缓慢打开,直到完全导通所述开关单元;
    所述开关单元将所述恒流源电路旁路,并为所述储能单元进行充电。
  2. 如权利要求1所述的方法,其中,二次电源接入供电电源具体包括:
    所述二次电源直接接入所述供电电源,或者,所述二次电源通过开关的控制接入所述供电电源。
  3. 如权利要求1所述的方法,其中,所述延时电路驱动开关单元缓慢打开,直到完全导通所述开关单元包括:
    所述延时电路驱动所述开关单元的Vgs电压缓慢上升,并在所述Vgs电压大于所述开关单元的开启电压后,完全导通所述开关单元。
  4. 如权利要求1所述的方法,其中,所述延时电路包括:电子延时开关;所述恒流源电路包括:由半导体、电阻、以及电容组成的所述恒流源电路,或者,由集成芯片和运算放大器组成的所述恒流源电路;所述电压检测电路包括:电阻、半导体器件、以及运算放大器组成的检查电路。
  5. 如权利要求1所述的方法,其中,所述开关单元为晶体管。
  6. 一种直流电源的浪涌电流抑制电路,包括:
    恒流源电路,与所述储能单元串联,设置为在二次电源接入供电电源后,为储能单元充电;
    电压检测电路,与所述储能单元并联,设置为检测所述储能单元中储能电容的电压,并在该电压达到预定电压值后,驱动延时电路;
    所述延时电路,与所述储能单元并联,设置为驱动开关单元缓慢打开,直到完全导通所述开关单元;
    所述开关单元,与所述所述储能单元串联,与所述恒流源电路并联,设置为在完全导通后将所述恒流源电路旁路,并为所述储能单元进行充电。
  7. 如权利要求6所述的电路,其中,所述二次电源直接与所述供电电源连接,或者,所述二次电源通过开关与所述供电电源连接。
  8. 如权利要求6所述的电路,其中,所述延时电路设置为:驱动所述开关单元的Vgs电压缓慢上升,并在所述Vgs电压大于所述开关单元的开启电压后,完全导通所述开关单元。
  9. 如权利要求6所述的电路,其中,所述延时电路包括:电子延时开关;所述恒流源电路包括:由半导体、电阻、以及电容组成的所述恒流源电路,或者,由集成芯片和运算放大器组成的所述恒流源电路;所述电压检测电路包括:电阻、半导体器件、以及运算放大器组成的检查电路。
  10. 如权利要求6所述的电路,其中,所述开关单元为晶体管。
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CN116364130A (zh) * 2023-03-29 2023-06-30 珠海妙存科技有限公司 eMMC延时启动电路和方法
FR3157705A1 (fr) * 2023-12-22 2025-06-27 Chloride Circuit de limitation du courant d’appel dans une alimentation a decoupage, etage d’entree, alimentation a decoupage et dispositif de signalisation lumineuse associes

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