WO2015166669A1 - Cigs semiconductor layer, method for manufacturing same, and cigs photoelectric conversion device in which said method is used - Google Patents

Cigs semiconductor layer, method for manufacturing same, and cigs photoelectric conversion device in which said method is used Download PDF

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WO2015166669A1
WO2015166669A1 PCT/JP2015/051321 JP2015051321W WO2015166669A1 WO 2015166669 A1 WO2015166669 A1 WO 2015166669A1 JP 2015051321 W JP2015051321 W JP 2015051321W WO 2015166669 A1 WO2015166669 A1 WO 2015166669A1
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semiconductor layer
layer
cigs
cigs semiconductor
photoelectric conversion
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French (fr)
Japanese (ja)
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由考 椙田
太一 渡邉
誠喜 寺地
和典 河村
洸人 西井
智宏 鞍田
高志 峯元
ジャカパン チャンタナ
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日東電工株式会社
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/58—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0749—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/541—CuInSe2 material PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the CIGS semiconductor layer contains bismuth (Bi) and sodium (Na) in addition to copper (Cu), indium (In), gallium (Ga), and selenium (Se),
  • concentration within a specific range, high photoelectric conversion efficiency can be achieved in the photoelectric conversion device, and an excellent CIGS semiconductor layer, a manufacturing method thereof, and a CIGS photoelectric conversion device using the same About.
  • the thin CIGS solar cell is manufactured by laminating a CIGS semiconductor layer having a thickness of about several ⁇ m on a glass substrate, a stainless steel substrate or the like by vapor deposition or the like, and the thickness of each laminated layer is extremely thin. This has the advantage that less material is used.
  • a CIGS semiconductor layer having a large area can be manufactured at one time, it is possible to realize cost reduction.
  • the CIGS semiconductor layer can be manufactured by a low temperature process of 700 ° C. or lower, the energy required for forming the layer is greatly reduced as compared with a bulk crystal solar cell that requires a temperature of 1500 ° C. or higher. In this respect, the cost can be reduced.
  • thin CIGS solar cells have the advantage of being able to reduce the cost, but have not yet reached a significant market expansion compared to bulk crystal solar cells.
  • the main factor is thought to be that the photoelectric conversion efficiency of the thin CIGS solar cell is lower than that of the bulk crystal solar cell. That is, if the photoelectric conversion efficiency of the solar cell is low, the number of solar cell modules and the installation cost required to cover the power generation capacity increase. Therefore, when viewed comprehensively, it cannot be said that the cost required to use a thin CIGS solar cell is necessarily lower than that of a bulk crystal solar cell. Therefore, increasing the photoelectric conversion efficiency is an important issue for full-scale diffusion of thin CIGS solar cells.
  • a method for increasing the photoelectric conversion efficiency of a thin CIGS solar cell a method for increasing the carrier concentration of each layer is known. That is, in each layer, when the p-type or n-type carrier concentration is increased, an increase in open circuit voltage due to an increase in diffusion potential can be obtained, and photoelectric conversion efficiency can be increased.
  • the p-type carrier concentration of the p-type CIGS semiconductor layer As a technique for increasing the p-type carrier concentration of the p-type CIGS semiconductor layer, it is known to dope Na into the CIGS semiconductor layer. Although there are various doping methods, a method using Na diffusion from the SLG substrate is generally used. The doped Na compensates for Se vacancies in the CIGS semiconductor layer that causes n-type conversion, and suppresses counter-doping due to the vacancies, so that the p property necessary for the p-type CIGS semiconductor layer is maintained, A CIGS semiconductor layer having a higher p-type carrier concentration than that without Na doping can be obtained. However, only by doping with Na, the p property of the p-type CIGS semiconductor layer can be maintained, but the p property cannot be improved, and consequently the photoelectric conversion efficiency of the thin CIGS solar cell cannot be improved.
  • Non-Patent Document 1 a CIGS solar cell in which Bi is further contained in a p-type CIGS semiconductor layer has been proposed (see Non-Patent Document 1).
  • the Mo electrode provided on the SLG substrate, the photoelectric conversion layer including at least one pn junction formed by stacking the n-type conductive CdS layer on the p-type CIGS semiconductor layer, and the photoelectric conversion layer A structure having ZnO which is a window layer provided on the light incident side of the conversion layer, conductive and light-transmitting ZnO: Al, and a Ni / Al electrode provided on the surface facing the Mo electrode
  • the Bi by adding Bi to the p-type CIGS semiconductor layer, the Bi not only compensates for Se vacancies acting as n-type dopants in the p-type CIGS semiconductor layer, but also the Se vacancies themselves. It is said that it functions as a p-type carrier and can increase the p-type carrier density itself of the p-type
  • Non-Patent Document 1 even if Bi is added, growth of crystal grains is suppressed when a thin SiO x layer is formed on the SLG substrate and Na addition into the CIGS semiconductor layer is suppressed. In addition, the metal Bi crystal phase and the BiSe compound crystal phase are precipitated, the crystal quality is deteriorated, and the CIGS solar cell using this CIGS semiconductor layer is rather low in photoelectric conversion efficiency as compared with the case where Bi is not added. It has also been found that In other words, the crystal quality of the CIGS semiconductor layer strongly depends on the Na concentration, whereby the photoelectric conversion efficiency is greatly influenced, and the effect of adding Bi is not sufficiently obtained.
  • the present invention has been made in view of such circumstances, and a CIGS semiconductor layer capable of sufficiently obtaining the addition effect of Bi and achieving high photoelectric conversion efficiency, a manufacturing method thereof, and CIGS photoelectric conversion using the same Providing equipment.
  • the present invention provides a CIGS semiconductor layer containing Cu, In, Ga, and Se, wherein the CIGS semiconductor layer further contains Bi and Na, and the concentration of Bi is 5 ⁇ 10 18 atoms. / cm 3 or more 1 ⁇ 10 19 atoms / cm 3 or less, a first aspect of the CIGS semiconductor layer in which the concentration of Na is set to 5 ⁇ 10 18 atoms / cm 3 or less 1 ⁇ 10 16 atoms / cm 3 or more To do.
  • the base material for forming a CIGS semiconductor layer is prepared, Bi layer which has Bi on the above-mentioned base material, Ga and Se
  • the manufacturing method of the CIGS semiconductor layer which has the heat processing process which heat-processes with respect to a semiconductor layer precursor makes a 2nd summary, a support body, a back surface electrode layer, a CIGS semiconductor layer, a conductive window layer, and a surface electrode layer
  • a CIGS photoelectric conversion device in which the CIGS semiconductor layer is the CIGS semiconductor layer described in the first aspect is a third aspect.
  • the present inventors have repeated research focusing on doping Bi and Na into the CIGS semiconductor layer in order to obtain a thin CIGS solar cell with high photoelectric conversion efficiency.
  • Bi doped at an appropriate concentration compensates for Se vacancies.
  • this Bi functions as a p-type dopant, can increase the p-type carrier density of the CIGS semiconductor layer itself, and suppresses the oxidation of the CIGS grain boundary due to excessive Na. Therefore, it discovered that the photoelectric conversion efficiency of a thin CIGS solar cell improved.
  • the CIGS semiconductor layer of the present invention is a CIGS semiconductor layer containing Cu, In, Ga, and Se, and the CIGS semiconductor layer further contains Bi and Na, and the concentration of Bi is 5 ⁇ 10 18. Atom / cm 3 or more and 1 ⁇ 10 19 atoms / cm 3 or less, and the concentration of Na is set to 1 ⁇ 10 16 atoms / cm 3 or more and 5 ⁇ 10 18 atoms / cm 3 or less.
  • Bi doped at a predetermined concentration compensates Se vacancies, thereby suppressing n-type formation of the CIGS semiconductor layer, and at the same time, Bi can serve as a p-type dopant, and the p-type carrier of the CIGS semiconductor layer The density itself can be increased.
  • the p-type CIGS semiconductor layer can be doped with a small amount of Na, compared to the amount of Na doping (about 3e 18 atoms / cm 3 ), which has been considered effective in the past. The necessary p property can be maintained. For this reason, the oxidation of the CIGS semiconductor layer by excess Na is suppressed, and the crystal quality is good.
  • the CIGS semiconductor layer of the present invention which has no peak corresponding to each of the Bi crystal, BiSe crystal and Bi 4 Se 3 crystal in the X-ray diffraction diagram by the 2 ⁇ - ⁇ method, is CIGS It can be presumed that Bi crystal, BiSe crystal and Bi 4 Se 3 crystal that are out of phase do not exist in the semiconductor layer, and the presence of these does not hinder the traveling of carriers generated in the CIGS semiconductor layer, and has excellent crystal quality. It will not be damaged.
  • a method for producing a CIGS semiconductor layer of the present invention comprising preparing a base material for forming a CIGS semiconductor layer, a Bi layer having Bi on the base material, and a compound having Ga and Se A CIGS semiconductor layer precursor forming step of stacking a layer A, a compound B layer having In and Se, and a compound C layer having Cu and Se to form a CIGS semiconductor layer precursor, and the CIGS semiconductor layer
  • a CIGS semiconductor layer having a heat treatment process for heat-treating a precursor each element is first laminated on a base material as a precursor composition, unlike providing each element as a final target product.
  • a CIGS semiconductor layer precursor is formed, and the CIGS semiconductor layer precursor is heat-treated to grow crystals.
  • the crystals in the layer become homogeneous large grains, and excess Cu (2-x) Se is not taken into the layer. It becomes easy to contain an element with a desired concentration gradient. Therefore, a CIGS semiconductor layer capable of realizing high photoelectric conversion efficiency can be efficiently manufactured in a short time.
  • the support can be made of a material having no conductivity, and the range of material selection can be expanded. it can.
  • the CIGS semiconductor layer is a CIGS semiconductor layer of the present invention.
  • the p-type carrier density itself of the CIGS semiconductor layer is increased and oxidation due to excessive Na is suppressed, high photoelectric conversion efficiency can be realized.
  • the CIGS semiconductor layer of the present invention is used as a light absorption layer in a CIGS photoelectric conversion device and contains not only four elements of Cu, In, Ga and Se, but also Bi and Na, and the concentration of Bi is 5 ⁇ 10 18 atoms / cm 3 or more and 1 ⁇ 10 19 atoms / cm 3 or less, and the concentration of Na is set to be 1 ⁇ 10 16 atoms / cm 3 or more and 5 ⁇ 10 18 atoms / cm 3 or less.
  • the thickness is preferably in the range of 1.0 ⁇ m to 3.0 ⁇ m, and more preferably in the range of 1.5 ⁇ m to 2.5 ⁇ m.
  • the thickness is too thin, the amount of light absorption when used as a light absorption layer is reduced, and the performance of the CIGS photoelectric conversion device tends to be reduced. Conversely, if the thickness is too thick, the time taken to form the CIGS semiconductor layer This is because there is a tendency for productivity to be inferior.
  • the CIGS semiconductor layer preferably has no peak corresponding to Bi crystal, BiSe crystal, or Bi 4 Se 3 crystal in an X-ray diffraction diagram by 2 ⁇ - ⁇ method. This is because Bi crystal, BiSe crystal, and Bi 4 Se 3 crystal are different phases in the CIGS semiconductor layer, and their presence deteriorates the crystal quality, for example, the traveling of carriers generated in the CIGS semiconductor layer is inhibited. .
  • Bi crystal, BiSe crystal and Bi 4 Se 3 crystal are present in the CIGS semiconductor layer.
  • XRD analysis (2 ⁇ - ⁇ method) for example, XRD D8 manufactured by Bruker Co.
  • the Cu / (In + Ga) concentration in the CIGS semiconductor layer is preferably 0.7 or more and 1.30 or less. That is, if the Cu / (In + Ga) concentration is too low, Cu vacancy levels derived from Cu vacancies in the CIGS semiconductor layer become recombination paths in the pn junction and deteriorate the characteristics. On the other hand, if it is too high, there are too few Cu vacancies, which makes it difficult for Group II elements such as Cd to be doped during the formation of the conductive window layer described later. This is because there is a tendency that a good pn junction is not formed.
  • Cu / (In + Ga) concentration of 0.95 to 1.30 copper selenide that does not contribute to photoconversion may be deposited in the CIGS semiconductor layer or on the surface of the layer.
  • copper selenide such as potassium cyanide or an aqueous ammonia solution
  • the ratio of Ga and In which are the same element is in the range of 0.10 ⁇ Ga / (Ga + In) ⁇ 0.40 (molar ratio).
  • the Cu, In, and Ga contents can be measured using, for example, an energy dispersive X-ray fluorescence apparatus (EX-250, manufactured by Horiba, Ltd.).
  • the CIGS photoelectric conversion device of the present invention is characterized in that the CIGS semiconductor layer is used as a light absorption layer.
  • FIG. 1 One embodiment of the CIGS photoelectric conversion device is shown in FIG.
  • This CIGS photoelectric conversion device includes a support 1, a back electrode layer 2, a CIGS semiconductor layer 3, a conductive window layer 4, a surface electrode layer 5, and an extraction electrode 6 in this order.
  • the CIGS semiconductor layer 3 has a Bi concentration of 5 ⁇ 10 18 atoms / cm 3 or more and 1 ⁇ 10 19 atoms / cm 3 or less, and 1 ⁇ 10 16 atoms / cm 3 or more and 5 ⁇ 10 18 atoms / cm 3. It is set to contain Na of the following concentration.
  • FIG. 1 each part is shown typically and is different from actual thickness, size, and the like.
  • the support 1 is appropriately selected from a glass substrate, a metal substrate, a resin substrate, and the like according to the purpose and design requirements.
  • the glass substrate include low alkali glass (high strain point glass) having a very low alkali metal element content, non-alkali glass not containing an alkali metal element, blue plate glass, and the like.
  • SUS, titanium, and the like that are light-transmissive and conductive, borosilicate glass that is light-transmissive and insulating, polyimide, ceramics such as alumina that is light-transmissive and insulating, and the like can be used.
  • the ferrite-based SUS430 is preferably used because it has a support function as a support and high-temperature resistance and can be made flexible by reducing the thickness. it can.
  • a conductive or insulating thin layer is formed on a support formed from the above materials, such as glass with a transparent conductive layer or SUS formed with a thin layer of insulating alumina. Those formed with can also be suitably used.
  • the thickness of the support 1 is not particularly limited as long as it can support the layer laminated thereon and can itself maintain the form of the support, and depends on the material used, but is usually 30 ⁇ m or more and 5 mm. The following are preferably used.
  • addition of Na to the CIGS semiconductor layer 3 is needed separately.
  • the thickness of the support 1 is preferably in the range of 5 ⁇ m to 200 ⁇ m, and more preferably in the range of 10 ⁇ m to 100 ⁇ m. That is, if the thickness is too thick, the flexibility of the CIGS photoelectric conversion device is lost, the stress applied when the CIGS photoelectric conversion device is bent may increase, and the laminated structure such as the CIGS semiconductor layer 3 may be damaged. On the other hand, if it is too thin, the support 1 is buckled when the CIGS photoelectric conversion device is manufactured, and the product defect rate of the CIGS photoelectric conversion device tends to increase.
  • the said support body 1 is suitable for the said support body 1 to have flexibility.
  • a flexible support By using a flexible support, a flexible photoelectric conversion device can be obtained.
  • Such a flexible solar cell is preferable because it can be installed not only on a flat surface but also on a curved surface, and can be one of the features of a product.
  • Examples of the material for forming the back electrode layer 2 formed on the support 1 include molybdenum (Mo), tungsten (W), chromium (Cr), titanium (Ti), and the like. Especially, Mo can be used suitably from the point that adhesiveness with the CIGS semiconductor layer 3 is favorable. And it is formed in single layer or multiple layers by these formation materials.
  • the thickness of the back electrode layer 2 (in the case of multiple layers, the total thickness of each layer) is preferably in the range of 10 ⁇ m to 1000 nm.
  • a barrier layer (not shown) may be provided on the support 1 or the back electrode layer 2 for the purpose of preventing thermal diffusion of impurities derived from the support 1. Examples of the material for forming such a barrier layer include Cr, nickel (Ni), NiCr, cobalt (Co), and the like.
  • the CIGS semiconductor layer 3 formed on the back electrode layer 2 is the CIGS semiconductor layer of the present invention described above, and the description thereof is omitted.
  • the conductive window layer 4 formed on the CIGS semiconductor layer 3 is composed of two layers, a first conductive window layer 4a and a second conductive window layer 4b made of a different material.
  • a high-resistance n-type semiconductor is preferably used so that a pn junction can be formed with the CIGS semiconductor layer 3.
  • the above CdS, ZnO, ZnMgO, Zn (O, S), or the like can be used.
  • the thickness of the conductive window layer 4 is preferably 30 nm or more and 200 nm or less, and even when the conductive window layer 4 is composed of a plurality of layers as in the present embodiment, each thickness is 30 nm.
  • the thickness is preferably 200 nm or more. Note that it is preferable to use a conductive window layer 4 in which a plurality of layers are stacked, because the CIGS semiconductor layer 3 and the pn junction can be made better. However, when the pn junction is sufficiently good, it is not always necessary to provide multiple layers.
  • the surface electrode layer 5 formed on the conductive window layer 4 is located on the light incident side, it is preferable to use a material having as high a light transmittance as possible so as not to disturb the incident light.
  • a material having as high a light transmittance examples include ITO, ZnO, In 2 O 3 , SnO 2 and the like.
  • those containing a small amount of a doping material in these materials are also preferably used.
  • Examples of such doping materials include Al: ZnO (AZO), B: ZnO (BZO), Ga: ZnO (GZO), Sn: In 2 O 3 (ITO), F: SnO 2 (FTO), Zn : In 2 O 3 , Ti: In 2 Oe, Zr: In 2 O 3 , W: In 2 O 3 and the like.
  • the surface electrode layer 5 since the surface electrode layer 5 also serves as a conductive path for taking out carriers generated in the CIGS semiconductor layer 3, it is preferable that the surface electrode layer 5 has high electrical conductivity. From these viewpoints, ITO is particularly preferably used because it has both the property of easily crystallizing at room temperature formation and high electrical conductivity and good light transmission. And it is preferable that the thickness of the said surface electrode layer 5 is 100 nm or more and 2000 nm or less from a viewpoint of light transmittance and electrical conductivity.
  • the extraction electrode 6 formed in the uppermost layer is formed using the same material as that of the back electrode layer 2. However, if the CIGS semiconductor layer 3 (and the conductive window layer 4 and the surface electrode layer 5) are uniformly covered, light does not enter the CIGS semiconductor layer 3 and the photoelectric conversion function does not appear.
  • the shape is preferably a grid shape (pattern shape) that does not cover the surface uniformly, such as a comb shape or a lattice shape.
  • the extraction electrode 6 is affected by resistance loss depending on the magnitude of the current generated by the CIGS semiconductor layer 3, there are appropriate values for thickness and area.
  • the CIGS semiconductor layer 3 used as the light absorption layer has a predetermined concentration of Bi together with a predetermined concentration of Na, Bi compensates for Se vacancies, and the CIGS semiconductor
  • the n-type of the layer is suppressed and Bi works as a p-type dopant and the p-type carrier density itself of the CIGS semiconductor layer is increased, the metal Bi crystal is contained in the CIGS semiconductor layer 3. The phase and the BiSe compound crystal phase are not precipitated.
  • the p-type CIGS semiconductor layer 3 required for the p-type CIGS semiconductor layer 3 can be maintained with a small amount of Na doping compared to the conventional product, and excessive Na This prevents the CIGS semiconductor layer 3 from being oxidized and maintains high crystal quality. Therefore, the CIGS photoelectric conversion apparatus having the above configuration can achieve high photoelectric conversion efficiency.
  • the CIGS semiconductor layer 3 does not have any peaks corresponding to the Bi crystal, BiSe crystal, and Bi 4 Se 3 crystal in the X-ray diffraction diagram by the 2 ⁇ - ⁇ method. It is presumed that no Bi crystal, BiSe crystal and Bi 4 Se 3 crystal are present in the different phases, and the carrier traveling generated in the CIGS semiconductor layer 3 is not hindered by these, and high quality is maintained. Therefore, high photoelectric conversion efficiency can be achieved in the CIGS photoelectric conversion device.
  • the CIGS photoelectric conversion device can be manufactured as follows, for example. That is, first, a long support 1 is prepared, a back electrode layer 2 is formed on its surface, a CIGS semiconductor layer 3 is formed thereon, and this is cut to a predetermined size. On the CIGS semiconductor layer 3, the conductive window layer 4, the surface electrode layer 5, and the extraction electrode 6 can be obtained in this order. Hereafter, this manufacturing method is demonstrated in detail for every formation process of each layer.
  • the back electrode layer 2 is formed on the surface by a sputtering method, a vapor deposition method, an ink jet method, or the like using a forming material such as Mo while running the long support 1 by the roll-to-roll method.
  • the CIGS semiconductor layer 3 is formed on the back electrode layer 2.
  • Examples of a method for forming the CIGS semiconductor layer 3 include a vacuum deposition method, a selenization / sulfurization method, and a sputtering method.
  • a vacuum deposition method a vacuum deposition method
  • a selenization / sulfurization method a sputtering method.
  • the formation process of the CIGS semiconductor layer 3 will be described in more detail.
  • Bi is laminated on the back electrode layer 2 by a vacuum deposition method or the like to form a Bi layer having a predetermined thickness.
  • a compound A layer having Ga and Se, a compound B layer having In and Se, and a compound C layer having Cu and Se are laminated in this order on the Bi layer, and Bi
  • the CIGS semiconductor layer precursor in which the layers and the compound layers (A, B, C) are stacked in a solid state is formed (CIGS semiconductor layer precursor forming step).
  • the thickness of the Bi layer and each compound layer can be controlled by controlling the temperature of each deposition source of Bi, Ga, In, Cu, and Se.
  • the thickness of Bi layer and each compound layer is computable by prior examination.
  • the compound layers (A, B, C) may be laminated not only in one layer but also in two or more layers. Furthermore, the same number of the compound layers may not necessarily be stacked, and the stacking order may not necessarily be in this order.
  • the support 1 on which the CIGS semiconductor layer precursor is formed is heated while supplying a small amount of Se vapor to grow (orient) crystals of the CIGS semiconductor layer precursor (heat treatment step).
  • the CIGS semiconductor layer 3 of this invention can be formed by vapor-depositing NaF etc. as needed.
  • the back electrode layer 2 and the CIGS semiconductor layer 3 are formed by the roll-to-roll method, and the support body 1 wound up in a roll shape is unwound again, and this is removed using a cutting device. Cut for each length to obtain a laminated body (support 1 + back electrode layer 2 + CIGS semiconductor layer 3) of a predetermined size. Then, a first conductive window layer 4a made of CdS is formed on the CIGS semiconductor layer 3 of the stacked body by a solution growth method (CBD method), and further on the first conductive window layer 4a.
  • CBD method solution growth method
  • the conductive window layer 4 composed of the first conductive window layer 4a and the second conductive window layer 4b can be formed.
  • the conductive window layer 4 can be formed by a method other than the CBD method and the sputtering method, and can be formed in any of vacuum, air, and aqueous solution. Examples of such a method include a sputtering method, a molecular beam epitaxy method, an electron beam vapor deposition method, a resistance heating vapor deposition method, a plasma CVD method, and an organic metal vapor deposition method in vacuum. Further, atmospheric pressure plasma method or the like can be used in the atmosphere, and CBD method or electrolytic plating method can be used in the aqueous solution.
  • a surface electrode layer 5 is formed on the conductive window layer 4 by a sputtering method (DC, RF, RF superposition), a vapor deposition method, a metal organic chemical vapor deposition method (MOCVD method), or the like, using a forming material such as ITO. Form.
  • the CIGS photoelectric conversion apparatus of this invention can be obtained by forming the taking-out electrode 6 of grid shape etc. on this surface electrode layer 5 using the method similar to the back surface electrode layer 2.
  • the CIGS semiconductor layer 3 is formed by first comprising a Bi layer having Bi, a compound A layer having Ga and Se, a compound B layer having In and Se, and Cu and Se.
  • a semiconductor layer precursor is formed by laminating the compound C layer having a solid phase state, and the semiconductor layer precursor is heated to grow (orient) crystals in the compound layer. For this reason, the time required for crystal growth (orientation) can be shortened, and the production efficiency can be improved. Since the Bi layer is laminated in a solid state, the Bi content in the CIGS semiconductor layer 3 can be easily controlled by controlling this thickness.
  • the Ga / (In + Ga) ratio in the depth direction can be controlled by controlling the thickness and order of lamination of each compound layer, the number of repetitions of lamination, etc.
  • the double graded structure can be easily formed.
  • Example 1 A SUS substrate (size 20 ⁇ 20 mm, thickness 50 ⁇ m) was prepared as the support 1, and Mo and Cr were laminated on the substrate to form a back electrode layer 2 having a total thickness of 500 nm. A Bi layer having a thickness of 20 nm was formed on the back electrode layer 2 by vapor deposition.
  • Ga and Se were vapor-deposited on Bi layer, the compound A layer which has Ga and Se with a thickness of 600 nm was laminated
  • a semiconductor layer precursor composed of a compound B layer and a compound C layer was formed.
  • the step of forming the semiconductor layer precursor was performed for 120 minutes while maintaining the substrate temperature at 350 ° C.
  • the substrate on which the semiconductor layer precursor is stacked is heated while supplying a small amount of Se vapor, and the substrate temperature is maintained at 600 ° C. for 5 minutes to grow (orient) the crystals of the semiconductor layer precursor.
  • the substrate temperature was set to 450 ° C.
  • NaF was deposited on the semiconductor layer precursor, the substrate temperature was kept at 400 ° C. for 10 minutes, and then the substrate temperature was cooled to 200 ° C. Na concentration shown in FIG.
  • the CIGS semiconductor layer 3 set so that it might become specific Bi density
  • a first conductive window layer 4a made of CdS having a thickness of 50 nm is formed on the CIGS semiconductor layer 3 by a CBD method.
  • a sputtering method is used on the first conductive window layer 4a.
  • the second conductive window layer 4b made of ZnO having a thickness of 70 nm the conductive window layer 4 (thickness 120 nm) made of the first conductive window layer 4a and the second conductive window layer 4b is formed. Formed.
  • a surface electrode layer 5 made of ITO having a thickness of 200 nm and a grid-shaped extraction electrode 6 are formed by sputtering, A CIGS photoelectric conversion device was obtained.
  • Example 2 to 10 The thickness of the Bi layer is set as shown in Table 1, and the holding time at the substrate temperature of 400 ° C. after NaF deposition was adjusted so that the Na concentration in the CIGS semiconductor layer 3 became the concentration shown in Table 1. Similarly, CIGS semiconductor layer 3 and CIGS photoelectric conversion device were obtained.
  • Example 2 A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed and the holding time at a substrate temperature of 400 ° C. after NaF deposition was 3 minutes.
  • Example 5 The CIGS semiconductor layer 3 and CIGS photoelectric were the same as in Example 1, except that the thickness of the Bi layer was 150 nm, the thickness of the compound A layer was 440 nm, the thickness of the compound B layer was 580 nm, and the thickness of the compound C layer was 1000 nm. A conversion device was obtained.
  • Example 7 A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed, the thickness of the compound A layer was 700 nm, and the thickness of the compound B layer was 700 nm.
  • Example 8 A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed, the thickness of the compound A layer was 800 nm, and the thickness of the compound B layer was 600 nm.
  • the open circuit voltage (Voc) and the short circuit current density (Jsc) were calculated according to the following procedure, and are shown in Table 1 below. Further, by obtaining an X-ray diffraction diagram of the CIGS semiconductor layer 3 used for them by the 2 ⁇ - ⁇ method according to the procedure described later, the presence or absence of a peak corresponding to the Bi-derived crystal was examined.
  • Example 1 A, Comparative Example 5: B).
  • the open circuit voltage of Example 1 is higher than the open circuit voltages of Comparative Examples 1 to 4. This is considered to be because the crystal quality is improved because the Na concentration and Bi concentration of the CIGS semiconductor layer 3 used in Example 1 are set to specific concentrations. Moreover, although the open circuit voltage of Example 1 is a high value compared with the open circuit voltage of the comparative example 5, in the CIGS semiconductor layer 3 of the comparative example 5, only the Bi density
  • the CIGS semiconductor layer 3 of Comparative Example 6 although the Bi concentration is within a specific range, Na is excessively contained exceeding the specific range. This is considered to be because the formation method of CIGS semiconductor layer 3 is different from the formation method of Example 1.
  • the CIGS semiconductor layer 3 is formed by a conventional manufacturing method generally called a co-evaporation method. In the co-evaporation method, crystal growth occurs while each element is deposited. As a result, it is considered that new layer deposition seeds fly continuously before sufficient time for crystal growth is obtained, so that the crystal grains are small and there are relatively many crystal grain boundaries per unit volume in the layer. In the subsequent vapor deposition and heat treatment of NaF, Na diffuses into the layer through the crystal grain boundary. Therefore, if there are many crystal grain boundaries, Na easily diffuses and the concentration in the layer also increases. It is considered easy. As a result, the CIGS semiconductor layer 3 of Comparative Example 6 is considered to contain more Na.
  • Examples 1 to 10 when forming the CIGS semiconductor layer 3, a semiconductor layer precursor is formed so as to maintain a relatively low substrate temperature, and the semiconductor layer precursor is heat-treated to grow a crystal. I am letting. In this manufacturing method, since layer deposition and crystal growth are separate steps, crystal growth can be sufficiently performed and relatively large crystal grains can be obtained. As a result, it is considered that there are few crystal grain boundaries per unit volume in the layer. Therefore, in Examples 1 to 10, it is considered that the Na content falls within a predetermined range.
  • the present invention is suitable for manufacturing a photoelectric conversion device excellent in photoelectric conversion efficiency at low cost.

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Abstract

　In order to provide a CIGS semiconductor layer, a method for manufacturing the same, and a CIGS photoelectric conversion device in which the method is used, said layer making it possible to achieve high photoelectric conversion efficiency by being used in the CIGS photoelectric conversion device, a CIGS semiconductor layer (3) has Cu, In, Ga, and Se, wherein the CIGS semiconductor layer (3) further contains Na and Bi, and is configured such that the Bi concentration is 5×1018 atom/cm3-1×1019 atom/cm3 and the Na concentration is 1×1016 atom/cm3-5×1018 atom/cm3.

Description

ＣＩＧＳ半導体層およびその製造方法ならびにそれを用いたＣＩＧＳ光電変換装置CIGS semiconductor layer, manufacturing method thereof, and CIGS photoelectric conversion device using the same
　本発明は、ＣＩＧＳ半導体層を、銅（Ｃｕ）、インジウム（Ｉｎ）、ガリウム（Ｇａ）、セレン（Ｓｅ）以外に、ビスマス（Ｂｉ）、ナトリウム（Ｎａ）を含有させ、その含有量を、それぞれ特定の範囲の濃度に設定することにより、光電変換装置において高い光電変換効率を達成することができるようにしたものであり、優れたＣＩＧＳ半導体層およびその製造方法ならびにそれを用いたＣＩＧＳ光電変換装置に関する。 In the present invention, the CIGS semiconductor layer contains bismuth (Bi) and sodium (Na) in addition to copper (Cu), indium (In), gallium (Ga), and selenium (Se), By setting the concentration within a specific range, high photoelectric conversion efficiency can be achieved in the photoelectric conversion device, and an excellent CIGS semiconductor layer, a manufacturing method thereof, and a CIGS photoelectric conversion device using the same About.
　太陽電池市場の拡大に伴い、低コスト化を実現することができる次世代太陽電池技術として、薄型ＣＩＧＳ太陽電池が注目されている。該薄型ＣＩＧＳ太陽電池は、ガラス基板やステンレス基板等の上に、蒸着法等により、数μｍ程度の厚みのＣＩＧＳ半導体層等を積層することにより製造され、積層される各層の厚みが極めて薄いため、使用する材料が少なくて済む、という利点を有する。しかも、一度に大面積のＣＩＧＳ半導体層を製造することができるため、低コスト化を実現することが可能になる。また、ＣＩＧＳ半導体層は、７００℃以下の低温プロセスで製造可能であるため、１５００℃以上の温度を必要とするバルク結晶系太陽電池と比較して、層形成に必要なエネルギーを大幅に低減することができ、この点からも低コスト化を図ることができる。 With the expansion of the solar cell market, thin CIGS solar cells are attracting attention as next-generation solar cell technology that can realize cost reduction. The thin CIGS solar cell is manufactured by laminating a CIGS semiconductor layer having a thickness of about several μm on a glass substrate, a stainless steel substrate or the like by vapor deposition or the like, and the thickness of each laminated layer is extremely thin. This has the advantage that less material is used. In addition, since a CIGS semiconductor layer having a large area can be manufactured at one time, it is possible to realize cost reduction. In addition, since the CIGS semiconductor layer can be manufactured by a low temperature process of 700 ° C. or lower, the energy required for forming the layer is greatly reduced as compared with a bulk crystal solar cell that requires a temperature of 1500 ° C. or higher. In this respect, the cost can be reduced.
　しかしながら、薄型ＣＩＧＳ太陽電池は、このような低コスト化が可能であるという利点を持ちながら、バルク結晶系太陽電池と比較して大きく市場拡大するには到っていないのが現状である。その主要因は、薄型ＣＩＧＳ太陽電池がバルク結晶系太陽電池と較べて光電変換効率が低いことにあると考えられる。すなわち、太陽電池の光電変換効率が低いと、同発電容量をまかなうために必要な太陽電池モジュール枚数および設置コストが増加するためである。したがって、総合的にみると、薄型ＣＩＧＳ太陽電池を使用するために掛かるコストは、必ずしもバルク結晶系太陽電池より低くなっているとはいえない。したがって、薄型ＣＩＧＳ太陽電池の本格普及のためには光電変換効率を高めることが重要な課題である。 However, thin CIGS solar cells have the advantage of being able to reduce the cost, but have not yet reached a significant market expansion compared to bulk crystal solar cells. The main factor is thought to be that the photoelectric conversion efficiency of the thin CIGS solar cell is lower than that of the bulk crystal solar cell. That is, if the photoelectric conversion efficiency of the solar cell is low, the number of solar cell modules and the installation cost required to cover the power generation capacity increase. Therefore, when viewed comprehensively, it cannot be said that the cost required to use a thin CIGS solar cell is necessarily lower than that of a bulk crystal solar cell. Therefore, increasing the photoelectric conversion efficiency is an important issue for full-scale diffusion of thin CIGS solar cells.
　一方、薄型ＣＩＧＳ太陽電池の光電変換効率を高める手法として、各層のキャリア濃度を高める方法が知られている。すなわち、各層において、ｐ型またはｎ型のキャリア濃度を高めると、拡散電位の増加による開放電圧の増加が得られ、光電変換効率を高めることができる。 On the other hand, as a method for increasing the photoelectric conversion efficiency of a thin CIGS solar cell, a method for increasing the carrier concentration of each layer is known. That is, in each layer, when the p-type or n-type carrier concentration is increased, an increase in open circuit voltage due to an increase in diffusion potential can be obtained, and photoelectric conversion efficiency can be increased.
　ｐ型ＣＩＧＳ半導体層のｐ型キャリア濃度を高める手法としては、ＣＩＧＳ半導体層にＮａのドーピングを行うことが知られている。ドーピングの手法は種々あるが、ＳＬＧ基板からのＮａ拡散を利用する手法が一般的に用いられる。ドープしたＮａは、ｎ型化を引き起こす原因となるＣＩＧＳ半導体層中のＳｅ空孔を補償し、当該空孔によるカウンタードーピングを抑制するため、ｐ型ＣＩＧＳ半導体層にとって必要なｐ性が保たれ、Ｎａのドーピングなしのものに対し、ｐ型キャリア濃度が高いＣＩＧＳ半導体層を得ることができる。しかしながら、Ｎａのドーピングを行うだけでは、ｐ型ＣＩＧＳ半導体層のｐ性を損なわせないことはできても、ｐ性を向上させ、ひいては薄型ＣＩＧＳ太陽電池の光電変換効率を向上させることはできない。 As a technique for increasing the p-type carrier concentration of the p-type CIGS semiconductor layer, it is known to dope Na into the CIGS semiconductor layer. Although there are various doping methods, a method using Na diffusion from the SLG substrate is generally used. The doped Na compensates for Se vacancies in the CIGS semiconductor layer that causes n-type conversion, and suppresses counter-doping due to the vacancies, so that the p property necessary for the p-type CIGS semiconductor layer is maintained, A CIGS semiconductor layer having a higher p-type carrier concentration than that without Na doping can be obtained. However, only by doping with Na, the p property of the p-type CIGS semiconductor layer can be maintained, but the p property cannot be improved, and consequently the photoelectric conversion efficiency of the thin CIGS solar cell cannot be improved.
　このような問題を解決するため、ｐ型ＣＩＧＳ半導体層に、さらにＢｉを含有させたＣＩＧＳ太陽電池が提案されている（非特許文献１参照）。このＣＩＧＳ太陽電池によると、ＳＬＧ基板上に設けられたＭｏ電極と、ｐ型ＣＩＧＳ半導体層にｎ型導電性のＣｄＳ層を積層してなる少なくとも一つのｐｎ接合を含む光電変換層と、その光電変換層の光入射側に備えられた窓層であるＺｎＯと、導電性で、且つ光透過性のＺｎＯ：Ａｌと、そのＭｏ電極と対向する面に備えられたＮｉ／Ａｌ電極とを有する構成において、そのｐ型ＣＩＧＳ半導体層にＢｉを含有させることにより、そのＢｉが、ｐ型ＣＩＧＳ半導体層中においてｎ型ドーパントとして働くＳｅ空孔を補償するだけでなく、それ自体が当該Ｓｅ空孔でｐ型キャリアとして働き、ｐ型ＣＩＧＳ半導体層のｐ型キャリア密度そのものを高めることができるとされる。 In order to solve such a problem, a CIGS solar cell in which Bi is further contained in a p-type CIGS semiconductor layer has been proposed (see Non-Patent Document 1). According to this CIGS solar cell, the Mo electrode provided on the SLG substrate, the photoelectric conversion layer including at least one pn junction formed by stacking the n-type conductive CdS layer on the p-type CIGS semiconductor layer, and the photoelectric conversion layer A structure having ZnO which is a window layer provided on the light incident side of the conversion layer, conductive and light-transmitting ZnO: Al, and a Ni / Al electrode provided on the surface facing the Mo electrode In the present invention, by adding Bi to the p-type CIGS semiconductor layer, the Bi not only compensates for Se vacancies acting as n-type dopants in the p-type CIGS semiconductor layer, but also the Se vacancies themselves. It is said that it functions as a p-type carrier and can increase the p-type carrier density itself of the p-type CIGS semiconductor layer.
　しかしながら、上記非特許文献１では、Ｂｉを添加しているにも関わらず、ＳＬＧ基板上にＳｉＯX薄層を形成しＣＩＧＳ半導体層中へのＮａ添加を抑制すると、結晶粒の成長が抑制されるとともに、金属Ｂｉ結晶相およびＢｉＳｅ化合物結晶相が析出し、結晶品質が低下し、このＣＩＧＳ半導体層を用いたＣＩＧＳ太陽電池は、Ｂｉを添加しないものと比較して、むしろ光電変換効率が低くなることも判明している。すなわち、ＣＩＧＳ半導体層の結晶品質はＮａ濃度に強く依存しており、それによって光電変換効率が大きく左右され、Ｂｉの添加効果が充分に得られていない。 However, in Non-Patent Document 1, even if Bi is added, growth of crystal grains is suppressed when a thin SiO x layer is formed on the SLG substrate and Na addition into the CIGS semiconductor layer is suppressed. In addition, the metal Bi crystal phase and the BiSe compound crystal phase are precipitated, the crystal quality is deteriorated, and the CIGS solar cell using this CIGS semiconductor layer is rather low in photoelectric conversion efficiency as compared with the case where Bi is not added. It has also been found that In other words, the crystal quality of the CIGS semiconductor layer strongly depends on the Na concentration, whereby the photoelectric conversion efficiency is greatly influenced, and the effect of adding Bi is not sufficiently obtained.
　本発明は、このような事情に鑑みなされたもので、Ｂｉの添加効果が充分に得られ、高い光電変換効率を達成することのできるＣＩＧＳ半導体層およびその製造方法ならびにそれを用いたＣＩＧＳ光電変換装置を提供する。 The present invention has been made in view of such circumstances, and a CIGS semiconductor layer capable of sufficiently obtaining the addition effect of Bi and achieving high photoelectric conversion efficiency, a manufacturing method thereof, and CIGS photoelectric conversion using the same Providing equipment.
　上記目的を達成するため、本発明は、Ｃｕ、Ｉｎ、Ｇａ、Ｓｅを有するＣＩＧＳ半導体層であって、上記ＣＩＧＳ半導体層がさらにＢｉおよびＮａを含有し、そのＢｉの濃度が５×１０18原子／ｃｍ3以上１×１０19原子／ｃｍ3以下、Ｎａの濃度が１×１０16原子／ｃｍ3以上５×１０18原子／ｃｍ3以下に設定されているＣＩＧＳ半導体層を第１の要旨とする。 To achieve the above object, the present invention provides a CIGS semiconductor layer containing Cu, In, Ga, and Se, wherein the CIGS semiconductor layer further contains Bi and Na, and the concentration of Bi is 5 × 10 18 atoms. / cm 3 or more 1 × 10 19 atoms / cm 3 or less, a first aspect of the CIGS semiconductor layer in which the concentration of Na is set to 5 × 10 18 atoms / cm 3 or less 1 × 10 16 atoms / cm 3 or more To do.
　そして、第１の要旨のＣＩＧＳ半導体層を製造する方法であって、ＣＩＧＳ半導体層を形成するための母材を準備し、上記母材上に、Ｂｉを有するＢｉ層と、ＧａとＳｅとを有する化合物Ａ層と、ＩｎとＳｅとを有する化合物Ｂ層と、ＣｕとＳｅとを有する化合物Ｃ層とを積層し、ＣＩＧＳ半導体層前駆体を形成するＣＩＧＳ半導体層前駆体形成工程と、上記ＣＩＧＳ半導体層前駆体に対し熱処理を行う熱処理工程とを有するＣＩＧＳ半導体層の製造方法を第２の要旨とし、支持体と、裏面電極層と、ＣＩＧＳ半導体層と、導電性窓層と、表面電極層とを有し、上記ＣＩＧＳ半導体層が、上記第１の要旨に記載のＣＩＧＳ半導体層であるＣＩＧＳ光電変換装置を第３の要旨とする。 And it is the method of manufacturing the CIGS semiconductor layer of the 1st summary, Comprising: The base material for forming a CIGS semiconductor layer is prepared, Bi layer which has Bi on the above-mentioned base material, Ga and Se A CIGS semiconductor layer precursor forming step of forming a CIGS semiconductor layer precursor by stacking a compound B layer having In and Se, a compound B layer having In and Se, and a compound C layer having Cu and Se, and the CIGS The manufacturing method of the CIGS semiconductor layer which has the heat processing process which heat-processes with respect to a semiconductor layer precursor makes a 2nd summary, a support body, a back surface electrode layer, a CIGS semiconductor layer, a conductive window layer, and a surface electrode layer A CIGS photoelectric conversion device in which the CIGS semiconductor layer is the CIGS semiconductor layer described in the first aspect is a third aspect.
　すなわち、本発明者らは、光電変換効率の高い薄型ＣＩＧＳ太陽電池を得るため、ＣＩＧＳ半導体層へのＢｉおよびＮａのドープに着目し、研究を重ねた。その結果、ＣＩＧＳ半導体層に添加するＢｉのドープ量を特定の範囲内に設定するとともに、Ｎａのドープ量を特定の範囲内に設定すると、適正濃度でドープされたＢｉがＳｅ空孔を補償することによって、ｎ型化を抑制すると同時に、このＢｉがｐ型ドーパントとして働き、ＣＩＧＳ半導体層のｐ型キャリア密度そのものを高めることができ、しかも、過剰なＮａによるＣＩＧＳ結晶粒界の酸化を抑制することができるため、薄型ＣＩＧＳ太陽電池の光電変換効率が向上することを見出した。 That is, the present inventors have repeated research focusing on doping Bi and Na into the CIGS semiconductor layer in order to obtain a thin CIGS solar cell with high photoelectric conversion efficiency. As a result, when the doping amount of Bi added to the CIGS semiconductor layer is set within a specific range and the doping amount of Na is set within a specific range, Bi doped at an appropriate concentration compensates for Se vacancies. As a result, it is possible to suppress the formation of n-type, and at the same time, this Bi functions as a p-type dopant, can increase the p-type carrier density of the CIGS semiconductor layer itself, and suppresses the oxidation of the CIGS grain boundary due to excessive Na. Therefore, it discovered that the photoelectric conversion efficiency of a thin CIGS solar cell improved.
　このように、本発明のＣＩＧＳ半導体層は、Ｃｕ、Ｉｎ、Ｇａ、Ｓｅを有するＣＩＧＳ半導体層であって、上記ＣＩＧＳ半導体層がさらにＢｉおよびＮａを含有し、そのＢｉの濃度が５×１０18原子／ｃｍ3以上１×１０19原子／ｃｍ3以下、Ｎａの濃度が１×１０16原子／ｃｍ3以上５×１０18原子／ｃｍ3以下に設定されている。このため、所定濃度でドープされたＢｉがＳｅ空孔を補償することによって、ＣＩＧＳ半導体層のｎ型化を抑制すると同時に、Ｂｉがｐ型ドーパントとして働くことができ、ＣＩＧＳ半導体層のｐ型キャリア密度そのものを高めることができる。また、所定濃度のＢｉと併用することで、従来、効果的であるとされているＮａドープ量（約３ｅ18原子／ｃｍ3）に対し、少ない量のＮａのドープでｐ型ＣＩＧＳ半導体層にとって必要なｐ性を保つことができるようになっている。このため、過剰なＮａによるＣＩＧＳ半導体層の酸化が抑制され、結晶品質のよいものとなっている。 Thus, the CIGS semiconductor layer of the present invention is a CIGS semiconductor layer containing Cu, In, Ga, and Se, and the CIGS semiconductor layer further contains Bi and Na, and the concentration of Bi is 5 × 10 18. Atom / cm 3 or more and 1 × 10 19 atoms / cm 3 or less, and the concentration of Na is set to 1 × 10 16 atoms / cm 3 or more and 5 × 10 18 atoms / cm 3 or less. For this reason, Bi doped at a predetermined concentration compensates Se vacancies, thereby suppressing n-type formation of the CIGS semiconductor layer, and at the same time, Bi can serve as a p-type dopant, and the p-type carrier of the CIGS semiconductor layer The density itself can be increased. In addition, by using together with Bi at a predetermined concentration, the p-type CIGS semiconductor layer can be doped with a small amount of Na, compared to the amount of Na doping (about 3e 18 atoms / cm 3 ), which has been considered effective in the past. The necessary p property can be maintained. For this reason, the oxidation of the CIGS semiconductor layer by excess Na is suppressed, and the crystal quality is good.
　そして、本発明のＣＩＧＳ半導体層であって、その２θ－θ法によるＸ線回折図において、Ｂｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶のそれぞれに対応するピークをいずれも有しないものは、ＣＩＧＳ半導体層中に、異相となるＢｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶が存在しないと推定でき、これらの存在によって、ＣＩＧＳ半導体層において発生したキャリアの走行が阻害されず、優れた結晶品質が損なわれることがない。 The CIGS semiconductor layer of the present invention, which has no peak corresponding to each of the Bi crystal, BiSe crystal and Bi 4 Se 3 crystal in the X-ray diffraction diagram by the 2θ-θ method, is CIGS It can be presumed that Bi crystal, BiSe crystal and Bi 4 Se 3 crystal that are out of phase do not exist in the semiconductor layer, and the presence of these does not hinder the traveling of carriers generated in the CIGS semiconductor layer, and has excellent crystal quality. It will not be damaged.
　また、本発明のＣＩＧＳ半導体層を製造する方法であって、ＣＩＧＳ半導体層を形成するための母材を準備し、上記母材上に、Ｂｉを有するＢｉ層と、ＧａとＳｅとを有する化合物Ａ層と、ＩｎとＳｅとを有する化合物Ｂ層と、ＣｕとＳｅとを有する化合物Ｃ層とを積層し、ＣＩＧＳ半導体層前駆体を形成するＣＩＧＳ半導体層前駆体形成工程と、上記ＣＩＧＳ半導体層前駆体に対し熱処理を行う熱処理工程とを有するＣＩＧＳ半導体層の製造方法によると、各元素を最終目標生成物として提供するのとは異なり、まず、それぞれを前駆体組成として母材上に積層してＣＩＧＳ半導体層前駆体を形成し、そのＣＩＧＳ半導体層前駆体を熱処理して結晶成長させる。この場合、前駆体組成から最終目標組成に至る過程で、層内の結晶が均質な大型粒になるとともに、層内に余剰なＣｕ(2-x)Ｓｅが取り込まれることがなく、しかも、各元素を所望の濃度勾配で含有させることが容易となる。したがって、高い光電変換効率を実現できるＣＩＧＳ半導体層を、短時間で効率よく製造することができる。 Moreover, it is a method for producing a CIGS semiconductor layer of the present invention, comprising preparing a base material for forming a CIGS semiconductor layer, a Bi layer having Bi on the base material, and a compound having Ga and Se A CIGS semiconductor layer precursor forming step of stacking a layer A, a compound B layer having In and Se, and a compound C layer having Cu and Se to form a CIGS semiconductor layer precursor, and the CIGS semiconductor layer According to the manufacturing method of a CIGS semiconductor layer having a heat treatment process for heat-treating a precursor, each element is first laminated on a base material as a precursor composition, unlike providing each element as a final target product. A CIGS semiconductor layer precursor is formed, and the CIGS semiconductor layer precursor is heat-treated to grow crystals. In this case, in the process from the precursor composition to the final target composition, the crystals in the layer become homogeneous large grains, and excess Cu (2-x) Se is not taken into the layer. It becomes easy to contain an element with a desired concentration gradient. Therefore, a CIGS semiconductor layer capable of realizing high photoelectric conversion efficiency can be efficiently manufactured in a short time.
　さらに、上記ＣＩＧＳ半導体層を製造する方法において、母材が、裏面電極層を有するものであると、前記支持体として導電性を有しないものを用いることができ、材料選択の幅を広げることができる。 Furthermore, in the method for producing the CIGS semiconductor layer, if the base material has a back electrode layer, the support can be made of a material having no conductivity, and the range of material selection can be expanded. it can.
　そして、支持体と、裏面電極層と、ＣＩＧＳ半導体層と、導電性窓層と、表面電極層とを有し、上記ＣＩＧＳ半導体層が、本発明のＣＩＧＳ半導体層であるＣＩＧＳ光電変換装置によると、ＣＩＧＳ半導体層のｐ型キャリア密度そのものが高められており、しかも、過剰なＮａによる酸化が抑制されているため、高い光電変換効率を実現することができる。 And according to the CIGS photoelectric conversion apparatus which has a support body, a back surface electrode layer, a CIGS semiconductor layer, a conductive window layer, and a surface electrode layer, the CIGS semiconductor layer is a CIGS semiconductor layer of the present invention. In addition, since the p-type carrier density itself of the CIGS semiconductor layer is increased and oxidation due to excessive Na is suppressed, high photoelectric conversion efficiency can be realized.
ＣＩＧＳ光電変換装置の一例の断面図である。It is sectional drawing of an example of a CIGS photoelectric conversion apparatus. ＣＩＧＳ光電変換装置（実施例１）および従来品（比較例５）のＣＩＧＳ半導体層を２θ－θ法により測定して得られるＸ線回折図である。It is an X-ray diffraction diagram obtained by measuring CIGS semiconductor layers of a CIGS photoelectric conversion device (Example 1) and a conventional product (Comparative Example 5) by the 2θ-θ method.
　つぎに、本発明を実施するための形態について説明する。 Next, a mode for carrying out the present invention will be described.
　本発明のＣＩＧＳ半導体層は、ＣＩＧＳ光電変換装置において、光吸収層として用いられるものであり、Ｃｕ、Ｉｎ、Ｇａ、Ｓｅの４元素だけでなく、ＢｉおよびＮａを含有し、そのＢｉの濃度が５×１０18原子／ｃｍ3以上１×１０19原子／ｃｍ3以下であり、かつＮａの濃度が１×１０16原子／ｃｍ3以上５×１０18原子／ｃｍ3以下となるよう設定されている。そして、その厚みは、１．０μｍ以上３．０μｍ以下の範囲にあることが好ましく、１．５μｍ以上２．５μｍ以下の範囲にあることがより好ましい。厚みが薄すぎると、光吸収層として用いた際の光吸収量が少なくなり、ＣＩＧＳ光電変換装置の性能が低下する傾向がみられ、逆に、厚すぎると、ＣＩＧＳ半導体層の形成にかかる時間が増加し、生産性に劣る傾向がみられるためである。 The CIGS semiconductor layer of the present invention is used as a light absorption layer in a CIGS photoelectric conversion device and contains not only four elements of Cu, In, Ga and Se, but also Bi and Na, and the concentration of Bi is 5 × 10 18 atoms / cm 3 or more and 1 × 10 19 atoms / cm 3 or less, and the concentration of Na is set to be 1 × 10 16 atoms / cm 3 or more and 5 × 10 18 atoms / cm 3 or less. Yes. The thickness is preferably in the range of 1.0 μm to 3.0 μm, and more preferably in the range of 1.5 μm to 2.5 μm. If the thickness is too thin, the amount of light absorption when used as a light absorption layer is reduced, and the performance of the CIGS photoelectric conversion device tends to be reduced. Conversely, if the thickness is too thick, the time taken to form the CIGS semiconductor layer This is because there is a tendency for productivity to be inferior.
　上記ＣＩＧＳ半導体層は、２θ－θ法によるＸ線回折図において、Ｂｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶に対応するピークをいずれも有しないものであることが好ましい。Ｂｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶は、ＣＩＧＳ半導体層においては異相であり、これらが存在すると、ＣＩＧＳ半導体層で発生したキャリアの走行が阻害される等、結晶品質が低下するためである。 The CIGS semiconductor layer preferably has no peak corresponding to Bi crystal, BiSe crystal, or Bi 4 Se 3 crystal in an X-ray diffraction diagram by 2θ-θ method. This is because Bi crystal, BiSe crystal, and Bi 4 Se 3 crystal are different phases in the CIGS semiconductor layer, and their presence deteriorates the crystal quality, for example, the traveling of carriers generated in the CIGS semiconductor layer is inhibited. .
　なお、上記ＣＩＧＳ半導体層中に、Ｂｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶が存在するか否かは、ＸＲＤを用いての分析（２θ－θ法）において、例えば、ブルカー社製のＸＲＤ　Ｄ８　ＤＩＳＣＯＶＥＲ　ｗｉｔｈ　ＧＡＤＴＳの装置を用い、入射角５°固定、ディテクタースキャン３°／ｍｉｎの条件でＣＩＧＳ半導体層を測定し、そのＸ線回折図が、各々に対応するピーク（回折角度２θにおいて、Ｂｉ結晶＝２３°および４６°、ＢｉＳｅ結晶＝４７°、Ｂｉ4Ｓｅ3結晶＝２０°）を有するか否かによって調べることができる。 Whether or not Bi crystal, BiSe crystal and Bi 4 Se 3 crystal are present in the CIGS semiconductor layer is determined by XRD analysis (2θ-θ method), for example, XRD D8 manufactured by Bruker Co. Using a DISCOVER with GADTS apparatus, the CIGS semiconductor layer was measured under the conditions of a fixed incident angle of 5 ° and a detector scan of 3 ° / min, and the X-ray diffractogram showed corresponding peaks (at a diffraction angle of 2θ, a Bi crystal). = 23 ° and 46 °, BiSe crystal = 47 °, Bi 4 Se 3 crystal = 20 °).
　そして、上記ＣＩＧＳ半導体層におけるＣｕ／（Ｉｎ＋Ｇａ）濃度は、０．７以上１．３０以下であることが好ましい。すなわち、Ｃｕ／（Ｉｎ＋Ｇａ）濃度が低すぎると、ＣＩＧＳ半導体層内のＣｕ空孔に由来したＣｕ空孔準位が、ｐｎジャンクション内の再結合パスとなって特性を悪化させるため、ｐ層としての機能を果たせなくなる傾向がみられるためであり、逆に、高すぎると、Ｃｕ空孔が少なすぎることにより、後述する導電性窓層形成中に、Ｃｄ等のII族元素がドープされにくくなり、良好なｐｎ接合が形成されない傾向がみられるためである。なお、Ｃｕ／（Ｉｎ＋Ｇａ）濃度が０．９５から１．３０の範囲においては、ＣＩＧＳ半導体層内やその層表面に、光変換に寄与しないセレン化銅が析出することがあるため、これを除去する目的で、シアン化カリウムやアンモニア水溶液等の銅を穏やかに溶解しうる液体に浸漬させることが好ましい。また、同属元素であるＧａとＩｎとの比は、０．１０＜Ｇａ／（Ｇａ＋Ｉｎ）＜０．４０（モル比）の範囲にあることが好ましい。上記Ｃｕ、Ｉｎ、Ｇａの含有量は、例えば、エネルギー分散型蛍光Ｘ線装置（ＥＸ－２５０、堀場製作所社製）を用いて測定することができる。 The Cu / (In + Ga) concentration in the CIGS semiconductor layer is preferably 0.7 or more and 1.30 or less. That is, if the Cu / (In + Ga) concentration is too low, Cu vacancy levels derived from Cu vacancies in the CIGS semiconductor layer become recombination paths in the pn junction and deteriorate the characteristics. On the other hand, if it is too high, there are too few Cu vacancies, which makes it difficult for Group II elements such as Cd to be doped during the formation of the conductive window layer described later. This is because there is a tendency that a good pn junction is not formed. In addition, in the range of Cu / (In + Ga) concentration of 0.95 to 1.30, copper selenide that does not contribute to photoconversion may be deposited in the CIGS semiconductor layer or on the surface of the layer. For this purpose, it is preferable to immerse copper, such as potassium cyanide or an aqueous ammonia solution, in a liquid that can be dissolved gently. Moreover, it is preferable that the ratio of Ga and In which are the same element is in the range of 0.10 <Ga / (Ga + In) <0.40 (molar ratio). The Cu, In, and Ga contents can be measured using, for example, an energy dispersive X-ray fluorescence apparatus (EX-250, manufactured by Horiba, Ltd.).
　また、本発明のＣＩＧＳ光電変換装置は、上記ＣＩＧＳ半導体層を光吸収層として用いることを特徴とするものである。 Also, the CIGS photoelectric conversion device of the present invention is characterized in that the CIGS semiconductor layer is used as a light absorption layer.
　上記ＣＩＧＳ光電変換装置の一実施の形態を図１に示す。このＣＩＧＳ光電変換装置は、支持体１と、裏面電極層２と、ＣＩＧＳ半導体層３と、導電性窓層４と、表面電極層５と、取り出し電極６とをこの順で備えており、上記ＣＩＧＳ半導体層３が、上記のとおり５×１０18原子／ｃｍ3以上１×１０19原子／ｃｍ3以下の濃度のＢｉと、１×１０16原子／ｃｍ3以上５×１０18原子／ｃｍ3以下の濃度のＮａを含有するように設定されている。以下に、上記各構成を説明するとともに、上記ＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得る方法を詳細に説明する。なお、図１において、各部分は模式的に示したものであり、実際の厚み，大きさ等とは異なっている。 One embodiment of the CIGS photoelectric conversion device is shown in FIG. This CIGS photoelectric conversion device includes a support 1, a back electrode layer 2, a CIGS semiconductor layer 3, a conductive window layer 4, a surface electrode layer 5, and an extraction electrode 6 in this order. As described above, the CIGS semiconductor layer 3 has a Bi concentration of 5 × 10 18 atoms / cm 3 or more and 1 × 10 19 atoms / cm 3 or less, and 1 × 10 16 atoms / cm 3 or more and 5 × 10 18 atoms / cm 3. It is set to contain Na of the following concentration. Below, while explaining each said structure, the method to obtain the said CIGS semiconductor layer 3 and a CIGS photoelectric conversion apparatus is demonstrated in detail. In addition, in FIG. 1, each part is shown typically and is different from actual thickness, size, and the like.
　上記支持体１は、ガラス基板、金属基板、樹脂基板等のなかから、目的や設計上の必要に応じて適宜のものが選択して用いられる。上記ガラス基板としては、アルカリ金属元素の含有量が極めて低い低アルカリガラス（高歪点ガラス）、アルカリ金属元素を含まない無アルカリガラス、青板ガラス等があげられる。また、不透光で導電性を有するＳＵＳ、チタン等、透光で絶縁性を有するホウケイ酸ガラス、ポリイミド等、不透光で絶縁性を有するアルミナ等のセラミック等を用いることができる。ただし、後の熱処理工程での加熱に耐性のある材料を用いることが好ましい。このような材料のなかでも、フェライト系ＳＵＳ４３０は、支持体としての支持機能と、高温耐性とを兼ね備え、厚みを薄くすることで柔軟性を有する支持体とすることができるため、好ましく用いることができる。また、支持体１として、透明導電層付ガラスや、絶縁性を有するアルミナを薄層形成したＳＵＳ等のように、上記材料から形成された支持体の上に導電性または絶縁性を有する薄層が形成されたものも好適に用いることができる。このような支持体１の厚みは、この上に積層される層を支持でき、それ自体が支持体としての形態を保持できるものであればよく、用いる材料にもよるが、通常、３０μｍ以上５ｍｍ以下のものが好適に用いられる。なお、支持体１として、Ｎａを含有しないものを用いる場合には、別途、ＣＩＧＳ半導体層３へのＮａ添加が必要となる。 The support 1 is appropriately selected from a glass substrate, a metal substrate, a resin substrate, and the like according to the purpose and design requirements. Examples of the glass substrate include low alkali glass (high strain point glass) having a very low alkali metal element content, non-alkali glass not containing an alkali metal element, blue plate glass, and the like. Further, SUS, titanium, and the like that are light-transmissive and conductive, borosilicate glass that is light-transmissive and insulating, polyimide, ceramics such as alumina that is light-transmissive and insulating, and the like can be used. However, it is preferable to use a material that is resistant to heating in the subsequent heat treatment step. Among these materials, the ferrite-based SUS430 is preferably used because it has a support function as a support and high-temperature resistance and can be made flexible by reducing the thickness. it can. Further, as the support 1, a conductive or insulating thin layer is formed on a support formed from the above materials, such as glass with a transparent conductive layer or SUS formed with a thin layer of insulating alumina. Those formed with can also be suitably used. The thickness of the support 1 is not particularly limited as long as it can support the layer laminated thereon and can itself maintain the form of the support, and depends on the material used, but is usually 30 μm or more and 5 mm. The following are preferably used. In addition, when using what does not contain Na as the support body 1, addition of Na to the CIGS semiconductor layer 3 is needed separately.
　そして、上記支持体１の厚みは、５μｍ以上２００μｍ以下の範囲にあることが好ましく、より好ましくは１０μｍ以上１００μｍ以下の範囲である。すなわち、厚みが厚すぎると、ＣＩＧＳ光電変換装置の屈曲性が失われ、ＣＩＧＳ光電変換装置を曲げた際にかかる応力が大きくなってＣＩＧＳ半導体層３等の積層構造にダメージを与えるおそれがあり、逆に薄すぎると、ＣＩＧＳ光電変換装置を製造する際に、支持体１が座屈して、ＣＩＧＳ光電変換装置の製品不良率が上昇する傾向がみられるためである。 The thickness of the support 1 is preferably in the range of 5 μm to 200 μm, and more preferably in the range of 10 μm to 100 μm. That is, if the thickness is too thick, the flexibility of the CIGS photoelectric conversion device is lost, the stress applied when the CIGS photoelectric conversion device is bent may increase, and the laminated structure such as the CIGS semiconductor layer 3 may be damaged. On the other hand, if it is too thin, the support 1 is buckled when the CIGS photoelectric conversion device is manufactured, and the product defect rate of the CIGS photoelectric conversion device tends to increase.
　そして、上記支持体１は、可撓性を有することが好適である。可撓性を有する支持体を用いることによって、フレキシブルな光電変換装置を得ることができる。このようなフレキシブル太陽電池は、平面のみならず曲面への設置が可能となり、製品の特徴の一つとすることができるため好ましい。 And it is suitable for the said support body 1 to have flexibility. By using a flexible support, a flexible photoelectric conversion device can be obtained. Such a flexible solar cell is preferable because it can be installed not only on a flat surface but also on a curved surface, and can be one of the features of a product.
　上記支持体１の上に形成される裏面電極層２の形成材料としては、モリブデン（Ｍｏ）、タングステン（Ｗ）、クロム（Ｃｒ）、チタン（Ｔｉ）等があげられる。なかでも、ＣＩＧＳ半導体層３との密着性が良好である点から、Ｍｏを好適に用いることができる。そして、これらの形成材料により、単層もしくは複層に形成されている。 Examples of the material for forming the back electrode layer 2 formed on the support 1 include molybdenum (Mo), tungsten (W), chromium (Cr), titanium (Ti), and the like. Especially, Mo can be used suitably from the point that adhesiveness with the CIGS semiconductor layer 3 is favorable. And it is formed in single layer or multiple layers by these formation materials.
　上記裏面電極層２の厚み（複層の場合は、各層の厚みの合計）は、１０μｍ以上１０００ｎｍ以下の範囲にあることが好ましい。ただし、前記支持体１が導電性を有し、裏面電極層２の機能を有する場合には、この裏面電極層２をあえて設けなくてもよい。また、支持体１由来の不純物の熱拡散防止を目的として、支持体１または裏面電極層２の上にバリア層（図示せず）を設けてもよい。このようなバリア層の形成材料としては、例えばＣｒ、ニッケル（Ｎｉ）、ＮｉＣｒ、コバルト（Ｃｏ）等があげられる。 The thickness of the back electrode layer 2 (in the case of multiple layers, the total thickness of each layer) is preferably in the range of 10 μm to 1000 nm. However, when the support 1 has conductivity and has the function of the back electrode layer 2, the back electrode layer 2 need not be provided. Further, a barrier layer (not shown) may be provided on the support 1 or the back electrode layer 2 for the purpose of preventing thermal diffusion of impurities derived from the support 1. Examples of the material for forming such a barrier layer include Cr, nickel (Ni), NiCr, cobalt (Co), and the like.
　上記裏面電極層２の上に形成されるＣＩＧＳ半導体層３は、先に述べた、本発明のＣＩＧＳ半導体層であり、その説明を省略する。 The CIGS semiconductor layer 3 formed on the back electrode layer 2 is the CIGS semiconductor layer of the present invention described above, and the description thereof is omitted.
　上記ＣＩＧＳ半導体層３の上に形成される導電性窓層４は、第１の導電性窓層４ａと、これと異なる材料からなる第２の導電性窓層４ｂの２層からなっており、上記ＣＩＧＳ半導体層３とｐｎ接合できるよう、高抵抗のｎ型半導体が好ましく用いられる。このような高抵抗のｎ型半導体としては、上記ＣｄＳ、ＺｎＯ、ＺｎＭｇＯ、Ｚｎ（Ｏ，Ｓ）等を用いることができる。また、導電性窓層４の厚みは、３０ｎｍ以上２００ｎｍ以下であることが好ましく、本実施の形態のように、導電性窓層４が複層からなる場合であっても、それぞれの厚みが３０ｎｍ以上２００ｎｍ以下であることが好ましい。なお、導電性窓層４として複数の層を重ねたものを用いると、ＣＩＧＳ半導体層３とｐｎ接合をより良好にすることができるため好ましい。しかし、ｐｎ接合が充分に良好である場合には、必ずしも複層設けなくてもよい。 The conductive window layer 4 formed on the CIGS semiconductor layer 3 is composed of two layers, a first conductive window layer 4a and a second conductive window layer 4b made of a different material. A high-resistance n-type semiconductor is preferably used so that a pn junction can be formed with the CIGS semiconductor layer 3. As such a high-resistance n-type semiconductor, the above CdS, ZnO, ZnMgO, Zn (O, S), or the like can be used. Further, the thickness of the conductive window layer 4 is preferably 30 nm or more and 200 nm or less, and even when the conductive window layer 4 is composed of a plurality of layers as in the present embodiment, each thickness is 30 nm. The thickness is preferably 200 nm or more. Note that it is preferable to use a conductive window layer 4 in which a plurality of layers are stacked, because the CIGS semiconductor layer 3 and the pn junction can be made better. However, when the pn junction is sufficiently good, it is not always necessary to provide multiple layers.
　上記導電性窓層４の上に形成される表面電極層５は、光入射側に位置するため、入射光を妨げないようにできるだけ光の透過率が高い材料を用いることが好ましい。このような材料としては、ＩＴＯ、ＺｎＯ、Ｉｎ2Ｏ3、ＳｎＯ2等があげられる。また、電気伝導性を高める目的で、あるいはバンドアライメントを調整する目的で、これらの材料に少量のドーピング材料を含ませたものも好適に用いられる。このようなドーピング材料としては、例えば、Ａｌ：ＺｎＯ（ＡＺＯ）、Ｂ：ＺｎＯ（ＢＺＯ）、Ｇａ：ＺｎＯ（ＧＺＯ）、Ｓｎ：Ｉｎ2Ｏ3（ＩＴＯ）、Ｆ：ＳｎＯ2（ＦＴＯ）、Ｚｎ：Ｉｎ2Ｏ3、Ｔｉ：Ｉｎ2Ｏｅ、Ｚｒ：Ｉｎ2Ｏ3、Ｗ：Ｉｎ2Ｏ3等があげられる。また、表面電極層５は、ＣＩＧＳ半導体層３で発生するキャリアを取り出すための導電性経路の役割も担っているため、電気伝導性が高いことが好ましい。これらの観点から、とりわけＩＴＯが、室温形成において容易に結晶化し、電気伝導性を高くすることができる性質と、良好な光透過性とを兼ね備えているため、好適に用いられる。そして、上記表面電極層５の厚みは、光透過性および電気伝導性の観点から、１００ｎｍ以上２０００ｎｍ以下であることが好ましい。 Since the surface electrode layer 5 formed on the conductive window layer 4 is located on the light incident side, it is preferable to use a material having as high a light transmittance as possible so as not to disturb the incident light. Examples of such a material include ITO, ZnO, In 2 O 3 , SnO 2 and the like. For the purpose of increasing electrical conductivity or adjusting the band alignment, those containing a small amount of a doping material in these materials are also preferably used. Examples of such doping materials include Al: ZnO (AZO), B: ZnO (BZO), Ga: ZnO (GZO), Sn: In 2 O 3 (ITO), F: SnO 2 (FTO), Zn : In 2 O 3 , Ti: In 2 Oe, Zr: In 2 O 3 , W: In 2 O 3 and the like. Moreover, since the surface electrode layer 5 also serves as a conductive path for taking out carriers generated in the CIGS semiconductor layer 3, it is preferable that the surface electrode layer 5 has high electrical conductivity. From these viewpoints, ITO is particularly preferably used because it has both the property of easily crystallizing at room temperature formation and high electrical conductivity and good light transmission. And it is preferable that the thickness of the said surface electrode layer 5 is 100 nm or more and 2000 nm or less from a viewpoint of light transmittance and electrical conductivity.
　最上層に形成される取り出し電極６は、前記裏面電極層２と同様の材料を用いて形成される。ただし、ＣＩＧＳ半導体層３（および導電性窓層４，表面電極層５）を一様に覆うと、ＣＩＧＳ半導体層３に光が入射せず、光電変換機能を発現しなくなるため、取り出し電極６の形状としては、櫛形，格子状など、表面を一様に覆わないグリッド形状（パターン形状）であることが好ましい。また、上記取り出し電極６は、ＣＩＧＳ半導体層３が発生させる電流の大きさによって抵抗損失の影響があるため、厚みおよび面積の適正値が存在する。 The extraction electrode 6 formed in the uppermost layer is formed using the same material as that of the back electrode layer 2. However, if the CIGS semiconductor layer 3 (and the conductive window layer 4 and the surface electrode layer 5) are uniformly covered, light does not enter the CIGS semiconductor layer 3 and the photoelectric conversion function does not appear. The shape is preferably a grid shape (pattern shape) that does not cover the surface uniformly, such as a comb shape or a lattice shape. Moreover, since the extraction electrode 6 is affected by resistance loss depending on the magnitude of the current generated by the CIGS semiconductor layer 3, there are appropriate values for thickness and area.
　上記構成のＣＩＧＳ光電変換装置によれば、光吸収層として用いられるＣＩＧＳ半導体層３が、所定濃度のＮａとともに所定濃度のＢｉを有しているため、ＢｉがＳｅ空孔を補償し、ＣＩＧＳ半導体層のｎ型化を抑制するとともに、Ｂｉがｐ型ドーパントとして働くようになり、ＣＩＧＳ半導体層のｐ型キャリア密度そのものが高められているにもかかわらず、ＣＩＧＳ半導体層３中に、金属Ｂｉ結晶相およびＢｉＳｅ化合物結晶相が析出することがない。また、所定濃度のＢｉとともに所定濃度のＮａを有しているため、従来品に対し、少ない量のＮａのドープでｐ型ＣＩＧＳ半導体層３にとって必要なｐ性を保つことができ、過剰なＮａによるＣＩＧＳ半導体層３の酸化が抑制され、高い結晶品質を保つことができる。したがって、上記構成のＣＩＧＳ光電変換装置は、高い光電変換効率を達成することができる。 According to the CIGS photoelectric conversion device having the above configuration, since the CIGS semiconductor layer 3 used as the light absorption layer has a predetermined concentration of Bi together with a predetermined concentration of Na, Bi compensates for Se vacancies, and the CIGS semiconductor Although the n-type of the layer is suppressed and Bi works as a p-type dopant and the p-type carrier density itself of the CIGS semiconductor layer is increased, the metal Bi crystal is contained in the CIGS semiconductor layer 3. The phase and the BiSe compound crystal phase are not precipitated. Further, since it has a predetermined concentration of Na together with a predetermined concentration of Bi, the p-type CIGS semiconductor layer 3 required for the p-type CIGS semiconductor layer 3 can be maintained with a small amount of Na doping compared to the conventional product, and excessive Na This prevents the CIGS semiconductor layer 3 from being oxidized and maintains high crystal quality. Therefore, the CIGS photoelectric conversion apparatus having the above configuration can achieve high photoelectric conversion efficiency.
　なかでも、上記ＣＩＧＳ半導体層３が、２θ－θ法によるＸ線回折図において、Ｂｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶に対応するピークをいずれも有しないものは、ＣＩＧＳ半導体層３の結晶中に異相であるＢｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶が存在しないと推定され、ＣＩＧＳ半導体層３において発生したキャリアの走行がこれらに阻害されず、高い品質が保持される。したがって、ＣＩＧＳ光電変換装置において、高い光電変換効率を達成することができる。 In particular, the CIGS semiconductor layer 3 does not have any peaks corresponding to the Bi crystal, BiSe crystal, and Bi 4 Se 3 crystal in the X-ray diffraction diagram by the 2θ-θ method. It is presumed that no Bi crystal, BiSe crystal and Bi 4 Se 3 crystal are present in the different phases, and the carrier traveling generated in the CIGS semiconductor layer 3 is not hindered by these, and high quality is maintained. Therefore, high photoelectric conversion efficiency can be achieved in the CIGS photoelectric conversion device.
　上記ＣＩＧＳ光電変換装置は、例えば、つぎのようにして製造することができる。すなわち、まず、長尺状の支持体１を準備し、その表面に、裏面電極層２を形成し、その上にＣＩＧＳ半導体層３を形成し、これを所定のサイズとなるよう切断した後、上記ＣＩＧＳ半導体層３の上に、導電性窓層４、表面電極層５、取り出し電極６をこの順で積層することによって得ることができる。以下、この製法を、各層の形成工程ごとに詳細に説明する。 The CIGS photoelectric conversion device can be manufactured as follows, for example. That is, first, a long support 1 is prepared, a back electrode layer 2 is formed on its surface, a CIGS semiconductor layer 3 is formed thereon, and this is cut to a predetermined size. On the CIGS semiconductor layer 3, the conductive window layer 4, the surface electrode layer 5, and the extraction electrode 6 can be obtained in this order. Hereafter, this manufacturing method is demonstrated in detail for every formation process of each layer.
〔裏面電極層２の形成工程〕
　ロールトゥロール方式により、長尺状の支持体１を走行させながら、その表面に、Ｍｏ等の形成材料を用いて、スパッタリング法、蒸着法、インクジェット法等により、裏面電極層２を形成する。 [Step of forming back electrode layer 2]
The back electrode layer 2 is formed on the surface by a sputtering method, a vapor deposition method, an ink jet method, or the like using a forming material such as Mo while running the long support 1 by the roll-to-roll method.
〔ＣＩＧＳ半導体層３の形成工程〕
　つぎに、裏面電極層２の上に、ＣＩＧＳ半導体層３を形成する。ＣＩＧＳ半導体層３の形成方法としては、真空蒸着法、セレン化／硫化法、スパッタリング法等があげられる。なお、Ｎａを含有しない支持体１を用いる場合には、ＣＩＧＳ半導体層３の形成前あるいは形成中にＮａを供給することが必要となる。 [Formation process of CIGS semiconductor layer 3]
Next, the CIGS semiconductor layer 3 is formed on the back electrode layer 2. Examples of a method for forming the CIGS semiconductor layer 3 include a vacuum deposition method, a selenization / sulfurization method, and a sputtering method. In addition, when using the support body 1 which does not contain Na, it is necessary to supply Na before or during the formation of the CIGS semiconductor layer 3.
　このＣＩＧＳ半導体層３の形成工程をより詳しく説明すると、まず、上記裏面電極層２の上に、真空蒸着法等によりＢｉを積層し、所定の厚みのＢｉ層を形成する。つぎに、このＢｉ層の上に、ＧａとＳｅとを有する化合物Ａ層と、ＩｎとＳｅとを有する化合物Ｂ層と、ＣｕとＳｅとを有する化合物Ｃ層とをこの順で積層し、Ｂｉ層および化合物層（Ａ，Ｂ，Ｃ）が、固相の状態で積層されたＣＩＧＳ半導体層前駆体を形成する（ＣＩＧＳ半導体層前駆体形成工程）。このとき、Ｂｉ層および各化合物層の厚みは、Ｂｉ、Ｇａ、Ｉｎ、Ｃｕ、Ｓｅの各蒸着源の温度を制御することで、コントロールすることができる。そして、Ｂｉ層および各化合物層の厚みは、事前の検討により算出することができる。また、化合物層（Ａ，Ｂ，Ｃ）は、それぞれ一層だけでなく、２層以上積層するようにしてもよい。さらに、必ずしも、各化合物層が同数ずつ積層されなくてもよく、その積層順も必ずしもこの順でなくてもよい。 The formation process of the CIGS semiconductor layer 3 will be described in more detail. First, Bi is laminated on the back electrode layer 2 by a vacuum deposition method or the like to form a Bi layer having a predetermined thickness. Next, a compound A layer having Ga and Se, a compound B layer having In and Se, and a compound C layer having Cu and Se are laminated in this order on the Bi layer, and Bi The CIGS semiconductor layer precursor in which the layers and the compound layers (A, B, C) are stacked in a solid state is formed (CIGS semiconductor layer precursor forming step). At this time, the thickness of the Bi layer and each compound layer can be controlled by controlling the temperature of each deposition source of Bi, Ga, In, Cu, and Se. And the thickness of Bi layer and each compound layer is computable by prior examination. Further, the compound layers (A, B, C) may be laminated not only in one layer but also in two or more layers. Furthermore, the same number of the compound layers may not necessarily be stacked, and the stacking order may not necessarily be in this order.
　そして、上記ＣＩＧＳ半導体層前駆体が形成された支持体１ごと、微量のＳｅ蒸気を供給しつつ加熱し、ＣＩＧＳ半導体層前駆体の結晶を成長（配向）させる（熱処理工程）。さらに、Ｎａ濃度を調整するため、必要に応じてＮａＦ等を蒸着することにより、本発明のＣＩＧＳ半導体層３を形成することができる。 Then, the support 1 on which the CIGS semiconductor layer precursor is formed is heated while supplying a small amount of Se vapor to grow (orient) crystals of the CIGS semiconductor layer precursor (heat treatment step). Furthermore, in order to adjust Na concentration, the CIGS semiconductor layer 3 of this invention can be formed by vapor-depositing NaF etc. as needed.
〔導電性窓層４の形成工程〕
　つぎに、上記ロールトゥロール方式によって裏面電極層２とＣＩＧＳ半導体層３とが形成され、ロール状に巻き取られた支持体１を、再度巻き出しながら、切断装置を用いて、これを所定の長さごとに切断して、所定サイズの積層体（支持体１＋裏面電極層２＋ＣＩＧＳ半導体層３）を得る。そして、この積層体のＣＩＧＳ半導体層３の上に、溶液成長法（ＣＢＤ法）によりＣｄＳからなる第１の導電性窓層４ａを形成し、さらにこの第１の導電性窓層４ａの上にスパッタリング法により第２の導電性窓層４ｂを形成することにより、第１の導電性窓層４ａと第２の導電性窓層４ｂとからなる導電性窓層４を形成することができる。なお、導電性窓層４は、ＣＢＤ法およびスパッタリング法以外の方法によっても形成することができ、また、真空中、大気中および水溶液中のいずれにおいても形成することができる。このような方法としては、例えば、真空中では、スパッタリング法の他、分子線エピタキシー法、電子線蒸着法、抵抗加熱蒸着法、プラズマＣＶＤ法、有機金属蒸着法等があげられる。また、大気中では、大気圧プラズマ法等が、さらに、水溶液中では、ＣＢＤ法、電解めっき法等があげられる。 [Formation process of conductive window layer 4]
Next, the back electrode layer 2 and the CIGS semiconductor layer 3 are formed by the roll-to-roll method, and the support body 1 wound up in a roll shape is unwound again, and this is removed using a cutting device. Cut for each length to obtain a laminated body (support 1 + back electrode layer 2 + CIGS semiconductor layer 3) of a predetermined size. Then, a first conductive window layer 4a made of CdS is formed on the CIGS semiconductor layer 3 of the stacked body by a solution growth method (CBD method), and further on the first conductive window layer 4a. By forming the second conductive window layer 4b by sputtering, the conductive window layer 4 composed of the first conductive window layer 4a and the second conductive window layer 4b can be formed. The conductive window layer 4 can be formed by a method other than the CBD method and the sputtering method, and can be formed in any of vacuum, air, and aqueous solution. Examples of such a method include a sputtering method, a molecular beam epitaxy method, an electron beam vapor deposition method, a resistance heating vapor deposition method, a plasma CVD method, and an organic metal vapor deposition method in vacuum. Further, atmospheric pressure plasma method or the like can be used in the atmosphere, and CBD method or electrolytic plating method can be used in the aqueous solution.
〔表面電極層５および取り出し電極６の形成工程〕
　上記導電性窓層４の上に、ＩＴＯ等の形成材料を用いて、スパッタリング法（ＤＣ、ＲＦ、ＲＦ重畳）、蒸着法、有機金属気相成長法（ＭＯＣＶＤ法）等により、表面電極層５を形成する。そして、この表面電極層５の上に、グリッド形状等の取り出し電極６を、裏面電極層２と同様の手法を用いて形成することにより、本発明のＣＩＧＳ光電変換装置を得ることができる。 [Formation process of surface electrode layer 5 and extraction electrode 6]
A surface electrode layer 5 is formed on the conductive window layer 4 by a sputtering method (DC, RF, RF superposition), a vapor deposition method, a metal organic chemical vapor deposition method (MOCVD method), or the like, using a forming material such as ITO. Form. And the CIGS photoelectric conversion apparatus of this invention can be obtained by forming the taking-out electrode 6 of grid shape etc. on this surface electrode layer 5 using the method similar to the back surface electrode layer 2. FIG.
　この製造方法によると、ＣＩＧＳ半導体層３の形成を、まず、Ｂｉを有するＢｉ層と、ＧａとＳｅとを有する化合物Ａ層と、ＩｎとＳｅとを有する化合物Ｂ層と、ＣｕとＳｅとを有する化合物Ｃ層とを固相の状態で積層した半導体層前駆体を形成し、この半導体層前駆体を加熱して化合物層内の結晶を成長（配向）させるようにしている。このため、結晶成長（配向）のために必要な時間を短縮することができ、製造の効率化を図ることができる。そして、Ｂｉ層を固相の状態で積層するため、この厚みを制御することで、ＣＩＧＳ半導体層３におけるＢｉ含量を容易にコントロールすることができる。また、各化合物層を固相の状態で積層するため、各化合物層の厚みおよび積層順、積層の繰り返し回数等を制御することにより、深さ方向のＧａ／（Ｉｎ＋Ｇａ）比をコントロールでき、任意のダブルグレーデッド構造を容易に形成することができる。 According to this manufacturing method, the CIGS semiconductor layer 3 is formed by first comprising a Bi layer having Bi, a compound A layer having Ga and Se, a compound B layer having In and Se, and Cu and Se. A semiconductor layer precursor is formed by laminating the compound C layer having a solid phase state, and the semiconductor layer precursor is heated to grow (orient) crystals in the compound layer. For this reason, the time required for crystal growth (orientation) can be shortened, and the production efficiency can be improved. Since the Bi layer is laminated in a solid state, the Bi content in the CIGS semiconductor layer 3 can be easily controlled by controlling this thickness. In addition, since each compound layer is laminated in a solid state, the Ga / (In + Ga) ratio in the depth direction can be controlled by controlling the thickness and order of lamination of each compound layer, the number of repetitions of lamination, etc. The double graded structure can be easily formed.
　つぎに、実施例について、比較例と併せて説明する。ただし、本発明はこれに限定されるものではない。 Next, examples will be described together with comparative examples. However, the present invention is not limited to this.
〔実施例１〕
　支持体１として、ＳＵＳ基板（大きさ２０×２０ｍｍ、厚み５０μｍ）を用意し、この基板上に、ＭｏとＣｒを積層し、総厚み５００ｎｍの裏面電極層２を形成した。この裏面電極層２上に、蒸着により、厚み２０ｎｍのＢｉ層を形成した。そして、基板を３５０℃に保持した状態で、Ｂｉ層上に、ＧａとＳｅとを蒸着し、厚み６００ｎｍのＧａとＳｅとを有する化合物Ａ層を積層し、ついで、この化合物Ａ層上に、ＩｎとＳｅとを蒸着し、厚み８００ｎｍのＩｎとＳｅとを有する化合物Ｂ層を積層し、化合物Ａ層と化合物Ｂ層とを一組積層した。さらに、この化合物Ｂ層上に、ＣｕとＳｅとを蒸着し、厚み１４００ｎｍのＣｕとＳｅとを有する化合物Ｃ層を積層することにより、基板上に、裏面電極層２、Ｂｉ層、化合物Ａ層、化合物Ｂ層、化合物Ｃ層とからなる半導体層前駆体を形成した。この半導体層前駆体を形成する工程は、基板温度を３５０℃に保ちながら１２０分間かけて行った。そして、上記半導体層前駆体が積層された基板を、微量のＳｅ蒸気を供給しつつ加熱し、基板温度が６００℃の状態を５分間保持し、半導体層前駆体の結晶を成長（配向）させ、その後、基板温度を４５０℃にしてこの半導体層前駆体に対しＮａＦを蒸着し、基板温度が４００℃の状態を１０分間保持し、その後、基板温度を２００℃まで冷却したことにより、表１に示すＮａ濃度とした。これにより、特定のＢｉ濃度とＮａ濃度になるよう設定されたＣＩＧＳ半導体層３を得た。 [Example 1]
A SUS substrate (size 20 × 20 mm, thickness 50 μm) was prepared as the support 1, and Mo and Cr were laminated on the substrate to form a back electrode layer 2 having a total thickness of 500 nm. A Bi layer having a thickness of 20 nm was formed on the back electrode layer 2 by vapor deposition. And in the state which hold | maintained the board | substrate at 350 degreeC, Ga and Se were vapor-deposited on Bi layer, the compound A layer which has Ga and Se with a thickness of 600 nm was laminated | stacked, and then on this compound A layer, In and Se were vapor-deposited, a compound B layer having a thickness of 800 nm of In and Se was laminated, and a set of a compound A layer and a compound B layer was laminated. Further, Cu and Se are vapor-deposited on the compound B layer, and a compound C layer having Cu and Se having a thickness of 1400 nm is laminated, whereby the back electrode layer 2, Bi layer, and compound A layer are formed on the substrate. A semiconductor layer precursor composed of a compound B layer and a compound C layer was formed. The step of forming the semiconductor layer precursor was performed for 120 minutes while maintaining the substrate temperature at 350 ° C. Then, the substrate on which the semiconductor layer precursor is stacked is heated while supplying a small amount of Se vapor, and the substrate temperature is maintained at 600 ° C. for 5 minutes to grow (orient) the crystals of the semiconductor layer precursor. Thereafter, the substrate temperature was set to 450 ° C., NaF was deposited on the semiconductor layer precursor, the substrate temperature was kept at 400 ° C. for 10 minutes, and then the substrate temperature was cooled to 200 ° C. Na concentration shown in FIG. Thereby, the CIGS semiconductor layer 3 set so that it might become specific Bi density | concentration and Na density | concentration was obtained.
　つぎに、上記ＣＩＧＳ半導体層３の上に、ＣＢＤ法によって、厚み５０ｎｍのＣｄＳからなる第１の導電性窓層４ａを形成し、この第１の導電性窓層４ａ上に、スパッタリング法により、厚み７０ｎｍのＺｎＯからなる第２の導電性窓層４ｂを形成することにより、第１の導電性窓層４ａと第２の導電性窓層４ｂとからなる導電性窓層４（厚み１２０ｎｍ）を形成した。さらに、この導電性窓層４（第２の導電性窓層４ｂ）上に、スパッタリング法により、厚み２００ｎｍのＩＴＯからなる表面電極層５、および、グリッド形状の取り出し電極６を形成し、目的のＣＩＧＳ光電変換装置を得た。 Next, a first conductive window layer 4a made of CdS having a thickness of 50 nm is formed on the CIGS semiconductor layer 3 by a CBD method. On the first conductive window layer 4a, a sputtering method is used. By forming the second conductive window layer 4b made of ZnO having a thickness of 70 nm, the conductive window layer 4 (thickness 120 nm) made of the first conductive window layer 4a and the second conductive window layer 4b is formed. Formed. Further, on the conductive window layer 4 (second conductive window layer 4b), a surface electrode layer 5 made of ITO having a thickness of 200 nm and a grid-shaped extraction electrode 6 are formed by sputtering, A CIGS photoelectric conversion device was obtained.
〔実施例２～１０〕
　Ｂｉ層の厚みを表１に示すようにし、ＣＩＧＳ半導体層３におけるＮａ濃度が、表１に示す濃度となるようＮａＦ蒸着後の基板温度４００℃の保持時間を調整した以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Examples 2 to 10]
The thickness of the Bi layer is set as shown in Table 1, and the holding time at the substrate temperature of 400 ° C. after NaF deposition was adjusted so that the Na concentration in the CIGS semiconductor layer 3 became the concentration shown in Table 1. Similarly, CIGS semiconductor layer 3 and CIGS photoelectric conversion device were obtained.
〔比較例１〕
　Ｂｉ層を形成しなかった以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 1]
A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed.
〔比較例２〕
　Ｂｉ層を形成せず、ＮａＦ蒸着後の基板温度４００℃の状態の保持時間を３分間とした以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 2]
A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed and the holding time at a substrate temperature of 400 ° C. after NaF deposition was 3 minutes.
〔比較例３〕
　ＮａＦ蒸着後の基板温度４００℃の状態の保持時間を３分間としたこと以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 3]
The CIGS semiconductor layer 3 and the CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the holding time at the substrate temperature of 400 ° C. after NaF deposition was 3 minutes.
〔比較例４〕
　Ｂｉ層の厚みを１３０ｎｍとした以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 4]
A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the thickness of the Bi layer was 130 nm.
〔比較例５〕
　Ｂｉ層の厚みを１５０ｎｍとし、化合物Ａ層の厚みを４４０ｎｍ、化合物Ｂ層の厚みを５８０ｎｍ、化合物Ｃ層の厚みを１０００ｎｍとした以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 5]
The CIGS semiconductor layer 3 and CIGS photoelectric were the same as in Example 1, except that the thickness of the Bi layer was 150 nm, the thickness of the compound A layer was 440 nm, the thickness of the compound B layer was 580 nm, and the thickness of the compound C layer was 1000 nm. A conversion device was obtained.
〔比較例６〕
　Ｂｉ層を２０ｎｍの厚みに形成したものの、Ｃｕ、Ｉｎ、Ｇａ、Ｓｅを、半導体層前駆体を形成せずに、基板を５５０℃に保持した状態で、上記Ｂｉ層の上に、Ｓｅ雰囲気下にて、Ｃｕ、Ｉｎ、Ｇａを蒸着した以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 6]
Although the Bi layer was formed to a thickness of 20 nm, Cu, In, Ga, and Se were not formed on the semiconductor layer precursor, and the substrate was held at 550 ° C. The CIGS semiconductor layer 3 and the CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that Cu, In, and Ga were vapor-deposited.
〔比較例７〕
　Ｂｉ層を形成せず、化合物Ａ層の厚みを７００ｎｍ、化合物Ｂ層の厚みを７００ｎｍとした以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 7]
A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed, the thickness of the compound A layer was 700 nm, and the thickness of the compound B layer was 700 nm.
〔比較例８〕
　Ｂｉ層を形成せず、化合物Ａ層の厚みを８００ｎｍ、化合物Ｂ層の厚みを６００ｎｍとした以外は、実施例１と同様にしてＣＩＧＳ半導体層３およびＣＩＧＳ光電変換装置を得た。 [Comparative Example 8]
A CIGS semiconductor layer 3 and a CIGS photoelectric conversion device were obtained in the same manner as in Example 1 except that the Bi layer was not formed, the thickness of the compound A layer was 800 nm, and the thickness of the compound B layer was 600 nm.
　上記実施例１～１０および比較例１～８のＣＩＧＳ光電変換装置について、開放電圧（Ｖｏｃ）および短絡電流密度（Ｊｓｃ）を下記の手順に従って算出し、後記の表１に示した。また、それらに用いたＣＩＧＳ半導体層３の２θ－θ法によるＸ線回折図を後記の手順に従って得ることにより、Ｂｉ由来結晶に対応するピークの有無の検討を行った。 For the CIGS photoelectric conversion devices of Examples 1 to 10 and Comparative Examples 1 to 8, the open circuit voltage (Voc) and the short circuit current density (Jsc) were calculated according to the following procedure, and are shown in Table 1 below. Further, by obtaining an X-ray diffraction diagram of the CIGS semiconductor layer 3 used for them by the 2θ-θ method according to the procedure described later, the presence or absence of a peak corresponding to the Bi-derived crystal was examined.
〔開放電圧および短絡電流密度〕
　各ＣＩＧＳ光電変換装置について、入射光１００ｍＷ／ｃｍ2のＡＭ１．５擬似太陽光の条件で、電流電圧測定装置を用いて、ＤＣ電圧を４０ｍＶ／ｓｅｃで走査しながら出力電流値を計測し、セル面積１ｃｍ2あたりの電流－電圧特性を得た。これに基づいて、開放電圧（Ｖｏｃ）、短絡電流密度（Ｊｓｃ）を算出した。結果を表１に示す。 [Open circuit voltage and short circuit current density]
For each CIGS photoelectric conversion device, an output current value is measured while scanning a DC voltage at 40 mV / sec using a current-voltage measuring device under the condition of AM1.5 simulated sunlight with an incident light of 100 mW / cm 2 , and a cell Current-voltage characteristics per 1 cm 2 area were obtained. Based on this, an open circuit voltage (Voc) and a short circuit current density (Jsc) were calculated. The results are shown in Table 1.
〔Ｂｉ由来結晶に対応するピーク〕
　実施例および比較例に用いたＣＩＧＳ半導体層３に対し、ブルカー社製のＸＲＤ　Ｄ８　ＤＩＳＣＯＶＥＲ　ｗｉｔｈ　ＧＡＤＴＳの装置を用い、入射角５°固定、ディテクタースキャン３°／ｍｉｎの条件でＸ線を入射し、そのＸ線回折を測定した。そして、回折角２θが２０°付近で検出されるピークをＢｉ4Ｓｅ3結晶と、同じく２３°および４６°付近で検出されるピークをＢｉ結晶と、同じく４７°付近で検出されるピークをＢｉＳｅ結晶と同定し、これらのピークが現れたものをＢｉ由来結晶に対応するピークが有るものとし、現れなかったものを同ピークが無いものと評価した。なお、実施例１および比較例５のＣＩＧＳ半導体層３について、得られたＸ線回折図を図２（実施例１：Ａ、比較例５：Ｂ）に示す。 [Peak corresponding to Bi-derived crystal]
For the CIGS semiconductor layer 3 used in Examples and Comparative Examples, an XRD D8 DISCOVER with GADTS device manufactured by Bruker is used, and an X-ray is incident under conditions of an incident angle of 5 ° fixed and a detector scan of 3 ° / min. The X-ray diffraction was measured. A peak detected when the diffraction angle 2θ is around 20 ° is a Bi 4 Se 3 crystal, a peak detected at around 23 ° and 46 ° is a Bi crystal, and a peak detected at around 47 ° is a BiSe. A crystal was identified, and those having these peaks were regarded as having a peak corresponding to the Bi-derived crystal, and those not appearing were evaluated as having no peak. In addition, about the CIGS semiconductor layer 3 of Example 1 and Comparative Example 5, the acquired X-ray-diffraction figure is shown in FIG. 2 (Example 1: A, Comparative Example 5: B).
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　上記の結果より、ＣＩＧＳ半導体層３において、Ｂｉ濃度とＮａ濃度との双方がそれぞれ範囲内に設定されている実施例１～１０は、開放電圧（Ｖｏｃ）と短絡電流密度（Ｊｓｃ）がともに優れていることがわかった。これらに対し、Ｂｉ濃度とＮａ濃度のいずれか（あるいは両方）が範囲内に設定されていない比較例１～８は、開放電圧（Ｖｏｃ）と短絡電流密度（Ｊｓｃ）の少なくとも一方が劣り、従来品と大差ないものであることがわかった。 From the above results, in Examples 1 to 10 in which both the Bi concentration and the Na concentration are set within the ranges in the CIGS semiconductor layer 3, both the open circuit voltage (Voc) and the short circuit current density (Jsc) are excellent. I found out. On the other hand, Comparative Examples 1 to 8 in which either (or both) of the Bi concentration and Na concentration are not set within the range, the at least one of the open circuit voltage (Voc) and the short circuit current density (Jsc) is inferior. It was found that it was not much different from the product.
　この結果をより詳しく考察すると、実施例１の開放電圧は、比較例１～４の開放電圧と比較して高い値となっていることがわかる。これは、実施例１に用いたＣＩＧＳ半導体層３のＮａ濃度とＢｉ濃度を特定の濃度に設定したため、結晶品質に優れるようになったためであると考えられる。また、実施例１の開放電圧は、比較例５の開放電圧と比較しても高い値となっているが、比較例５のＣＩＧＳ半導体層３では、Ｂｉ濃度が設定よりも高くなっているだけでなく、金属Ｂｉ、ＢｉＳｅ、およびＢｉ4Ｓｅ3化合物の結晶相の存在がＸＲＤ回折図から確認でき、発生したキャリアの走行がこれらに阻害されたためであると考えられる。すなわち、比較例５ではＣＩＧＳ半導体層３が薄いために、Ｓｅ空孔の総量が少なく、また、Ｂｉ層が厚いために、余剰Ｂｉが発生し、当該余剰Ｂｉが金属Ｂｉ、ＢｉＳｅ、およびＢｉ4Ｓｅ3化合物を形成したためであると考えられる。 Considering this result in more detail, it can be seen that the open circuit voltage of Example 1 is higher than the open circuit voltages of Comparative Examples 1 to 4. This is considered to be because the crystal quality is improved because the Na concentration and Bi concentration of the CIGS semiconductor layer 3 used in Example 1 are set to specific concentrations. Moreover, although the open circuit voltage of Example 1 is a high value compared with the open circuit voltage of the comparative example 5, in the CIGS semiconductor layer 3 of the comparative example 5, only the Bi density | concentration is higher than setting. In addition, the existence of the crystal phases of the metal Bi, BiSe, and Bi 4 Se 3 compounds can be confirmed from the XRD diffractogram, which is considered to be because the traveling of the generated carriers was inhibited by these. That is, in the comparative example 5, since the CIGS semiconductor layer 3 is thin, the total amount of Se vacancies is small, and since the Bi layer is thick, surplus Bi is generated, and the surplus Bi is generated from the metals Bi, BiSe, and Bi 4. This is probably because the Se 3 compound was formed.
　比較例６のＣＩＧＳ半導体層３は、Ｂｉ濃度は特定の範囲内であるものの、Ｎａが特定の範囲を超えて過剰に含まれている。これは、ＣＩＧＳ半導体層３の形成方法が実施例１の形成方法と異なることに起因すると考えられる。比較例６では、一般的に共蒸着法と呼ばれる従来の製造方法によってＣＩＧＳ半導体層３を形成している。共蒸着法では、各元素を蒸着させながら結晶成長が起こるようにしている。その結果、結晶成長の時間が充分とれないうちに新たな層堆積種が継続的に飛来するため、結晶粒が小さく、層中単位体積当たりの結晶粒界が比較的多いと考えられる。そして、引き続き行われるＮａＦの蒸着および熱処理においては、Ｎａはこの結晶粒界を通って層中に拡散していくため、結晶粒界が多いと、Ｎａが拡散しやすく、層中濃度も高くなりやすいと考えられる。この結果、比較例６のＣＩＧＳ半導体層３は、より多くのＮａを含むようになると考えられる。 In the CIGS semiconductor layer 3 of Comparative Example 6, although the Bi concentration is within a specific range, Na is excessively contained exceeding the specific range. This is considered to be because the formation method of CIGS semiconductor layer 3 is different from the formation method of Example 1. In Comparative Example 6, the CIGS semiconductor layer 3 is formed by a conventional manufacturing method generally called a co-evaporation method. In the co-evaporation method, crystal growth occurs while each element is deposited. As a result, it is considered that new layer deposition seeds fly continuously before sufficient time for crystal growth is obtained, so that the crystal grains are small and there are relatively many crystal grain boundaries per unit volume in the layer. In the subsequent vapor deposition and heat treatment of NaF, Na diffuses into the layer through the crystal grain boundary. Therefore, if there are many crystal grain boundaries, Na easily diffuses and the concentration in the layer also increases. It is considered easy. As a result, the CIGS semiconductor layer 3 of Comparative Example 6 is considered to contain more Na.
　これに対し、実施例１～１０では、ＣＩＧＳ半導体層３の形成に際し、比較的低い基板温度を保つようにして半導体層前駆体を形成し、この半導体層前駆体に対し熱処理を行い結晶を成長させている。この製造方法では、層堆積と結晶成長を別工程としているので、結晶成長を充分に行うことができ、比較的大きな結晶粒が得られる。その結果、層中単位体積当たりの結晶粒界は少ないと考えられる。このため、実施例１～１０ではＮａ含有量が所定の範囲内のものになると考えられる。 On the other hand, in Examples 1 to 10, when forming the CIGS semiconductor layer 3, a semiconductor layer precursor is formed so as to maintain a relatively low substrate temperature, and the semiconductor layer precursor is heat-treated to grow a crystal. I am letting. In this manufacturing method, since layer deposition and crystal growth are separate steps, crystal growth can be sufficiently performed and relatively large crystal grains can be obtained. As a result, it is considered that there are few crystal grain boundaries per unit volume in the layer. Therefore, in Examples 1 to 10, it is considered that the Na content falls within a predetermined range.
　比較例７および８の光電変換装置では、実施例品に相当する高いレベルの開放電圧が得られている一方で、短絡電流密度はそれほど高くないことが示されている。これは、比較例７および８では、Ｇｅ濃度をより高めたため、ＣＩＧＳ半導体層３のバンドギャップが大きくなったことによるものであると考えられる。すなわち、バンドギャップが大きいためにビルトインポテンシャルが上がり、開放電圧が高まる効果が得られる反面、長波長側の光を吸収できなくなり、短絡電流密度の損失も発生していると考えられる。したがって、比較例７や８のような、従来技術による開放電圧を向上させる方法では、結果として光電変換効率の向上には至らないことがわかった。 In the photoelectric conversion devices of Comparative Examples 7 and 8, a high level of open-circuit voltage equivalent to that of the example product is obtained, while the short-circuit current density is not so high. This is probably because the band gap of the CIGS semiconductor layer 3 was increased in Comparative Examples 7 and 8 because the Ge concentration was further increased. That is, since the built-in potential is increased due to the large band gap and the effect of increasing the open circuit voltage is obtained, it is considered that light on the long wavelength side cannot be absorbed and a short circuit current density is also lost. Therefore, it has been found that the methods for improving the open-circuit voltage according to the prior art as in Comparative Examples 7 and 8 do not result in an improvement in photoelectric conversion efficiency.
　上記実施例においては、本発明における具体的な形態について示したが、上記実施例は単なる例示にすぎず、限定的に解釈されるものではない。当業者に明らかな様々な変形は、本発明の範囲内であることが企図されている。 In the above embodiments, specific forms in the present invention have been described. However, the above embodiments are merely examples and are not construed as limiting. Various modifications apparent to those skilled in the art are contemplated to be within the scope of this invention.
　本発明は、光電変換効率に優れる光電変換装置を低コストで製造するのに適している。 The present invention is suitable for manufacturing a photoelectric conversion device excellent in photoelectric conversion efficiency at low cost.
　１　　　支持体
　２　　　裏面電極層
　３　　　ＣＩＧＳ半導体層
　４　　　導電性窓層
　４ａ　　第１の導電性窓層
　４ｂ　　第２の導電性窓層
　５　　　表面電極層  DESCRIPTION OF SYMBOLS 1 Support body 2 Back surface electrode layer 3 CIGS semiconductor layer 4 Conductive window layer 4a 1st conductive window layer 4b 2nd conductive window layer 5 Surface electrode layer

Claims (5)

  1. 　Ｃｕ、Ｉｎ、Ｇａ、Ｓｅを有するＣＩＧＳ半導体層であって、上記ＣＩＧＳ半導体層がさらにＢｉおよびＮａを含有し、そのＢｉの濃度が５×１０18原子／ｃｍ3以上１×１０19原子／ｃｍ3以下、Ｎａの濃度が１×１０16原子／ｃｍ3以上５×１０18原子／ｃｍ3以下に設定されていることを特徴とするＣＩＧＳ半導体層。 A CIGS semiconductor layer containing Cu, In, Ga, and Se, wherein the CIGS semiconductor layer further contains Bi and Na, and the concentration of Bi is 5 × 10 18 atoms / cm 3 or more and 1 × 10 19 atoms / cm 3. A CIGS semiconductor layer, wherein the concentration of Na is set to 1 × 10 16 atoms / cm 3 or more and 5 × 10 18 atoms / cm 3 or less.
  2. 　請求項１記載のＣＩＧＳ半導体層であって、その２θ－θ法によるＸ線回折図において、Ｂｉ結晶、ＢｉＳｅ結晶およびＢｉ4Ｓｅ3結晶のそれぞれに対応するピークをいずれも有しない請求項１記載のＣＩＧＳ半導体層。 2. The CIGS semiconductor layer according to claim 1, wherein in the X-ray diffraction diagram by the 2θ-θ method, none of the peaks corresponding to each of the Bi crystal, BiSe crystal and Bi 4 Se 3 crystal is present. CIGS semiconductor layer.
  3. 　請求項１または２記載のＣＩＧＳ半導体層を製造する方法であって、上記ＣＩＧＳ半導体層を形成するための母材を準備し、上記母材上に、Ｂｉを有するＢｉ層と、ＧａとＳｅとを有する化合物Ａ層と、ＩｎとＳｅとを有する化合物Ｂ層と、ＣｕとＳｅとを有する化合物Ｃ層とを積層し、ＣＩＧＳ半導体層前駆体を形成するＣＩＧＳ半導体層前駆体形成工程と、上記ＣＩＧＳ半導体層前駆体に対し熱処理を行う熱処理工程とを有することを特徴とするＣＩＧＳ半導体層の製造方法。 A method for manufacturing a CIGS semiconductor layer according to claim 1, wherein a base material for forming the CIGS semiconductor layer is prepared, a Bi layer having Bi on the base material, Ga and Se, and A CIGS semiconductor layer precursor forming step of laminating a compound A layer having NO, a compound B layer having In and Se, and a compound C layer having Cu and Se to form a CIGS semiconductor layer precursor; A method for producing a CIGS semiconductor layer, comprising: a heat treatment step of performing heat treatment on the CIGS semiconductor layer precursor.
  4. 　上記母材が、裏面電極層を有するものである請求項３記載のＣＩＧＳ半導体層の製造方法。 The method for producing a CIGS semiconductor layer according to claim 3, wherein the base material has a back electrode layer.
  5. 　支持体と、裏面電極層と、ＣＩＧＳ半導体層と、導電性窓層と、表面電極層とを有し、上記ＣＩＧＳ半導体層が、請求項１または２記載のＣＩＧＳ半導体層であることを特徴するＣＩＧＳ光電変換装置。 It has a support body, a back surface electrode layer, a CIGS semiconductor layer, a conductive window layer, and a surface electrode layer, and the CIGS semiconductor layer is the CIGS semiconductor layer according to claim 1 or 2. CIGS photoelectric conversion device.
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