WO2015160093A3 - 메모리 소자 - Google Patents
메모리 소자 Download PDFInfo
- Publication number
- WO2015160093A3 WO2015160093A3 PCT/KR2015/002607 KR2015002607W WO2015160093A3 WO 2015160093 A3 WO2015160093 A3 WO 2015160093A3 KR 2015002607 W KR2015002607 W KR 2015002607W WO 2015160093 A3 WO2015160093 A3 WO 2015160093A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- memory element
- tunnel junction
- lower electrode
- magnetic tunnel
- Prior art date
Links
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/26—Thin magnetic films, e.g. of one-domain structure characterised by the substrate or intermediate layers
- H01F10/30—Thin magnetic films, e.g. of one-domain structure characterised by the substrate or intermediate layers characterised by the composition of the intermediate layers, e.g. seed, buffer, template, diffusion preventing, cap layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3254—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]
- H01F10/3259—Spin-exchange-coupled multilayers comprising at least a nanooxide layer [NOL], e.g. with a NOL spacer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3286—Spin-exchange coupled multilayers having at least one layer with perpendicular magnetic anisotropy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/329—Spin-exchange coupled multilayers wherein the magnetisation of the free layer is switched by a spin-polarised current, e.g. spin torque effect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3295—Spin-exchange coupled multilayers wherein the magnetic pinned or free layers are laminated without anti-parallel coupling within the pinned and free layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/14—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
- H01F41/30—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE]
- H01F41/302—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE] for applying spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F41/305—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE] for applying spin-exchange-coupled multilayers, e.g. nanostructured superlattices applying the spacer or adjusting its interface, e.g. in order to enable particular effect different from exchange coupling
- H01F41/307—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE] for applying spin-exchange-coupled multilayers, e.g. nanostructured superlattices applying the spacer or adjusting its interface, e.g. in order to enable particular effect different from exchange coupling insulating or semiconductive spacer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/32—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying conductive, insulating or magnetic material on a magnetic film, specially adapted for a thin magnetic film
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/10—Magnetoresistive devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
- H10N50/85—Magnetic active materials
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Hall/Mr Elements (AREA)
- Mram Or Spin Memory Techniques (AREA)
Abstract
본 발명은 기판 상에 하부 전극, 버퍼층, 시드층, 자기 터널 접합, 캐핑층, 합성 교환 반자성층 및 상부 전극이 적층 형성되고, 하부 전극 및 시드층은 다결정의 도전 물질로 형성되며, 400℃ 이상의 열처리 온도에서도 자기 터널 접합의 수직 자기 이방성이 유지되는 메모리 소자를 제시한다.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/094,253 US10516097B2 (en) | 2014-04-18 | 2015-03-18 | Memory device |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2014-0046563 | 2014-04-18 | ||
KR1020140046563 | 2014-04-18 | ||
KR1020140102419A KR101549625B1 (ko) | 2014-04-18 | 2014-08-08 | 메모리 소자 |
KR10-2014-0102419 | 2014-08-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2015160093A2 WO2015160093A2 (ko) | 2015-10-22 |
WO2015160093A3 true WO2015160093A3 (ko) | 2017-05-18 |
Family
ID=54324674
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/KR2015/002607 WO2015160093A2 (ko) | 2014-04-18 | 2015-03-18 | 메모리 소자 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10516097B2 (ko) |
KR (1) | KR101549625B1 (ko) |
WO (1) | WO2015160093A2 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101537715B1 (ko) * | 2014-04-18 | 2015-07-21 | 한양대학교 산학협력단 | 메모리 소자 |
KR102458921B1 (ko) | 2016-03-10 | 2022-10-25 | 삼성전자주식회사 | 메모리 소자 제조 방법 |
KR102169622B1 (ko) * | 2018-01-17 | 2020-10-26 | 한양대학교 산학협력단 | 메모리 소자 |
US10475987B1 (en) * | 2018-05-01 | 2019-11-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for fabricating a magnetic tunneling junction (MTJ) structure |
CN110098318B (zh) * | 2019-05-10 | 2020-11-03 | 北京航空航天大学 | 具有界面垂直磁各向异性的多膜层结构及磁随机存储器 |
EP3800643A1 (en) * | 2019-10-02 | 2021-04-07 | Imec VZW | Magnetic device with a hybrid free layer stack |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20060011732A (ko) * | 2004-07-31 | 2006-02-03 | 삼성전자주식회사 | 스핀차지를 이용한 자성막 구조체와 그 제조 방법과 그를구비하는 반도체 장치 및 이 장치의 동작방법 |
US20090073748A1 (en) * | 2007-09-17 | 2009-03-19 | Ulrich Klostermann | Integrated Circuits; Methods for Operating an Integrating Circuit; Memory Modules |
KR20110042657A (ko) * | 2009-10-19 | 2011-04-27 | 한국과학기술연구원 | 수직 자화 자성층을 갖는 자기 터널 접합 구조 |
US20130221460A1 (en) * | 2012-02-29 | 2013-08-29 | Headway Technologies, Inc. | Engineered Magnetic Layer with Improved Perpendicular Anisotropy using Glassing Agents for Spintronic Applications |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100737920B1 (ko) * | 2006-02-08 | 2007-07-10 | 삼성전자주식회사 | 반도체 소자 및 그 형성 방법 |
KR101040163B1 (ko) | 2008-12-15 | 2011-06-09 | 한양대학교 산학협력단 | 다치화 구조를 갖는 stt-mram 메모리 소자와 그 구동방법 |
JP2010267784A (ja) * | 2009-05-14 | 2010-11-25 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
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2014
- 2014-08-08 KR KR1020140102419A patent/KR101549625B1/ko active IP Right Grant
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2015
- 2015-03-18 US US16/094,253 patent/US10516097B2/en active Active
- 2015-03-18 WO PCT/KR2015/002607 patent/WO2015160093A2/ko active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20060011732A (ko) * | 2004-07-31 | 2006-02-03 | 삼성전자주식회사 | 스핀차지를 이용한 자성막 구조체와 그 제조 방법과 그를구비하는 반도체 장치 및 이 장치의 동작방법 |
US20090073748A1 (en) * | 2007-09-17 | 2009-03-19 | Ulrich Klostermann | Integrated Circuits; Methods for Operating an Integrating Circuit; Memory Modules |
KR20110042657A (ko) * | 2009-10-19 | 2011-04-27 | 한국과학기술연구원 | 수직 자화 자성층을 갖는 자기 터널 접합 구조 |
US20130221460A1 (en) * | 2012-02-29 | 2013-08-29 | Headway Technologies, Inc. | Engineered Magnetic Layer with Improved Perpendicular Anisotropy using Glassing Agents for Spintronic Applications |
Also Published As
Publication number | Publication date |
---|---|
KR101549625B1 (ko) | 2015-09-04 |
WO2015160093A2 (ko) | 2015-10-22 |
US20190172997A1 (en) | 2019-06-06 |
US10516097B2 (en) | 2019-12-24 |
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