WO2015154541A1 - Usb固态盘固件存储装置 - Google Patents

Usb固态盘固件存储装置 Download PDF

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WO2015154541A1
WO2015154541A1 PCT/CN2015/000061 CN2015000061W WO2015154541A1 WO 2015154541 A1 WO2015154541 A1 WO 2015154541A1 CN 2015000061 W CN2015000061 W CN 2015000061W WO 2015154541 A1 WO2015154541 A1 WO 2015154541A1
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usb
storage device
firmware
state disk
solid state
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PCT/CN2015/000061
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English (en)
French (fr)
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王元龙
陈淼
王辉
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天津瑞发科半导体技术有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation

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  • the present invention relates to a USB solid state disk firmware storage device, and more particularly to a highly reliable USB solid state disk firmware storage device including a plurality of eMMC and UFS storage devices.
  • USB Universal Serial Bus
  • USB1.1 USB1.1
  • USB2.0 USB3.0
  • USB3.1 USB3.1
  • the USB1.0 interface has a transfer speed of 1.5 megabits per second (Mbps)
  • the USB 1.1 interface can reach 12 megabits per second (Mbps)
  • the USB 2.0 interface can reach 480 megabits per second (Mbps).
  • USB 3.0 interface and USB 3.1 interface increase the transmission speed to 5 Gigabits per second (Gbps) and 10 Gigabits per second (Gbps).
  • Gbps gigabits per second
  • USB2.0 is based on half-duplex two-wire bus, which can only provide one-way data stream transmission
  • USB3.0 and USB3.1 use dual-wire differential signal lines, thus supporting bidirectional concurrent data stream transmission. It is also the key reason for the rapid increase in the speed of the new specification.
  • USB3.0 and USB3.1 are also A new power management mechanism has been introduced to support standby, hibernate, and pause states.
  • the SSD product consists of a controller chip and a NandFlash memory device.
  • NandFlash internally uses a nonlinear macrocell mode to provide a cost-effective solution for solid-state large-capacity storage.
  • NandFlash memory devices have large capacity and fast rewriting speed. It is suitable for the storage of a large amount of data, and thus has been widely used in the industry, such as embedded products including digital cameras, MP3 players, memory cards, compact U disk, etc.
  • the disadvantage of NandFlash devices is the data The reading and writing needs to be in units of pages. The erasing of data needs to be in units of blocks. The data in each page needs to be erased before the next writing, and the number of erasures of each block is limited.
  • the SSD uses NandFlash as the storage medium, it has a smaller body than the traditional mechanical hard disk. Light weight, easy to carry, power saving, high performance, etc., it has been sought after by users, especially It is a compact U disk product that has been widely used.
  • the embedded multimedia card is the literal translation name of the Embedded Multi Media Card, referred to as eMMC.
  • eMMC is a storage device for embedded systems. It is usually used in mobile devices such as tablet computers and mobile phones for data storage.
  • the eMMC is essentially composed of The NandFlash memory device and the controller chip are packaged together. The package is in BGA mode and has two standard forms: 153 pins and 169 pins.
  • the controller chip in eMMC completes the address conversion (FTL) and loss of the NandFlash memory device. Functions such as equalization, garbage collection, bad block management (BBM), and error correction (ECC) provide a unified access interface to the upper layer and shield the underlying operations.
  • FTL address conversion
  • ECC error correction
  • the eMMC interface protocol is developed by the Solid State Technology Association (JEDEC).
  • JEDEC Solid State Technology Association
  • the earliest version is eMMC4.3, experienced eMMC4.41, eMMC4.51 in the middle, the latest version is eMMC5.0, which can provide 400 megabytes per second (MB/s) transmission speed.
  • eMMC4.3 the latest version is eMMC4.3, which can provide 400 megabytes per second (MB/s) transmission speed.
  • eMMC5.0 which can provide 400 megabytes per second (MB/s) transmission speed.
  • UFS Universal flash storage is the literal translation name of Universal Flash Storage, referred to as UFS.
  • UFS is the new interface standard of NandFlash after eMMC 4.5. It has two types of external memory card and embedded storage device, mainly used in smartphones and tablets. Digital cameras and mobile storage devices have become the main application standards for embedded storage media.
  • the UFS standard has also been developed by the Solid State Technology Association (JEDEC). Its members include Samsung, Nokia, Micron, and Qualcomm.
  • the functions are not limited to data storage functions. Vendors will develop more additional functions, such as adding boot boot images, data encryption, and intelligent partitioning. These functions are based on the original solution. It is implemented by secondary development of the software.
  • the usual design scheme adopts a method of storing firmware on the built-in flash memory device, so as to modify various application schemes, and the firmware can be updated after the product is released.
  • the way to correct problems and improve functions in time the operation of writing firmware into the built-in Flash is performed by the mass production tool of the host side.
  • the mass production tool is generally provided by the controller chip manufacturer for batch formatting of multiple SSD products.
  • For partitioning, special function configuration, and firmware update the usual way is to write the firmware to a fixed location in the built-in Flash.
  • the SSD product When the SSD product is powered on, it will automatically load the firmware to the specified location, thus starting the system and performing normal operation. Data storage operation, the area where the built-in Flash stores firmware will be due to incorrect write operations Or Nand Flash limiting device characteristics caused by loss of data stored in the firmware Bad, when the SSD can not be successfully booted into the wrong working state.
  • USB SSD products using eMMC and UFS as storage media when the NandFlash in eMMC and UFS is damaged, the controller chip in eMMC and UFS is damaged or the erroneous operation damages the firmware copy stored in eMMC and UFS, it will lead to solid state. The firmware of the disk failed to load.
  • the USB SSD firmware storage device of the present invention comprises a controller chip and a plurality of eMMC and UFS storage devices, wherein the controller chip comprises a USB bus interface, a microcontroller and a plurality of interface controllers, the USB SSD Connected to an external host via a USB bus interface, the eMMC and UFS storage devices are interfaced with the interface controller in a one-to-one manner, and the microcontroller generates control signals for controlling the USB bus interface and multiple interface controllers, and on the USB Data is transferred between the bus interface and the plurality of interface controllers, and based on the USB SSD architecture, multiple identical firmware copies required for SSD boot are stored on the reserved space of the plurality of eMMC and UFS storage devices.
  • USB SSD firmware storage device of the present invention one or more copies of the same firmware can be stored on each eMMC and UFS storage device, and the number of firmware copies stored on each eMMC and UFS storage device is increased. More, the success rate of USB SSD boot is higher.
  • the start address and data length of storing any copy of the firmware on each eMMC and UFS storage device are determined by the microcontroller in the controller chip and pass through the interface.
  • the controller writes a copy of the firmware to the eMMC and UFS storage devices.
  • USB SSD firmware storage device of the present invention in a normal working mode, the user cannot access the reserved space in each eMMC and UFS storage device in the USB SSD through the host terminal, and the reserved space can only be used. For storing firmware copies, it cannot be used to store user data. The more copies of firmware stored on each eMMC and UFS storage device, the less storage space available to users, and the security and storage space available to designers and manufacturers. Make a compromise on the top.
  • the user in the mass production mode, can access the reserved space in each eMMC and UFS storage device in the USB SSD through the host-side mass production tool, and write the specific A copy of the firmware.
  • the user in the mass production mode, can only choose whether to update the firmware, but can not choose which eMMC and UFS storage device to write the firmware copy, nor can you choose to go to any eMMC. And the number of copies of the firmware copy written in the UFS storage device. These parameters are determined by the startup program that is cured in the controller chip and are executed by the microcontroller.
  • the USB bus interface in the controller chip can be a USB3.0 bus interface or a USB 3.1 bus interface, and the difference is: USB3.0 bus interface
  • the transmission bandwidth is 5 gigabits per second (Gbps), while the USB 3.1 bus interface transmission bandwidth is 10 gigabits per second (Gbps), that is, the USB 3.1 bus interface bandwidth is twice the bandwidth of the USB 3.0 bus interface;
  • each interface controller can be connected to the eMMC storage device through the eMMC4.3 or higher interface, or to the UFS storage device through the UFS1.0 or higher interface.
  • Designers and manufacturers can customize the version of the host-side USB bus interface and interface controller according to the performance requirements of the USB SSD, and the number of interface controllers, ie the eMMC and UFS storage devices included in the SSD. The number is customized.
  • any of a plurality of eMMC memory devices may be a BGA package 153 pin or a 169 pin eMMC device.
  • the standardization organization JEDEC defines two standard package types and their sizes for eMMC devices, namely 153 pins in BGA package or 169 pins in BGA package.
  • the plurality of UFS storage devices may be external memory card type UFS devices or embedded storage type UFS devices.
  • USB SSD firmware storage device As a USB SSD firmware storage device of the present invention, between the plurality of connected interface controllers and the storage device, the number of data signal lines and the clock signal line frequency need to be matched.
  • the beneficial effects of the present invention are: a USB solid state disk firmware storage device of the present invention, based on a parallel architecture of a controller chip and a plurality of eMMC and UFS storage devices, through a plurality of eMMC and UFS storage devices on a USB solid state disk
  • the reserved space is reserved for storing multiple copies of the same firmware. In this way, in some eMMC and UFS storage devices, if the firmware copy data is corrupted or the loading fails, the USB SSD can still be loaded by the other correctly.
  • the firmware copy implements normal data storage functions, improves the reliability of firmware loading and the success rate of SSD boot, and achieves high reliability.
  • FIG. 1 is a schematic structural diagram of a USB solid state disk firmware storage device according to the present invention.
  • FIG. 2 is a schematic diagram of firmware storage on each eMMC and UFS storage device of a USB solid state disk firmware storage device according to the present invention
  • FIG. 3 is a flow chart of loading firmware of a USB solid state disk firmware storage device of the present invention
  • USB solid state disk firmware storage device of the present invention enters the mass production working mode.
  • 1 host 1 for USB SSD, 3 controller chip, 4 for USB3.0 bus interface, 5 microcontroller, 6 interface controller, 7 for eMMC and UFS storage devices, 8 firmware copy.
  • USB solid state disk firmware storage device of the present invention will be further described below in conjunction with the embodiments in the accompanying drawings.
  • a USB solid state disk 2 includes a controller chip 3 and a plurality of eMMC storage devices 7, and the controller chip 3 includes a USB 3.0 bus interface 4, a microcontroller 5 and a plurality.
  • the interface controller 6, the USB SSD 2 is connected to the external host 1 via the USB 3.0 bus interface 4, and the eMMC storage device 7 and the interface controller 6 are connected in a one-to-one manner, and the figure includes four interface controllers. 6 and four eMMC storage devices 7, the microcontroller 5 generates control signals for controlling the USB 3.0 bus interface 4 and the plurality of interface controllers 6, and between the USB 3.0 bus interface 4 and the plurality of interface controllers 6 transfer data.
  • the remaining space of the four eMMC storage devices 7 on the USB SSD 2 stores a plurality of identical firmware copies 8 required for USB SSD 2 booting.
  • a copy of the firmware 8 can be stored on each of the eMMC storage devices 7, and multiple copies of the same firmware 8 can be stored.
  • the start address and data length of storing any copy of the firmware copy 8 on each of the eMMC storage devices 7 is determined by the microcontroller 5 in the controller chip 3, and the firmware copy 8 is written to the eMMC memory through the interface controller 6.
  • the reserved space in each eMMC storage device 7 of the USB SSD 2 is denied access by the host 1 , and the reserved space can only be used to store the firmware copy 8; in the mass production mode, the operator passes the host The end production tool accesses the reserved space in each of the eMMC storage devices 7 of the USB SSD 2 and writes a specific firmware copy 8.
  • the USB bus interface 4 in the controller chip 3 can be a USB 3.0 bus interface. It can also be a USB 3.1 bus interface.
  • Each interface controller 6 in the USB SSD 2 is connected to the eMMC storage device 7 via an interface having an eMMC version of at least 4.3.
  • the number of data signal lines between the plurality of connected interface controllers 6 and the eMMC storage device 7 matches the clock signal line frequency.
  • Any of the plurality of eMMC memory devices 7 is a BGA alternative package 153-pin and 169-pin eMMC device.
  • the UFS storage devices 7 When a plurality of the UFS storage devices 7 are used, they may be external memory card type UFS devices or embedded In-line storage type UFS device.
  • the reserved space for storing the firmware copy 8 is opened in the four eMMC memory devices 7.
  • the start address and data length of the reserved space are determined by the microcontroller 5 in the controller chip 3, first
  • the starting address of the reserved space in the eMMC storage device 7 is Addr1
  • the data length is Len1
  • two firmware copies 8 are stored.
  • the starting address of the reserved space in the second eMMC storage device 7 is Addr2, and the data length is Len2.
  • a firmware copy 8 is stored.
  • the USB SSD 2 performs step S0, and step S0 is powered on. Then, the process of loading firmware is:
  • the microcontroller 5 is responsible for performing step S1, the step S1 is to initialize the controller chip 3, including four interface controllers 6, wherein the microcontroller 5 can exchange data with the eMMC storage device 7 through the interface controller 6. .
  • step S2 is performed, which is to read the first firmware copy 8 of the first eMMC storage device 7, at which time the microcontroller 5 passes the first interface controller 6 from the first eMMC storage device 7
  • the first firmware copy 8 is read in the reserved space, and then step S8 is performed.
  • Step S8 is to determine whether the data is successfully loaded. If the loading is successful, step S9 is performed, and step S9 is to enter the normal working mode, and no other reading is performed. Firmware copy 8. If the loading fails, step S3 is performed.
  • Step S3 is performed, the second firmware copy 8 of the first eMMC storage device 7 is read, and the microcontroller 5 is retained from the first eMMC storage device 7 by the first interface controller 6.
  • the second firmware copy 8 is read out in the space, and then step S8 is executed to determine whether the data is successfully loaded. If the loading is successful, step S9 is executed to enter the normal working mode, and no other firmware copy 8 is read. If the loading fails, step S4 is performed.
  • Step S4 is performed, the first firmware copy 8 of the second eMMC storage device 7 is read, and the microcontroller 5 is retained from the second eMMC storage device 7 by the second interface controller 6.
  • the first firmware copy 8 is read out in the space, and then step S8 is executed to determine whether the data is successfully loaded. If the loading is successful, step S9 is executed to enter the normal working mode, and no other firmware copy 8 is read. If the load fails, execute Step S5.
  • Step S5 is performed to read the first firmware copy 8 of the third eMMC storage device 7, at which time the microcontroller 5 is retained from the third eMMC storage device 7 by the third interface controller 6.
  • the first firmware copy 8 is read out in the space, and then step S8 is executed to determine whether the data is successfully loaded. If the loading is successful, step S9 is executed to enter the normal working mode, and no other firmware copy 8 is read. If the loading fails, step S6 is performed.
  • Step S6 is performed to read the first firmware copy of the fourth eMMC storage device 7, at which time the microcontroller 5 passes the reserved space from the fourth eMMC storage device 7 through the fourth interface controller 6.
  • the first firmware copy 8 is read out, and then step S8 is performed to determine whether the data is successfully loaded. If the loading is successful, step S9 is executed to enter the normal working mode, and no other firmware copy 8 is read. If the loading fails, step S7 is performed.
  • Step S7 is performed to read the second firmware copy 8 of the fourth eMMC storage device 7, at which time the microcontroller 5 is retained from the fourth eMMC storage device 7 by the fourth interface controller 6.
  • the second firmware copy 8 is read out in the space, and then step S8 is executed to determine whether the data is successfully loaded. If the loading is successful, step S9 is executed to enter the normal working mode, and no other firmware copy 8 is read. If the loading fails, the USB SSD 2 fails to boot, and step S10 is performed, and the step S10 is to enter the mass production working mode.
  • the USB SSD 2 needs to be moved to step S10 to mass-produce the working mode.
  • the USB SSD 2 In order to make the USB SSD 2 enter the mass production mode, there are two cases: one case is that the USB SSD 2 is powered on and then the firmware is loaded according to the flow shown in Figure 3. All the firmware copies 8 in the eMMC fail to load.
  • the USB SSD 2 automatically enters the mass production mode; another case is that the USB SSD 2 is successfully booted and has entered the normal working mode. At this time, it is necessary to open the mass production tool on the host side to make the USB SSD 2 enter the amount. Production work mode.
  • the process of firmware update after the USB SSD 2 enters the mass production mode is:
  • Step S11 is started. Step S11 issues a firmware update command for the host-side mass production tool, and transmits the new firmware copy 8 data to the storage space inside the controller chip 3 through the USB bus interface 4.
  • the microcontroller 5 begins the step S12 via the first interface controller 6, which writes two identical firmware copies 8 into the reserved space of the first eMMC storage device 7.
  • the microcontroller 5 starts the step S13 via the second interface controller 6, which writes a firmware copy 8 into the reserved space of the second eMMC storage device 7.
  • the microcontroller 5 starts the step S14 via the third interface controller 6, which writes a firmware copy 8 into the reserved space of the third eMMC storage device 7.
  • the microcontroller 5 starts the step S15 via the fourth interface controller 6, which writes two firmware copies 8 into the reserved space of the fourth eMMC storage device 7.
  • the microcontroller 5 notifies the host side mass production tool to step S16, and the step S16 completes the firmware update operation.
  • each interface controller 6 in the USB SSD 2 is connected to the eMMC4.51 storage device 7 through the eMMC4.51 interface protocol, and the interface protocol adopted by each interface controller 6 is compatible with all the same versions. Or lower version interface protocol eMMC storage device 7.
  • connection signal between the interface controller 6 and the eMMC storage device 7 includes: a bidirectional command signal line CMD, eight bidirectional data signal lines DAT0 to DAT7, a clock signal line CLK and a reset signal line RST_n, It is supplied to the eMMC storage device 7 by the interface controller 6. Further, the eMMC memory device 7 further includes power lines VCC and VCCQ, and ground lines VSS and VSSQ. The details are as follows:
  • connection signal between the interface controller 6 and the eMMC storage device 7 may be slightly changed as the eMMC protocol version is improved, but the essence is to use fixed data signal line digits to transmit data, and the frequency of the data line depends on A match is required between the interface controller 6 and the eMMC storage device 7 at the frequency of the clock signal line and the number of bits of the data signal line and the clock signal line frequency.
  • a USB SSD 2 firmware storage device of the present invention opens up a reserved space in a plurality of eMMC and UFS storage devices 7 on the USB SSD 2 based on a parallel architecture of the controller chip 3 and a plurality of eMMC and UFS storage devices. , used to save multiple copies of the same firmware 8 , using this method can be in some eMMC and UFS storage device 7 firmware copy data 8 damage and loading failure, so that the USB SSD 2 can still load the other correctly
  • the firmware copy implements the normal data storage function, improves the reliability of the firmware loading and the success rate of the SSD 2 boot, and achieves high reliability.

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Abstract

本发明公开了一种USB固态盘固件存储装置,该装置同时在多个所述eMMC和UFS存储器件的保留空间上存储USB固态盘启动所需要的多个相同的固件拷贝,eMMC和UFS存储器件上选择性地存储一份和多份相同的固件拷贝,通过在USB固态盘上的多个eMMC和UFS存储器件中开辟保留空间,用来保存多个相同的固件拷贝,在某些eMMC和UFS存储器件中固件拷贝数据损坏与加载失败的情况下,使USB固态盘仍可以通过加载其他正确的固件拷贝实现正常的数据存储功能,提高了固件加载的可靠性和设备启动的成功率。

Description

USB固态盘固件存储装置 技术领域
本发明涉及一种USB固态盘固件存储装置,且特别涉及含有多个eMMC和UFS存储器件的高可靠性的USB固态盘固件存储装置。
背景技术
通用串行总线的英文是Universal Serial Bus,缩写为USB,是一个外部总线标准,用于规范电脑与外部设备的连接和通讯,USB接口支持设备的即插即用和热插拔功能,USB在1994年底由英特尔、康柏、IBM、微软等多家公司联合提出,USB接口版本历经多年的发展,包括USB1.0、USB1.1、USB2.0以及近年来出现的USB3.0和USB3.1,USB1.0接口的传输速度为每秒1.5兆位(Mbps),USB1.1接口可以达到每秒12兆位(Mbps),而USB2.0接口则可以达到每秒480兆位(Mbps),最新USB3.0接口和USB3.1接口更是将传输速度提高到了每秒5千兆位(Gbps)和每秒10千兆位(Gbps),USB接口的另一个特点是每个版本都向下兼容,另外USB2.0基于半双工二线制总线,只能提供单向数据流传输,而USB3.0和USB3.1采用了对偶四线制差分信号线,故而支持双向并发数据流传输,这也是新规范速度猛增的关键原因,除此之外,USB3.0和USB3.1还引入了新的电源管理机制,支持待机、休眠和暂停等状态。
固态盘产品由控制器芯片和NandFlash存储器件组成,NandFlash内部采用非线性宏单元模式,为固态大容量存储的实现提供了廉价有效的解决方案,NandFlash存储器件具有容量较大,改写速度快等优点,适用于大量数据的存储,因而在业界得到了越来越广泛的应用,如嵌入式产品中包括数码相机、MP3随身听、记忆卡、体积小巧的U盘等,NandFlash器件的缺点在于数据的读写需要以页为单位,数据的擦除需要以块为单位,每个页中的数据在下一次写之前都需要先进行擦除操作,同时每个块的擦除次数都有数量限制,当擦除次数超过这个限制时,数据的存储就变得不稳定,一般NandFlash的管理都需要占用大量的系统资源,固态盘由于采用了NandFlash作为存储介质,相对于传统的机械硬盘具有体较小、重量轻、易携带、省电、性能高等特点,因此得到了用户的追捧,尤其是体积小巧的U盘产品更是得到了广泛的应用。
嵌入式多媒体卡为Embedded Multi Media Card的直译名称,简称eMMC,eMMC是一种用于嵌入式系统的存储器件,通常用于平板电脑、手机等移动装置上,用于数据存储,eMMC本质上由NandFlash存储器件和控制器芯片封装在一起组成,封装采用BGA方式,有153引脚和169引脚两种标准形式,eMMC中的控制器芯片完成了对NandFlash存储器件的地址转换(FTL)、损耗均衡、垃圾回收、坏块管理(BBM)、错误纠正(ECC)等功能,对上层提供了统一的访问接口并屏蔽了底层的操作,eMMC接口协议由固态技术协会(JEDEC)制定,最早版本为eMMC4.3,中间经历了eMMC4.41,eMMC4.51,目前最新版本为eMMC5.0,能够提供每秒400兆字节(MB/s)的传输速度,现在的一些固态盘产品已经开始采用控制器芯片加一个至多个eMMC存储器件的方案,由于eMMC存储器件的特性,大大简化了固态盘控制器芯片的设计。
通用闪存存储为Universal Flash Storage的直译名称,简称UFS,UFS是eMMC 4.5版后的NandFlash新的接口标准,具有外部存储卡和嵌入式存储器件两种产品类型,主要应用在智能手机及平板电脑或数码相机及移动存储等装置上,成为嵌入式存储媒体的主要应用标准,UFS标准同样由固态技术协会(JEDEC)制定,制定成员包括三星(Samsung)、诺基亚(Nokia)、美光(Micron)、高通(Qualcomm)、英特尔(Intel)、东芝(Toshiba)、晟碟(SanDisk)、德州仪器(TI)、意法半导体(ST)等国际大厂,其中UFS 1.0版的传输速率为每秒300兆字节(MB/s),最新的UFS 2.0版的传输速率可达每秒600兆字节(MB/s),UFS短期内不会改变现有市场状况,而是增加市场多元的选择性。
随着USB固态盘应用的多元化,功能不局限于数据存储的功能,厂商会开发出更多附加的功能,比如加入启动引导镜像、数据加密、智能分区,这些功能都是在原有方案的基础上进行软件的二次开发而实现,通常的设计方案都采用将固件(Firmware)存储在内置Flash存储器件上的方法,以便于进行各种应用方案的修改,且产品上市后也可以通过更新固件的方式及时修正问题和完善功能,将固件写入内置Flash的操作通过主机端的量产工具来进行,量产工具一般由控制器芯片厂商提供,用于对多个固态盘产品进行批量格式化,分区,特殊功能配置以及更新固件等操作,通常的做法是将固件写入内置Flash中的某个固定位置,当固态盘产品上电后会自动到指定的位置加载固件,从而启动系统并进行正常的数据存储操作,内置Flash中存储固件的区域会由于错误的写入操作或者Nand Flash器件特性的限制而导致存储的固件数据损 坏,这时固态盘就不能成功启动而进入错误的工作状态。
在采用eMMC和UFS作为存储介质的USB固态盘产品中,当eMMC和UFS中的NandFlash损坏、eMMC和UFS中的控制器芯片损坏或者误操作损坏了eMMC和UFS中存储的固件拷贝,都会导致固态盘的固件加载失败。
发明内容
本发明所要解决的技术问题是:
通过在USB固态盘上的多个eMMC和UFS存储器件中开辟保留空间,用来保存多个相同的固件拷贝,使用这种方法可以在某些eMMC和UFS存储器件中固件拷贝数据损坏或加载失败的情况下,使USB固态盘仍可以通过加载其他正确的固件拷贝实现正常的数据存储功能,提高了固件加载的可靠性和固态盘启动的成功率。
本发明解决技术问题所采用的技术方案是:
做为本发明的一种USB固态盘固件存储装置,包括控制器芯片和多个eMMC和UFS存储器件,控制器芯片中包括USB总线接口、微控制器和多个接口控制器,该USB固态盘经由USB总线接口连接到外部的主机端,eMMC和UFS存储器件与接口控制器采用一对一的连接方式,微控制器产生控制信号用于控制USB总线接口和多个接口控制器,并在USB总线接口和多个接口控制器之间传输数据,在该USB固态盘架构基础上,同时在多个eMMC和UFS存储器件的保留空间上存储固态盘启动所需要的多个相同的固件拷贝。
做为本发明的一种USB固态盘固件存储装置,在每个eMMC和UFS存储器件上可以存储一份或多份相同的固件拷贝,每个eMMC和UFS存储器件上存储的固件拷贝份数越多,USB固态盘启动的成功率就越高。
做为本发明的一种USB固态盘固件存储装置,在每个eMMC和UFS存储器件上存储任意一份固件拷贝的起始地址和数据长度由控制器芯片中的微控制器决定,并通过接口控制器将固件拷贝写入eMMC和UFS存储器件中。
做为本发明的一种USB固态盘固件存储装置,在正常工作模式下,用户不可以通过主机端来访问USB固态盘中每一个eMMC和UFS存储器件中的保留空间,该保留空间只能用于存储固件拷贝,不能用于存储用户数据,每个eMMC和UFS存储器件上存储的固件拷贝份数越多,用户可用的存储空间相应的减少,设计者和生产厂商可以在安全性和存储空间上进行折中考虑。
做为本发明的一种USB固态盘固件存储装置,在量产工作模式下,用户可以通过主机端量产工具来访问USB固态盘中每一个eMMC和UFS存储器件中的保留空间,写入特定的固件拷贝。特别要说明的是,在量产工作模式下,用户只能选择是否做更新固件的操作,而不能选择向哪一个eMMC和UFS存储器件的保留空间写入固件拷贝,也不能选择向任意一个eMMC和UFS存储器件中写入固件拷贝的份数。这些参数由固化在控制器芯片中的启动程序来决定,并由微控制器负责执行。
做为本发明的一种USB固态盘固件存储装置,一方面其控制器芯片中的USB总线接口可以为USB3.0总线接口,也可以为USB3.1总线接口,区别在于:USB3.0总线接口传输带宽为每秒5千兆位(Gbps),而USB3.1总线接口传输带宽为每秒10千兆位(Gbps),即USB3.1总线接口带宽为USB3.0总线接口带宽的2倍;另一方面每个接口控制器可以通过eMMC4.3或更高版本接口与eMMC存储器件相连,也可以通过UFS1.0或更高版本接口与UFS存储器件相连。设计者和生产厂商可以根据USB固态盘的性能指标要求,对主机端USB总线接口和接口控制器的版本进行定制,并可以对接口控制器的数量,即固态盘所包含的eMMC和UFS存储器件的数量进行定制。
做为本发明的一种USB固态盘固件存储装置,多个eMMC存储器件中之任一个可为BGA封装153引脚或169引脚eMMC器件。标准化组织JEDEC定义了eMMC器件的两种标准封装形式及其尺寸大小,即BGA封装153引脚或BGA封装169引脚。
做为本发明的一种USB固态盘固件存储装置,多个UFS存储器件可为外部存储卡类型UFS器件或嵌入式存储类型UFS器件。
做为本发明的一种USB固态盘固件存储装置,多个相连接的接口控制器与存储器件之间,其数据信号线位数与时钟信号线频率需要匹配。
本发明的有益效果是:本发明的一种USB固态盘固件存储装置,基于控制器芯片和多个eMMC和UFS存储器件这种并行架构,通过在USB固态盘上的多个eMMC和UFS存储器件中开辟保留空间,用来保存多个相同的固件拷贝,使用这种方法可以在某些eMMC和UFS存储器件中固件拷贝数据损坏或加载失败的情况下,使USB固态盘仍可以通过加载其他正确的固件拷贝实现正常的数据存储功能,提高了固件加载的可靠性和固态盘启动的成功率,实现高可靠性。
附图说明
下面结合附图和实施例对本发明进一步说明
图1为本发明USB固态盘固件存储装置的结构示意图
图2为本发明USB固态盘固件存储装置各eMMC和UFS存储器件上固件存储示意图
图3为本发明USB固态盘固件存储装置的加载固件的流程
图4为本发明USB固态盘固件存储装置的USB固态盘进入量产工作模式后的固件更新流程
其中:1主机端、2为USB固态盘、3控制器芯片、4为USB3.0总线接口、5微控制器、6接口控制器、7为eMMC和UFS存储器件、8固件拷贝。
具体实施方式
下面结合附图中实施例对本发明一种USB固态盘固件存储装置进行进一步说明。
如图1所示,本发明的应用实施例,一个USB固态盘2包括控制器芯片3和多个eMMC存储器件7,控制器芯片3中包括USB3.0总线接口4、微控制器5和多个接口控制器6,USB固态盘2经由USB3.0总线接口4连接到外部的主机端1,eMMC存储器件7与接口控制器6采用一对一的连接方式,图中包括四个接口控制器6和四个eMMC存储器件7,微控制器5产生控制信号用于控制USB3.0总线接口4和多个接口控制器6,并在USB3.0总线接口4和多个接口控制器6之间传输数据。USB固态盘2上的四个eMMC存储器件7的保留空间上存储着USB固态盘2启动所需要的多个相同的固件拷贝8。
在每个该eMMC存储器件7上可以存储一份固件拷贝8,也可以存储多份相同的固件拷贝8。在每个该eMMC存储器件7上存储任意一份固件拷贝8的起始地址和数据长度由控制器芯片3中的微控制器5决定,并通过接口控制器6将固件拷贝8写入eMMC存储器件7中。在正常工作模式下,该USB固态盘2中每一个eMMC存储器件7中的保留空间拒绝主机端1访问,保留空间只能用于存储固件拷贝8;在量产工作模式下,操作者通过主机端量产工具来访问该USB固态盘2中每一个eMMC存储器件7中的保留空间,并写入特定的固件拷贝8。该控制器芯片3中的USB总线接口4可以为USB3.0总线接口。也可以为USB3.1总线接口。该USB固态盘2中每个接口控制器6通过eMMC版本至少为4.3的接口与eMMC存储器件7相连。多个相连接的接口控制器6与eMMC存储器件7之间的数据信号线位数与时钟信号线频率匹配。多个该eMMC存储器件7中之任一个为BGA择一封装153引脚和169引脚的eMMC器件。
当使用多个该UFS存储器件7时,可以是外部存储卡类型UFS器件,也可以是嵌 入式存储类型UFS器件。
如图2所示,四个eMMC存储器件7中都开辟了用于存储固件拷贝8的保留空间,保留空间的起始地址和数据长度由控制器芯片3中微控制器5所决定,第一个eMMC存储器件7中保留空间的起始地址为Addr1,数据长度为Len1,存储了两份固件拷贝8,第二个eMMC存储器件7中保留空间的起始地址为Addr2,数据长度为Len2,存储了一份固件拷贝8,第三个eMMC存储器件7中保留空间的起始地址为Addr3,数据长度为Len3,存储了一份固件拷贝8,第四个eMMC存储器件7中保留空间的起始地址为Addr4,数据长度为Len4,存储了两份固件拷贝8。如果这四个eMMC存储器件7容量都为Cap,那么USB固态盘2的存储容量UsrCap的计算公式为UsrCap=Cap×4-(Len1+Len2+Len3+Len4)。
如图3所示,USB固态盘2执行步骤S0,步骤S0为上电,然后,加载固件的流程为:
1)微控制器5负责进行步骤S1,步骤S1为初始化控制器芯片3,包括其中的四个接口控制器6,此时微控制器5可以通过接口控制器6与eMMC存储器件7进行数据交换。
2)接着,执行步骤S2,步骤S2为读取第一个eMMC存储器件7的第一个固件拷贝8,此时微控制器5通过第一个接口控制器6从第一个eMMC存储器件7的保留空间中读出第一个固件拷贝8,再执行步骤S8,步骤S8为判断数据是否加载成功,如果加载成功,则执行步骤S9,步骤S9为进入正常工作模式,不再读取其他的固件拷贝8。如果加载失败,则执行步骤S3。
3)执行步骤S3,步骤S3为读取第一个eMMC存储器件7的第二个固件拷贝8,此时微控制器5通过第一个接口控制器6从第一个eMMC存储器件7的保留空间中读出第二个固件拷贝8,再执行步骤S8,判断数据是否加载成功,如果加载成功,则执行步骤S9,进入正常工作模式,不再读取其他的固件拷贝8。如果加载失败,则执行步骤S4。
4)执行步骤S4,步骤S4为读取第二个eMMC存储器件7的第一个固件拷贝8,此时微控制器5通过第二个接口控制器6从第二个eMMC存储器件7的保留空间中读出第一个固件拷贝8,再执行步骤S8,判断数据是否加载成功,如果加载成功,则执行步骤S9,进入正常工作模式,不再读取其他的固件拷贝8。如果加载失败,则执行 步骤S5。
5)执行步骤S5,步骤S5为读取第三个eMMC存储器件7的第一个固件拷贝8,此时微控制器5通过第三个接口控制器6从第三个eMMC存储器件7的保留空间中读出第一个固件拷贝8,再执行步骤S8,判断数据是否加载成功,如果加载成功,则执行步骤S9,进入正常工作模式,不再读取其他的固件拷贝8。如果加载失败,则执行步骤S6。
6)执行步骤S6,步骤S6为读取第四个eMMC存储器件7的第一个固件拷贝,此时微控制器5通过第四个接口控制器6从第四个eMMC存储器件7的保留空间中读出第一个固件拷贝8,再执行步骤S8,判断数据是否加载成功,如果加载成功,则执行步骤S9,进入正常工作模式,不再读取其他的固件拷贝8。如果加载失败,则执行步骤S7。
7)执行步骤S7,步骤S7为读取第四个eMMC存储器件7的第二个固件拷贝8,此时微控制器5通过第四个接口控制器6从第四个eMMC存储器件7的保留空间中读出第二个固件拷贝8,再执行步骤S8,判断数据是否加载成功,如果加载成功,则执行步骤S9,进入正常工作模式,不再读取其他的固件拷贝8。如果加载失败,则USB固态盘2启动失败,执行步骤S10,步骤S10为进入量产工作模式。
如图4所示,本应用实施例中,要向eMMC存储器件7中写入新的固件拷贝8,需要使USB固态盘2进入步骤S10,量产工作模式。要使USB固态盘2进入量产工作模式,有两种情况:一种情况是USB固态盘2上电后按照图3所示流程进行固件加载,所有eMMC中的固件拷贝8均加载失败,此时USB固态盘2自动进入量产工作模式;另一种情况是USB固态盘2启动成功,已经进入了正常工作模式,此时需要在主机端打开量产工具就可以使USB固态盘2进入量产工作模式。USB固态盘2进入量产工作模式后进行固件更新的流程为:
1)开始进行步骤S11,步骤S11为主机端量产工具下达固件更新指令,并通过USB总线接口4将新的固件拷贝8数据传输到控制器芯片3内部的存储空间中。
2)微控制器5开始通过第一个接口控制器6进行步骤S12,步骤S12为向第一个eMMC存储器件7的保留空间中写入两个相同的固件拷贝8。
3)微控制器5开始通过第二个接口控制器6进行步骤S13,步骤S13为向第二个eMMC存储器件7的保留空间中写入一个固件拷贝8。
4)微控制器5开始通过第三个接口控制器6进行步骤S14,步骤S14为向第三个eMMC存储器件7的保留空间中写入一个固件拷贝8。
5)微控制器5开始通过第四个接口控制器6进行步骤S15,步骤S15为向第四个eMMC存储器件7的保留空间中写入两个固件拷贝8。
6)微控制器5通知主机端量产工具达到步骤S16,步骤S16为固件更新操作完成。
本应用实施例中USB固态盘2中每个接口控制器6通过eMMC4.51接口协议与eMMC4.51存储器件7相连接,每一个接口控制器6采用的接口协议可以兼容所有与之采用相同版本或更低版本接口协议的eMMC存储器件7。
本应用实施例中,接口控制器6与eMMC存储器件7之间的连接信号包括:一条双向命令信号线CMD,八条双向数据信号线DAT0至DAT7,一条时钟信号线CLK和一条复位信号线RST_n,由接口控制器6提供给eMMC存储器件7。此外eMMC存储器件7还包含电源线VCC和VCCQ,地线VSS和VSSQ等信号线。其具体情况详见下表:
Figure PCTCN2015000061-appb-000001
其中接口控制器6与eMMC存储器件7之间的连接信号随着eMMC协议版本的提高可能会有微小的改变,但本质都是采用固定数据信号线位数来传输数据,而数据线的频率取决于时钟信号线的频率,并且此数据信号线位数与时钟信号线频率在相连接的接口控制器6与eMMC存储器件7之间需要匹配。
本发明一种USB固态盘2固件存储装置,基于控制器芯片3和多个eMMC和UFS存储器件这种并行架构,通过在USB固态盘2上的多个eMMC和UFS存储器件7中开辟保留空间,用来保存多个相同的固件拷贝8,使用这种方法可以在某些eMMC和UFS存储器件7中固件拷贝数据8损坏与加载失败的情况下,使USB固态盘2仍可以通过加载其他正确的固件拷贝实现正常的数据存储功能,提高了固件加载的可靠性和固态盘2启动的成功率,实现高可靠性。
以上所述仅是本发明的较佳实施例而已,并非对本发明作任何形式上的限定,本发明请求的保护范围当以权利要求书所记载的内容为准,凡是依据本发明的技术实质对以上具体实施方式所作的一切简单变化、等同替换或分解合并,均仍属于本发明技术方案的请求保护的范围之内。

Claims (21)

  1. 一种USB固态盘固件存储装置,包括控制器芯片和多个eMMC存储器件,控制器芯片中包括USB总线接口、微控制器和多个接口控制器,USB固态盘经由USB总线接口连接到外部的主机端,eMMC存储器件与接口控制器采用一对一的连接方式,微控制器产生控制信号用于控制USB总线接口和多个接口控制器,并在USB总线接口和多个接口控制器之间传输数据,其特征在于:同时在多个所述eMMC存储器件(7)的保留空间上存储USB固态盘(2)启动所需要的多个相同的固件拷贝(8)。
  2. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:在每个所述eMMC存储器件(7)上选择性地存储一份和多份相同的固件拷贝(8)。
  3. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:在每个所述eMMC存储器件(7)上存储任意一份固件拷贝(8)的起始地址和数据长度由控制器芯片(3)中的微控制器(5)决定,并通过接口控制器(6)将固件拷贝(8)写入eMMC存储器件(7)中。
  4. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:在正常工作模式下,所述USB固态盘(2)中每一个eMMC存储器件(7)中的保留空间拒绝主机端(1)访问,保留空间只能用于存储固件拷贝(8)。
  5. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:在量产工作模式下,操作者通过主机端量产工具来访问所述USB固态盘(2)中每一个eMMC存储器件(7)中的保留空间,并写入特定的固件拷贝(8)。
  6. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:所述控制器芯片(3)中的USB总线接口(4)为USB3.0总线接口。
  7. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:所述控制器芯片(3)中的USB总线接口(4)为USB3.1总线接口。
  8. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:所述USB固态盘(2)中每个接口控制器(6)通过eMMC版本至少为4.3的接口与eMMC存储器件(7)相连。
  9. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:多个所述eMMC存储器件(7)中之任一个为BGA择一封装153引脚和169引脚的eMMC器件。
  10. 如权利要求1所述的USB固态盘固件存储装置,其特征在于:多个相连接的接口控制器(6)与eMMC存储器件(7)之间的数据信号线位数与时钟信号线频率匹配。
  11. 一种USB固态盘固件存储装置,包括控制器芯片和多个UFS存储器件,控制器芯片中包括USB总线接口、微控制器和多个接口控制器,USB固态盘经由USB总线接口连接到外部的主机端,UFS存储器件与接口控制器采用一对一的连接方式,微控制器产生控制信号用于控制USB总线接口和多个接口控制器,并在USB总线接口和多个接口控制器之间传输数据,其特征在于:同时在多个所述UFS存储器件(7)的保留空间上存储USB固态盘(2)启动所需要的多个相同的固件拷贝(8)。
  12. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:在每个所述UFS存储器件(7)上选择性地存储一份和多份相同的固件拷贝(8)。
  13. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:在每个所述UFS存储器件(7)上存储任意一份固件拷贝(8)的起始地址和数据长度由控制器芯片(3)中的微控制器(5)决定,并通过接口控制器(6)将固件拷贝(8)写入UFS存储器件(7)中。
  14. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:在正常工作模式下,所述USB固态盘(2)中每一个UFS存储器件(7)中的保留空间拒绝主机端(1)访问,保留空间只能用于存储固件拷贝(8)。
  15. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:在量产工作模式下,操作者通过主机端量产工具来访问所述USB固态盘(2)中每一个UFS存储器件(7)中的保留空间,并写入特定的固件拷贝(8)。
  16. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:所述控制器芯片(3)中的USB总线接口(4)为USB3.0总线接口。
  17. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:所述控制器芯片(3)中的USB总线接口(4)为USB3.1总线接口。
  18. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:所述USB固态盘(2)中每个接口控制器(6)通过UFS版本至少为1.0的接口与UFS存储器件(7)相连。
  19. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:多个所述UFS存储器件(7)中之任一个为外部存储卡类型UFS器件。
  20. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:多个所述UFS存储器件(7)中之任一个为嵌入式存储类型UFS器件。
  21. 如权利要求11所述的USB固态盘固件存储装置,其特征在于:多个相连接的接口控制器(6)与UFS存储器件(7)之间的数据信号线位数与时钟信号线频率匹配。
PCT/CN2015/000061 2014-04-12 2015-01-29 Usb固态盘固件存储装置 WO2015154541A1 (zh)

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