WO2015140976A1 - 処理回路及び信号補正方法 - Google Patents
処理回路及び信号補正方法 Download PDFInfo
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- WO2015140976A1 WO2015140976A1 PCT/JP2014/057684 JP2014057684W WO2015140976A1 WO 2015140976 A1 WO2015140976 A1 WO 2015140976A1 JP 2014057684 W JP2014057684 W JP 2014057684W WO 2015140976 A1 WO2015140976 A1 WO 2015140976A1
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- signal
- correction
- attenuation
- amplitude
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/04—Control of transmission; Equalising
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0292—Arrangements specific to the receiver end
Definitions
- the present invention relates to a processing circuit that processes a high-frequency signal at high speed, and a signal correction method for the processing circuit.
- the electrical performance requirement to faithfully execute high-speed signal transmission is that the frequency attenuation characteristics in the transmission path existing between the driver (receiver) of LSI (Integrated Circuit) (Large / Scale / Integration) are wideband. It must be flat.
- transmission lines in electrical and electronic equipment have been established by using high-grade substrate materials with low dielectric constants, using high-frequency transmission connectors, and strict board design. I let you.
- the present invention has been made to solve such problems, and an object of the present invention is to provide a high-speed circuit capable of reducing crosstalk noise and reducing the circuit scale with a simple configuration.
- the processing circuit according to the present invention is a processing circuit mounted on a printed circuit board.
- a transmission circuit mounted on the printed circuit board having a first attenuation characteristic for attenuating the amplitude of the received reception signal, and transmitting the reception signal attenuated according to the first attenuation characteristic as an attenuation signal;
- a correction circuit mounted on the printed circuit board having a second attenuation characteristic for attenuating the attenuation signal received from the transmission circuit, and transmitting as a signal obtained by correcting the attenuation signal attenuated according to the second attenuation characteristic
- the first attenuation characteristic of the transmission circuit is: The ratio of the amplitude of the attenuated signal to the amplitude of the received signal decreases as the frequency of the received signal increases.
- the second attenuation characteristic of the correction circuit is: The ratio of the amplitude of the correction signal to the amplitude of the attenuation signal increases as the frequency of the attenuation signal increases.
- the transmission circuit determines the amplitude of the received signal in accordance with the first attenuation characteristic in which the ratio of the amplitude of the attenuated signal to the amplitude of the received signal decreases as the frequency of the received signal increases.
- the correction circuit attenuates the attenuation signal according to the second attenuation characteristic in which the ratio of the amplitude of the correction signal to the amplitude of the attenuation signal increases as the frequency of the attenuation signal increases. Then, since it is transmitted as a correction signal, the effect of flattening the frequency / amplitude characteristics can be obtained like an analog equalizer, and the effect of reducing the crosstalk noise and reducing the circuit scale can be achieved.
- FIG. 1 is a diagram showing a high speed circuit 100 according to a first embodiment.
- 6 is a diagram illustrating an attenuation characteristic 1021 of the transmission circuit 102 according to Embodiment 1.
- FIG. 6 is a diagram illustrating a correction characteristic 1031 of the correction circuit 103 according to the first embodiment.
- FIG. 10 is a diagram showing a composite characteristic 1051 according to the first embodiment.
- 3 is a diagram illustrating an example of a circuit configuration of a correction circuit 103 according to Embodiment 1.
- FIG. 6 is a diagram for explaining characteristic relaxation of the Butterworth high-pass filter according to Embodiment 1.
- FIG. FIG. 3 is a flowchart showing a signal correction method (step) of the high-speed circuit 100 according to the first embodiment.
- FIG. 6 is a diagram illustrating a high-speed circuit 100a according to a second embodiment. It is a figure which shows the correction characteristic 1031a of the correction circuit 103a which concerns on Embodiment 2.
- FIG. 6 is a diagram illustrating an example of a circuit configuration of a correction control circuit 404 according to Embodiment 2.
- FIG. 6 is a diagram for explaining a control method of a control circuit 403 according to a second embodiment.
- FIG. 1 is a diagram showing a high-speed circuit 100 according to the present embodiment.
- the high-speed circuit 100 is a circuit that transmits high-frequency digital signals at high speed.
- the high speed circuit 100 is an example of a processing circuit mounted on the printed circuit board 150.
- the printed circuit board 150 may be a plurality of printed circuit boards connected by an inter-board relay connector or the like, or may be a single circuit board.
- the printed circuit board 150 is also referred to as a printed wiring board.
- the high-speed circuit 100 includes a driver 101, a transmission circuit 102, a correction circuit 103, and a receiver 104.
- Each of the driver 101, the transmission circuit 102, the correction circuit 103, and the receiver 104 is mounted on, for example, an LSI.
- the driver 101 is a signal transmission circuit in an LSI.
- the receiver 104 is a signal receiving circuit in the LSI.
- the transmission circuit 102 and the correction circuit 103 are substrate patterns, inter-board relay connectors, and the like that are arranged from the signal electrode of the driver 101 to the signal electrode of the receiver 104 mounted on the LSI opposite to the LSI of the signal electrode. Composed.
- the transmission path 110 is a transmission path from the driver 101 of one LSI to the receiver 104 of the other LSI.
- the transmission path 110 includes a transmission circuit 102 and a correction circuit 103.
- the transmission circuit 102 is mounted on the printed circuit board 150, receives a digital signal transmitted from the driver 101 as a reception signal 1001, and transmits the reception signal 1001 as an attenuation signal 1002.
- the transmission circuit 102 may be an LSI, or may be a transmission path configured by a wiring pattern configured on the printed circuit board 150, an inter-board relay connector, or the like.
- the transmission circuit 102 has an attenuation characteristic 1021.
- the amplitude of the received reception signal 1001 is attenuated according to the attenuation characteristic 1021, and the attenuated reception signal 1001 is transmitted as the attenuation signal 1002.
- the correction circuit 103 is mounted on the printed circuit board 150, receives the attenuation signal 1002 transmitted from the transmission circuit 102, and transmits the attenuation signal 1002 as the correction signal 1003.
- the correction circuit 103 may be an LSI, or may be a transmission path configured by a wiring pattern configured on the printed circuit board 150, an inter-board relay connector, or the like.
- the correction circuit 103 is a filter that does not require a power source and realizes a reverse characteristic of the loss characteristic of the transmission line between the driver and the receiver of the LSI.
- the correction circuit 103 has a reverse characteristic of the attenuation characteristic 1021 of the transmission circuit 102.
- the inverse characteristic of the attenuation characteristic 1021 of the transmission circuit 102 included in the correction circuit 103 is referred to as a correction characteristic 1031.
- the amplitude of the received attenuation signal 1002 is attenuated according to the correction characteristic 1031, and the attenuated attenuation signal 1002 is sent to the receiver 104 as the correction signal 1003.
- FIG. 2 is a diagram showing the attenuation characteristic 1021 of the transmission circuit 102 according to the present embodiment.
- FIG. 3 is a diagram showing the correction characteristic 1031 of the correction circuit 103 according to the present embodiment.
- FIG. 4 is a diagram showing the composite characteristic 1051 according to the present embodiment. A characteristic obtained by combining the attenuation characteristic 1021 and the correction characteristic 1031 is referred to as a composite characteristic 1051.
- the transmission circuit 102 has a characteristic that the ratio of the amplitude of the attenuation signal 1002 to the amplitude of the reception signal 1001 decreases as the frequency of the reception signal 1001 increases.
- the attenuation characteristic 1021 is represented by the frequency and the ratio of the amplitude of the attenuation signal 1002 to the amplitude of the reception signal 1001 (referred to as an attenuation characteristic value).
- the attenuation characteristic 1021 may be represented by a frequency and an amplitude value of the attenuation signal 1002 in which the reception signal 1001 is attenuated.
- the attenuation characteristic 1021 may be represented by a frequency and an attenuation amount.
- the attenuation characteristic 1021 is an example of a first attenuation characteristic that the transmission circuit 102 has.
- the correction circuit 103 has a characteristic that the ratio of the amplitude of the correction signal 1003 to the amplitude of the attenuation signal 1002 increases as the frequency of the received attenuation signal 1002 increases.
- the correction characteristic 1031 is represented by the frequency and the ratio of the amplitude of the correction signal 1003 to the amplitude of the attenuation signal 1002 (referred to as a correction characteristic value).
- the correction characteristic 1031 may be represented by the frequency and the amplitude value of the correction signal 1003 in which the attenuation signal 1002 is attenuated.
- the correction characteristic 1031 may be expressed by frequency and attenuation.
- the correction characteristic 1031 is an example of a second attenuation characteristic that the correction circuit 103 has.
- the dotted line indicates the actual attenuation characteristic value (assumed as the actual attenuation characteristic value 105).
- the actual attenuation characteristic value 105 is an example of a first value indicating the relationship between the frequency and the ratio of the amplitude of the attenuation signal to the amplitude of the reception signal.
- the correction characteristic 1031 of the correction circuit 103 is realized based on the actual attenuation characteristic value 105 indicating the relationship between the frequency and the ratio of the amplitude of the attenuation signal to the amplitude of the reception signal.
- the correction characteristic 1031 is realized (calculated) based on an interpolation attenuation characteristic value 106 (an example of a second value) obtained by approximating the actual attenuation characteristic value 105 with respect to the frequency of the received signal 1001 to a straight line by linear interpolation.
- a correction characteristic value 107 that is the reverse characteristic of the attenuation characteristic 1021 realized in this way is defined as a correction characteristic 1031.
- This correction characteristic 1031 is realized by the correction circuit 103 and arranged on the printed circuit board 150.
- a digital signal (received signal 1001) transmitted from the driver 101 passes through the transmission circuit 102 having the attenuation characteristic 1021 and the correction circuit 103 having the correction characteristic 1031. Thus, the attenuation characteristic 1021 and the correction characteristic 1031 are combined. A correction signal 1003 corresponding to the composite characteristic 1051 is transmitted.
- the synthesis characteristic 1051 is represented by the relationship between the frequency and the ratio of the amplitude of the correction signal 1003 to the amplitude of the received signal 1001.
- the ratio of the amplitude of the correction signal 1003 to the amplitude of the received signal 1001 is defined as a composite characteristic value 108.
- the composite characteristic value 108 is smoothed.
- the composite characteristic value 108 is preferably constant regardless of the frequency.
- the composite characteristic value 108 does not necessarily have to be constant regardless of the frequency. If the slope of the composite characteristic value 108 becomes gentler than the slope of the interpolation attenuation characteristic value 106 (see FIG. 2), the effect of the correction circuit 103 is obtained. Is obtained. That is, the amount of change in the ratio of the amplitude of the correction signal 1003 to the amplitude of the attenuation signal 1002 can be made smaller than the amount of change in the ratio of the amplitude of the attenuation signal 1002 to the amplitude of the reception signal 1001.
- the correction characteristic 1031 attenuates the attenuation signal 1002 so that the ratio of the amplitude of the correction signal 1003 to the amplitude of the reception signal 1001 is constant regardless of the frequency of the attenuation signal 1002, and is an inverse characteristic of the attenuation characteristic 1021. is there.
- the characteristic value of the transmission line 110 from the driver 101 of one LSI to the receiver 104 of the other LSI includes an interpolation attenuation characteristic value 106 and a correction characteristic value 107 that is an inverse characteristic of the interpolation attenuation characteristic value 106.
- the composite characteristic value 108 becomes flat as shown in FIG. Since this combined characteristic value 108 includes a loss in the entire frequency band, a predetermined gain may be given by the driver 101 or the receiver 104 and finally the characteristic 109 may be obtained. That is, the receiver 104 amplifies the amplitude of the correction signal 1003 and sends out the amplified correction signal 1003. Alternatively, the driver 101 amplifies the amplitude of the reception signal 1001 in advance before transmitting the reception signal 1001, and transmits the amplified reception signal 1001.
- FIG. 5 is a diagram illustrating an example of a circuit configuration of the correction circuit 103 according to the present embodiment.
- the correction circuit 103 is, for example, a high pass filter.
- the correction characteristic 1031 of the correction circuit 103 is realized using the characteristic of a high-pass filter.
- the correction circuit 103 is a circuit that realizes a correction characteristic 1031 that is the reverse characteristic of the attenuation characteristic 1021 with an inductor L and a capacitor C that are passive elements.
- the correction circuit 103 is, for example, a Butterworth high-pass filter including capacitors 201 and 202 and an inductor 203.
- the Butterworth type high-pass filter has no inflection point in the attenuation region of the frequency characteristic, is a straight line, and has a gentle slope as compared with other filter methods.
- the inverse characteristic of the attenuation characteristic 1021 can be obtained in the attenuation band of the Butterworth high-pass filter. That is, in the correction circuit 103 having a Butterworth high-pass filter, the correction characteristic value 107 has no inflection point.
- both the capacitor 201 and the capacitor 202 also have a DC (direct current) cutoff function.
- a constant is set for the DC blocking capacitor so that the impedance becomes the lowest at the center of the signal frequency band, but it is preferable to use a value according to the characteristics of the filter here.
- FIG. 6 is a diagram for explaining characteristic relaxation of the Butterworth high-pass filter according to the present embodiment.
- FIG. 6 is a diagram illustrating the relationship among the signal frequency, the signal amplitude characteristic (amplitude characteristic value), and the signal spectrum.
- the inverse characteristic 301 of the attenuation characteristic 1021 is defined from the low frequency region to the operating frequency fc302.
- a high frequency region of the operating frequency fc302 or higher is defined as a pass band 303 in which the amplitude does not change.
- the dotted line in FIG. 6 indicates the existence probability 304 of the signal spectrum.
- the signal spectrum existence probability 304 of the digital signal is concentrated from approximately 1 ⁇ 4 of the operating frequency fc302 to the operating frequency fc302. For this reason, it is preferable to correct the frequency band from about 1 ⁇ 4 of the operating frequency fc302 to the operating frequency fc302.
- FIG. 7 is a flowchart showing a signal correction method (process) of the high-speed circuit 100 according to the present embodiment.
- the transmission circuit 102 transmits an attenuation signal 1002 attenuated according to the attenuation characteristic 1021.
- the correction circuit 103 corrects the attenuation signal 1002 in accordance with the correction characteristic 1031 and sends it out as a correction signal 1003.
- the high-speed circuit described in this embodiment is a high-speed circuit for the purpose of transmitting binary or more digital signals using a rectangular wave.
- a high-speed circuit includes a driver built in a semiconductor device such as an LSI, a pattern of a printed wiring board, and a receiver built in a semiconductor device such as an LSI.
- the high-speed circuit interpolates the attenuation characteristic with respect to the transmission line, and arranges a correction circuit composed of passive components having a reverse characteristic of the interpolated attenuation characteristic on the printed wiring.
- the following effects can be obtained for LSI.
- the following effects can be obtained for the substrate. Since the attenuation characteristic of the transmission circuit itself was designed so as to obtain a flat amplitude characteristic over the entire pass frequency band of the signal, selection of a substrate material and substrate design with low pass loss over a wide band have been carried out. However, by mounting the correction circuit according to the present embodiment, flat characteristics can be obtained over the entire pass frequency band without special design or the like on the transmission circuit itself. For this reason, the choice of board
- a filter that does not require a power supply and realizes the reverse characteristic of the loss characteristic of the transmission line is disposed on the substrate on the transmission line side, that is, between the LSI driver and receiver. .
- the fundamental wave and the high-frequency band are flattened by the LSI receiver, the crosstalk noise can be reduced and the circuit scale can be reduced without obtaining a high amplification amount in the high-frequency region. .
- Embodiment 2 differences from the first embodiment will be mainly described.
- the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof may be omitted.
- FIG. 8 is a diagram showing a high-speed circuit 100a according to the present embodiment.
- FIG. 9 is a diagram showing the correction characteristic 1031a of the correction circuit 103a according to the present embodiment.
- the high-speed circuit 100a in FIG. 8 has a circuit configuration for changing the correction characteristics of the correction circuit 103 described in the first embodiment. 8 differs from FIG. 1 in that the high-speed circuit 100a includes a control circuit 403 connected to the correction circuit 103a.
- a circuit including the correction circuit 103 a and the control circuit 403 is referred to as a correction control circuit 404.
- FIG. 9 is a diagram illustrating the correction characteristic 1031a of the correction circuit 103a.
- FIG. 9 shows the relationship between the frequency of the attenuation signal 1002 and the ratio of the amplitude of the correction signal 1003 to the amplitude of the attenuation signal 1002.
- a ratio of the amplitude of the correction signal 1003 to the amplitude of the attenuation signal 1002 is set as a correction characteristic value 509.
- the correction characteristic value increases as the frequency increases up to the frequency fc507, and does not change in a higher frequency band than the frequency fc507.
- the control circuit 403 is a circuit that can control the correction characteristic 1031a of the correction circuit 103a.
- the control circuit 403 changes the cutoff frequency of the correction characteristic value 509 from the frequency fc507 to the frequency fc508.
- the cutoff frequency which is the maximum value of the frequency in the frequency band indicating the characteristic 509a in which the correction characteristic value 509 increases as the frequency of the attenuation signal 1002 increases is the frequency fc507.
- the control circuit 403 changes the cutoff frequency from the frequency fc507 to the frequency fc508.
- FIG. 9 is a diagram illustrating an example of a circuit configuration of the correction control circuit 404 according to the present embodiment. A specific circuit configuration for realizing the correction control circuit 404 will be described with reference to FIG.
- the correction control circuit 404 includes a varicap 510, a varicap 511, a voltage application circuit 514, a node 516, an inductor 512, and a DC leakage prevention capacitor 513.
- the capacitor 201 and the capacitor 202 in the first embodiment are replaced with a varicap 510 and a varicap 511 which are variable capacitance devices.
- the capacitor 201 and the capacitor 202 in the first embodiment correspond to the varicap 510 and the varicap 511.
- a voltage application circuit 514 for changing the capacitance of the varicap 510 and the varicap 511 is disposed.
- the voltage application circuit 514 is connected between the varicap 510 and the varicap 511 via a node 516.
- a DC leakage prevention capacitor 513 for the voltage applied by the voltage application circuit 514 is disposed.
- the inductor 512 is disposed between the voltage application circuit 514 and the DC leakage prevention capacitor 513.
- the inductor 512 corresponds to the inductor 203 described in the first embodiment.
- FIG. 10 is a diagram illustrating an example of a circuit configuration of the correction control circuit 404 according to the second embodiment.
- the operation principle of the correction control circuit 404 will be described with reference to FIG.
- the correction control circuit 404 changes the electrostatic capacities of the varicap 510 and the varicap 511 by applying a DC potential to the node 516 by the voltage application circuit 514. By changing the capacitance of the varicap 510 and the varicap 511, the cutoff frequency is changed.
- a DAC circuit digital-analog conversion circuit
- the voltage application circuit 514 By using the DAC circuit as the voltage application circuit 514, a system that can be digitally controlled from the LSI can be constructed.
- FIG. 11 is a diagram for explaining a control method of the control circuit 403 according to the present embodiment.
- FIG. 11 is a schematic diagram showing a change in the signal error rate P when the cutoff frequency of the correction circuit 103a is changed as a characteristic 601.
- a required error rate when executing high-speed signal transmission in the high-speed circuit 100a is Pt602.
- the control circuit 403 calculates a point 603 where the required error rate Pt 602 can be maintained from the signal obtained by the receiver 104. Then, the control circuit 403 determines the calculated frequency at the point 603 as the optimum cutoff frequency fc.
- the LSI including the receiver 104 calculates an error rate by a calculation circuit mounted on the LSI after receiving the signal by the receiver 104. Then, the LSI acquires the relationship between the cutoff frequency fc and the error rate and stores it in the memory. The LSI executes this procedure for the cutoff frequency fc within a predetermined range, and stores the relationship between the error rate and the cutoff frequency fc, that is, the characteristic 601 in the memory.
- the cutoff frequency fc is acquired from the characteristic 601.
- a control signal for applying an applied voltage corresponding to the cut-off frequency is transmitted to the DAC which is the voltage applying circuit 514, and the DAC applies the control voltage.
- the correction control circuit includes a control circuit having an adaptive control function that changes the cutoff frequency according to the maximum frequency with respect to the frequency band having the reverse characteristic of the attenuation characteristic in the correction characteristic. Arranged on a printed circuit board.
- the high-speed circuit 100a According to the high-speed circuit 100a according to the present embodiment, there is an effect that it is possible to maintain optimum transmission path characteristics for applications in which the signal transmission rate changes. That is, it is possible to guarantee a necessary error rate in the high-speed circuit 100a.
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Abstract
Description
従来は、このような電気的性能要件を得るために、低誘電率である高級基板材料の利用、高周波伝送用コネクタの利用、および厳密な基板設計等によって、電気電子機器内の伝送路を成立させてきた。
特に、等化器機能を実現するイコライザには、SN比(信号雑音比)が大きく、かつ、減衰量の大きい高周波領域の信号を増幅する場合、増幅された高周波信号の周波数振幅特性が、広帯域にわたり平坦となるように線形補正する性能が求められる。したがって、LSIのアナログイコライザの周波数特性を高周波領域まで確保しなければならず、その結果、クロストークノイズが増大する、回路規模が増大する等のおそれがあった。
また、特許文献1の技術における方向性結合器は、効果的な周波数特性の補正を行う性能を持たず,回路構成が複雑になるという課題があった。
前記プリント基板に実装され、受信した受信信号の振幅を減衰する第1減衰特性を有し、前記第1減衰特性に応じて減衰された前記受信信号を減衰信号として送出する伝送回路と、
前記プリント基板に実装され、前記伝送回路から受信した前記減衰信号を減衰する第2減衰特性を有し、前記第2減衰特性に応じて減衰された前記減衰信号を補正した信号として送信する補正回路とを備え、
前記伝送回路の前記第1減衰特性は、
前記受信信号の周波数が高くなるにしたがって、前記受信信号の振幅に対する前記減衰信号の振幅の比が小さくなる特性であり、
前記補正回路の前記第2減衰特性は、
前記減衰信号の周波数が高くなるにしたがって、前記減衰信号の振幅に対する前記補正信号の振幅の比が大きくなる特性であることを特徴とする。
図1は、本実施の形態に係る高速回路100を示す図である。
高速回路100は、高周波デジタル信号を高速伝送する回路である。高速回路100は、プリント基板150に実装される処理回路の一例である。プリント基板150は、例えば、基板間中継コネクタなどにより接続された複数のプリント基板でもよいし、ひとつの基板でもよい。プリント基板150は、プリント配線板ともいう。
レシーバ104は、LSIにおける信号受信回路である。
伝送回路102、補正回路103は、ドライバ101の信号電極から、この信号電極の先のLSIに対向するLSIに搭載されたレシーバ104の信号電極までに配置される基板パタン、基板間中継コネクタなどで構成される。
伝送路110は、一方のLSIのドライバ101から他方のLSIのレシーバ104までの伝送路である。伝送路110は、伝送回路102、補正回路103を備える。
補正回路103は、LSIのドライバ-レシーバ間に伝送路の損失特性の逆特性を実現する電源不要なフィルタである。
図3は、本実施の形態に係る補正回路103の補正特性1031を示す図である。
図4は、本実施の形態に係る合成特性1051を示す図である。
減衰特性1021と補正特性1031とを合成した特性を合成特性1051とする。
減衰特性1021は、伝送回路102が有する第1減衰特性の一例である。
ここでは、補正特性1031を、周波数と、減衰信号1002の振幅に対する補正信号1003の振幅の比(補正特性値とする)とで表している。あるいは、補正特性1031を、周波数と、減衰信号1002が減衰された補正信号1003の振幅の値とにより表してもよい。あるいは、補正特性1031を周波数と減衰量とで表してもよい。
補正特性1031は、補正回路103が有する第2減衰特性の一例である。
補正回路103の補正特性1031は、周波数と受信信号の振幅に対する減衰信号の振幅の比との関係を示す実減衰特性値105に基づいて実現される。
このようにして実現された減衰特性1021の逆特性である補正特性値107を補正特性1031とする。この補正特性1031を補正回路103で実現し、プリント基板150に配置する。
すなわち、レシーバ104は、補正信号1003の振幅を増幅し、増幅した補正信号1003を送出する。あるいは、ドライバ101は、受信信号1001を送出する前に、予め受信信号1001の振幅を増幅し、増幅した受信信号1001を送出する。
図5は、本実施の形態に係る補正回路103の回路構成の一例を示す図である。
補正回路103は、例えば、ハイパスフィルタである。補正回路103の補正特性1031は、ハイパスフィルタの特性を用いて実現される。
図5に示すように、補正回路103は、減衰特性1021の逆特性である補正特性1031を、受動素子であるインダクタL、コンデンサCで実現する回路である。
図6は、本実施の形態に係るバタワース型ハイパスフィルタの特性緩和を説明するための図である。図6は、信号の周波数と、信号の振幅特性(振幅特性値)と、信号スペクトラムとの関係を示した図である。
図6の点線は、信号スペクトラムの存在確率304を示している。図6に示すように、デジタル信号の信号スペクトラムの存在確率304は、動作周波数fc302の略1/4の周波数から動作周波数fc302にかけて集中する。このため、動作周波数fc302の1/4程度の周波数から動作周波数fc302までの周波数帯域について補正をおこなうことが好ましい。
図7は、本実施の形態に係る高速回路100の信号補正方法(工程)を示すフロー図である。
S101において、伝送回路102は、減衰特性1021に応じて減衰された減衰信号1002を送出する。S102において、補正回路103は、減衰信号1002を、補正特性1031に応じて補正し、補正信号1003として送出する。
本実施の形態では、主に、実施の形態1との差異について説明する。
本実施の形態において、実施の形態1と同様の構成部には同一の符号を付し、その説明を省略する場合がある。
図9は、本実施の形態に係る補正回路103aの補正特性1031aを示す図である。
図9は、補正回路103aの補正特性1031aを示す図である。図9では、減衰信号1002の周波数と、減衰信号1002の振幅に対する補正信号1003の振幅の比との関係を示している。減衰信号1002の振幅に対する補正信号1003の振幅の比を、補正特性値509とする。補正特性値は、周波数fc507までは、周波数が高くなるにしたがって大きくなり、周波数fc507よりも高周波の帯域では変化しない。
制御回路403は、補正特性値509のカットオフ周波数を、周波数fc507から周波数fc508へと変化させる。ここでは、減衰信号1002の周波数が高くなるにしたがって補正特性値509が大きくなる特性509aを示す周波数帯域のうちの周波数の最大値であるカットオフ周波数は、周波数fc507である。制御回路403は、カットオフ周波数を、周波数fc507から周波数fc508へと変化させる。
図9を用いて、補正制御回路404を実現する具体的回路構成について説明する。
補正制御回路404では、実施の形態1におけるコンデンサ201およびコンデンサ202を、静電容量可変デバイスであるバリキャップ510およびバリキャップ511に置き換えている。実施の形態1におけるコンデンサ201およびコンデンサ202は、バリキャップ510およびバリキャップ511に相当する。
インダクタ512は、電圧印加回路514とDC漏洩防止コンデンサ513との間に配置されている。インダクタ512は、実施の形態1で説明したインダクタ203に相当する。
図10を用いて補正制御回路404の動作原理について説明する。
補正制御回路404は、電圧印加回路514によりDC電位をノード516に印加することにより、バリキャップ510およびバリキャップ511の静電容量を変化させる。バリキャップ510およびバリキャップ511の静電容量を変化させることにより、カットオフ周波数を変化させる。
図11は、本実施の形態に係る制御回路403の制御方法を説明するための図である。
ここで、高速回路100aにおいて、高速信号伝送を実行する際の所要誤り率をPt602とする。制御回路403は、この所要誤り率Pt602を維持できる地点603を、レシーバ104で得た信号から算出する。そして、制御回路403は、算出した地点603の周波数を最適カットオフ周波数fcとして決定する。
レシーバ104を備えるLSIは、レシーバ104による信号の受信後、LSIに搭載されている算出回路により、誤り率を算出する。そして、LSIは、カットオフ周波数fcと誤り率との関係を取得し、メモリに記憶する。LSIは、この手順を所定の範囲内のカットオフ周波数fcについて実行し、誤り率とカットオフ周波数fcとの関係、すなわち特性601をメモリに記憶する。
なお、以上の実施の形態は、本質的に好ましい例示であって、本発明、その適用物や用途の範囲を制限することを意図するものではなく、必要に応じて種々の変更が可能である。本発明は、これらの実施の形態に限定されるものではなく、必要に応じて種々の変更が可能である。
Claims (13)
- プリント基板に実装される処理回路において、
前記プリント基板に実装され、受信した受信信号の振幅を減衰する第1減衰特性を有し、前記第1減衰特性に応じて減衰された前記受信信号を減衰信号として送出する伝送回路と、
前記プリント基板に実装され、前記伝送回路から受信した前記減衰信号を減衰する第2減衰特性を有し、前記第2減衰特性に応じて減衰された前記減衰信号を補正信号として送信する補正回路と
を備え、
前記伝送回路の前記第1減衰特性は、
前記受信信号の周波数が高くなるにしたがって、前記受信信号の振幅に対する前記減衰信号の振幅の比が小さくなる特性であり、
前記補正回路の前記第2減衰特性は、
前記減衰信号の周波数が高くなるにしたがって、前記減衰信号の振幅に対する前記補正信号の振幅の比が大きくなる特性である
ことを特徴とする処理回路。 - 前記減衰信号の振幅に対する前記補正信号の振幅の比の変化量は、前記受信信号の振幅に対する前記減衰信号の振幅の比の変化量よりも小さいことを特徴とする請求項1に記載の処理回路。
- 前記補正回路の前記第2減衰特性は、前記第1減衰特性の逆特性であって、前記受信信号の振幅に対する前記補正信号の振幅の比が、前記減衰信号の周波数に関わらず一定となるように前記減衰信号を減衰する逆特性であることを特徴とする請求項1または2に記載の処理回路。
- 前記補正回路は、前記受信信号の周波数と、前記受信信号の振幅に対する前記減衰信号の振幅の比との関係を示す第1の値に基づいて、前記減衰信号を減衰することを特徴とする請求項1~3のいずれかに記載の処理回路。
- 前記補正回路の前記第2減衰特性は、前記第1の値が直線に近似された第2の値に基づいて算出されることを特徴とする請求項4に記載の処理回路。
- 前記補正回路は、ハイパスフィルタを有することを特徴とする請求項1~5のいずれかに記載の処理回路。
- 前記補正回路は、コンデンサとインダクタとから構成されることを特徴とする請求項1~6のいずれかに記載の処理回路。
- 前記補正回路は、バタワース型ハイパスフィルタを有することを特徴とする請求項1~7のいずれかに記載の処理回路。
- 前記第2減衰特性において、前記減衰信号の周波数が高くなるにしたがって前記減衰信号の振幅に対する前記補正信号の振幅の比が大きくなる周波数帯域のうちの周波数の最大値であるカットオフ周波数を変更させる制御回路を備えることを特徴とする請求項1~8のいずれかに記載の処理回路。
- 前記プリント基板に実装され、前記伝送回路に前記受信信号を送出するドライバと、
前記プリント基板に実装され、前記補正回路から前記補正信号を受信するレシーバと
を備えることを特徴とする請求項1~9のいずれかに記載の処理回路。 - 前記レシーバは、前記補正信号の振幅を増幅し、増幅した前記補正信号を送出することを特徴とする請求項10に記載の処理回路。
- 前記ドライバは、前記受信信号を送出する前に、前記受信信号の振幅を増幅し、増幅した前記受信信号を送出することを特徴とする請求項10または11に記載の処理回路。
- プリント基板に実装される処理回路の信号補正方法において、
前記プリント基板に実装され、受信した受信信号を減衰信号として送信する伝送回路が、前記受信信号の周波数が高くなるにしたがって前記受信信号の振幅に対する前記減衰信号の振幅の比が小さくなる第1減衰特性に応じて減衰された前記受信信号を前記減衰信号として送信し、
前記プリント基板に実装され、前記伝送回路から受信した前記減衰信号を補正信号として送信する補正回路が、前記減衰信号の周波数が高くなるにしたがって前記減衰信号の振幅に対する前記補正信号の振幅の比が大きくなる第2減衰特性に応じて減衰された前記減衰信号を前記補正信号として送信する
ことを特徴とする信号補正方法。
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US20040120419A1 (en) * | 2002-12-20 | 2004-06-24 | Gauthier Claude R. | I/O channel equalization based on low-frequency loss insertion |
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JPH05315998A (ja) * | 1992-05-14 | 1993-11-26 | Fuji Electric Co Ltd | 伝送路歪の低減方法 |
JP2004350312A (ja) * | 2004-07-01 | 2004-12-09 | Hitachi Ltd | 伝送線路損失の補償手段を有するドライバ回路 |
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