WO2015123914A1 - 阵列基板及其制备方法、液晶显示面板 - Google Patents

阵列基板及其制备方法、液晶显示面板 Download PDF

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Publication number
WO2015123914A1
WO2015123914A1 PCT/CN2014/074422 CN2014074422W WO2015123914A1 WO 2015123914 A1 WO2015123914 A1 WO 2015123914A1 CN 2014074422 W CN2014074422 W CN 2014074422W WO 2015123914 A1 WO2015123914 A1 WO 2015123914A1
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Prior art keywords
array substrate
electrode
transparent
liquid crystal
reflective
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PCT/CN2014/074422
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English (en)
French (fr)
Inventor
崔贤植
李会
方正
王海燕
田允允
Original Assignee
京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP14861146.0A priority Critical patent/EP2933678B1/en
Priority to US14/418,750 priority patent/US9696582B2/en
Publication of WO2015123914A1 publication Critical patent/WO2015123914A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • G02F1/133555—Transflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate, a preparation method thereof, and a liquid Crystal display panel.
  • a transflective liquid crystal display device in a display area constituting a liquid crystal display panel thereof A transmissive region and a reflective region are included; wherein the transmissive region is transparent to light from a backlight
  • the amount of radiation is controlled to achieve a transmissive display, the reflective zone being passed through from the external environment
  • the amount of reflection of light is controlled to realize a reflective display. That is, the transflective liquid crystal display
  • the display device mainly displays through transmissive type in a dark environment, and mainly in a brighter environment.
  • the reflective display ensures the visibility of the displayed image.
  • the bit delay R is set to be 2 times different, for example, the phase delay setting of the transmissive area can be set For ⁇ /2, the phase delay of the reflection region is set to ⁇ /4; wherein ⁇ is a tribute to the display The wavelength of the light.
  • the thickness of the liquid crystal layer that controls the transmissive region is the thickness of the liquid crystal layer of the reflective region 2 times to achieve a transflective display.
  • the invention proposes a new array substrate structure with a transflective function.
  • an array substrate including an array arrangement Pixel units, each of which includes a reflective area and a transmissive area, for either a pixel unit, the array substrate including a base substrate, and a thin film disposed on the base substrate a film transistor, and a reflective electrode and a first transparent electrode electrically connected to each other, the reflected electricity a pole is located in the reflective area, and the first transparent electrode is located in the transmissive area, wherein: a first transparent insulating layer is further disposed between the reflective electrode and the first transparent electrode, and The reflective electrode is located on a side of the first transparent insulating layer adjacent to the base substrate.
  • the reflective region corresponds to a position of the thin film transistor.
  • the first transparent electrode is disposed on the first transparent insulation A via in the layer is in electrical contact with the reflective electrode.
  • the first transparent insulating layer is a resin layer having high transmittance.
  • the thin film transistor is a bottom gate type thin film transistor.
  • the reflective electrode and the first transparent electrode are The drain of the thin film transistor is electrically connected.
  • the array substrate further includes a thin film transistor disposed at a second transparent insulating layer between the reflective electrodes; wherein the reflective electrode is disposed through A via in the second transparent insulating layer is in electrical contact with the drain.
  • the The array substrate further includes an adhesion layer disposed on the second transparent insulating layer and the thin film transistor Between the source and the drain.
  • the second transparent insulating layer is a resin layer having high transmittance.
  • the reflective electrode and the drain may also be electrically connected by a bridge connection.
  • the array substrate further includes a blunt disposed above the first transparent electrode Layer.
  • the array substrate further includes a second transparent electrode disposed on the passivation layer. Between the reflective electrode and the drain of the first transparent electrode and the thin film transistor In the case of no electrical connection, the second transparent electrode can be electrically connected to the drain.
  • the first Two transparent electrodes may be utilized to pass through the reflective electrode and the first organic transparent insulating layer A via is electrically connected to the drain.
  • the second transparent electrode may be a plurality of electrically connected strips pole.
  • the invention also provides a liquid crystal display panel comprising: an array substrate formed by a box And a color filter substrate, and a liquid crystal layer between the two substrates; the array substrate comprises an array a plurality of pixel units arranged, each of the pixel units including a reflective area and a transmissive area, the needle
  • the array substrate includes a base substrate, and is disposed on the substrate base a thin film transistor on the board, and a reflective electrode and a first transparent electrode electrically connected to each other
  • the reflective electrode is located in the reflective area, and the first transparent electrode is located in the transmissive area,
  • Middle a first transparent insulating layer is further disposed between the reflective electrode and the first transparent electrode, And the reflective electrode is located on a side of the first transparent insulating layer adjacent to the substrate.
  • the electric field intensity of the transmission region of the array substrate is the inverse of the array substrate
  • the electric field strength of the shot is twice.
  • corresponding to the transmissive area of the array substrate The thickness of the liquid crystal layer is equal to the thickness of the liquid crystal layer corresponding to the reflective area of the array substrate.
  • the liquid crystal display panel further includes: disposed on the array substrate facing away from the a first polarizer on one side of the liquid crystal layer, the first polarizer further comprising a first ⁇ /4 phase built in a retardation film; and a second polarized light disposed on a side of the color filter substrate facing away from the liquid crystal layer a second polarizer further comprising a built-in second ⁇ /4 phase retardation film, the first bias
  • the transmission axes of the light sheet and the second polarizer are perpendicular to each other.
  • the invention also relates to a method for preparing an array substrate, the array substrate comprising an array a plurality of pixel units arranged, each of the pixel units including a reflective area and a transmissive area, wherein For any one of the pixel units, the method includes the steps of: forming a thin film crystal on the substrate a body tube; forming a reflective electrode in the reflective region; forming a first transparent insulating layer over the reflective electrode; And forming a first transparent electrode over the first transparent insulating layer, the first transparent electrode and The reflective electrodes are electrically connected.
  • the reflective region corresponds to a position of the thin film transistor.
  • the method further includes the step of: in the first transparent insulating layer A via hole is formed, and the first transparent electrode is in electrical contact with the reflective electrode through the via.
  • the reflective electrode is electrically connected to a drain of the thin film transistor.
  • the method further includes the steps of: the thin film transistor and the Forming a second transparent insulating layer between the reflective electrodes, wherein the reflective electrode is formed by A via in the second transparent insulating layer is in electrical contact with the drain.
  • the method further includes the steps of: sequentially above the first transparent electrode Forming a passivation layer and a second transparent electrode; and at the reflective electrode and the first transparent electricity In the case where there is no electrical connection between the pole and the drain of the thin film transistor, the second transparent An electrode is electrically connected to the drain.
  • the transparent layer corresponding to the transmission area of the array substrate is thick.
  • the degree is equal to the thickness of the liquid crystal layer corresponding to the reflective area of the array substrate
  • the method further includes Step: selecting a dielectric constant and a thickness of the first transparent insulating layer such that the reflective electrode And a voltage between the second transparent electrode and the first transparent electrode and the second transparent
  • the electric field strength of the transmission region is the reflection
  • the electric field strength of the zone is twice.
  • the first transparent electrode is disposed in the transmissive region by disposing the reflective electrode in the reflective region, and the reflective electrode and the first transparent electrode are disposed in different layers (the reflective electrode is adjacent to the lining) a base substrate, the first transparent electrode being away from the base substrate) such that a spacing between the reflective electrode and the second transparent electrode of the reflective region is greater than the first transparent of the transmissive region a spacing between the electrode and the second transparent electrode; on the basis of the spacing between the reflective electrode and the second transparent electrode and between the first transparent electrode and the second transparent electrode
  • the difference in pitch is the first organic transparent insulating layer between the reflective electrode and the first transparent electrode, so in the embodiment of the invention, the voltage between the reflective electrode and the second transparent electrode
  • the transmission region can be made by controlling (or selecting) a dielectric constant and a thickness of the first organic transparent insulating layer.
  • the degree is twice the electric field strength of the reflective region, so that the phase of the liquid crystal of the transmissive region can be delayed by 2 times the phase retardation of the liquid crystal of the reflective region; based on this, when the array substrate is applied to the liquid crystal
  • the panel When the panel is displayed, it can be displayed by transmitting light from a backlight in a dark environment, and by reflecting light of an external environment in a bright environment, thereby reducing energy consumption and improving light utilization.
  • FIG. 1 is a schematic structural view 1 of an array substrate according to an embodiment of the present invention.
  • FIG. 2 is a second schematic structural diagram of an array substrate according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural view 3 of an array substrate according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural view 4 of an array substrate according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram 5 of an array substrate according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic structural diagram 1 of a liquid crystal display panel according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram 2 of a liquid crystal display panel according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram 3 of a liquid crystal display panel according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic diagram of a transmission region of a liquid crystal display panel according to an embodiment of the present invention a schematic diagram of the dark state;
  • FIG. 10 is a schematic diagram of a reflective region of a liquid crystal display panel according to an embodiment of the present invention A schematic diagram of the dark state.
  • 10-array substrate 10a-reflection region; 10b-transmission region; 101-substrate substrate; 102-thin Film transistor; 1021-gate; 1022-gate insulating layer; 1023-semiconductor active layer; 1024- Source; 1025-drain; 103-reflective electrode; 104-first transparent electrode; 105-first organic Transparent insulating layer; 106-second organic transparent insulating layer; 107-adhesion layer; 108-passivation layer; 109-second transparent electrode; 20-color film substrate; 30-liquid crystal layer; 40-first polarizer; 50- Second polarizer.
  • an embodiment of the present invention provides an array substrate 10, as shown in FIGS. 1 to 4, including a plurality of pixel units arranged in an array, each of the pixel units including a reflective area 10a and a transmissive Zone 10b.
  • the array substrate 10 includes a base substrate 101, The thin film transistor 102 disposed on the base substrate 101 and the opposite of each other electrically connected a counter electrode 103 and a first transparent electrode 104; at the reflective electrode 103 and the first transparent A first transparent insulating layer 105, such as an organic transparent insulating layer 105, is further disposed between the bright electrodes 104.
  • the reflective electrode 103 is located near the first organic transparent insulating layer 105 One side of the substrate 101. Wherein the reflective electrode 103 is located in the reflective area 10a.
  • the first transparent electrode 104 is located in the transmissive area 10b.
  • the liquid crystal display panel A second transparent electrode 109 may be included; thus, the reflective area 10a may include the opposite a radio electrode 103 and the second transparent electrode 109; the transmissive area 10b may include The first transparent electrode 104 and the second transparent electrode 109 are described.
  • phase retardation of the liquid crystal is caused by an electric field applied to the liquid crystal layer Determining the intensity, in order to delay the phase of the liquid crystal of the transmissive region 10b to the reflective region
  • the phase retardation of the liquid crystal of 10a is twice as large as the two electrodes of the transmissive region 10b.
  • the electric field strength between them is twice the electric field strength between the two electrodes of the reflection region 10a.
  • U ⁇ 0 ⁇ ED; wherein U is between two electrodes (reflecting electrode 103 and second transparent electrode 109, or first transparent electrode 104 and second transparent electrode 109)
  • the voltage E is the electric field strength formed between the two electrodes
  • D is the spacing between the two electrodes
  • ⁇ 0 is the vacuum dielectric constant
  • ⁇ is the dielectric constant of the dielectric layer between the two electrodes.
  • the electric field strength is related to the spacing between the two electrodes and the dielectric layer between the two electrodes; wherein the electric field strength and the spacing between the two electrodes and the dielectric layer between the two electrodes
  • the product of the dielectric constant is inversely proportional. Therefore, the electric field intensity of the transmissive region 10b is twice the electric field strength of the reflective region 10a, which can be achieved by controlling the spacing between the two electrodes and the dielectric layer between the electrodes, that is, the control parameter ⁇ D.
  • the reflective electrode 103 and the second transparent electrode Electric field strength between 109 and the first transparent electrode 104 and the second transparent electrode
  • the difference in electric field strength between 109 is only at the reflective electrode 103 and the first a first organic transparent insulating layer 105 between the transparent electrodes 104; based thereon, Selecting a thickness and a dielectric constant of the first organic transparent insulating layer 105 to make the transmission
  • the electric field intensity of the region 10b is twice the electric field strength of the reflection region 10a, thereby achieving half Transflective function.
  • the reflective electrode 103 may be an opaque material, for example, having a high reflectance.
  • Metal electrode the first transparent electrode 104 may be a transparent material, such as indium tin oxide (Indium Tin Oxide, referred to as ITO) electrode.
  • each of the pixel units includes the reflective area 10a and the transmissive area 10b, in the embodiment of the invention, for the phase of the reflective region 10a and the transmissive region 10b
  • the position is not specifically limited; that is, the reflective region 10a and the thin film transistor may be Corresponding to the position of 102, the transmissive area 10b and the thin film transistor 102 may also be The location corresponds.
  • the reflective electrode 103 and the first transparent Electrical connection relationship between the electrodes 104 are not limited. That is, the reflective electrode 103 And electrically connecting the first transparent electrode 104 and the drain 1025, or No electrical connection.
  • the reflective electrode 103 and the first transparent electrode 104 and the drain 1025 In the case of electrical connection, referring to FIGS. 1 to 3, the reflective electrode 103 and the The first transparent electrode 104 can serve as a pixel electrode of the array substrate 10;
  • the array substrate 10 or the color filter substrate may further include a second transparent electrode 109 as a public Common electrode.
  • the reflective electrode 103 and the first transparent electrode 104 and the drain 1025 In the case where there is no electrical connection between, referring to FIG. 4, the reflective electrode 103 and the first A transparent electrode 104 can serve as a common electrode of the array substrate 10;
  • the array substrate 10 further includes a second transparent electrode 109 electrically connected to the drain 1025. It is a pixel electrode.
  • the reflective electrode 103 and the first transparent electrode 104 are used as public electricity
  • the second transparent electrode 109 is used as the pixel electrode
  • Achieving an electrical connection between the second transparent electrode 109 and the drain 1025 requires a pattern layer between the second transparent electrode 109 and the drain 1025, for example A via hole is provided in the reflective electrode 103 and the first organic transparent insulating layer 105.
  • the relative positions between the source 1024 and the drain 1025 can be interchanged.
  • the second transparent electrode 109 and the drain 1025 is realized.
  • a relatively large size can be formed in the reflective electrode 103.
  • its material is, for example a transparent resin can be poured into the via of the reflective electrode 103, and then in the first A relatively small via hole is formed in the organic transparent insulating layer 105; Ensuring that when the second transparent electrode 109 passes through a via in the reflective electrode 103 When the drains 1025 are electrically connected, the second transparent electrode 109 and the reflective electrode 103 Electrical insulation between.
  • the thin film transistor 102 may be a top gate type thin
  • the film transistor may also be a bottom gate type thin film transistor, which is not limited in detail.
  • the thin film transistor 102 is a bottom gate type thin film transistor, it may be, for example, In order to include a gate electrode 1021, a gate insulating layer 1022, a semiconductor active layer 1023, and a source in this order Pole 1024 and drain 1025.
  • the reflective electrode 103 can Directly contacting the drain 1025 by means of bridging to achieve electrical connection; or, As shown in FIG. 2, the reflective electrode 103 can pass through the reflective electrode 103 and the The vias in the pattern layer between the drains 1025 are electrically connected to the drain 1025.
  • This The specific connection manner between the reflective electrode 103 and the drain 1025 is as follows. The actual structure of the array substrate 10 is designed.
  • the thin film transistor 102 is a top gate type thin film transistor, it may be, for example, In order to include the semiconductor active layer 1023, the source 1024 and the drain 1025, and the gate insulating layer in this order 1022, and a gate 1021; at this time, due to the source 1024 and the drain 1025 Located below the gate insulating layer 1022, and the reflective electrode 103 needs to be opposite to the drain Electrical connection between 1025, therefore, the gate insulating layer 1022 should include A via electrically connected between the reflective electrode 103 and the drain 1025.
  • the thin film transistor 102 is preferred in the embodiment of the present invention. It is a bottom gate type thin film transistor.
  • Embodiments of the present invention provide an array substrate 10 including a plurality of pixels arranged in an array A unit, each of which includes a reflective area 10a and a transmissive area 10b.
  • the array substrate 10 includes a base substrate 101, and is disposed on the substrate base Thin film transistor 102 on board 101, reflective electrode 103 electrically connected to each other, and first transparent An electrode 104; disposed between the reflective electrode 103 and the first transparent electrode 104 a first organic transparent insulating layer 105, and the reflective electrode 103 is located at the first organic transparent layer
  • the insulating layer 105 is adjacent to one side of the base substrate 101. Wherein the reflective electrode 103 is located in the reflective area 10a, and the first transparent electrode 104 is located in the transmissive area 10b.
  • the first transparent electrode 104 is disposed, and the reflective electrode 103 and the first transparent The electrodes 104 are disposed in different layers (the reflective electrode 103 is adjacent to the base substrate 101, The first transparent electrode 104 is away from the base substrate 101) to make the reflective area 10a
  • the spacing between the reflective electrode 103 and the second transparent electrode 109 is greater than the distance Between the first transparent electrode 104 and the second transparent electrode 109 of the shot 10b On the basis of the reflection electrode 103 and the second transparent electrode 109 The spacing between the first transparent electrode 104 and the second transparent electrode 109 The difference in distance is between the reflective electrode 103 and the first transparent electrode 104.
  • a first organic transparent insulating layer 105 at the reflective electrode a voltage between the 103 and the second transparent electrode 109 and the first transparent electrode 104 and In the case where the voltages between the second transparent electrodes 109 are equal, by controlling the first The relationship between the dielectric constant and the thickness of the transparent insulating layer 105 allows the transmission to be made
  • the electric field intensity of the region 10b is twice the electric field strength of the reflection region 10a, thereby making the
  • the phase retardation of the liquid crystal of the transmissive region 10b is delayed by the phase of the liquid crystal of the reflective region 10a 2 times; based on this, when the array substrate 10 is applied to a liquid crystal display panel, Displayed by light from a translucent backlight in a darker environment, and in a brighter environment The light that reflects the external environment is displayed, which can reduce energy consumption and improve light utilization.
  • the relative positions of the reflective region 10a and the transmissive region 10b are known.
  • the arrangement is interchangeable; however, it is considered that the reflective region 10a is an opaque region and is in contact with the thin film crystal
  • the area corresponding to the position of the body tube 102 is also not transparent, so optionally, the reflective area 10a Corresponding to the position of the thin film transistor 102; this is advantageous for improving the liquid crystal display panel Opening ratio.
  • the reflective electrode 103 and the first transparent electrode 104 are disposed between a first organic transparent insulating layer 105
  • the A transparent electrode 104 may be disposed in the first organic transparent insulating layer 105
  • the hole is in contact with the reflective electrode 103 to achieve an electrical connection relationship.
  • the reflective electrode 103 and the first The transparent electrode 104 may be electrically connected to the drain 1025 of the thin film transistor 102.
  • the reflective electrode 103 and the first transparent electrode 104 can be used as the The pixel electrode of the array substrate 10.
  • the reflective electrode 103 and the first transparent electrode 104 may both be plate-shaped electrode.
  • the electrical connection between the reflective electrode 103 and the drain 1025 may include the direct bridge connection shown in FIG. 1 and the through-hole connection shown in FIG. Ways.
  • the array substrate 10 may further include a thin film crystal disposed a second transparent insulating layer 106 between the tube 102 and the reflective electrode 103, which may be a transparent insulating layer; wherein the reflective electrode 103 can be disposed in the second A via in the transparent insulating layer 106 is in contact with the drain 1025.
  • the second organic transparent insulating layer 106 it is possible to increase not only The flatness of the array substrate 10 can also reduce the data on the array substrate 10. A parasitic capacitance between the line and the first transparent electrode 104.
  • the thin film transistor 102 may include a gate electrode 1021, a gate insulating layer 1022, and a semiconductor provided on the base substrate 101 a source layer 1023, and a source 1024 and a drain 1025; thus, when the second organic transparent The insulating layer 106 is disposed directly over the source 1024 and the drain 1025 due to a material of the organic transparent insulating layer 106 such as a resin material and the source 1024 and the The adhesion of the material of the drain 1025, such as a metal material, is not good, and may result in a junction. Poor problem; based on this, as shown in FIG. 5, the array substrate 10 may further include Provided at the source 1024 and the drain 1025 of the thin film transistor 102 and the second organic An adhesion layer 107 between the transparent insulating layers 106.
  • the adhesion layer 107 is used to add the second organic transparent insulating layer 106.
  • the bonding strength between the source and drain metal layers may be selected from, for example, silicon nitride or silicon oxide. And one of the materials of the passivation layer such as silicon oxynitride.
  • the first An organic transparent insulating layer 105 and the second organic transparent insulating layer 106 are preferably high Transparent resin layer with transmittance.
  • the material of the transparent resin layer may include a polyimide resin or acrylic One of the resin-like materials.
  • the transparent resin layer not only has a high transmittance, but also has a thickness
  • the settings are relatively thick. Based on this, when the reflective electrode 103 and the second transparent electrode When the spacing between 109 needs to be adjusted, the thickness of the transparent resin layer can be adjusted. achieve.
  • the array substrate 10 includes a thin film crystal disposed on the base substrate 101 a tube 102 and a reflective electrode 103 electrically connected to the drain 1025 of the thin film transistor 102 And a first transparent electrode 104, the reflective electrode 103 and the first transparent electrode 104 a first organic transparent insulating layer 105 between the thin film transistor 102 and the
  • the array substrate 101 is a Twist Nematic (TN) array substrate.
  • TN Twist Nematic
  • the substrate 10 further includes a passivation layer 108 disposed in sequence over the first transparent electrode 104. And a second transparent electrode 109; wherein, the reflective electrode 103 and the first transparent electricity In the case where there is no electrical connection between the pole 104 and the drain 1025 of the thin film transistor 102, the second transparent electrode 109 may also be electrically connected to the drain 1025.
  • the second transparent electrode 109 may include a plurality of electrically connected strip electrodes.
  • the reflective electrode 103 and the first transparent electrode 104 and the drain 1025 When electrically connected, the reflective electrode 103 and the first transparent electrode 104 can serve as The pixel electrode and the second transparent electrode 109 may serve as a common electrode.
  • the reflective electrode 103 and the first transparent electrode 104 and the drain 1025 When there is no electrical connection between, the second transparent electrode 109 and the drain 1025 are electrically connected Connected as a pixel electrode, the reflective electrode 103 and the first transparent electrode 104 Can be used as a common electrode.
  • the array substrate 10 is an advanced super-dimensional field conversion type (Advanced) Super Dimensional Switching (ADS) array substrate.
  • ADS Advanced Super Dimensional Switching
  • the second transparent electrode 109 and the reflective electrode 103 or The first transparent electrodes 104 are all disposed on the array substrate 10 through the same plane.
  • the electric field generated by the edge of the slit electrode and the gap between the slit electrode layer and the plate electrode layer The electric field forms a multi-dimensional electric field, so that all the alignment liquids between the slit electrodes in the liquid crystal cell and directly above the electrodes
  • the crystal molecules are capable of rotating, thereby improving the liquid crystal working efficiency and increasing the light transmission efficiency.
  • Advanced super-dimensional field conversion technology can improve the picture quality of the display panel, with high resolution, High transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, no squeeze water ripple, etc. point.
  • the embodiment of the invention further provides a liquid crystal display panel, as shown in FIG. 6 and FIG.
  • the liquid crystal display panel includes the array substrate 10 and the color filter substrate 20 formed by the box, and the bit a liquid crystal layer 30 between the two substrates; wherein the array substrate 10 is the array substrate described above board.
  • the array base The board 10 includes only the reflective electrode 103 and the first transparent electrode 104, and the color filter substrate 20 includes The second transparent electrode 109 is included; wherein the second transparent electrode 109 may be a plate electrode.
  • the array The substrate 10 includes a reflective electrode 103 and a first transparent electrode 104, and a second transparent electrode 109; wherein the second transparent electrode 109 can be a plurality of electrically connected strip electrodes.
  • the reflective electrode 103 and the second transparent electrode 109 are known. a spacing between the first transparent electrode 104 and the second transparent electrode 109 The spacing is not equal; wherein, between the reflective electrode 103 and the second transparent electrode 109
  • the dielectric layer includes a first organic transparent insulating layer 105 and a passivation layer 108, and a liquid crystal layer 30;
  • the dielectric layer between the first transparent electrode 104 and the second transparent electrode 109 includes a blunt Layer 108 and liquid crystal layer 30.
  • ⁇ 0 is the vacuum dielectric constant
  • ⁇ P is the dielectric constant of the passivation layer 108
  • ⁇ L is the dielectric constant of the liquid crystal layer
  • ⁇ R is the dielectric constant of the first organic transparent insulating layer
  • D P is blunt
  • DL is the thickness of the liquid crystal layer
  • D R is the thickness of the first organic transparent insulating layer
  • U is the voltage between the two electrodes
  • E 1 is the electric field strength of the transmissive region 10b
  • E 2 is the reflective region The electric field strength of 10a.
  • the thickness of the first organic transparent insulating layer 105 can be set according to the actual material of the first organic transparent insulating layer 105.
  • ⁇ 0 is a vacuum dielectric constant
  • ⁇ P is a dielectric constant of the passivation layer 108
  • ⁇ R is a dielectric constant of the first organic transparent insulating layer
  • D P is a thickness of the passivation layer 108
  • D R is a The thickness of an organic transparent insulating layer
  • U is the voltage between the two electrodes
  • E 1 is the electric field strength of the transmissive region 10b
  • E 2 is the electric field strength of the reflective region 10a.
  • the thickness of the first organic transparent insulating layer 105 can be set according to the actual material of the first organic transparent insulating layer 105.
  • the material of the passivation layer 108 may include silicon nitride, silicon oxide, and oxynitride.
  • the dielectric constant is relatively large, such as the dielectric constant of silicon nitride Usually between 6.5 and 6.8;
  • the material of the first organic transparent insulating layer 105 may include poly One of transparent resin materials such as imide and polycarbonate, which has a relatively small dielectric constant. Usually between 3 and 4.
  • the liquid crystal display panel may further include a set in the The first polarizer 40 on the side of the array substrate 10 facing away from the liquid crystal layer 30 and disposed on The color filter substrate 20 faces away from the second polarizer 50 on the side of the liquid crystal layer 30,
  • the transmission axes of a polarizer 40 and the second polarizer 50 are perpendicular to each other; wherein A polarizer 40 further includes a built-in first ⁇ /4 phase retardation film; the second polarizer 50 Also included is a built-in second ⁇ /4 phase retardation film.
  • the liquid crystal display panel includes an advanced super-dimensional field conversion type array substrate, the first The polarization direction of the polarizer 40 is a horizontal direction (0° polarizer), and the second polarizer 50 For example, the polarization direction is a vertical direction (90° polarizer), and the liquid crystal display panel is The principle of the bright state display and the dark state display are explained; wherein, FIG. 9 is the transmission area 10b realizes a schematic diagram of a bright state and a dark state, and FIG. 10 shows that the reflective region 10a realizes a bright state and A schematic diagram of the dark state.
  • the reflective area 10a and the The transmissive regions 10b are all displayed in a dark state, and the specific ray simulation is shown in FIG. 9 and FIG. The middle dark column is shown.
  • the light of the external environment is natural light.
  • the second polarizer 50 and the second polarizer are generated when passing through the second polarizer 50 (for example, a 90° polarizer)
  • the linearly polarized light of the sheet 50 parallel to the axial direction passes through the second ⁇ /4 phase delay a film, which can produce left-handed circularly polarized light; when the left-handed circularly polarized light passes through the liquid crystal layer At 30 o'clock, since the liquid crystal molecules in the liquid crystal layer 30 have no electric field influence, the left-handed rotation The circularly polarized light has no retardation; then the left-handed circularly polarized light enters the reflective electrode 103, After the ⁇ /2 delay of the reflective electrode 103, the left-handed circularly polarized light becomes a right-handed circular deviation Vibrating; the right-handed circularly polarized light enters the liquid crystal layer 30 again, without delay and again
  • the second ⁇ /4 phase retardation film becomes the transmission axis direction of the
  • the light emitted by the backlight approximates natural light.
  • the emitted light is generated and passed through the first polarizer 40 (eg, a 0° polarizer)
  • the linearly polarized light of the first polarizer 40 parallel to the transmission axis direction passes through the first ⁇ /4 a phase retardation film that produces right-handed circularly polarized light; when the right-handed circularly polarized light passes through
  • the right-handed circularly polarized light has no delay; then the right-handed circularly polarized light enters the second ⁇ /4
  • the phase retardation film becomes linearly polarized light perpendicular to the transmission axis of the second polarizer 50, Therefore, it is impossible to eject from the second polarizer 50, thereby forming the darkness of the transmissive area 10b. state.
  • the first a ⁇ /4 phase retardation film is composited in the first polarizer 40, that is, the first ⁇ /4 phase extension
  • the retardation film belongs to a part of the first polarizer 40
  • the second ⁇ /4 phase retardation film is complex Engaging in the second polarizer 50, that is, the second ⁇ /4 phase retardation film belongs to the first A part of the two polarizers 50.
  • the ⁇ /4 phase retardation film and the polarizer may also be formed separately.
  • the reflective area 10a and The transmissive regions 10b are all displayed in a bright state, and the specific ray simulation is shown in FIG. 9 and The column in the 10 bright state is shown.
  • the second polarizer 50 In the reflective region 10a, when light of the external environment passes through the second polarizer 50 Linearly polarized light parallel to the transmission axis direction of the second polarizer 50 is generated, and then passes through The second ⁇ /4 phase retardation film generates left-handed circularly polarized light; when the left-handed circular polarization When the light passes through the liquid crystal layer 30, the ⁇ /4 phase delay of the liquid crystal molecules in the liquid crystal layer 30 After the late action, the left circularly polarized light becomes a polarization direction and the second polarizer 50 Linearly polarized light that is perpendicular to the axial direction; then the linearly polarized light enters the reflective electrode 103, after the ⁇ /2 delay of the reflective electrode 103, still the polarization direction and the Linearly polarized light of the second polarizer 50 perpendicular to the transmission axis direction; the linearly polarized light enters again After the liquid crystal layer 30 is delayed, it becomes right-handed circularly polarized light;
  • the transmissive area 10b In the transmissive area 10b, light emitted by the backlight passes through the first polarizer 40 Linearly polarized light parallel to the transmission axis direction of the first polarizer 40 is generated, and then Through the first ⁇ /4 phase retardation film, right-handed circularly polarized light can be generated; when the right-handed circle When the polarized light passes through the liquid crystal layer 30, ⁇ /2 of the liquid crystal molecules in the liquid crystal layer 30 Phase delay action, becoming left-handed circularly polarized light; the left-handed circularly polarized light entering the second ⁇ /4 The phase retardation film becomes polarized and is parallel to the transmission axis direction of the second polarizer 50 Linearly polarized light can be emitted from the second polarizer 50 to form the transmission The bright state of the zone 10b.
  • the thickness of the liquid crystal layer is equal to the thickness of the liquid crystal layer corresponding to the reflective region 10a of the array substrate 10.
  • liquid crystal layer of the entire liquid crystal display panel has the same thickness, it can be effective. Simplify the preparation process and reduce the process difficulty.
  • the liquid crystal layer of the reflective region 10a is used.
  • the thickness is equal to the thickness of the liquid crystal layer of the transmissive region 10b as an example, but the present invention Not limited to this; that is, the thickness of the liquid crystal layer of the reflective region 10a and the transmissive region
  • the thickness of the liquid crystal layer of 10b may vary. In this case, only under a variety of media conditions The relationship between the voltage and the electric field strength can be set.
  • the embodiment of the invention further provides a method for preparing the array substrate 10, with reference to FIG. 1 to As shown in FIG. 4, comprising a plurality of pixel units forming an array arrangement, each of the pixel unit packages Include reflective region 10a and transmissive region 10b; for any pixel unit, the method includes: A thin film transistor 102 and a reflective electrode 103 electrically connected to each other are formed on the base substrate 101.
  • a first transparent electrode 104, and the reflective electrode 103 and the first transparent electricity a first organic transparent insulating layer 105 between the poles 104; wherein the reflective electrode 103 is located Below the first organic transparent insulating layer 105, the first transparent electrode 104 is located Above the first organic transparent insulating layer 105; the reflective electrode 103 is formed in the The reflective region 10a, the first transparent electrode 104 is formed in the transmissive region 10b.
  • the first formed is referred to as the lower side and the rear side.
  • the formation is called the top.
  • the region 10a is preferably formed at a position corresponding to the thin film transistor 102.
  • the first transparent electrode 104 may pass through the first A via hole in the organic transparent insulating layer 105 is in contact with the reflective electrode 103, thereby realizing two Electrical connection relationship.
  • the method may include: forming the thin film transistor 102 Depositing a metal layer on the substrate and forming the reflective region 10a by a patterning process a metal electrode, which is the reflective electrode 103; the reflected electricity is formed Forming the first organic through hole including the via hole by a patterning process on the substrate of the pole 103 a clear insulating layer 105; deposited on the substrate on which the first organic transparent insulating layer 105 is formed An ITO layer, and an ITO electrode is formed in the transmissive region 10b by a patterning process, The ITO electrode is the first transparent electrode 104; wherein the reflective electrode 103 and The first transparent electrode 104 can pass through the first organic transparent insulating layer
  • the vias in 105 are in contact to achieve electrical connection.
  • the reflective electrode 103 can be made And the first transparent electrode 104 is electrically connected to the drain 1025 of the thin film transistor 102;
  • the reflective electrode 103 and the first transparent electrode 104 can serve as the array The pixel electrode of the column substrate 10.
  • the via holes in the layer 105 are in contact with the reflective electrode 103 to achieve electrical connection, so that only The reflection between the reflective electrode 103 and the drain 1025 can achieve the reflection
  • the manner in which the reflective electrode 103 and the drain 1025 are electrically connected to each other may be The bridge connection method shown in FIG. 1 or the via connection method shown in FIG. 2 is considered.
  • the method may further include Forming a second organic transparent insulating layer between the thin film transistor 102 and the reflective electrode 103 106; wherein the reflective electrode 103 is formed in the second organic transparent insulating layer A via in 106 is in contact with the drain 1025.
  • the second organic transparent insulating layer 106 has an increase in the array substrate 10 Flatness and reduction of data lines on the array substrate 10 and the first transparent The effect of parasitic capacitance between the electrodes 104.
  • first organic transparent insulating layer 105 and the second organic transparent insulating layer 106 is preferably a transparent resin layer having high transmittance.
  • the material of the transparent resin layer is specific One of a polyimide-based resin or an acrylic resin material may be included.
  • the second organic transparent insulating layer 106 is directly formed at the source 1024 and Above the drain 1025, this may cause a problem of poor bonding; based on this, the reference As shown in FIG. 5, the source 1024 and the drain 1025 of the thin film transistor 102 are as described above.
  • An adhesion layer 107 may also be formed between the second organic transparent insulating layers 106, thereby increasing the The bonding strength of the second organic transparent insulating layer 106 to the source/drain metal layer.
  • the adhesion The layer 107 may be one selected from the group consisting of silicon nitride, silicon oxide, and silicon oxynitride.
  • a TN type array substrate can be formed based on the above description. But TN type array substrate The range of viewing angle is narrow, and grayscale inversion may occur as the range of viewing angle changes; Further, a passivation layer 108 may be sequentially formed over the first transparent electrode 104. And a second transparent electrode 109. Wherein the reflective electrode 103 and the first transparent electricity In the case where there is no electrical connection between the pole 104 and the drain 1025 of the thin film transistor 102, The second transparent electrode 109 is electrically connected to the drain 1025. This can form a high Grade super-dimensional field conversion array substrate with high resolution, high transmittance, low power consumption, wide viewing Angle, high aperture ratio, low chromatic aberration, no squeezing water ripples, etc.
  • the second transparent electrode 109 may include a plurality of electrically connected strip electrodes.

Abstract

阵列基板及其制备方法、液晶显示面板。阵列基板（10）包括阵列排布的多个像素单元，每个像素单元包括反射区（10a）和透射区（10b），针对任一个像素单元，阵列基板（10）包括衬底基板（101）、设置在衬底基板（101）上的薄膜晶体管（102）、以及相互电连接的反射电极（103）和第一透明电极（104），反射电极（103）位于反射区（10a），第一透明电极（104）位于透射区（10b），其中：在反射电极（103）和第一透明电极（104）之间还设置第一透明绝缘层（105），且反射电极（103）位于第一透明绝缘层（105）靠近衬底基板（101）的一侧。

Description

阵列基板及其制备方法、液晶显示面板 技术领域
本发明涉及显示技术领域，尤其涉及阵列基板及其制备方法、液 晶显示面板。
背景技术
半透半反式液晶显示装置在构成其液晶显示面板的显示区域内 包括透射区和反射区；其中，所述透射区通过对来自背光源的光的透 射量进行控制而实现透射型显示，所述反射区通过对来自外部环境的 光的反射量进行控制而实现反射型显示。即，所述半透半反式液晶显 示装置在较暗的环境下主要通过透射型显示，而在较亮的环境下主要 通过反射型显示，从而确保显示图像的视认性。
在设计半透半反式液晶显示装置时，需要将透射区和反射区的相 位延迟R设置为相差2倍，例如可以将所述透射区的相位延迟设置 为λ/2，将所述反射区的相位延迟设置为λ/4；其中，λ为对显示有贡 献的光的波长。
目前，主要是通过控制所述透射区和所述反射区液晶层厚度d 的不同，即控制所述透射区的液晶层厚度为所述反射区的液晶层厚度 的2倍，来实现半透半反式显示的。
发明内容
本发明提出了一种新的具有半透半反功能的阵列基板结构。
根据本发明的一个方面，提供一种阵列基板，包括阵列排布的多 个像素单元，每个所述像素单元包括反射区和透射区，针对任一个 像素单元，所述阵列基板包括衬底基板、设置在所述衬底基板上的薄 膜晶体管、以及相互电连接的反射电极和第一透明电极，所述反射电 极位于所述反射区，所述第一透明电极位于所述透射区，其中：在所 述反射电极和所述第一透明电极之间还设置第一透明绝缘层，且所述 反射电极位于所述第一透明绝缘层靠近所述衬底基板的一侧。
可选地，所述反射区与所述薄膜晶体管的位置对应。
进一步可选地，所述第一透明电极通过设置在所述第一透明绝缘 层中的过孔与所述反射电极电接触。
可选地，所述第一透明绝缘层为具有高透过率的树脂层。
可选地，所述薄膜晶体管为底栅型薄膜晶体管。
可选地，上述阵列基板中，所述反射电极和所述第一透明电极与 所述薄膜晶体管的漏极电连接。
进一步可选地，所述阵列基板还包括设置在所述薄膜晶体管与所 述反射电极之间的第二透明绝缘层；其中，所述反射电极通过设置在 所述第二透明绝缘层中的过孔与所述漏极电接触。进一步可选地，所 述阵列基板还包括粘附层，设置在所述第二透明绝缘层与薄膜晶体管 的源极和漏极之间。
可选地，所述第二透明绝缘层为具有高透过率的树脂层。
所述反射电极与所述漏极之间也可以以搭桥连接方式电连接。
可选地，上述阵列基板还包括设置在所述第一透明电极上方的钝 化层。
进一步，该阵列基板还包括设置在所述钝化层上的第二透明电极。 在所述反射电极和所述第一透明电极与所述薄膜晶体管的漏极之间 无电连接的情况下，所述第二透明电极可与所述漏极电连接。所述第 二透明电极可利用穿过所述反射电极和所述第一有机透明绝缘层的 过孔与所述漏极电连接。所述第二透明电极可为多个电连接的条状电 极。
本发明还提供了一种液晶显示面板，包括：对盒成型的阵列基板 和彩膜基板，以及位于两基板之间的液晶层；所述阵列基板包括阵列 排布的多个像素单元，每个所述像素单元包括反射区和透射区，针 对任一个像素单元，所述阵列基板包括衬底基板、设置在所述衬底基 板上的薄膜晶体管、以及相互电连接的反射电极和第一透明电极，所 述反射电极位于所述反射区，所述第一透明电极位于所述透射区，其 中：在所述反射电极和所述第一透明电极之间还设置第一透明绝缘层， 且所述反射电极位于所述第一透明绝缘层靠近所述衬底基板的一侧。
可选地，所述阵列基板的透射区对应的液晶层厚度等于与所述阵 列基板的反射区对应的液晶层厚度；所述阵列基板还包括设置在所述 第一透明电极上方的钝化层；在所述彩膜基板的面对所述液晶层的一 侧设置有第二透明电极，其中，满足以下条件：ε RD R＝ε PD P+ε LD L， 其中：ε P为钝化层的介电常数，ε L为液晶层的介电常数，ε R为第一透 明绝缘层的介电常数，D P为钝化层的厚度，D L为液晶层的厚度，D R 为第一透明绝缘层的厚度。
或者可选地，所述阵列基板的透射区对应的液晶层厚度等于与所 述阵列基板的反射区对应的液晶层厚度；所述阵列基板还包括设置在 所述钝化层上的第二透明电极，其中，满足以下条件：ε RD R＝ε PD P， 其中：ε P为钝化层的介电常数，ε R为第一透明绝缘层的介电常数， D P为钝化层的厚度，D R为第一透明绝缘层的厚度。
可选地，所述阵列基板的透射区的电场强度为所述阵列基板的反 射区的电场强度的两倍。进一步地，与所述阵列基板的透射区对应的 液晶层厚度等于与所述阵列基板的反射区对应的液晶层厚度。
可选的，所述液晶显示面板还包括设置在所述阵列基板背离所述 液晶层一侧的第一偏光片，所述第一偏光片还包括内置的第一λ/4相 位延迟膜；以及设置在所述彩膜基板背离所述液晶层一侧的第二偏光 片，所述第二偏光片还包括内置的第二λ/4相位延迟膜，所述第一偏 光片和所述第二偏光片的透过轴相互垂直。
本发明也涉及一种阵列基板的制备方法，所述阵列基板包括阵列 排布的多个像素单元，每个所述像素单元包括反射区和透射区，其中， 针对任一个像素单元，所述方法包括步骤：在衬底基板上形成薄膜晶 体管；在反射区形成反射电极；在反射电极上方形成第一透明绝缘层； 以及在第一透明绝缘层上方形成第一透明电极，所述第一透明电极与 反射电极电连接。
可选地，所述反射区与所述薄膜晶体管的位置对应。
进一步可选地，所述方法还包括步骤：在所述第一透明绝缘层中 形成过孔，所述第一透明电极通过所述过孔与所述反射电极电接触。
可选的，所述反射电极与所述薄膜晶体管的漏极电连接。
进一步可选的，所述方法还包括步骤：在所述薄膜晶体管与所述 反射电极之间形成第二透明绝缘层，其中，所述反射电极通过形成在 所述第二透明绝缘层中的过孔与所述漏极电接触。
进一步的，所述方法还包括步骤：在所述第一透明电极上方依次 形成钝化层和第二透明电极；以及在所述反射电极和所述第一透明电 极与所述薄膜晶体管的漏极之间无电连接的情况下，将所述第二透明 电极与所述漏极电连接。
可选地，上述的方法中，所述阵列基板的透射区对应的液晶层厚 度等于与所述阵列基板的反射区对应的液晶层厚度，所述方法还包括 步骤：选择第一透明绝缘层的介电常数与厚度，使得在所述反射电极 和所述第二透明电极之间的电压与所述第一透明电极和所述第二透 明电极之间的电压相等的情况下，所述透射区的电场强度为所述反射 区的电场强度的2倍。
进一步可选地，所述阵列基板的透射区对应的液晶层厚度等于与 所述阵列基板的反射区对应的液晶层厚度；所述方法还包括步骤：选 择第一透明绝缘层的厚度D R以满足以下条件：ε RD R＝ε PD P，其中：ε P 为钝化层的介电常数，ε R为第一透明绝缘层的介电常数，D P为钝化 层的厚度。通过在所述反射区设置所述反射电极，在所述透射区设置 所述第一透明电极，并使所述反射电极和所述第一透明电极不同层设 置(所述反射电极靠近所述衬底基板，所述第一透明电极远离所述衬 底基板)，来使所述反射区的所述反射电极和所述第二透明电极之间 的间距大于所述透射区的所述第一透明电极和所述第二透明电极之 间的间距；在此基础上，由于所述反射电极和所述第二透明电极之间 的间距与所述第一透明电极和所述第二透明电极之间的间距的不同 在于位于所述反射电极和所述第一透明电极之间的第一有机透明绝 缘层，因此本发明实施例中，在所述反射电极和所述第二透明电极之 间的电压与所述第一透明电极和所述第二透明电极之间的电压相等 的情况下，通过控制(或选择)该第一有机透明绝缘层的介电常数与 厚度，可以使所述透射区的电场强度为所述反射区的电场强度的2倍， 从而可以使所述透射区的液晶的相位延迟为所述反射区的液晶的相 位延迟的2倍；基于此，当所述阵列基板应用于液晶显示面板时，便 可以在较暗的环境下通过透射背光源的光进行显示，而在较亮的环境 下通过反射外部环境的光进行显示，从而可以降低能耗，提高光的利 用率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对 实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地， 下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员 来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附 图。
图1为本发明实施例提供的一种阵列基板的结构示意图一；
图2为本发明实施例提供的一种阵列基板的结构示意图二；
图3为本发明实施例提供的一种阵列基板的结构示意图三；
图4为本发明实施例提供的一种阵列基板的结构示意图四；
图5为本发明实施例提供的一种阵列基板的结构示意图五；
图6为本发明实施例提供的一种液晶显示面板的结构示意图一；
图7为本发明实施例提供的一种液晶显示面板的结构示意图二；
图8为本发明实施例提供的一种液晶显示面板的结构示意图三；
图9为本发明实施例提供的液晶显示面板的透射区实现亮态和 暗态的示意图；
图10为本发明实施例提供的液晶显示面板的反射区实现亮态和 暗态的示意图。
附图标记：
10-阵列基板；10a-反射区；10b-透射区；101-衬底基板；102-薄 膜晶体管；1021-栅极；1022-栅绝缘层；1023-半导体有源层；1024- 源极；1025-漏极；103-反射电极；104-第一透明电极；105-第一有机 透明绝缘层；106-第二有机透明绝缘层；107-粘附层；108-钝化层； 109-第二透明电极；20-彩膜基板；30-液晶层；40-第一偏光片；50- 第二偏光片。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进 行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例， 而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没 有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的 范围。
本发明实施例提供一种阵列基板10，如图1至图4所示，包括 阵列排布的多个像素单元，每个所述像素单元包括反射区10a和透射 区10b。针对任一个像素单元，所述阵列基板10包括衬底基板101、 设置在所述衬底基板101上的薄膜晶体管102、以及相互电连接的反 射电极103和第一透明电极104；在所述反射电极103和所述第一透 明电极104之间还设置第一透明绝缘层105，例如有机透明绝缘层105， 且所述反射电极103位于所述第一有机透明绝缘层105靠近所述衬底 基板101的一侧。其中，所述反射电极103位于所述反射区10a，所 述第一透明电极104位于所述透射区10b。
当所述阵列基板10应用于液晶显示面板时，所述液晶显示面板 可包括第二透明电极109；这样，所述反射区10a便可以包括所述反 射电极103和所述第二透明电极109；所述透射区10b便可以包括所 述第一透明电极104和所述第二透明电极109。
根据半透半反式液晶显示面板的设计原理，需要将所述透射区 10b的相位延迟设定为所述反射区10a的相位延迟的2倍，即 d 1×Δn 1＝2×d 2×Δn 2；其中，d 1为所述透射区10b的液晶层厚度，Δn 1 为所述透射区10b的液晶的相位延迟，d 2为所述反射区10a的液晶层 厚度，Δn 2为所述反射区10a的液晶的相位延迟。
基于此，本发明实施例，在所述透射区10b的液晶层厚度与所述 反射区10a的液晶层厚度相等，即d 1＝d 2的情况下，通过控制所述透 射区10b的液晶的相位延迟为所述反射区10a的液晶的相位延迟的2 倍，即Δn 1＝2Δn 2，来实现半透半反功能。
在此基础上，由于所述液晶的相位延迟是由施加于液晶层的电场 强度决定的，为了使所述透射区10b的液晶的相位延迟为所述反射区 10a的液晶的相位延迟的2倍，便需要使所述透射区10b的两电极之 间的电场强度为所述反射区10a的两电极之间的电场强度的2倍。
具体的，根据电压与电场强度的关系式：U＝ε 0εED；其中，U为 两电极(反射电极103和第二透明电极109，或第一透明电极104和 第二透明电极109)之间的电压，E为形成于两电极之间的电场强度， D为两电极之间的间距，ε 0为真空介电常数，ε为两电极之间的介质 层的介电常数。由此可知，在相同的电压下，电场强度与两电极之间 的间距以及位于两电极之间的介质层有关；其中，电场强度与两电极 之间的间距和位于两电极之间的介质层的介电常数的乘积成反比。因 此，要使所述透射区10b的电场强度为所述反射区10a的电场强度的 2倍，可以通过控制两电极之间的间距以及位于两电极之间的介质层， 即控制参数εD实现。
在此基础上，由于设置在所述第一透明电极104和所述第二透明 电极109之间的其余图案层，在所述透射区10b和所述反射区10a的 介电常数和间距相等，因此所述反射电极103和所述第二透明电极 109之间的电场强度与所述第一透明电极104和所述第二透明电极 109之间的电场强度的差异，仅在于位于所述反射电极103和所述第 一透明电极104之间的第一有机透明绝缘层105；基于此，可以通过 选择所述第一有机透明绝缘层105的厚度和介电常数，以使所述透射 区10b的电场强度为所述反射区10a的电场强度的2倍，从而实现半 透半反功能。
需要说明的是，第一，基于所述反射区10a与所述透射区10b光 源的不同，所述反射电极103可以为不透明材质，例如具有高反射率 的金属电极，所述第一透明电极104可以为透明材质，例如氧化铟锡 (Indium Tin Oxide，简称ITO)电极。
第二，每个所述像素单元均包括所述反射区10a和所述透射区 10b，在本发明实施例中对于所述反射区10a和所述透射区10b的相 对位置不作具体限定；即，可以是所述反射区10a与所述薄膜晶体管 102的位置相对应，也可以是所述透射区10b与所述薄膜晶体管102 的位置相对应。
第三，本发明实施例中仅限定了所述反射电极103和所述第一透 明电极104之间的电连接关系，但对于其与所述薄膜晶体管102的漏 极1025之间的电连接关系并未作限定。也就是说，所述反射电极103 和所述第一透明电极104与所述漏极1025之间可以电连接，也可以 无电连接。
在所述反射电极103和所述第一透明电极104与所述漏极1025 之间电连接的情况下，参考图1至图3所示，所述反射电极103和所 述第一透明电极104可以作为所述阵列基板10的像素电极；此时， 所述阵列基板10或者彩膜基板还可以包括第二透明电极109作为公 共电极。
在所述反射电极103和所述第一透明电极104与所述漏极1025 之间无电连接的情况下，参考图4所示，所述反射电极103和所述第 一透明电极104可以作为所述阵列基板10的公共电极；此时，所述 阵列基板10还需包括与所述漏极1025电连接的第二透明电极109作 为像素电极。
其中，当所述反射电极103和所述第一透明电极104作为公共电 极，所述第二透明电极109作为所述像素电极时，由于所述第二透明 电极109位于所述反射电极103和所述第一透明电极104的上方，要 实现所述第二透明电极109与所述漏极1025之间的电连接，便需要 在位于所述第二透明电极109和所述漏极1025之间的图案层例如所 述反射电极103和所述第一有机透明绝缘层105中设置过孔。这里， 参考图4所示，基于所述薄膜晶体管102中源极1024和漏极1025的 等效性，可以将所述源极1024和所述漏极1025之间的相对位置互换。
具体的，在实现所述第二透明电极109与所述漏极1025之间的 电连接的过程中，可以在所述反射电极103中形成一个尺寸相对较大 的过孔，这样，在形成所述第一有机透明绝缘层105时，其材料例如 透明树脂便可以灌注到所述反射电极103的过孔中，然后在所述第一 有机透明绝缘层105中再形成一个尺寸相对较小的过孔；这样便可以 保证当所述第二透明电极109通过所述反射电极103中的过孔与所述 漏极1025之间电连接时，所述第二透明电极109与所述反射电极103 之间的电绝缘。
第四，在本发明实施例中，所述薄膜晶体管102可以为顶栅型薄 膜晶体管，也可以为底栅型薄膜晶体管，具体不做限定。
在所述薄膜晶体管102为底栅型薄膜晶体管的情况下，其例如可 以依次包括栅极1021、栅绝缘层1022、半导体有源层1023、以及源 极1024和漏极1025。此时，参考图1所示，所述反射电极103可以 通过搭桥的方式直接与所述漏极1025接触以实现电连接；或者，参 考图2所示，所述反射电极103可以通过位于所述反射电极103和所 述漏极1025之间的图案层中的过孔与所述漏极1025实现电连接。这 里，所述反射电极103与所述漏极1025的具体连接方式需根据所述 阵列基板10的实际结构进行设计。
在所述薄膜晶体管102为顶栅型薄膜晶体管的情况下，其例如可 以依次包括半导体有源层1023、源极1024和漏极1025、栅绝缘层 1022、以及栅极1021；此时，由于所述源极1024和所述漏极1025 位于所述栅绝缘层1022的下方，而所述反射电极103需与所述漏极 1025之间电连接，因此，所述栅绝缘层1022应该包括用于实现所述 反射电极103和所述漏极1025之间电连接的过孔。
考虑到制备工艺的简化，本发明实施例优选所述薄膜晶体管102 为底栅型薄膜晶体管。
本发明实施例提供一种阵列基板10，包括阵列排布的多个像素 单元，每个所述像素单元包括反射区10a和透射区10b。针对任一个 像素单元，所述阵列基板10包括衬底基板101、设置在所述衬底基 板101上的薄膜晶体管102、相互电连接的反射电极103和第一透明 电极104；在所述反射电极103和所述第一透明电极104之间还设置 第一有机透明绝缘层105，且所述反射电极103位于所述第一有机透 明绝缘层105靠近所述衬底基板101的一侧。其中，所述反射电极 103位于所述反射区10a，所述第一透明电极104位于所述透射区10b。
通过在所述反射区10a设置所述反射电极103，在所述透射区10b 设置所述第一透明电极104，并使所述反射电极103和所述第一透明 电极104不同层设置(所述反射电极103靠近所述衬底基板101，所 述第一透明电极104远离所述衬底基板101)，来使所述反射区10a 的所述反射电极103和所述第二透明电极109之间的间距大于所述透 射区10b的所述第一透明电极104和所述第二透明电极109之间的间 距；在此基础上，由于所述反射电极103和所述第二透明电极109之 间的间距与所述第一透明电极104和所述第二透明电极109之间的间 距的不同在于位于所述反射电极103和所述第一透明电极104之间的 第一有机透明绝缘105层，因此本发明实施例中，在所述反射电极 103和所述第二透明电极109之间的电压与所述第一透明电极104和 所述第二透明电极109之间的电压相等的情况下，通过控制该第一有 机透明绝缘层105的介电常数与厚度之间的关系，便可以使所述透射 区10b的电场强度为所述反射区10a的电场强度的2倍，从而使所述 透射区10b的液晶的相位延迟为所述反射区10a的液晶的相位延迟的 2倍；基于此，当所述阵列基板10应用于液晶显示面板时，便可以 在较暗的环境下通过透射背光源的光进行显示，而在较亮的环境下通 过反射外部环境的光进行显示，从而可以降低能耗，提高光的利用率。
基于上述描述可知，所述反射区10a和所述透射区10b的相对位 置可以互换；但考虑到所述反射区10a为不透光区，且与所述薄膜晶 体管102的位置对应的区域也不透光，因此可选地，所述反射区10a 与所述薄膜晶体管102的位置对应；这样有利于提高液晶显示面板的 开口率。
考虑到所述反射电极103和所述第一透明电极104之间设置有所 述第一有机透明绝缘层105，为了实现所述反射电极103和所述第一 透明电极104之间的电连接，可选地，参考图1至图4所示，所述第 一透明电极104可以通过设置在所述第一有机透明绝缘层105中的过 孔与所述反射电极103接触，从而实现电连接关系。
进一步的，参考图1至图3所示，所述反射电极103和所述第一 透明电极104可以与所述薄膜晶体管102的漏极1025电连接。在此 情况下，所述反射电极103和所述第一透明电极104便可以作为所述 阵列基板10的像素电极。
这里，所述反射电极103和所述第一透明电极104可以均为板状 电极。
在此基础上，所述反射电极103与所述漏极1025之间的电连接 方式可以包括图1所示的直接搭桥连接和图2所示的通过过孔连接两 种方式。可选的，所述阵列基板10还可以包括设置在所述薄膜晶体 管102与所述反射电极103之间的第二透明绝缘层106，其可以是有 机透明绝缘层；其中，所述反射电极103可以通过设置在所述第二有 机透明绝缘层106中的过孔与所述漏极1025接触。
这样，通过设置所述第二有机透明绝缘层106，不仅可以增加所 述阵列基板10的平整度，还可以减小位于所述阵列基板10上的数据 线与所述第一透明电极104之间的寄生电容。
对于底栅型薄膜晶体管而言，所述薄膜晶体管102可以包括依次 设置在所述衬底基板101上的栅极1021、栅绝缘层1022、半导体有 源层1023、以及源极1024和漏极1025；这样，当所述第二有机透明 绝缘层106直接设置在所述源极1024和所述漏极1025上方时，由于 所述有机透明绝缘层106的材料例如树脂材料与所述源极1024和所 述漏极1025的材料例如金属材料之间的粘附性不好，可能会产生结 合不良的问题；基于此，如图5所示，所述阵列基板10还可以包括 设置在所述薄膜晶体管102的源极1024和漏极1025与所述第二有机 透明绝缘层106之间的粘附层107。
其中，所述粘附层107用于增加所述第二有机透明绝缘层106 与源漏金属层之间的结合强度，其材质可以选用例如氮化硅或氧化硅、 以及氮氧化硅等钝化层材质中的一种。
进一步的，为了避免对液晶显示面板的透过率产生影响，所述第 一有机透明绝缘层105和所述第二有机透明绝缘层106优选为具有高 透过率的透明树脂层。
其中，所述透明树脂层的材料可以包括聚酰亚胺类树脂或丙烯酸 类树脂材料中的一种。
这里，所述透明树脂层不仅具有透过率高的特点，其厚度还可以 设置的相对较厚。基于此，当所述反射电极103和所述第二透明电极 109之间的间距需要调整时，便可以通过调整所述透明树脂层的厚度 实现。
当所述阵列基板10包括设置在所述衬底基板101上的薄膜晶体 管102、与所述薄膜晶体管102的漏极1025电连接的反射电极103 和第一透明电极104、位于所述反射电极103和所述第一透明电极104 之间的第一有机透明绝缘层105、以及位于所述薄膜晶体管102和所 述反射电极103之间的第二有机透明绝缘层106时，所述阵列基板 101为一种扭曲向列型(Twist Nematic，简称TN)阵列基板。但受 限于TN型阵列基板的特性，随着视角范围的变化，所述TN型阵列 基板可能会发生灰阶反转现象，从而导致视角范围变窄。
在此基础上，参考图3至图5所示，本发明实施例优选所述阵列 基板10还包括依次设置在所述第一透明电极104上方的钝化层108 和第二透明电极109；其中，在所述反射电极103和所述第一透明电 极104与所述薄膜晶体管102的漏极1025之间无电连接的情况下， 所述第二透明电极109还可以与所述漏极1025电连接。
这里，所述第二透明电极109可以包括多个电连接的条状电极。
当所述反射电极103和所述第一透明电极104与所述漏极1025 之间电连接时，所述反射电极103和所述第一透明电极104可以作为 像素电极、所述第二透明电极109可以作为公共电极。
当所述反射电极103和所述第一透明电极104与所述漏极1025 之间无电连接时，所述第二透明电极109与所述漏极1025之间电连 接、可以作为像素电极，所述反射电极103和所述第一透明电极104 可以作为公共电极。
这样，所述阵列基板10为一种高级超维场转换型(Advanced  Super Dimensional Switching，简称ADS)阵列基板。对于高级超维 场转换型阵列基板，所述第二透明电极109与所述反射电极103或所 述第一透明电极104均设置在所述阵列基板10上，通过同一平面内 狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的 电场形成多维电场，使液晶盒内狭缝电极间、电极正上方所有取向液 晶分子都能够产生旋转，从而提高了液晶工作效率并增大了透光效率。 高级超维场转换技术可以提高显示面板的画面品质，具有高分辨率、 高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹等优 点。
本发明实施例还提供一种液晶显示面板，如图6和图7所示，所 述液晶显示面板包括对盒成型的阵列基板10和彩膜基板20，以及位 于两基板之间的液晶层30；其中，所述阵列基板10为上述的阵列基 板。
当所述液晶显示面板为TN模式时，参考图7所示，所述阵列基 板10仅包括反射电极103和第一透明电极104，所述彩膜基板20包 括第二透明电极109；其中，所述第二透明电极109可以为板状电极。
当所述液晶显示面板为ADS模式时，参考图6所示，所述阵列 基板10包括反射电极103和第一透明电极104、以及第二透明电极 109；其中，所述第二透明电极109可以为多个电连接的条状电极。
基于上述描述可知，所述反射电极103和所述第二透明电极109 之间的间距与所述第一透明电极104和所述第二透明电极109之间的 间距不等；其中，所述反射电极103和所述第二透明电极109之间的 介质层包括第一有机透明绝缘层105和钝化层108、以及液晶层30； 所述第一透明电极104和所述第二透明电极109之间的介质层包括钝 化层108和液晶层30。
根据电压与电场强度的关系式：U＝ε 0εED；当位于两电极之间的 介质层包括多种介质时，如图7中所示，所述反射区10a的电压可以 表述为：U＝ε 0(ε PE 2D P+ε LE 2D L+ε RE 2D R)，所述透射区10b的电压可 以表述为：U＝ε 0(ε PE 1D P+ε LE 1D L)。其中，ε 0为真空介电常数；ε P 为钝化层108的介电常数，ε L为液晶层的介电常数，ε R为第一有机透 明绝缘层的介电常数，D P为钝化层108的厚度，D L为液晶层的厚度， D R为第一有机透明绝缘层的厚度，U为两电极之间的电压，E 1为透 射区10b的电场强度，E 2为反射区10a的电场强度。
在实现半透半反式显示时具有如下关系：E 1＝2E 2；因此在相同的 电压下，可以推导出以下结论：ε RD R＝ε PD P+ε LD L。因此，所述液晶 层30和所述钝化层108确定之后，便可以根据所述第一有机透明绝 缘层105的实际材质设定其厚度。
相应地，如图6所示，所述反射区10a的电压可以表述为：U＝ε 0 (ε PE 2D P+ε RE 2D R)，所述透射区10b的电压可以表述为：U＝ε 0ε PE 1D P。 其中，ε 0为真空介电常数；ε P为钝化层108的介电常数，ε R为第一有 机透明绝缘层的介电常数，D P为钝化层108的厚度，D R为第一有机 透明绝缘层的厚度，U为两电极之间的电压，E 1为透射区10b的电场 强度，E 2为反射区10a的电场强度。
在实现半透半反式显示时具有如下关系：E 1＝2E 2；因此在相同的 电压下，可以推导出以下结论：ε RD R＝ε PD P。因此，所述钝化层108 确定之后，便可以根据所述第一有机透明绝缘层105的实际材质设定 其厚度。
这里，所述钝化层108的材质可以包括氮化硅、氧化硅、氮氧化 硅等材质中的一种，其介电常数相对较大，例如氮化硅的介电常数通 常在6.5～6.8之间；所述第一有机透明绝缘层105的材质可以包括聚 酰亚胺、聚碳酸酯等透明树脂材料中的一种，其介电常数相对较小， 通常在3～4之间。
进一步的，如图8所示，所述液晶显示面板还可以包括设置在所 述阵列基板10背离所述液晶层30一侧的第一偏光片40以及设置在 所述彩膜基板20背离所述液晶层30一侧的第二偏光片50，所述第 一偏光片40和所述第二偏光片50的透过轴相互垂直；其中，所述第 一偏光片40还包括内置的第一λ/4相位延迟膜；所述第二偏光片50 还包括内置的第二λ/4相位延迟膜。
以所述液晶显示面板包括高级超维场转换型阵列基板、所述第一 偏光片40的偏振方向为水平方向(0°偏光片)、所述第二偏光片50 的偏振方向为竖直方向(90°偏光片)为例，对所述液晶显示面板实 现亮态显示和暗态显示的原理进行说明；其中，图9为所述透射区 10b实现亮态和暗态的示意图，图10为所述反射区10a实现亮态和 暗态的示意图。
一方面，当所述液晶显示面板未加电压时，所述反射区10a和所 述透射区10b均呈暗态显示，其具体的光线模拟情况如图9和图10 中暗态一栏所示。
在所述反射区10a内，外部环境的光为自然光。当外部环境的光 经过所述第二偏光片50(例如90°偏光片)时会产生和所述第二偏光 片50的透过轴方向平行的线偏振光，再经过所述第二λ/4相位延迟 膜，便可以产生左旋圆偏振光；当该左旋圆偏振光经过所述液晶层 30时，由于所述液晶层30中的液晶分子未有电场影响，则对该左旋 圆偏振光无延迟作用；然后该左旋圆偏振光进入所述反射电极103， 经过所述反射电极103的λ/2延迟后，该左旋圆偏振光变成右旋圆偏 振光；该右旋圆偏振光再次进入所述液晶层30，无延迟并再次经过 所述第二λ/4相位延迟膜，变成和所述第二偏光片50的透过轴方向 垂直的线偏振光，因此无法从所述第二偏光片50射出，从而形成所 述反射区10a的暗态。
在所述透射区10b内，背光源发出的光近似于自然光。当背光源 发出的光经过所述第一偏光片40(例如0°偏光片)时会产生和所述 第一偏光片40的透过轴方向平行的线偏振光，再经过所述第一λ/4 相位延迟膜，便可以产生右旋圆偏振光；当该右旋圆偏振光经过所述 液晶层30时，由于所述液晶层30中的液晶分子未有电场影响，则对 该右旋圆偏振光无延迟作用；然后该右旋圆偏振光进入所述第二λ/4 相位延迟膜，变成和所述第二偏光片50的透过轴垂直的线偏振光， 因此无法从所述第二偏光片50射出，从而形成所述透射区10b的暗 态。
需要说明的是，在本发明实施例中的液晶显示面板中，所述第一 λ/4相位延迟膜复合在所述第一偏光片40中，即所述第一λ/4相位延 迟膜属于所述第一偏光片40的一部分；所述第二λ/4相位延迟膜复 合在所述第二偏光片50中，即所述第二λ/4相位延迟膜属于所述第 二偏光片50的一部分。但为了清楚地描述本发明实施例的实施过程， 按照对光的不同作用分开进行描述。当然，在本发明的实施例中，所 述λ/4相位延迟膜和所述偏光片也可以分开形成。
另一方面，当所述液晶显示面板外加电压时，所述反射区10a和 所述透射区10b均呈亮态显示，其具体的光线模拟情况如图9和图 10中亮态一栏所示。
在所述反射区10a内，外部环境的光经过所述第二偏光片50时 会产生和所述第二偏光片50的透过轴方向平行的线偏振光，再经过 所述第二λ/4相位延迟膜，便会产生左旋圆偏振光；当该左旋圆偏振 光经过所述液晶层30时，由于液晶层30中的液晶分子的λ/4相位延 迟作用，所述左旋圆偏振光便会变成偏振方向和所述第二偏光片50 的透过轴方向垂直的线偏振光；然后该线偏振光进入所述反射电极 103，经过所述反射电极103的λ/2延迟后，依然为偏振方向和所述 第二偏光片50的透过轴方向垂直的线偏振光；该线偏振光再次进入 所述液晶层30经过延迟后，变成右旋圆偏振光；再次经过所述第二 λ/4相位延迟膜，变成偏振方向和所述第二偏光片50的光透过轴方向 平行的线偏振光，便可以从所述第二偏光片50射出，从而形成所述 反射区10a的亮态。
在所述透射区10b内，背光源发出的光经过所述第一偏光片40 时会产生和所述第一偏光片40的透过轴方向平行的线偏振光，再经 过所述第一λ/4相位延迟膜，便可以产生右旋圆偏振光；当该右旋圆 偏振光经过所述液晶层30时，由于所述液晶层30中的液晶分子的λ/2 相位延迟作用，变成左旋圆偏振光；该左旋圆偏振光进入所述第二λ/4 相位延迟膜，变成偏振方向和所述第二偏光片50的透过轴方向平行 的线偏振光，便可以从所述第二偏光片50射出，从而形成所述透射 区10b的亮态。
在此基础上，可选地，与所述阵列基板10的透射区10b对应的 液晶层厚度等于与所述阵列基板10的反射区10a对应的液晶层厚度。
这样，由于整个液晶显示面板的液晶层厚度相等，便可以有效的 简化制备工艺，并降低工艺难度。
需要说明的是，在本发明实施例中，以所述反射区10a的液晶层 厚度和所述透射区10b的液晶层厚度相等为例进行说明的，但本发明 不限于此；也就是说，所述反射区10a的液晶层厚度和所述透射区 10b的液晶层厚度可以不等。在此情况下，只需根据多种介质条件下 电压与电场强度的关系进行设定即可。
本发明实施例还提供一种阵列基板10的制备方法，参考图1至 图4所示，包括形成阵列排布的多个像素单元，每个所述像素单元包 括反射区10a和透射区10b；针对任一个像素单元，所述方法包括： 在衬底基板101上形成薄膜晶体管102、相互电连接的反射电极103 和第一透明电极104、以及位于所述反射电极103和所述第一透明电 极104之间的第一有机透明绝缘层105；其中，所述反射电极103位 于所述第一有机透明绝缘层105的下方，所述第一透明电极104位于 所述第一有机透明绝缘层105的上方；所述反射电极103形成在所述 反射区10a，所述第一透明电极104形成在所述透射区10b。
需要说明的是，这里所述的上方和下方是相对于制备工艺的顺序 而言的；在所述阵列基板10的制备过程中，先形成的称为下方，后 形成的称为上方。
在此基础上，考虑到所述液晶显示面板的开口率问题，所述反射 区10a优选形成在与所述薄膜晶体管102相对应的位置。
进一步可选地，所述第一透明电极104可以通过形成在所述第一 有机透明绝缘层105中的过孔与所述反射电极103接触，从而实现二 者的电连接关系。
基于此，在形成相互电连接的反射电极103和第一透明电极104、 以及位于所述反射电极103和所述第一透明电极104之间的第一有机 透明绝缘层105时，具体可以包括：在形成有所述薄膜晶体管102的 基板上沉积一层金属层，并通过一次构图工艺在所述反射区10a形成 金属电极，该金属电极即为所述反射电极103；在形成有所述反射电 极103的基板上通过一次构图工艺形成包括过孔的所述第一有机透 明绝缘层105；在形成有所述第一有机透明绝缘层105的基板上沉积 一层ITO层，并通过一次构图工艺在所述透射区10b形成ITO电极， 该ITO电极即为所述第一透明电极104；其中，所述反射电极103和 所述第一透明电极104便可以通过形成在所述第一有机透明绝缘层 105中的过孔相接触，从而实现电连接。
进一步的，在形成所述阵列基板10时，可以使所述反射电极103 和所述第一透明电极104与所述薄膜晶体管102的漏极1025电连接； 这样，所述反射电极103和所述第一透明电极104便可以作为所述阵 列基板10的像素电极。
由于所述第一透明电极104通过形成在所述第一有机透明绝缘 层105中的过孔与所述反射电极103接触以实现电连接，因此只需使 所述反射电极103和所述漏极1025之间接触，便可以实现所述反射 电极103和所述第一透明电极104与所述薄膜晶体管102的漏极1025 电连接。
其中，所述反射电极103与所述漏极1025之间电连接的方式可 以为图1所示的搭桥连接方式、或者图2所示的过孔连接方式。
在此基础上，可选的，参考图2所示，所述方法还可以包括在所 述薄膜晶体管102与所述反射电极103之间形成第二有机透明绝缘层 106；其中，所述反射电极103通过形成在所述第二有机透明绝缘层 106中的过孔与所述漏极1025接触。
这里，所述第二有机透明绝缘层106具有增加所述阵列基板10 的平整度以及减小位于所述阵列基板10上的数据线与所述第一透明 电极104之间的寄生电容的作用。
其中，所述第一有机透明绝缘层105和所述第二有机透明绝缘层 106优选为具有高透过率的透明树脂层。所述透明树脂层的材料具体 可以包括聚酰亚胺类树脂或丙烯酸类树脂材料中的一种。
由于所述第二有机透明绝缘层106直接形成在所述源极1024和 所述漏极1025上方，这样可能会产生结合不良的问题；基于此，参 考图5所示，在所述薄膜晶体管102的源极1024和漏极1025与所述 第二有机透明绝缘层106之间还可以形成粘附层107，从而增加所述 第二有机透明绝缘层106与源漏金属层的结合强度。其中，所述粘附 层107可以选用氮化硅、氧化硅、以及氮氧化硅等材料中的一种。
基于上述描述便可以形成TN型阵列基板。但TN型阵列基板的 视角范围较窄，随着视角范围的变化可能会发生灰阶反转现象；因此 进一步的，还可以在所述第一透明电极104上方依次形成钝化层108 和第二透明电极109。其中，在所述反射电极103和所述第一透明电 极104与所述薄膜晶体管102的漏极1025之间无电连接的情况下， 所述第二透明电极109与所述漏极1025电连接。这样便可以形成高 级超维场转换型阵列基板，具有高分辨率、高透过率、低功耗、宽视 角、高开口率、低色差、无挤压水波纹等优点。
这里，所述第二透明电极109可以包括多个电连接的条状电极。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并 不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范 围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。 因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (30)

  1. 一种阵列基板，包括阵列排布的多个像素单元，每个所述像 素单元包括反射区和透射区，针对任一个像素单元，所述阵列基板 包括衬底基板、设置在所述衬底基板上的薄膜晶体管、以及相互电连 接的反射电极和第一透明电极，所述反射电极位于所述反射区，所述 第一透明电极位于所述透射区，
    其中：
    在所述反射电极和所述第一透明电极之间还设置第一透明绝缘 层，且所述反射电极位于所述第一透明绝缘层靠近所述衬底基板的一 侧。
  2. 根据权利要求1所述的阵列基板，其中：
    所述反射区与所述薄膜晶体管的位置对应。
  3. 根据权利要求1所述的阵列基板，其中：
    所述第一透明电极通过设置在所述第一透明绝缘层中的过孔与 所述反射电极电接触。
  4. 根据权利要求1所述的阵列基板，其中：
    所述第一透明绝缘层为具有高透过率的树脂层。
  5. 根据权利要求1所述的阵列基板，其中：
    所述薄膜晶体管为底栅型薄膜晶体管。
  6. 根据权利要求1-5中任一项所述的阵列基板，其中：
    所述反射电极和所述第一透明电极与所述薄膜晶体管的漏极电 连接。
  7. 根据权利要求6所述的阵列基板，还包括：
    设置在所述薄膜晶体管与所述反射电极之间的第二透明绝缘层，
    其中，所述反射电极通过设置在所述第二透明绝缘层中的过孔与 所述漏极电接触。
  8. 根据权利要求7所述的阵列基板，还包括：
    粘附层，设置在所述第二透明绝缘层与薄膜晶体管的源极和漏极 之间。
  9. 根据权利要求7所述的阵列基板，其中：
    所述第二透明绝缘层为具有高透过率的树脂层。
  10. 根据权利要求6所述的阵列基板，其中：
    所述反射电极与所述漏极之间以搭桥连接方式电连接。
  11. 根据权利要求1至10任一项所述的阵列基板，还包括：
    设置在所述第一透明电极上方的钝化层。
  12. 根据权利要求11所述的阵列基板，还包括：
    设置在所述钝化层上的第二透明电极。
  13. 根据权利要求12所 述的阵列基板，其中：
    在所述反射电极和所述第一透明电极与所述薄膜晶体管的漏极 之间无电连接的情况下，所述第二透明电极与所述漏极电连接。
  14. 根据权利要求13所述的阵列基板，其中：
    所述第二透明电极利用穿过所述反射电极和所述第一有机透明 绝缘层的过孔与所述漏极电连接。
  15. 根据权利要求13所述的阵列基板，其中：
    所述第二透明电极为多个电连接的条状电极。
  16. 根据权利要求12所述的阵列基板，其中：
    满足以下条件：ε RD R＝ε PD P，其中：ε P为钝化层的介电常数，ε R 为第一透明绝缘层的介电常数，D P为钝化层的厚度，D R为第一透明 绝缘层的厚度。
  17. 一种液晶显示面板，包括：
    对盒成型的阵列基板和彩膜基板；以及
    位于两基板之间的液晶层，
    其中：
    所述阵列基板为权利要求1至10任一项所述的阵列基板。
  18. 根据权利要求17所述的液晶显示面板，其中：
    所述阵列基板的透射区对应的液晶层厚度等于与所述阵列基板 的反射区对应的液晶层厚度；
    所述阵列基板还包括设置在所述第一透明电极上方的钝化层；
    在所述彩膜基板的面对所述液晶层的一侧设置有第二透明电极，
    其中，满足以下条件：ε RD R＝ε PD P+ε LD L，其中：ε P为钝化层的 介电常数，ε L为液晶层的介电常数，ε R为第一透明绝缘层的介电常数， D P为钝化层的厚度，D L为液晶层的厚度，D R为第一透明绝缘层的厚 度。
  19. 根据权利要求17所述的液晶显示面板，其中：
    所述阵列基板的透射区对应的液晶层厚度等于与所述阵列基板 的反射区对应的液晶层厚度；
    所述阵列基板为根据权利要求12-14中任一项所述的阵列基板，
    其中，满足以下条件：ε RD R＝ε PD P，其中：ε P为钝化层的介电常 数，ε R为第一透明绝缘层的介电常数，D P为钝化层的厚度，D R为第 一透明绝缘层的厚度。
  20. 根据权利要求17所述的液晶显示面板，其中：
    所述阵列基板的透射区的电场强度为所述阵列基板的反射区的 电场强度的两倍。
  21. 根据权利要求20所述的液晶显示面板，其中：
    与所述阵列基板的透射区对应的液晶层厚度等于与所述阵列基 板的反射区对应的液晶层厚度。
  22. 根据权利要求17-21中任一项所述的液晶显示面板，还包括：
    设置在所述阵列基板背离所述液晶层一侧的第一偏光片，所述第 一偏光片还包括内置的第一λ/4相位延迟膜；以及
    设置在所述彩膜基板背离所述液晶层一侧的第二偏光片，所述第 二偏光片还包括内置的第二λ/4相位延迟膜，所述第一偏光片和所述 第二偏光片的透过轴相互垂直。
  23. 一种阵列基板的制备方法，所述阵列基板包括阵列排布的多 个像素单元，每个所述像素单元包括反射区和透射区，其中，针对任 一个像素单元，所述方法包括步骤：
    在衬底基板上形成薄膜晶体管；
    在反射区形成反射电极；
    在反射电极上方形成第一透明绝缘层；以及
    在第一透明绝缘层上方形成第一透明电极，所述第一透明电极与 反射电极电连接。
  24. 根据权利要求23所述的方法，其中：
    所述反射区与所述薄膜晶体管的位置对应。
  25. 根据权利要求23所述的方法，还包括步骤：
    在所述第一透明绝缘层中形成过孔，所述第一透明电极通过所述 过孔与所述反射电极电接触。
  26. 根据权利要求23所述的方法，其中：
    所述反射电极与所述薄膜晶体管的漏极电连接。
  27. 根据权利要求26所述的方法，还包括步骤：
    在所述薄膜晶体管与所述反射电极之间形成第二透明绝缘层，
    其中，所述反射电极通过形成在所述第二透明绝缘层中的过孔与 所述漏极电接触。
  28. 根据权利要求23至27任一项所述的方法，还包括步骤：
    在所述第一透明电极上方依次形成钝化层和第二透明电极；以及
    在所述反射电极和所述第一透明电极与所述薄膜晶体管的漏极 之间无电连接的情况下，将所述第二透明电极与所述漏极电连接。
  29. 根据权利要求28所述的方法，其中：
    所述阵列基板的透射区对应的液晶层厚度等于与所述阵列基板 的反射区对应的液晶层厚度；
    所述方法还包括步骤：
    选择第一透明绝缘层的介电常数与厚度，使得在所述反射电极和 所述第二透明电极之间的电压与所述第一透明电极和所述第二透明 电极之间的电压相等的情况下，所述透射区的电场强度为所述反射区 的电场强度的2倍。
  30. 根据权利要求29所述的方法，其中：
    所述阵列基板的透射区对应的液晶层厚度等于与所述阵列基板 的反射区对应的液晶层厚度；
    所述方法还包括步骤：
    选择第一透明绝缘层的厚度D R以满足以下条件：ε RD R＝ε PD P，其 中：ε P为钝化层的介电常数，ε R为第一透明绝缘层的介电常数，D P 为钝化层的厚度。
PCT/CN2014/074422 2014-02-18 2014-03-31 阵列基板及其制备方法、液晶显示面板 WO2015123914A1 (zh)

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