WO2015116093A1 - Carte de circuit imprimé comportant des trous d'interconnexion coaxiaux - Google Patents

Carte de circuit imprimé comportant des trous d'interconnexion coaxiaux Download PDF

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Publication number
WO2015116093A1
WO2015116093A1 PCT/US2014/013797 US2014013797W WO2015116093A1 WO 2015116093 A1 WO2015116093 A1 WO 2015116093A1 US 2014013797 W US2014013797 W US 2014013797W WO 2015116093 A1 WO2015116093 A1 WO 2015116093A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductive
conductive via
plane
hole
pcb
Prior art date
Application number
PCT/US2014/013797
Other languages
English (en)
Inventor
Melvin Benedict
Karl Bois
Original Assignee
Hewlett-Packard Development Company, L.P.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett-Packard Development Company, L.P. filed Critical Hewlett-Packard Development Company, L.P.
Priority to PCT/US2014/013797 priority Critical patent/WO2015116093A1/fr
Publication of WO2015116093A1 publication Critical patent/WO2015116093A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H05K1/0222—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09581—Applying an insulating coating on the walls of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09809—Coaxial layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection

Definitions

  • PCB printed circuit board
  • Figures 1-8 illustrate an example process for forming an example PCB including coaxial vias
  • Figure 9 illustrates schematically a cross-sectional view of the example PCB illustrated in Figures 1-8.
  • FIGS 10-13 illustrate other example PCB including co-axial vias.
  • co-axial vias e.g., channels formed in PCBs for connectors, ASICs and the like, which can be made with minimal or no electrical coupling exhibited between the vias.
  • the co-axial vias may allow electrical communication between inner layers of a PCB, for example.
  • FIGs 1-8 illustrate an example process for forming an example PCB including coaxial vias.
  • the example process starts with a PCB 100 having multiple layers 110A-H, as illustrated in Figure 1A.
  • the example PCB 100 includes a top surface 102, a bottom surface 104 and eight layers 110A-H.
  • the PCB 100 including eight layers 110 is an example only, and other PCBs with fewer or more layers may be used.
  • Various materials may be used to form each of the layers 110A-H.
  • each of the layers 110A-H is formed of a non- conductive material.
  • different methods may be used to form each layer 110A-H.
  • the layers may be formed by deposition or other such process. The depth of each layer may be selected for various purposes.
  • conductive planes may be formed on or within the PCB 100.
  • conductive planes may be formed on the top surface 102 and the bottom surface 104.
  • conductive layers may also be formed internally to the PCB 100.
  • the PCB 100 includes inner conductive planes 112, 114 and 116.
  • the inner conductive planes 112, 114, 116 may be formed during formation of the PCB 100 through, for example, deposition of a conductive material on a non-conductive layer.
  • conductive material may be deposited on layer 110H to form an inner conductive plane 116.
  • Another non-conductive layer HOG may be formed on the conductive plane 116, and conductive material may be deposited on top of layer HOG to form another conductive plane 114. Additional inner conductive planes, such as conductive plane 112, may be similarly formed. Thus, conductive planes may be formed at various positions within the PCB 100.
  • the conductive planes, including inner conductive planes 112, 114, 116 may include, for example, a signal plane for transmission to/from a surface conductive plane, and a voltage supply plane to receive a voltage signal at the surface conductive plane or another plane of the PCB 100.
  • a depth- limited hole 125 is formed in an upper portion of the PCB 100.
  • the hole 125 starts at the top surface 102 and proceeds at least to the inner plane 114.
  • the hole 125 may be formed in any of a variety of manners including, but not limited to, mechanical drilling, laser drilling or other known methods.
  • the diameter of the hole 125 (Dl) may be selected based on a desired final design. In one example, the diameter Dl of the hole 125 may be about 20 mils, or 0.02 inches.
  • the surface of the hole may be covered with a conductive material to form a conductive layer 130, 132.
  • the conductive layer may be formed by plating or deposition of a conductive material, such as aluminum or copper, for example. The process of forming the conductive layer may result in the conductive material covering a cylindrical outer wall 130, as well as the base portion 132 of the hole 125. Additional areas may also be covered, such as the top surface 102 of the PCB 100. As noted below, the conductive material may be removed from areas for which conductive material is not desired.
  • the PCB 100 is processed to remove excess conductive material and, for example, to make the desired conductive layer uniform.
  • the excess conductive material may be removed in any of a variety of manners.
  • drilling is used to remove excess conductive material from the conductive layer 130 resulting in a more uniform inner surface.
  • the conductive material is removed from the base portion 132 of the hole 125.
  • the drilling may be, for example, mechanical drilling or laser drilling.
  • the drilling may result in a desired thickness of the conductive layer 130 and the remaining hole having a second diameter D2, as illustrated in Figure 4.
  • the thickness of the conductive layer 130 is about 2 mils (0.002 inches), and D2 is about 16 mils (0.016 inches). Of course, other examples may have different dimensions.
  • a top portion of the conductive layer 130 is drilled back to form a recess 136.
  • the depth of the recess allows the conductive layer 130 to remain in contact with inner conductive planes 114 and 112, thus forming an outer conductive via 138.
  • the outer conductive via 138 allows electronic communication between two inner layers 112, 114.
  • the width of the recess 136 is at least the diameter Dl of the first drilled hole. In some examples, the width of the recess may be larger than the diameter Dl .
  • the hole is filled with an insulation material 140.
  • the insulation material 140 may be deposited or otherwise provided between the surface 102 of the PCB 100 and the bottom of the hole.
  • the insulation material 140 may be an epoxy or other high-impedance material in order to provide non-conductivity around the outer conductive via 138.
  • the outer conductive via 138 terminates at an inner portion of the PCB 100. In other words, the outer conductive via 138 does not extend completely through the PCB 100 and instead terminates just below an inner conductive plane 114. The top end of the outer conductive via 138 may extend to just above another inner conductive plane 112 or, in other examples, may extend to the top surface 102 of the PCB 100.
  • a smaller hole 150 is formed through the insulation material 140.
  • the hole 150 may be formed in a similar manner to the hole described above with reference to Figure 2 by using, for example, mechanical or laser drilling.
  • the hole 150 extends through the entire depth of the insulation material and through at least a further portion of the PCB 100.
  • the hole 150 extends through at least the depth of another conductive plane 116.
  • the hole 150 may extend through the entire PCB 100.
  • the hole 150 may be formed to have a diameter D3 that is smaller than the diameter D2 of the outer conductive via 138. In one example, the diameter D3 of the hole 150 is about 8 mils (0.008 inches).
  • the hole 150 is filled with a conductive material, such as copper or aluminum, for example, to form an inner conductive via 160.
  • the inner conductive via 160 may provide electrical communication between the inner conductive plane 116 and the top surface 102 of the PCB 100.
  • the inner conductive via 160 may lead to a terminal at the top surface 102 to allow connection to a component, for example.
  • an upper plate of conductive material is formed on the top surface 102 of the PCB 100 to form an outer conductive plane 165.
  • the inner conductive via 160 provides electronic communication between an inner conductive plane 116 and an outer conductive plane 165.
  • Figure 9 schematically illustrates the co-axial arrangement of the vias 138 and 160.
  • the arrangement provides two co-axial vias that can provide electronic communication to/from inner conductive planes.
  • a high-impedance material 140 between the vias is provided to limit cross talk.
  • the difference in the diameter D2 of the outer conductive via 138 and the diameter D3 of the hole 150 (and the inner conductive via 160) determines the amount of insulation material between the outer conductive via 138 and the inner conductive via 160.
  • the level of cross-talk may be controlled by adjusting the various dimensions.
  • Figures 10-13 illustrate additional examples of co-axial via configurations that can be formed using the principles described herein, including the process described above with reference to Figures 1-9. Each of the examples in Figures 10-13 couples the co-axial vias to different conductive planes located at different layers of a PCB.
  • Figure 10 illustrates an example PCB 200 similar to the PCB described above with reference to Figure 9.
  • the inner hole (hole 150 of Figure 7) is drilled through the entire thickness of the PCB 200 and filled with conductive material to form an inner via 260.
  • the inner conductive via 260 extends from the top surface to the bottom surface of the PCB 200.
  • terminals may be provided at one or both ends of the inner conductive via 260.
  • conductive planes are formed at each surface, thus allowing the inner conductive via 260 to provide electrical communication between two outer conductive planes 225, 265.
  • Figure 11 illustrates an example PCB 300 in which the outer conductive via 330 is electrically coupled to a first inner plane 315 at the bottom end of the outer conductive via 330.
  • the upper end of the outer conductive via 330 is not connected to any conductive plane, but rather serves to provide a non-current carrying shield. In this regard, the upper end of the conductive via 330 may terminate at any desired place depending on the desired shielding.
  • the inner conductive via 330 allows electrical communication between the outer conductive planes 320, 365.
  • Figure 12 illustrates an example PCB 400 in which the outer conductive via 430 and the inner conductive via 460 provide communication between various inner conductive planes.
  • the inner conductive via 460 is electrically coupled between a first inner plane 415 and a fourth inner plane 435, while an outer conductive via 430 is electrically coupled to a second inner plane 420 and a third inner plane 425 in a nested manner.
  • An insulating material 440 is provided between the outer conductive via 430 and the inner conductive via 460.
  • FIG. 13 illustrates a PCB 500 that includes three co-axial vias including an outer conductive via 530-1 (coupling second and third inner conductive planes 520 and 525), an intermediate conductive via 530-2 (coupling first and fourth inner planes 515 and 535) and an inner conductive via 560 (coupling an upper conductive surface 565 and a lower conductive surface 545).
  • PCBs with any practical number of co-axial vias may be formed using the principles described above.
  • the operations of forming the outer conductive via 138 and the insulation material 140 are performed twice in order to form a first insulating portion 540-1 between the outer conductive via 530-1 and the intermediate conducting via 530-2, and a second insulating portion 540-2 between the intermediate conductive via 540-2 and the inner conductive via 560.
  • Example PCBs with more than three co-axial vias may also be formed using similar methods.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

L'invention concerne un appareil donné à titre d'exemple qui comprend une pluralité de plans conducteurs séparés par des couches non conductrices, au moins un plan conducteur de la pluralité de plans conducteurs étant un plan conducteur interne ; un trou d'interconnexion conducteur externe couplé électriquement à un plan conducteur interne, une extrémité du trou d'interconnexion conducteur externe se terminant au niveau d'une partie interne de l'appareil ; un trou d'interconnexion conducteur interne s'étendant davantage dans au moins une direction que le trou d'interconnexion conducteur externe, le trou d'interconnexion conducteur interne et le trou d'interconnexion conducteur externe étant coaxiaux et séparés par au moins une couche d'un matériau isolant.
PCT/US2014/013797 2014-01-30 2014-01-30 Carte de circuit imprimé comportant des trous d'interconnexion coaxiaux WO2015116093A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/US2014/013797 WO2015116093A1 (fr) 2014-01-30 2014-01-30 Carte de circuit imprimé comportant des trous d'interconnexion coaxiaux

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2014/013797 WO2015116093A1 (fr) 2014-01-30 2014-01-30 Carte de circuit imprimé comportant des trous d'interconnexion coaxiaux

Publications (1)

Publication Number Publication Date
WO2015116093A1 true WO2015116093A1 (fr) 2015-08-06

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ID=53757501

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2014/013797 WO2015116093A1 (fr) 2014-01-30 2014-01-30 Carte de circuit imprimé comportant des trous d'interconnexion coaxiaux

Country Status (1)

Country Link
WO (1) WO2015116093A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107318221A (zh) * 2017-08-25 2017-11-03 郑州云海信息技术有限公司 一种过孔及其制造方法和印制电路板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020017399A1 (en) * 2000-08-11 2002-02-14 Huey-Ru Chang Coaxial via hole and process of fabricating the same
US20070124930A1 (en) * 2005-12-02 2007-06-07 Cisco Technology, Inc. Coaxial via in PCB for high-speed signaling designs
US20080236881A1 (en) * 2007-03-27 2008-10-02 Shinji Tanaka Multilayer printed wiring board and method for manufacturing the same
US20090321126A1 (en) * 2008-06-27 2009-12-31 Qualcomm Incorporated Concentric Vias In Electronic Substrate
JP2013041991A (ja) * 2011-08-16 2013-02-28 Fujitsu Ltd 多層回路基板、その製造方法及び半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020017399A1 (en) * 2000-08-11 2002-02-14 Huey-Ru Chang Coaxial via hole and process of fabricating the same
US20070124930A1 (en) * 2005-12-02 2007-06-07 Cisco Technology, Inc. Coaxial via in PCB for high-speed signaling designs
US20080236881A1 (en) * 2007-03-27 2008-10-02 Shinji Tanaka Multilayer printed wiring board and method for manufacturing the same
US20090321126A1 (en) * 2008-06-27 2009-12-31 Qualcomm Incorporated Concentric Vias In Electronic Substrate
JP2013041991A (ja) * 2011-08-16 2013-02-28 Fujitsu Ltd 多層回路基板、その製造方法及び半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107318221A (zh) * 2017-08-25 2017-11-03 郑州云海信息技术有限公司 一种过孔及其制造方法和印制电路板

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