WO2015113364A1 - 集成电路芯片和显示装置 - Google Patents

集成电路芯片和显示装置 Download PDF

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Publication number
WO2015113364A1
WO2015113364A1 PCT/CN2014/080460 CN2014080460W WO2015113364A1 WO 2015113364 A1 WO2015113364 A1 WO 2015113364A1 CN 2014080460 W CN2014080460 W CN 2014080460W WO 2015113364 A1 WO2015113364 A1 WO 2015113364A1
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WIPO (PCT)
Prior art keywords
conductive
integrated circuit
circuit chip
display device
display panel
Prior art date
Application number
PCT/CN2014/080460
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English (en)
French (fr)
Inventor
暴军萍
贺伟
李兴华
朴承翊
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/407,345 priority Critical patent/US20150303162A1/en
Publication of WO2015113364A1 publication Critical patent/WO2015113364A1/zh

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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/206—Length ranges
    • H01L2924/2064—Length ranges larger or equal to 1 micron less than 100 microns

Definitions

  • the present disclosure relates to an integrated circuit chip and a display device. Background technique
  • An anisotropic conductive film is often used in the connection of a circuit of a liquid crystal display panel to an integrated circuit chip including a driver circuit.
  • ACF has electrical conduction in the Z-axis direction and insulation in the XY plane, which can be used to connect fine micro-electronic device lines.
  • ACF is composed of a polymer matrix and conductive particles uniformly dispersed therein.
  • the conductive particles may be metal-plated polymer microspheres or metal particles, and metal particles (e.g., gold balls) are currently commonly used.
  • a conventional bonding manner of the integrated circuit chip and the liquid crystal display panel is as shown in FIG. 2, and an ACF including the metal particles 102 and the high molecular polymer 103 is disposed between the integrated circuit chip 109 and the display panel connection region 106, and is passed through the binding device.
  • the device head 110 applies pressure to achieve a connection between the two.
  • ACF is required for bonding (also called bonding), and its price is higher.
  • ACF The mechanical properties, electrical properties and reliability of the interconnects also change. It may cause the capture rate of the gold ball to be low, and the conductive metal piece of the integrated circuit may be seriously extended, resulting in unreliable connection or wrong connection, thereby affecting the normal display of the display device. Summary of the invention
  • At least one embodiment of the present invention is to avoid the drawbacks caused by the use of an anisotropic conductive film bonded integrated circuit chip and display device in the known technical solutions.
  • an integrated circuit chip comprising a plurality of electrically conductive metal sheets spaced apart on one side thereof, each of the conductive metal sheets being formed with a conductive bump.
  • the conductive protrusions have a shape of a square, a rectangular parallelepiped, a truncated cone or a truncated cone.
  • the height of the conductive bumps is 3 ⁇ ! ⁇ 5 ⁇
  • width is ⁇ ! ⁇ 3 ⁇
  • the spacing between each of the conductive bumps is 1.0 ⁇ 3. ⁇ .
  • the surfaces of all of the conductive bumps away from the conductive metal sheet are flush.
  • the conductive bumps are integrally formed or separately formed with the conductive metal sheets.
  • a display device including a display panel and the above-described integrated circuit chip is provided, and the display panel is electrically connected to the integrated circuit chip.
  • the display panel and the side of the integrated circuit chip having conductive bumps are connected together by a non-conductive bonding layer.
  • non-conductive bonding layer is a non-conductive particle film layer.
  • the non-conductive particle film layer includes a base film, a polymer bonding layer, and a protective film which are laminated.
  • the base film and the protective film are made of polyethylene terephthalate; the polymer bonding layer is made of a thermoplastic or thermosetting resin.
  • a peripheral portion of the display panel is formed with a conductive pattern, and the conductive bump is electrically connected to the conductive pattern.
  • At least one embodiment of the present invention can at least obtain the beneficial effects: the conductive bumps of the integrated circuit chip disposed on the conductive metal sheet enable the integrated circuit chip and the display panel to have good electrical conductivity in the x-axis direction, and at the same time ensure sufficient in the pupil plane direction. insulation. Therefore, a non-conductive bonding layer, such as a non-conductive film (NCF), can be used instead of an anisotropic conductive film (ACF) for the bonding process of an integrated circuit chip. There is no accumulation of metal particles, so there is no problem of short circuit or excessive resistance. Moreover, the use of NCF instead of ACF can reduce the production cost of the display device and is more advantageous for industrial production.
  • NCF anisotropic conductive film
  • Figure 1 is a cross-sectional view of an anisotropic conductive film (ACF);
  • FIG. 2 is a schematic view showing a conventional integrated circuit chip and a display panel
  • FIG. 3 is a schematic view of a conventional integrated circuit chip and a display panel according to an embodiment of the present invention.
  • FIG. 4a is a partial plan view of an integrated circuit chip according to an embodiment of the present invention
  • FIG. 4b is a side view of FIG. 4a;
  • Figure 5a is a partial plan view showing a first modification of an integrated circuit chip in accordance with one embodiment of the present invention.
  • Figure 5b is a side view of Figure 5a
  • Figure 6a is a partial plan view showing a second variation of an integrated circuit chip in accordance with still another embodiment of the present invention.
  • Figure 6b is a side view of Figure 6a
  • Figure 7 is a side elevational view of a third variation of an integrated circuit chip in accordance with yet another embodiment of the present invention. detailed description
  • the embodiment provides an integrated circuit chip, wherein, as shown in FIG. 3, the integrated circuit chip 109 includes a plurality of conductive metal sheets (not shown) disposed on one side of the substrate, and formed on the conductive metal sheet. There are conductive bumps (boom) 111.
  • the integrated circuit chip 109 usually includes a driving circuit. Of course, other functional circuits may be included.
  • the conductive metal piece serves as an interface between the integrated circuit chip and other electrical components (for example, a driving line on the display panel). Since the conductive bumps are disposed on the conductive metal piece of the integrated circuit chip, when connected with the relevant electrical components, the integrated circuit chip and the related electrical components can have good conductivity in the Z-axis direction, and the XY plane direction can ensure sufficient insulation.
  • a non-conductive bonding layer such as a non-conductive film (NCF) can be used instead of an anisotropic conductive film (ACF) to realize electrical connection between the integrated circuit chip and related electrical components.
  • NCF non-conductive film
  • ACF anisotropic conductive film
  • a conductive bump is formed on each of the conductive metal sheets. Further, the height of the conductive bumps 111 is 3 ⁇ ! ⁇ 5 ⁇ , width is ⁇ ! ⁇ 3 ⁇ , the spacing between the conductive bumps is 1.0 ⁇ 3.0 ⁇ , and the surface of all the conductive bumps away from the conductive metal sheet is flush, so as to ensure good electrical conductivity between the integrated circuit chip and the relevant electrical components through.
  • the conductive bumps and the conductive metal piece may be integrally formed, that is, the conductive bumps are directly formed on the conductive metal sheets during the manufacture of the integrated circuit chip, formed once, or formed on the conductive metal sheets that have been formed.
  • the conductive bumps and the conductive metal sheets may also be separately formed, that is, when manufacturing the integrated circuit chip, the conductive bumps may not be formed on the conductive metal sheets, and then the conductive bump structures may be separately fabricated, and then the conductive bumps may be used.
  • the process is formed on the conductive metal sheet, and the conductive bumps and the conductive metal sheets can be made of the same or different conductive metal materials, which are not limited herein.
  • the conductive protrusions 111 on the conductive metal piece on the integrated circuit chip 109 can be designed as a rectangular parallelepiped or a square, as shown in FIG. 4a and FIG. 4b; the conductive protrusions 111 can also be designed as a pyramidal table 112, as shown in FIG. 5a and FIG. 5b; The conductive bumps 111 can also be designed as a truncated cone 113, as shown in Figures 6a and 6b; or the conductive bumps 111 are designed as a cylindrical table 114, as shown in Figure 7.
  • the embodiment of the invention further provides a display device, comprising: a display panel and an integrated circuit chip, wherein the display panel is electrically connected to the integrated circuit chip.
  • the integrated circuit chip is used to provide a required electrical signal to the display device, and the integrated circuit chip is usually connected to an associated driving line on the display panel, for example, a data line, a gate line or a driving circuit of the gate line in the display panel.
  • an associated driving line on the display panel for example, a data line, a gate line or a driving circuit of the gate line in the display panel.
  • a non-conductive adhesive layer such as a non-conductive film (NCF) can be used instead of an anisotropic conductive film (ACF) to realize electrical connection between the integrated circuit chip and the display panel.
  • NCF non-conductive film
  • ACF anisotropic conductive film
  • one side of the display panel 106 and the integrated circuit chip 109 having the conductive bumps 111 may be connected together by a non-conductive bonding layer.
  • the non-conductive adhesive layer may be a non-conductive film 108 (NCF).
  • NCF non-conductive film 108
  • one side of the display panel 106 and the integrated circuit chip 109 having the conductive bumps 111 are connected together by the NCF layer 108.
  • the device indenter 110 shown in the figures is not part of the display device, but rather a device that applies pressure when the integrated circuit chip 109 is bonded to the display panel 106.
  • the integrated circuit chip 109 typically includes a driver circuit and may of course include other functional circuits.
  • the NCF layer is used for bonding, it is of course possible to use other non-conductive bonding materials.
  • the NCF can be used to replace the conventional ACF to realize the electrical connection between the integrated circuit chip and the display panel, without damaging the circuit characteristics of the integrated circuit chip, accelerating the time of electronic circuit packaging or connection, and improving production efficiency. Suitable for high-volume, assembly line operations, it is conducive to industrial production, and can reduce production costs.
  • FIG. 1 is a cross-sectional view of a commonly used anisotropic conductive film ACF including a protective film 101, a polymer 103, and a base film 105 which are laminated, and the polymer 103 is doped with metal conductive particles. 102.
  • the NCF used in the present invention does not require the provision of the metal conductive particles 102 as compared with Fig. 1, and the other partial structures can be the same as in Fig. 1.
  • the above NCF layer 108 may include a base film, a polymer bonding layer, and a protective film which are laminated.
  • the polymer bonding layer can be made of a thermoplastic or thermosetting resin and has a bonding effect
  • the protective film can be made of transparent PET (polyethylene terephthalate) to protect the NCF from being protected. Contamination; base film, also made of transparent PET, used as a carrier for the polymer bonding layer.
  • base film also made of transparent PET, used as a carrier for the polymer bonding layer.
  • a conductive pattern 107 may be formed in a peripheral region of the display panel 106, for example, a conductive pattern formed of Indium Tin Oxide (ITO).
  • ITO Indium Tin Oxide
  • the conductive pattern 107 is used for connecting to an internal circuit of the display panel to electrically connect the integrated circuit chip and the display panel.
  • the protective film of the NCF can be removed first by using a conventional anisotropic conductive film attaching device, and then the NCF is cut by a cutter.
  • the NCF is attached to the display panel 106 by warming and pressing, and the integrated circuit chip 109 is placed on the NCF 108 without the protective film after being aligned, and then pressed by the device indenter 110 at a high voltage.
  • the conductive bumps 111 are electrically connected to the display panel 106.
  • the display device of this embodiment may be any product or component having a display function such as a liquid crystal panel, an electronic paper, an OLED panel, a liquid crystal television, a liquid crystal display, a digital photo frame, a mobile phone, a tablet computer, or the like.
  • a display function such as a liquid crystal panel, an electronic paper, an OLED panel, a liquid crystal television, a liquid crystal display, a digital photo frame, a mobile phone, a tablet computer, or the like.

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Abstract

一种集成电路芯片和显示装置。集成电路芯片（109）包括位于其一面上的间隔设置的若干个导电金属片，在导电金属片上形成有导电凸起（111）。由于在集成电路芯片（109）的导电金属片上设置有导电凸起（111），因此可以采用不导电粘结层、例如NCF来代替ACF将集成电路芯片（109）与显示面板进行绑定，不会产生金属粒子堆积，因此不会发生短路或电阻过大的问题。且使用NCF代替ACF能够降低显示装置的生产成本，更有利于工业化的生产。

Description

集成电路芯片和显示装置 技术领域
本公开涉及一种集成电路芯片和显示装置。 背景技术
在液晶显示面板的线路与包含有驱动电路的集成电路芯片的连接中， 经 常会用到各向异性导电膜（Anisotropic Conductive Film, 简称 ACF ) 。 ACF 具有在 Z轴方向电气导通， 而在 XY平面绝缘的特性， 可用于实现精细微电 子器件线路的连接。 ACF 是由聚合物基体以及均匀分散其中的导电微粒组 成。 导电微粒可以是镀金属的聚合物微球或金属微粒， 目前常用的为金属粒 子（例如， 金球）。 随着液晶显示装置市场需求的逐年扩大， ACF作为集成 电路芯片与液晶面板互连的主要材料， 其需求量也逐年快速上升， 并且价格 较昂贵。
近年来电子显示技术发展迅速， 如液晶显示、 电致发光技术、 触摸屏技 术等， 其关键技术之一是包括驱动电路的集成电路芯片与液晶面板上的导电 图案的连接。 釆用 ACF封装连接时， 金属粒子易堆积， 造成在 Z轴方向的 导电性能不佳， 某些区域金属粒子少而电阻过大， 而另外一些区域金属粒子 多， 使集成电路上的导电金属片延展而导致相邻导电金属片之间短路， 因而 使电流过大产生高温， 从而引起集成电路芯片中的相关电子器件变形， 进而 影响显示装置品质及可靠性。
集成电路芯片与液晶显示面板的常规贴合方式如图 2所示， 集成电路芯 片 109和显示面板连接区域 106之间设置有包括金属粒子 102和高分子聚合 物 103的 ACF， 通过绑定装置中的设备压头 110施加压力而达到二者连接。 其主要问题是： 贴合（bonding,也被称作绑定）时需使用 ACF，其价格较高； 贴合过程中， 随着设备压头的压力、 加热温度、 加热时间等的变化， ACF互 连的力学性能、 电学性能和可靠性也随之发生变化。 可能导致其中金球的捕 捉率不高、 集成电路的导电金属片延展严重， 导致连接不可靠或错误连接， 进而影响显示装置的正常显示。 发明内容
本发明的至少一个实施例是为了避免已知技术方案中釆用各向异性导电 膜绑定集成电路芯片和显示装置导致的缺陷。
根据本发明的一方面， 提供了一种集成电路芯片， 该集成电路芯片包括 位于其一面上的间隔设置的若干个导电金属片， 各所述导电金属片上形成有 导电凸起。
可替换地， 所述导电凸起的形状为正方体、 长方体、 圓锥台或棱锥台。 可替换地， 所述导电凸起的高度为 3μπ！〜 5μπι， 宽度为 Ιμπ！〜 3μηι， 各 所述导电凸起之间的间距为 1.0〜 3.Ομηι。
可替换地， 所有导电凸起的远离导电金属片的表面平齐。
可替换地， 所述导电凸起与导电金属片一体成型或分别成型。
根据本发明的另一方面， 提供了一种显示装置， 包括显示面板以及上述 的集成电路芯片， 所述显示面板与所述集成电路芯片电性连接。
可替换地， 所述显示面板和所述集成电路芯片具有导电凸起的一面通过 不导电粘结层连接在一起。
可替换地， 其中不导电粘结层为无导电粒子薄膜层。
可替换地， 所述无导电粒子薄膜层包括层叠设置的基膜、 聚合物粘结层 和保护膜。
可替换地， 所述基膜和保护膜釆用聚对苯二曱酸乙二醇酯制作而成； 所 述聚合物粘结层釆用热塑性或热固性树脂制作而成。
可替换地， 所述显示面板周边区域形成有导电图案， 所述导电凸起与所 述导电图案电性连接。
本发明的至少一个实施例至少可获得有益效果： 集成电路芯片在导电金 属片上设置的导电凸起使得集成电路芯片与显示面板在 Ζ轴方向具有良好的 导电性， 同时在 ΧΥ平面方向可以保证充分绝缘。 因而可以釆用不导电粘结 层， 例如无导电粒子薄膜（No conductive film, 简称 NCF )来代替各向异性 导电膜（ Anisotropic Conductive Film， 简称 ACF )进行集成电路芯片的绑定 ( bonding )工艺， 不会产生金属粒子堆积， 因此不会发生短路或电阻过大的 问题。 且使用 NCF代替 ACF能够降低显示装置的生产成本， 更有利于工业 化的生产。 附图说明
为了更清楚地说明本发明实施例或已知的技术方案， 下面将对实施例或 已知的技术方案描述中所需要使用的附图作简单地介绍， 显而易见地， 下面 描述中的附图仅仅是本发明的一些实施例， 对于本领域普通技术人员来讲， 在不付出创造性劳动的前提下， 还可以根据这些附图获得其他的附图。
图 1是各向异性导电膜（ACF ) 的剖面图；
图 2是常规集成电路芯片与显示面板贴合的示意图；
图 3 是本发明实施例提供的常规集成电路芯片与显示面板贴合的示意 图；
图 4a是根据本发明实施例的集成电路芯片的局部平面示意图； 图 4b是图 4a的侧面示意图；
图 5a是根据本发明的一个实施例的集成电路芯片的第一种变型的局部 平面示意图；
图 5b是图 5a的侧面示意图；
图 6a是根据本发明再一个实施例的集成电路芯片的第二种变型的局部 平面示意图；
图 6b是图 6a的侧面示意图；
图 7是根据本发明又一个实施例的集成电路芯片的第三种变型的侧面示 意图。 具体实施方式
下面将结合本发明实施例中的附图， 对本发明实施例中的技术方案进行 清楚、 完整地描述， 显然， 所描述的实施例仅仅是本发明的一部分实施例， 而不是全部的实施例。 基于本发明中的实施例， 本领域普通技术人员在没有 做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本实施例提供一种集成电路芯片，其中，如图 3所示，集成电路芯片 109， 包括位于其一面上的间隔设置的若干个导电金属片 （图中未示出） ， 在导电 金属片上形成有导电凸起 ( bump ) 111。 集成电路芯片 109中通常包含有驱 动电路， 当然也可以包含其他功能电路， 导电金属片作为集成电路芯片与其 他电气元件（例如， 显示面板上的驱动线路） 电连接的接口。 由于在集成电路芯片的导电金属片上设置有导电凸起， 因此在与相关电 气元件连接时， 可使得集成电路芯片与相关电气元件在 Z轴方向具有良好的 导电性， 同时 XY平面方向可以保证足够绝缘。 因而可以釆用不导电粘结层 例如无导电粒子薄膜（No conductive film, 简称 NCF )来代替各向异性导电 膜（ Anisotropic Conductive Film， 简称 ACF ) 实现集成电路芯片和相关电气 元件的电性连接， 不会产生金属粒子堆积， 因此不会发生短路或电阻过大的 问题。 且使用 NCF代替 ACF不损坏集成电路芯片的电路特性， 加快电子线 路封装或者连接的时间， 提高生产效率， 适合大批量、 流水线作业， 有利于 工业化的生产， 并且能够降低生产成本。
可替换地， 在每个导电金属片上形成一个导电凸起。 进一步地， 导电凸 起 111的高度为 3μπ！〜 5μπι， 宽度为 Ιμπ！〜 3μηι， 导电凸起之间的间距为 1.0 〜 3.0μπι， 且所有导电凸起的远离导电金属片的表面平齐， 这样可以保证集 成电路芯片与相关电气元件贴合后二者实现良好电气导通。
导电凸起与导电金属片可一体成型， 即在制造集成电路芯片时导电凸起 直接形成在导电金属片上， 一次成型， 或在已经成型的导电金属片上形成导 电凸起。 导电凸起与导电金属片也可分别成型， 即在制造集成电路芯片时， 可先在导电金属片上不制作导电凸起， 然后， 可单独制作导电凸起结构， 再 将导电凸起釆用相关工艺形成在导电金属片上， 导电凸起与导电金属片可釆 用相同或者不同的导电金属材料制作， 在此不做限定。
集成电路芯片 109上导电金属片上的导电凸起 111可以设计为长方体或 正方体， 如图 4a和图 4b所示； 导电凸起 111也可设计为棱锥台 112， 如图 5a和图 5b所示；导电凸起 111还可设计为圓锥台 113，如图 6a和图 6b所示； 或者导电凸起 111设计为圓柱台 114， 如图 7所示。
本发明实施例还提供一种显示装置， 包括： 显示面板和集成电路芯片， 其中显示面板与集成电路芯片电性连接。
集成电路芯片用于为显示装置提供需要的电信号， 通常将集成电路芯片 与显示面板上的相关驱动线路相连， 例如， 显示面板中的数据线、 栅线或者 栅线的驱动电路等。 本实施例中的显示装置， 由于在集成电路芯片的导电金 属片上设置有导电凸起， 因此在与显示面板连接时， 可使得集成电路芯片与 显示面板在 Z轴方向具有良好的导电性， 同时 XY平面方向可以保证足够绝 缘， 因而可以釆用不导电粘结层例如无导电粒子薄膜（No conductive film, 简称 NCF )来代替各向异性导电膜（ Anisotropic Conductive Film, 简称 ACF ) 实现集成电路芯片和显示面板的电性连接， 不会产生金属粒子堆积， 因此不 会发生短路或电阻过大的问题， 进而可提高显示装置的品质。
进一步地， 参照图 3所示， 可将显示面板 106和集成电路芯片 109具有 导电凸起 111的一面通过不导电粘结层连接在一起。
可替换地， 上述的不导电粘结层可以釆用无导电粒子薄膜层 108 ( No conductive film, 简称 NCF )。 参照图 3所示， 显示面板 106和集成电路芯片 109具有导电凸起 111的一面通过 NCF层 108连接在一起。 图中示出的设备 压头 110并非显示装置的一部分， 而是在将集成电路芯片 109绑定到显示面 板 106时施加压力的设备。 集成电路芯片 109通常包含驱动电路， 当然也可 以包括其他功能电路。 虽然在本实施例中釆用 NCF层进行粘结， 当然也可以 釆用其他不导电粘结材料。
本实施例中， 釆用 NCF代替现有常用的 ACF即可实现集成电路芯片与 显示面板的电性连接， 可不损坏集成电路芯片的电路特性， 加快电子线路封 装或者连接的时间， 提高生产效率， 适合大批量、 流水线作业， 有利于工业 化的生产， 并且能够降低生产成本。
图 1是常用各向异性导电膜 ACF的剖面图，该各向异性导电膜包括层叠 设置的保护膜 101、高分子聚合物 103和基膜 105， 高分子聚合物 103中掺杂 有金属导电粒子 102。
本发明使用的 NCF 与图 1相比，不需要设置金属导电粒子 102，其他部 分结构可与图 1相同。
上述 NCF层 108可包括层叠设置的基膜、聚合物粘结层和保护膜。其中， 聚合物粘结层可釆用热塑性或热固性树脂制作， 具有粘结作用； 保护膜可釆 用透明 PET (聚对苯二曱酸乙二醇酯 )制作而成， 用于保护 NCF不被污染； 基膜， 也可釆用透明 PET 制作而成， 用于作为聚合物粘结层的载体。 使用 NCF, 其中不含有 ACF中的金属粒子， 因而粘性更强， 可以加强集成电路芯 片与显示面板的粘结效果， 连接牢固且保证电气导通， 可避免在金属导电粒 子堆积而导致的导电金属片之间或或者线路之间引起短路。
可替换地， 为实现集成电路芯片 109与显示面板 106的良好电气连接， 如图 3所示， 可在显示面板 106周边区域形成导电图案 107， 例如， 由铟锡 氧化物（ Indium Tin Oxide, 简称 ITO )形成的导电图案。 导电图案 107用于 连接到显示面板的内部线路， 使集成电路芯片和显示面板实现电性连接。
参照图 3所示，根据本发明的实施例将集成电路芯片贴合到显示面板时， 可釆用传统各向异性导电膜贴附设备先将 NCF的保护膜去除，然后利用切刀 将 NCF切割成需要的长度， 通过加温加压将 NCF贴附在显示面板 106上， 集成电路芯片 109对位后轻贴在没有保护膜的 NCF 108上， 然后釆用设备压 头 110进行压制，在高压情况下，使导电凸起 111与显示面板 106电性连接。
本实施例的显示装置可以为： 液晶面板、 电子纸、 OLED面板、 液晶电 视、 液晶显示器、 数码相框、 手机、 平板电脑等任何具有显示功能的产品或 部件。
以上实施例仅用于说明本发明， 而非对本发明的限制。 尽管参照实施例 对本发明进行了详细说明， 本领域的普通技术人员应当理解， 对本发明的技 术方案进行各种组合、 修改或者等同替换， 都不脱离本发明技术方案的精神 和范围， 其均应涵盖在本发明的权利要求和范围当中。
本申请要求于 2014年 1月 29日递交的中国专利申请第 201410043730.X 号的优先权， 在此全文引用上述中国专利申请公开的内容以作为本申请的一 部分。

Claims

权利要求书
1. 一种集成电路芯片， 其中， 该集成电路芯片包括位于其一面上的间隔 设置的若干个导电金属片， 各所述导电金属片上形成有导电凸起。
2. 根据权利要求 1所述的集成电路芯片， 其中， 所述导电凸起的形状为 正方体、 长方体、 圓锥台、 棱锥台或圓柱台。
3. 根据权利要求 1-2中任一项所述的集成电路芯片， 其中， 所述导电凸 起的高度为 3μπ！〜 5μπι， 宽度为 Ιμπ！〜 3μπι， 各所述导电凸起之间的间距为 1.0〜 3.0μπι。
4. 根据权利要求 1-3中任一项所述的集成电路芯片， 其中， 所有导电凸 起的远离所述导电金属片的表面平齐。
5. 根据权利要求 1-4中任一项所述的集成电路芯片， 其中， 所述导电凸 起与导所述电金属片一体成型或分别成型。
6. 一种显示装置， 包括显示面板， 其中， 还包括根据权利要求 1-5中任 一项所述的集成电路芯片， 所述显示面板与所述集成电路芯片电性连接。
7. 根据权利要求 6所述的显示装置，所述显示面板和所述集成电路芯片 具有导电凸起的一面通过不导电粘结层连接在一起。
8. 根据权利要求 7所述的显示装置，其中不导电粘结层为无导电粒子薄 膜层。
9. 根据权利要求 8所述的显示装置，其中，所述无导电粒子薄膜层包括： 层叠设置的基膜、 聚合物粘结层和保护膜。
10.根据权利要求 9所述的显示装置， 所述基膜和保护膜釆用聚对苯二 曱酸乙二醇酯制作而成； 所述聚合物粘结层釆用热塑性或热固性树脂制作而 成。
11.根据权利要求 6-10中任一项所述的显示装置， 其中， 所述显示面板 周边区域形成有导电图案， 所述导电凸起与所述导电图案电性连接。
PCT/CN2014/080460 2014-01-29 2014-06-20 集成电路芯片和显示装置 WO2015113364A1 (zh)

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