WO2015079882A1 - スイッチング装置 - Google Patents
スイッチング装置 Download PDFInfo
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- WO2015079882A1 WO2015079882A1 PCT/JP2014/079448 JP2014079448W WO2015079882A1 WO 2015079882 A1 WO2015079882 A1 WO 2015079882A1 JP 2014079448 W JP2014079448 W JP 2014079448W WO 2015079882 A1 WO2015079882 A1 WO 2015079882A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
Definitions
- the present invention relates to a switching device.
- Patent Document 1 discloses controlling a gate voltage applied to a control terminal (gate terminal) of a switching element in order to solve a technical problem caused by speeding up of a switching operation.
- IGBT insulated gate bipolar transistor
- MOSFET MOS field effect transistor
- Patent Document 1 in order to suppress an increase in surge voltage due to high-speed switching, a gate resistance is provided on a signal line connected to a gate terminal to keep the rate of change of the gate voltage low. For this reason, the switching speed of a switching element will fall.
- the present invention has been made in view of the above problems, and an object thereof is to provide a switching device that reduces ringing noise caused by reflection of a control signal while maintaining a high switching speed of the switching element.
- a switching device includes a main circuit including a switching element, a control circuit that generates a control signal for switching an on state and an off state of the switching element, and a control signal output from the control circuit.
- a first signal line and a second signal line which are transmitted to the main circuit.
- the characteristic impedance values of the first and second signal lines are set between the output impedance value of the control circuit and the input impedance value of the main circuit.
- FIG. 1 is a schematic diagram illustrating a configuration of a switching device according to the first embodiment.
- FIG. 2 is a conceptual diagram showing circuit examples of the main circuit 1 and the control circuit 2 shown in FIG. 1 and the characteristic impedance Z cd of the first and second signal lines (3, 4).
- FIG. 3 is a perspective view showing dimensions of the first and second signal lines (3, 4).
- FIG. 4 is a schematic diagram illustrating a configuration of a switching device according to the second embodiment.
- 5A is a cross-sectional view taken along the line AA in FIG. 4
- FIG. 5B is a cross-sectional view taken along the line AA of the switching device according to the modification of the second embodiment. It is sectional drawing.
- FIG. 5A is a cross-sectional view taken along the line AA in FIG. 4
- FIG. 5B is a cross-sectional view taken along the line AA of the switching device according to the modification of the second embodiment. It is sectional drawing.
- FIG. 5A is
- FIG. 6 is a schematic diagram illustrating a configuration of a switching device according to the third embodiment.
- FIG. 7A is a cross-sectional view taken along the line DD in FIG. 6, and
- FIG. 7B is a line cut along the line DD in the switching device according to the modification of the third embodiment. It is sectional drawing.
- FIG. 8A is a schematic diagram showing the configuration of the switching device according to the fourth embodiment, and
- FIG. 8B is a cross-sectional view taken along the line BB in FIG. 8A.
- FIG. 9A is a schematic diagram showing the configuration of the switching device according to the fifth embodiment, and FIG. 9B is a cross-sectional view taken along the line CC in FIG. 9A.
- FIG. 9A is a schematic diagram showing the configuration of the switching device according to the fifth embodiment, and
- FIG. 9B is a cross-sectional view taken along the line CC in FIG. 9A.
- FIG. 10 is a schematic diagram illustrating a configuration of a switching device according to the sixth embodiment.
- FIG. 11 is a circuit diagram showing an application example of the switching device of FIG. 10 to a power conversion device.
- FIG. 12 is an overview diagram showing an application example of the switching device of FIG. 10 to a power conversion device.
- FIG. 13A shows a graph showing ringing noise appearing in the gate voltage (Vg), and
- FIG. 13B is a graph for explaining the effects of the first to sixth embodiments.
- the switching device includes a main circuit 1 including a switching element, a control circuit 2 that generates a control signal for switching an ON state (conductive state) and an OFF state (non-conductive state) of the switching element, and an output from the control circuit 2 A first signal line 3 and a second signal line 4 for transmitting the control signal to be transmitted to the main circuit 1.
- Z ab in FIG. 1 indicates the value of the output impedance of the control circuit 2 that outputs the control signal.
- Z cd indicates the value of the characteristic impedance of the first and second signal lines (3, 4) that transmit the control signal.
- Z ef indicates the value of the input impedance of the main circuit 1 to which the control signal is input.
- the switching element 11 included in the main circuit 1 is a semiconductor element including, for example, an IGBT or a MOSFET that can perform a high-speed switching operation.
- FIG. 2 illustrates an IGBT having a collector electrode (C), an emitter electrode (E), and a gate electrode (G).
- the main circuit 1 further includes a first input terminal 12 connected to the gate electrode (G) and a second input terminal 13 connected to the emitter electrode (E).
- the main circuit 1 functions as a switching unit that performs a switching operation by the switching element 11.
- the control circuit 2 generates a control signal composed of two voltage levels in order to control two states (an on state and an off state) of the switching element 11 included in the main circuit 1. For example, a potential difference (voltage level) between a connection point of two switching elements (16, 17) connected in series and the other terminal of one switching element 17 is generated as a control signal. Control signals having different voltage levels are generated in accordance with the on / off states of the switching elements (16, 17).
- the control circuit 2 includes a first output terminal 14 and a second output terminal 15 for outputting the generated control signal.
- the first output terminal 14 is connected to a connection point between the two switching elements (16, 17), and the second output terminal 15 is connected to the other terminal of the one switching element 17.
- a potential difference between the first output terminal 14 and the second output terminal 15 is output as a control signal.
- the control circuit 2 functions as a control means for controlling the switching operation of the main circuit 1 by the control signal.
- the first signal line 3 transmits a control signal by connecting between the first output terminal 14 and the first input terminal 12.
- the second signal line 4 connects the second output terminal 15 and the second input terminal 13 to transmit a control signal. Accordingly, the first and second signal lines (3, 4) function as transmission means for transmitting the control signal.
- the output impedance (Z ab ) of the control circuit 2 that outputs the control signal indicates the impedance between the first output terminal 14 and the second output terminal 15.
- the input impedance (Z ef ) of the main circuit 1 to which the control signal is input indicates the impedance between the first input terminal 12 and the second input terminal 13.
- the reflected energy increases as the absolute value of the reflection coefficient ( ⁇ 1 , ⁇ 2 ) increases. Therefore, in the embodiment, in order to suppress the reflection of the control signal in the discontinuous portion of the impedance, the value of the characteristic impedance (Z cd ) of the first and second signal lines (3, 4) transmitting the control signal is set. adjust.
- each of the impedances Z ab , Z cd , and Z ef satisfies either formula (2) or formula (3).
- the inductive components of the impedances Z ab , Z cd , and Z ef are L ab , L cd , and L ef
- the capacitive components are C ab , C cd , and C ef
- the resistance components are R ab , R cd , and R ef
- the admittance components are G ab , G cd , and G ef
- the impedances Z ab , Z cd , and Z ef are expressed by the equations (4), (5), and (6), respectively.
- ⁇ represents the angular frequency of alternating current.
- the characteristic impedance Z cd of the first and second signal lines (3, 4) can be approximated as shown in equation (7). That is, when designing the configuration of the first and second signal lines (3, 4), only the imaginary part (inductive component L cd and capacitance component C cd ) of the characteristic impedance Z cd needs to be considered.
- the inductive component L cd of the characteristic impedance Z cd is expressed by equation (8) using the self-inductance Lo and the mutual inductance Mo.
- each of the first and second signal lines (3, 4) is formed of parallel flat plates, the self-inductance Lo and the mutual inductance Mo are approximated by the equations (9) and (10), respectively.
- the length of each of the first and second signal lines (3, 4) is l, the width is w, the height is H, the first signal line 3 and the second signal line
- the interval between the signal lines 4 is d.
- the capacitance component C cd of the characteristic impedance Z cd is approximated by the equation (11).
- the relative dielectric constant between the first signal line 3 and the second signal line 4 is ⁇ r
- the vacuum dielectric constant is ⁇ 0
- the first signal line 3 and the second signal line 4 are Let S be the area of the surfaces facing each other.
- the relative permittivity ⁇ r is the relative permittivity of air.
- the characteristic impedance Z cd is adjusted so as to satisfy the expression (2) or (3).
- each of the first and second signal lines (3, 4) is formed of parallel flat plates, each of the first and second signal lines (3, 4) is used for adjusting the characteristic impedance Zcd.
- the difference between the output impedance (Z ab ) and the characteristic impedance (Z cd ) and the difference between the characteristic impedance (Z cd ) and the input impedance (Z ef ) are respectively Get smaller. Therefore, the reflection of the control signal at the connection point between the control circuit 2 and the first and second signal lines (3, 4) and the connection between the first and second signal lines (3, 4) and the main circuit 1 are performed. The reflection of the control signal at the point can be suppressed. Therefore, ringing noise due to the reflection of the control signal can be reduced while keeping the switching speed of the switching element high. For this reason, the switching loss of a switching element can be reduced and the malfunction of a switching element can be suppressed.
- each of the first and second signal lines (3, 4) is formed of parallel flat plates, the area (S) and the interval (d) of the opposing first and second signal lines (3, 4) are adjusted.
- the capacitance component (C cd ) of the pair of signal lines can be easily controlled. Therefore, by forming each of the first and second signal lines (3, 4) with parallel flat plates, the parameters (l, w, H, The characteristic impedance Zcd can be easily controlled by adjusting d, S).
- the switching device further includes a dielectric 5 disposed between the first and second signal lines (3, 4).
- the relative permittivity ( ⁇ r ) is the relative permittivity of air.
- the dielectric 5 having a higher dielectric constant than air is provided between the first and second signal lines (3, 4). Accordingly, the capacitance component C cd shown in the equation (11) increases, and the characteristic impedance Z cd can be reduced so as to satisfy the equation (2) or the equation (3).
- the periphery of the first and second signal lines (3, 4) sandwiching the dielectric 5 may be covered with a resin 6.
- the mechanical strength of the first and second signal lines (3, 4) sandwiching the dielectric 5 can be increased.
- the periphery of the first and second signal lines (3, 4) filled with air may be covered with the resin 6.
- the switching device has one first signal line 3 and two second signal lines (4a, 4b).
- One signal line 3 is disposed between two second signal lines (4a, 4b).
- Dielectrics (5a, 5b) are respectively disposed between the first signal line 3 and the second signal lines (4a, 4b).
- the capacitance component C cd between the first and second signal lines (3, 4a, 4b) increases, and the characteristic impedance Z cd of the first and second signal lines (3, 4a, 4b) is reduced. Can be reduced.
- the first signal line 3 and the two second signal lines (4a, 4b) shown in FIG. 7A have the same width.
- the width (w) of the first signal line 3 may be narrower than the width of the second signal lines (4a, 4b).
- the first signal line 3 whose periphery is covered with the dielectric 5 is sandwiched between the two second signal lines (4a, 4b).
- the mechanical strength of the entire line (3, 4a, 4b) can be increased.
- the dielectric 5 is not provided, and air may be filled between the first signal line 3 and the second signal lines (4a, 4b).
- the switching device includes insulators (7a, 7a, 4b) disposed between the first and second signal lines (3, 4). 7b).
- Each of the first and second signal lines (3, 4) has a plate shape, and the insulator (7a, 7b) and the first and second signal lines (3, 4) are overlapped. It is wound with. Thereby, the entire signal line 8 has a cylindrical shape. Then, the capacitance component C cd between the first and second signal lines (3, 4) increases, and the induction component L cd decreases. Therefore, the characteristic impedance Z cd of the first and second signal lines can be reduced.
- the first signal line 3 is arranged so as to surround the second signal line 4.
- the second signal line 4 has a columnar shape
- the first signal line 3 has a cylindrical shape.
- the inner diameter of the first signal line 3 is larger than the outer diameter of the second signal line 4.
- the second signal line 4 is disposed inside the first signal line 3, and a dielectric 5 is disposed between the second signal line 4 and the first signal line 3.
- the capacitance component C cd between the first and second signal lines (3, 4) increases, and the first and second The characteristic impedance Z cd of the two signal lines (3, 4) can be reduced.
- air may be filled between the first and second signal lines (3, 4) without the dielectric 5 being disposed.
- the main circuit 1 includes a plurality of switching elements, and the first and second switching circuits transmit a control signal to each of the plurality of switching elements.
- a plurality of signal lines (3a, 3b, 3c,..., 3f, 4a, 4b, 4c,..., 4g) are provided.
- the first and second signal lines (3a to 3f, 4a to 4g) are alternately arranged, and dielectrics (5a,...) Are arranged between the first and second signal lines, respectively. .
- the capacitance component C cd between the first and second signal lines (3a to 3f, 4a to 4g) increases, and the characteristics of the first and second signal lines (3a to 3f, 4a to 4g) are increased. Impedance Z cd can be reduced.
- the switching device is applied as a power conversion device 21 that converts DC power output from a DC power source 22 such as a secondary battery into AC power, as shown in FIGS. 11 and 12, for example. be able to.
- the power converter 21 includes a power module 25 including an inverter 27 that converts DC power into three-phase AC power, a smoothing capacitor 28 that absorbs fluctuations in the DC voltage input to the inverter 27, and a metal that houses the power module 25. And a housing 26.
- the inverter 27 includes a plurality of switching elements (31 to 36) capable of high-speed switching operation.
- the inverter 27 has two switching elements connected in series that constitute upper and lower arms for each of the three phases (U phase, V phase, and W phase).
- the inverter 27 is connected in parallel to the DC power supply 22 and the smoothing capacitor 28 via the first and second power supply buses.
- the three-phase AC power converted by the inverter 27 is supplied to an electric motor 23 such as a three-phase AC power motor.
- the power conversion system shown in FIGS. 11 and 12 is applied to a vehicle that travels using the electric motor 23 as a travel drive source, that is, an electric vehicle or a hybrid vehicle (HEV) in which the output shaft of the electric motor 23 is coupled to the vehicle axle. be able to.
- HEV hybrid vehicle
- the output terminal of the DC power supply 22 is connected to the first and second power supply buses 53 and 54 in the metal housing 26 via a pair of shield wires 44.
- the control circuit 2 is accommodated in the metal casing 26, and is connected to a plurality of switching elements (31 to 36) via first and second signal lines (not shown).
- An output terminal of the inverter 27 is connected to the three shield wires 42 via a bus bar 43 disposed in the metal casing 26.
- the three shield wires 42 are connected to the input terminal of the electric motor 23. Therefore, the three-phase AC power converted by the inverter 27 is output to the electric motor 23 via the bus bar 43 and the shield wire 42.
- the shield wires 42 and 44 are electric wires formed by coating metal wires with resin.
- the vertical axis of FIG. 13B shows the comparative example in which the gate resistance is provided on the signal line connected to the control terminal (gate terminal) of the switching element, and the embodiment of the present invention in which the gate resistance is not provided.
- the ringing peak amount (RGp, RGv) and the switching loss (SLp, SLv) are shown.
- the horizontal axis represents the gate resistance value for the comparative example, and the characteristic impedance Z cd of the first and second signal lines (3, 4) for the embodiment of the present invention.
- the ringing peak amount (RGp) of the comparative example decreases as the gate resistance value increases. This is because the higher the gate resistance value, the slower the switching speed and the longer the transition time TT, and the smaller the ringing noise. Conversely, when the gate resistance value decreases and the ringing peak amount (RGp) becomes larger than the threshold value TH that causes malfunction Ga, the switching loss (SLp) of the comparative example rapidly increases due to malfunction Ga. Even in a region where the ringing peak amount (RGp) is smaller than the threshold value TH, the switching loss (SLp) of the comparative example increases as the gate resistance value increases.
- the switching loss (SLv) of the embodiment is kept low while the characteristic impedance Z cd satisfies the expression (2) or (3), but does not satisfy the expression (2) or (3). It will increase rapidly.
- the switching loss (Gv) of the embodiment can be reduced by 30% or more. Therefore, even if a gate resistor is not provided on the signal line connected to the control terminal of the switching element as in the prior art, malfunction of the switching element can be suppressed and switching loss of the switching element can be reduced.
- the characteristic impedance Z cd of the first and second signal lines (3, 4) is ignored as its imaginary part (inductive component L cd ) as shown in the equation (7). And that only the capacitive component C cd ) may be considered. Thereby, there is an effect that the design of the characteristic impedance Z cd becomes easy.
- the characteristic impedance Z cd may be designed by ignoring the inductive component L cd and considering only the capacitance component C cd .
- the inductive component (L cd ) shown in the equations (8) to (10) ) Of the capacitance component (C cd ) between the first bus bar and the second bus bar is dominant. Therefore, the characteristic impedance Z cd can be designed more easily by ignoring the inductive component (L cd ) and considering only the capacitive component (C cd ).
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Abstract
Description
図1を参照して、第1実施形態に係わるスイッチング装置の構成を説明する。スイッチング装置は、スイッチング素子を備える主回路1と、スイッチング素子のオン状態(導通状態)及びオフ状態(非導通状態)をスイッチングするための制御信号を生成する制御回路2と、制御回路2から出力される制御信号を主回路1へ伝送する第1の信号線3及び第2の信号線4と、を有する。
次に、制御信号の反射について説明する。出力インピーダンス(Zab)から特性インピーダンス(Zcd)への進行波としての制御信号は、インピーダンスの不連続部分において、そのエネルギーの一部が反射される。その反射係数(ρ1)は(1)式で表される。特性インピーダンス(Zcd)から入力インピーダンス(Zef)への進行波に係わる反射係数(ρ2)も、(1)式で表される。
図4及び図5(a)に示すように、第2実施形態に係わるスイッチング装置は、第1及び第2の信号線(3、4)の間に配置された誘電体5を更に有する。第1実施形態では、第1及び第2の信号線(3、4)の間は空気で満たされていたため、比誘電率(εr)は空気の比誘電率であった。第2実施形態では、空気よりも比誘電率が高い誘電体5を、第1及び第2の信号線(3、4)の間に設ける。これにより、(11)式に示す容量成分Ccdが増加して、(2)式或いは(3)式を満たすように特性インピーダンスZcdを低減することができる。
図6及び図7(a)に示すように、第3実施形態に係わるスイッチング装置は、1つの第1の信号線3と、2つの第2の信号線(4a、4b)を有し、第1の信号線3は、2つの第2の信号線(4a、4b)の間に配置されている。第1の信号線3と第2の信号線(4a、4b)との間には、誘電体(5a、5b)がそれぞれ配置されている。これにより、第1及び第2の信号線(3、4a、4b)間の容量成分Ccdが増加して、第1及び第2の信号線(3、4a、4b)の特性インピーダンスZcdを低減することができる。
図8(a)及び図8(b)に示すように、第4実施形態に係わるスイッチング装置は、第1及び第2の信号線(3、4)の間に配置された絶縁体(7a、7b)を更に有する。第1及び第2の信号線(3、4)の各々は板状の形状を有し、絶縁体(7a、7b)及び第1及び第2の信号線(3、4)を重ね合わせた状態で巻かれている。これにより、信号線全体8は、円柱状の形状を有することになる。そして、第1及び第2の信号線(3、4)間の容量成分Ccdが増加し、且つ誘導成分Lcdが減少する。よって、第1及び第2の信号線の特性インピーダンスZcdを低減することができる。
図9(a)及び図9(b)に示すように、第5実施形態に係わるスイッチング装置では、第1の信号線3が、第2の信号線4を囲むように配置されている。具体的には、第2の信号線4は、円柱状の形状を有し、第1の信号線3は、円筒状の形状を有する。第1の信号線3の内径は、第2の信号線4の外径よりも大きい。第2の信号線4は、第1の信号線3の内部に配置され、第2の信号線4と第1の信号線3との間には、誘電体5が配置されている。
図10に示すように、第6実施形態に係わるスイッチング装置は、主回路1が複数のスイッチング素子を備え、複数のスイッチング素子の各々に対して制御信号を伝送するように第1及び第2の信号線(3a、3b、3c、・・・、3f、4a、4b、4c、・・・、4g)を複数設けている。第1及び第2の信号線(3a~3f、4a~4g)は交互に配列され、第1及び第2の信号線の間には誘電体(5a、・・・)がそれぞれ配置されている。これにより、第1及び第2の信号線(3a~3f、4a~4g)間の容量成分Ccdが増加して、第1及び第2の信号線(3a~3f、4a~4g)の特性インピーダンスZcdを低減することができる。
図13(a)に示すように、制御信号を成すゲート電圧(Vg)が、高電位状態から所定の推移時間TTを経て低電位状態に移行したとき、ゲート電圧が振動する、所謂リンギングノイズが生じる。リンギングノイズにより、スイッチング素子のスイッチング閾値(Vgth)を跨いでゲート電圧が振動する場合、オン状態/オフ状態の誤動作Gaが生じてしまう。図13に示すリンギングピーク量RGを、スイッチング閾値(Vgth)を超えない程度に小さく抑えることにより、誤動作Gaが防止される。
2 制御回路
3 第1の信号線
4 第2の信号線
5 誘電体
6 樹脂
11 スイッチング素子
Zab 出力インピーダンス
Zcd 特性インピーダンス
Zef 入力インピーダンス
Claims (8)
- スイッチング素子を備える主回路と、
前記スイッチング素子のオン状態及びオフ状態をスイッチングするための制御信号を生成する制御回路と、
前記制御回路から出力される前記制御信号を前記主回路へ伝送する第1の信号線及び第2の信号線と、を有し、
前記制御信号を伝送する前記第1及び第2の信号線の特性インピーダンスの値は、前記制御信号を出力する前記制御回路の出力インピーダンスの値と、前記制御信号が入力される前記主回路の入力インピーダンスの値との間に設定される
ことを特徴とするスイッチング装置。 - 前記第1及び第2の信号線の各々は、平行な平板からなることを特徴とする請求項1に記載のスイッチング装置。
- 前記第1の信号線が、2つの前記第2の信号線の間に配置されていることを特徴とする請求項1又は2に記載のスイッチング装置。
- 前記第1の信号線が、前記第2の信号線を囲むように配置されていることを特徴とする請求項1又は2に記載のスイッチング装置。
- 前記第1及び第2の信号線の間に配置された誘電体を更に有することを特徴とする請求項1~4のいずれか一項に記載のスイッチング装置。
- 前記第1及び第2の信号線の間に配置された絶縁体を更に有し、
前記第1及び第2の信号線の各々は板状の形状を有し、前記絶縁体及び前記第1及び第2の信号線を重ね合わせた状態で巻かれている
ことを特徴とする請求項1に記載のスイッチング装置。 - 前記第1及び第2の信号線の少なくとも一方は樹脂で覆われていることを特徴とする請求項1に記載のスイッチング装置。
- 前記主回路は複数のスイッチング素子を備え、
前記複数のスイッチング素子の各々に対して前記制御信号を伝送するように前記第1及び第2の信号線を複数設け、
前記第1及び第2の信号線は交互に配列され、且つ、前記第1及び第2の信号線の間には誘電体が配置されている
ことを特徴とする請求項1又は2に記載のスイッチング装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP14865677.0A EP3076534B1 (en) | 2013-11-29 | 2014-11-06 | Switching device |
US15/039,612 US10312897B2 (en) | 2013-11-29 | 2014-11-06 | Switching device |
CN201480064374.8A CN105993122B (zh) | 2013-11-29 | 2014-11-06 | 开关装置 |
JP2015550629A JP6146481B2 (ja) | 2013-11-29 | 2014-11-06 | スイッチング装置 |
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US (1) | US10312897B2 (ja) |
EP (1) | EP3076534B1 (ja) |
JP (1) | JP6146481B2 (ja) |
CN (1) | CN105993122B (ja) |
WO (1) | WO2015079882A1 (ja) |
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- 2014-11-06 EP EP14865677.0A patent/EP3076534B1/en active Active
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Also Published As
Publication number | Publication date |
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JPWO2015079882A1 (ja) | 2017-03-16 |
CN105993122B (zh) | 2018-05-18 |
EP3076534A1 (en) | 2016-10-05 |
CN105993122A (zh) | 2016-10-05 |
US10312897B2 (en) | 2019-06-04 |
US20170264279A1 (en) | 2017-09-14 |
JP6146481B2 (ja) | 2017-06-14 |
EP3076534B1 (en) | 2019-01-09 |
EP3076534A4 (en) | 2017-04-12 |
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