WO2015079573A1 - Dispositif d'alimentation électrique, dispositif d'inspection, et procédé d'optimisation pour dispositif d'alimentation électrique - Google Patents

Dispositif d'alimentation électrique, dispositif d'inspection, et procédé d'optimisation pour dispositif d'alimentation électrique Download PDF

Info

Publication number
WO2015079573A1
WO2015079573A1 PCT/JP2013/082240 JP2013082240W WO2015079573A1 WO 2015079573 A1 WO2015079573 A1 WO 2015079573A1 JP 2013082240 W JP2013082240 W JP 2013082240W WO 2015079573 A1 WO2015079573 A1 WO 2015079573A1
Authority
WO
WIPO (PCT)
Prior art keywords
dead time
power supply
supply device
current
unit
Prior art date
Application number
PCT/JP2013/082240
Other languages
English (en)
Japanese (ja)
Inventor
甲之輔 新田
浩二 若林
Original Assignee
新電元工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 新電元工業株式会社 filed Critical 新電元工業株式会社
Priority to PCT/JP2013/082240 priority Critical patent/WO2015079573A1/fr
Priority to JP2015550516A priority patent/JP6171205B2/ja
Publication of WO2015079573A1 publication Critical patent/WO2015079573A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/38Means for preventing simultaneous conduction of switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33573Full-bridge at primary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0009Devices or circuits for detecting current in a converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/01Resonant DC/DC converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33515Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33571Half-bridge at primary side of an isolation transformer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a power supply device, an inspection device, and a power supply device optimization method.
  • a transformer that insulates between the primary side circuit and the secondary side circuit, a switching circuit that switches and drives the direction of the current flowing through the primary winding of the transformer, and rectifies the voltage induced in the secondary side winding
  • the switching-type power supply device including a rectifier circuit.
  • the switching circuit is constituted by a full bridge circuit in which two half bridge circuits in which two switching elements (for example, MOSFETs) are connected in series are arranged in parallel.
  • a through current may flow and the switching element may be destroyed.
  • a period in which the two switching elements are turned off at the same time is provided as a dead time (non-overlapping time).
  • Patent Document 1 estimates the change in power loss using a value proportional to the load time ratio in a PWM (Pulse Width Modulation) signal that drives the switch. It has been proposed to adjust the dead time. Further, Patent Document 2 proposes reducing the influence of a measurement error that becomes noise when minimizing the power loss accompanying the dead time.
  • the power supply device includes a measurement circuit that measures a parameter for adjusting the dead time, and adjusts the dead time according to the measurement result.
  • the power loss caused by the dead time changes according to the dead time. Therefore, it is desired that this dead time is adjusted to an optimum dead time that minimizes the power loss.
  • the optimum dead time is affected by variations in the delay time of the drive circuit and on-off characteristics for each switching element. For this reason, in the power supply device, it is necessary to correct the dead time for each actually assembled product.
  • the power supply device when trying to correct the dead time for each product, includes a value proportional to the load time ratio and a power loss measuring circuit, and a circuit for determining the dead time. It is necessary to prepare for each product. For this reason, there is a problem in that the circuit configuration becomes complicated and the cost increases accordingly.
  • the present invention has been made in view of the above-described problems, and a power supply device that can set an optimum dead time for maximizing power conversion efficiency for each product without adding a new circuit inside the product.
  • An object of the present invention is to provide an optimization method for an inspection device and a power supply device.
  • a power supply device includes a storage unit that stores a first dead time of a switching element that forms a switching circuit, and a second unit that is set based on a measurement result of an input current.
  • An acquisition unit for externally inputting dead time information, a rewriting unit for rewriting the first dead time stored in the storage unit with the second dead time acquired by the acquisition unit, and the storage unit stored in the storage unit
  • a control unit that controls the switching element according to a second dead time.
  • An inspection apparatus is configured to change the first dead time for a power supply device in which a first dead time of a switching element of a switching circuit can be changed by information on an externally input dead time. And measuring the input current of the power supply device and determining the dead time when the input current is the shortest as the second dead time based on the measured value of the input current measured by the measuring unit And a writing unit that notifies the information of the second dead time to the power supply device and sets the first dead time to the second dead time in the power supply device. To do.
  • a method for optimizing a power supply apparatus is an optimization method for a power supply apparatus that optimizes a dead time of a switching element that constitutes a switching circuit in the power supply apparatus by using an inspection apparatus. , Including a procedure of changing the first dead time according to an instruction from the inspection device, wherein the inspection device instructs the power supply device to change the first dead time, and the input of the power supply device A procedure for measuring current; a procedure for determining, based on the measurement result of the input current, the dead time when the input current is minimized; and a procedure for determining the second dead time.
  • the optimum dead time that maximizes the power conversion efficiency can be set for each product without adding a new circuit inside the product.
  • FIG. 1 is a functional block diagram showing a schematic configuration of the power supply device 1 and the inspection device 2 according to the first embodiment of the present invention.
  • the power supply device 1 is a DC / DC converter that converts an input DC voltage into a predetermined DC voltage and outputs the DC voltage, and only the portion directly related to the present invention is shown.
  • the power supply device 1 and the inspection device 2 shown in FIG. 1 when the switching element in the full bridge circuit 20 of the power supply device 1 performs a switching operation, the power conversion efficiency changes when the dead time of the switching element is changed. Is used.
  • the inspection device 2 instructs the power supply device 1 to change the dead time of the switching element, and measures the change in the power conversion efficiency according to the change in the dead time.
  • the inspection device 2 determines the dead time when the power conversion efficiency is maximized based on the measurement result as the optimum dead time (second dead time), and notifies the power supply device 1 of information on the optimum dead time.
  • the power supply device 1 stores the optimum dead time notified from the inspection device 2 in the storage unit 30.
  • the power supply device 1 includes a processing unit 10, a drive circuit 11, a full bridge circuit 20, and a storage unit 30.
  • the power supply device 1 is connected to an inspection device 2 that measures input / output currents and input / output voltages in the power supply device 1.
  • the processing unit 10 is a control device that controls the overall operation of the power supply device 1.
  • the processing unit 10 includes a control unit 101, an acquisition unit 102, and a rewrite unit 103 (details will be described later).
  • the processing unit 10 includes a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), an A / D converter (ADC; analog-digital converter), a counter, and the like.
  • the processing unit 10 may be realized by dedicated hardware.
  • the drive circuit 11 generates gate signals G1 to G4 for driving the switching elements Q1 to Q4 included in the full bridge circuit 20 from the on / off control signal CNT output from the control unit 101.
  • the full bridge circuit 20 is, for example, a bridge circuit composed of four switching elements Q1 to Q4 as shown in FIG. 3 described later (details will be described later).
  • the storage unit 30 stores dead time (first dead time) data of the switching elements Q1 to Q4 of the full bridge circuit 20 in association with the output current value. For example, as shown in FIG. 6 to be described later, the storage unit 30 stores dead time data associated with the value of the output current Io of the power supply device 1 in the form of a dead time table 31.
  • the control unit 101 generates an on / off control signal CNT for controlling the switching operation of the switching elements Q1 to Q4 of the full bridge circuit 20 so that the output voltage of the power supply device 1 becomes a constant voltage.
  • the on / off control signal CNT is, for example, a PWM (Pulse Width Modulation) signal.
  • the control unit 101 refers to the dead time table 31 stored in the storage unit 30 and based on the dead time stored in the dead time table 31. CNT is generated.
  • the acquisition unit 102 receives information on a dead time change instruction from the inspection apparatus 2.
  • This change instruction includes information indicating a new dead time after the change.
  • the acquisition unit 102 notifies the rewriting unit 103 of the dead time change instruction information received from the inspection apparatus 2.
  • the rewriting unit 103 acquires the dead time (first dead time) data stored in the dead time table 31 of the storage unit 30 based on the dead time change instruction obtained from the acquiring unit 102.
  • the optimum dead time (second dead time) is rewritten.
  • the rewrite unit 103 rewrites the data so as to increase or decrease the already recorded dead time based on the dead time change instruction.
  • the rewrite unit 103 obtains information on the optimum dead time via the obtaining unit 102 and rewrites the dead time table 31 with data of the optimum dead time. .
  • the inspection apparatus 2 includes a measurement unit 201, a determination unit 202, a writing unit 203, and a storage unit 204.
  • the inspection device 2 is a tester, for example.
  • the measurement unit 201 measures the input / output current and the input / output voltage of the power supply device 1 and measures the power conversion efficiency in the power supply device 1.
  • the measuring unit 201 instructs the processing unit 10 of the power supply device 1 to change the dead time in the full bridge circuit 20, and changes in the dead time.
  • the power conversion efficiency of the power supply device 1 that changes in accordance with is measured.
  • the determination unit 202 determines the dead time when the power conversion efficiency is maximized as the optimum dead time.
  • the writing unit 203 notifies the acquisition unit 102 of information on the optimum dead time determined by the determination unit 202.
  • the storage unit 204 stores the measured value of the power conversion efficiency measured by the measurement unit 201.
  • the dead time table 31 stored in the storage unit 30 of the power supply device 1 may be stored in advance. Further, the inspection apparatus 2 may read the data of the dead time table 31 stored in the storage unit 30 and store the read data of the dead time table 31.
  • FIG. 2 is an explanatory diagram showing an outline of the setting operation of the optimum dead time.
  • a voltmeter 5 for measuring the input voltage Vin and an ammeter 6 for measuring the input current Iin are connected to the input side of the power supply device 1.
  • a voltmeter 7 for measuring the output voltage Vout and an ammeter 8 for measuring the output current Io are connected to the output side of the power supply device 1.
  • the inspection apparatus 2 sets the input voltage Vin, the output current Io, and the output voltage Vout to be constant.
  • the inspection device 2 can measure the change in the power conversion efficiency calculated based on the measured input current Iin and the above equation.
  • the inspection apparatus 2 instructs the power supply apparatus 1 to change the dead time stored in the dead time table 31 in the storage unit 30 from the reference dead time to an increasing direction and a decreasing direction.
  • the input current Iin is measured, and the change in power conversion efficiency corresponding to the change in dead time is measured.
  • the power conversion efficiency is measured by changing the dead time from the reference dead time to ⁇ 3 ⁇ T. Note that ⁇ T is a time based on the clock signal.
  • the reference dead time is a dead time stored in advance in the dead time table 31 before the adjustment of the dead time is started.
  • the reference dead time is set in consideration of variations in delay times of the drive circuits 11 of the plurality of power supply devices 1 and variations in characteristics of the switching elements Q1 to Q4.
  • This reference dead time is a dead time estimated to be an optimum dead time based on an average dead time.
  • the dead time when the power conversion efficiency is highest that is, the inspection device 2 determines the dead time when the input current Iin is lowest as the optimum dead time.
  • the inspection device 2 notifies the power supply device 1 of information on the optimum dead time, and the power supply device 1 overwrites the dead time table 31 with the optimum dead time corresponding to the current output current Io.
  • the inspection apparatus 2 changes the output current Io to several different current values, repeatedly executes the second procedure and the third procedure, and the dead time table 31 according to each current value.
  • the dead time data stored in is corrected to the optimum dead time.
  • the amount by which the reference dead time is corrected by the optimum dead time tends to be the same for different values of the output current Io.
  • the same tendency means that when the optimum dead time is a value that is changed in the positive direction with respect to the reference dead time at the first output current Io, the optimum dead time at other output currents Io is It tends to be a value changed in the positive direction with respect to the reference dead time.
  • the entire dead time data stored in the dead time table 31 may be corrected by the correction amount obtained from one output current Io.
  • the inspection device 2 determines the optimum dead time that maximizes the power conversion efficiency, and overwrites the determined optimum dead time in the storage unit 30 of the power supply device 1.
  • the power supply device 1 of this embodiment sets the optimal dead time for each product individually without adding a measurement circuit for measuring the dead time or a circuit for determining the optimal dead time to the inside of the product. can do.
  • FIG. 3 is a configuration diagram illustrating a configuration example of the power supply device 1.
  • the power supply device 1 shown in FIG. 3 is a DC / DC converter that converts the DC voltage Vin input from the DC power supply 21 into a DC voltage Vout having a predetermined constant voltage.
  • the power supply device 1 includes a primary side circuit 40, a synchronous rectification circuit 60, a current detection circuit 70, a processing unit 10, and a drive circuit 11.
  • the power supply device 1 is configured to insulate between a primary side circuit and a secondary side circuit by a transformer 50, and the primary winding 51 is connected to the full bridge circuit 20 that drives the primary winding 51. Has been.
  • a load device 80 is connected to the power supply device 1.
  • the primary circuit 40 includes a primary winding 51, a primary winding 55 of a current detection transformer 54, a full bridge circuit 20, a capacitor C1, a DC power source 21, and a first current detection circuit.
  • the full bridge circuit 20 is a bridge circuit that drives the primary winding 51, and includes, for example, four switching elements using MOSFETs (Metal Oxide Field Effect Transistors), that is, a switching element Q1, a switching element Q2, and a switching element Q3. And a switching element Q4.
  • MOSFETs Metal Oxide Field Effect Transistors
  • body diodes D1 to D4 hereinafter, “body diode” is also simply referred to as “diode” are connected in parallel.
  • each of the switching elements Q1 to Q4 includes body diodes D1 to D4 having cathodes of corresponding diodes D1 to D4 connected to the drain side and anode terminals connected to the source side.
  • the drains of the switching elements Q1 and Q3 on the current supply side are connected to the power supply line Vin + on the positive voltage side of the DC power supply 21, and the switching elements Q2 and Q4 on the current supply side are connected.
  • the source is connected to the power supply line Vin ⁇ on the negative voltage side of the DC power supply 21.
  • the DC power source 21 is connected in parallel with a noise absorbing capacitor C1.
  • One terminal a of the primary winding 51 is connected to a connection point between the source of the switching element Q1 and the drain of the switching element Q2. Further, a connection point between the source of the switching element Q3 and the drain of the switching element Q4 is connected to one terminal k of the primary winding 55. The other terminal g of the primary winding 55 is connected to the other terminal b of the primary winding 51.
  • Signals G1 to G4 are supplied from the processing unit 10 via the drive circuit 11 to the gates of the switching elements Q1 to Q4, respectively. Thereby, the power supply device 1 can drive the primary winding 51 by the full bridge circuit 20 and measure the current flowing through the primary winding 51 by the current detection transformer 54.
  • the full bridge circuit 20 has an ON state and an OFF state of the switching elements Q1 to Q4 by a leakage inductance (leakage inductance) of the primary winding 51 and a capacitance component (parasitic capacitance) of the switching elements Q1 to Q4. It is configured as a partial resonance type full bridge circuit that uses the resonance action only in a transient state. That is, the control unit 101 turns on the switching elements Q1 and Q4 or the switching elements Q2 and Q3 at a timing when the charge accumulated in the parasitic capacitances of the switching elements Q1 to Q4 becomes as small as possible. The switching loss in Q4 is reduced. Note that the capacitance component in the switching elements Q1 to Q4 is the sum of the capacitance between the drain and the source and the capacitance between the gate and the drain.
  • the gate signals G1 to G4 output from the drive circuit 11 are supplied to the gates of the switching elements Q1 to Q4 in the full bridge circuit 20, respectively. Thereby, switching elements Q1 to Q4 are controlled to be in an on state and an off state.
  • the gate signals G1 to G4 are signals generated based on the on / off control signal CNT (PWM signal) output from the control unit 101 in the processing unit 10.
  • the drive circuit 11 also generates gate signals G5 and G6 for controlling switching elements Q5 and Q6 in a synchronous rectification switch circuit 61, which will be described later, to an on state and an off state.
  • the gate signals G5 and G6 are signals generated based on the on / off control signal CNT output from the control unit 101 in the processing unit 10.
  • the drive circuit 11 controls the switching elements Q1 to Q4 to be in an on state and an off state
  • the drive circuit 11 has a period in which the switching elements Q1 and Q4 are in an on state and the switching elements Q2 and Q3 are in an off state
  • a gate signal is generated in which Q4 is in an off state and switching elements Q2 and Q3 are in an on state alternately.
  • a current flows from one end of the primary winding 51 toward the other end, and a current flows from the other end of the primary winding 51 toward the one end.
  • induced voltages V1 and V2 are generated in the secondary windings 52 and 53, respectively.
  • the primary side circuit 40 is provided with a first current detection circuit 22 for measuring a current flowing through the full bridge circuit 20 via the power supply line Vin +.
  • the first current detection circuit 22 is a current detection circuit for preventing an overcurrent of the switching elements Q1 to Q4. Based on the detection result of the first current detection circuit 22, the processing unit 10 detects that an overcurrent of a predetermined value or more has flowed through the full bridge circuit 20 via the power line Vin +. To instruct the drive circuit 11 to turn off Q4 instantaneously to prevent the switching elements Q1 to Q4 from being destroyed by an overcurrent.
  • the full bridge circuit 20 of the primary side circuit 40 is connected to the primary winding 51 and the primary winding 55.
  • the secondary windings 52 and 53 are connected to a synchronous rectification circuit 60 that full-wave rectifies the voltage induced in the secondary windings 52 and 53.
  • a current detection circuit 70 is connected to the secondary winding 56 of the current detection transformer 54.
  • the synchronous rectifier circuit 60 includes secondary windings 52 and 53, a synchronous rectification switch circuit 61, a rectification smoothing circuit (choke coil L11 and capacitor C11), and a second current detection circuit 62.
  • the synchronous rectifier circuit 60 performs full-wave rectification on the voltages V1 and V2 (inductive electromotive force) induced in the secondary windings 52 and 53, and converts them into a DC voltage.
  • the switching elements Q5 and Q6 constituting the synchronous rectifier switch circuit 61 are controlled by the control unit 101 to control the timing between the on state and the off state, and are induced in the secondary windings 52 and 53.
  • V1 and V2 are synchronously rectified.
  • the synchronous rectification circuit 60 smoothes the synchronously rectified DC voltage with the choke coil L11 and the capacitor C11, and supplies power to the load device 80 via the output terminals Out1 and Out2.
  • the load device 80 is, for example, a lamp, a motor, a battery, or the like.
  • the switching elements Q5 and Q6 of the synchronous rectification switch circuit 61 are constituted by MOSFETs, for example.
  • Body diodes D5 and D6 are connected in parallel to switching elements Q5 and Q6, respectively. That is, each of the switching elements Q5 and Q6 is connected to the cathode terminals of the diodes D5 and D6 corresponding to the drain side and to the anode terminal on the source side.
  • the center tap of the secondary winding of the transformer 50 that is, the terminal d of the connection point of the secondary windings 52 and 53 is connected to one end of the choke coil L11 and the other end of the choke coil L11.
  • the terminal c of the secondary winding 52 is connected to the drain of the switching element Q6 in the synchronous rectification switch circuit 61.
  • the source of the switching element Q6 is connected to the output terminal on the reference potential side via the reference potential line GND.
  • Connected to Out2 The terminal e of the secondary winding 53 is connected to the drain of the switching element Q5 in the synchronous rectification switch circuit 61, and the source of the switching element Q5 is connected to the output terminal Out2 via the reference potential line GND. Yes.
  • the processing unit 10 controls the timing between the on state and the off state of the switching elements Q5 and Q6 in synchronization with the timing at which the voltages V2 and V3 are induced in the secondary windings 52 and 53.
  • the processing unit 10 controls the timing between the on state and the off state of the switching elements Q5 and Q6 in synchronization with the timing at which the voltages V2 and V3 are induced in the secondary windings 52 and 53.
  • the synchronous rectifier circuit 60 is provided with a second current detection circuit 62 that measures the current flowing through the switching element Q5 (or both of the switching elements Q5 and Q6).
  • the second current detection circuit 62 outputs a signal indicating the current flowing through the measured switching element Q5 (or both of the switching elements Q5 and Q6) to the processing unit 10.
  • the current detection circuit 70 includes a secondary winding 56 of a current detection transformer 54, a rectifier circuit 71, a diode 72, a voltage dividing circuit 73, and a third current detection circuit 74.
  • the primary winding 51 and the secondary windings 52 and 53 constitute a transformer 50
  • the primary winding 55 and the secondary winding 56 constitute a current detection transformer 54.
  • the power supply device 1 is configured to indirectly detect the output current Io by detecting the current flowing through the primary winding 51 using the current detection transformer 54 and the current detection circuit 70. ing. This is because when a current detection transformer is inserted in series with the choke coil L11 of the synchronous rectifier circuit 60 to detect the output current Io, for example, when an output current Io exceeding 100 A is detected, Noise may be superimposed on the detected value of the transformer, and a problem of heat generation may occur. Therefore, the output current Io is detected by detecting the primary current flowing in the primary winding 51 with the current detecting transformer 54. Note that the output current Io may be detected in the synchronous rectifier circuit 60.
  • the current detection circuit 70 includes a rectifier circuit 71 connected to the terminals m and n of the secondary winding 56 of the current detection transformer 54, a diode 72, a voltage dividing circuit 73, and a third current detection circuit 74. is doing.
  • the anode of the diode 72 is connected to one terminal of the rectifier circuit 71, and the cathode is connected to the voltage dividing circuit 73.
  • the voltage dividing circuit 73 outputs a signal S1 representing the divided result to the processing unit 10.
  • One end of the third current detection circuit 74 is connected to one terminal of the rectifier circuit 71, and outputs a signal S2 representing the detection result to the processing unit 10.
  • the rectifier circuit 71 is a full-wave rectifier circuit configured by a diode bridge circuit.
  • the voltage dividing circuit 73 is configured by a resistance voltage dividing circuit.
  • a circuit composed of the diode 72 and the voltage dividing circuit 73 forms a return loop of the current Ict output from the rectifier circuit 71.
  • the signal S1 output from the voltage dividing circuit 73 to the processing unit 10 can be used as, for example, a signal for overcurrent protection of the switching elements Q1 to Q4.
  • the diode 72 is a voltage compensating diode for compensating for Vf (a forward voltage drop) generated in a diode 741 of a third current detection circuit 74 described later.
  • the third current detection circuit 74 indirectly detects the output current Io from the current Ict output from the secondary winding 56 of the current detection transformer 54 via the rectifier circuit 71.
  • FIG. 4A is a configuration diagram illustrating a configuration example of the third current detection circuit 74. As shown in FIG. 4A, the third current detection circuit 74 includes a capacitor 742 that is charged by a current Ict through a diode 741, and resistors 743 and 744 for voltage division for detecting the voltage across the capacitor 742. And a noise absorbing capacitor 745 and a resistor 746.
  • the anode of the diode 741 is an input terminal of the third current detection circuit 74.
  • the cathode of the diode 741 is connected to one end of the resistor 743 and one end of the capacitor 742.
  • the diode 741 serves to detect a current peak.
  • the other end of the resistor 743 is connected to one end of the resistor 744, one end of the capacitor 745, and one end of the resistor 746.
  • the other end of the capacitor 742, the other end of the resistor 744, and the other end of the capacitor 745 are grounded.
  • the capacitor 742, the capacitor 745, the resistor 743, the resistor 744, and the resistor 746 constitute a circuit that detects current at a desired response speed.
  • the other end of the resistor 746 is connected to the ADC 110 of the processing unit 10.
  • FIG. 4B is a waveform diagram for explaining the operation of the third current detection circuit 74.
  • the horizontal axis represents time
  • the vertical axis represents voltage and current.
  • the capacitor 742 of the third current detection circuit 74 is caused by the current Ict. Charged.
  • the voltage Vct across the capacitor 742 charged by this current Ict has a smoothed voltage waveform as shown in FIG. 4B.
  • This voltage Vct is divided by resistors 743 and 744, and a connection point N 1 between the resistors 744 and 743 conforms to an input voltage range of the A / D converter (ADC) 110 in the processing unit 10.
  • a voltage signal Vsc is generated.
  • the resistor 744 is connected with a noise absorbing capacitor 745 in parallel.
  • the voltage signal Vsc is input to the A / D converter 110 in the processing unit 10 as the signal S2 via the resistor 740.
  • the A / D converter 110 performs A / D conversion on the signal S ⁇ b> 2 and inputs a digital value signal obtained by the A / D conversion to the control unit 101.
  • the current detection circuit 70 can indirectly detect the output current Io by detecting the current flowing through the primary winding 51.
  • the control unit 101 in the processing unit 10 supplies the gate signals G1 to G4 to the switching elements Q1 to Q4 in the full bridge circuit 20 via the drive circuit 11, respectively. That is, the control unit 101 detects the output voltage Vout by an output voltage detection circuit (not shown), and the timing (duty) between the ON state and the OFF state of the switching elements Q1 to Q4 so that the output voltage Vout becomes constant. Ratio).
  • the control unit 101 supplies gate signals G5 and G6 to the switching elements Q5 and Q6 in the synchronous rectification switch circuit 61 via the drive circuit 11, respectively. That is, the control unit 101 controls the switching elements Q5 and Q6 to perform synchronous rectification by controlling the timing between the ON state and the OFF state of the switching elements Q5 and Q6.
  • control unit 101 controls the timing between the ON state and the OFF state of the switching elements Q1 to Q4, if the switching element on the upper arm side and the switching element on the lower arm side are simultaneously turned on, the through current In order to avoid this, the period during which the two switching elements are turned off at the same time is provided as a dead time.
  • FIG. 5 is a time chart showing the waveforms of the gate signals of the switching elements Q1 to Q4.
  • the horizontal axis indicates time t
  • the vertical axis indicates the waveform of the gate signal G1 of the switching element Q1, the waveform of the gate signal G2 of the switching element Q2, and the waveform of the gate signal G3 of the switching element Q3.
  • the waveform of the gate signal G4 of the switching element Q4 and the voltage waveform applied to the primary winding 51 are shown side by side.
  • switching elements Q1 and Q3 are in an off state, and switching elements Q2 and Q4 are in an on state. That is, at time t0, the current flowing through the primary winding 51 is returned by the switching elements Q2 and Q4.
  • the control unit 101 sets the gate signal G4 to L to turn off the switching element Q4, and at time t2 when a predetermined dead time DT34 has elapsed from this time t1, the gate signal G3. Is set to H to turn on the switching element Q3.
  • the control unit 101 sets the gate signal G2 to L and turns off the switching element Q2. That is, a negative voltage is applied to the primary winding 51 during the period from time t2 to time t3.
  • the negative voltage represents a state in which the potential of the terminal b of the primary winding 51 is higher than the potential of the terminal a.
  • the control unit 101 sets the gate signal G1 to H to turn on the switching element Q1. That is, if the switching element Q1 is immediately turned on after the switching element Q2 is turned off, a through current may flow through the switching element Q1 and the switching element Q2 due to an operation delay due to the turn-off time of the switching element Q2. In order to avoid this, a dead time DT12 is provided.
  • the control unit 101 sets the gate signal G3 to L and turns off the switching element Q3. Therefore, between the time t4 and the time t5, the switching elements Q1 and Q3 are turned on, and the current flowing through the primary winding 51 is recirculated by the switching elements Q1 and Q3.
  • the control unit 101 sets the gate signal G4 to H to turn on the switching element Q4. That is, if the switching element Q4 is immediately turned on after the switching element Q3 is turned off, a through current may flow through the switching elements Q3 and Q4 due to an operation delay due to the turn-off time of the switching element Q3. In order to avoid this, a dead time DT34 is provided.
  • the control unit 101 sets the gate signal G1 to L and turns off the switching element Q1. That is, a positive voltage is applied to the primary winding 51 during the period from time t6 to time t7.
  • the positive voltage means that the potential of the terminal a of the primary winding 51 is higher than the potential of the terminal b.
  • the control unit 101 sets the gate signal G2 to H to turn on the switching element Q2. That is, if the switching element Q2 is immediately turned on after the switching element Q1 is turned off, a through current may flow through the switching elements Q1 and Q2 due to an operation delay due to the turn-off time of the switching element Q1. In order to avoid this, a dead time DT12 is provided.
  • the control unit 101 sets the gate signal G4 to L and turns off the switching element Q4. That is, during the period from time t8 to time t9, the switching elements Q2 and Q4 are turned on, and the current flowing through the primary winding 51 is returned by the switching elements Q2 and Q4. Subsequent operations after time t9 are repeated after the above-described time t1. 5 indicates a phase difference between the gate signal G1 of the switching element Q1 on the upper arm side and the gate signal G3 of the switching element Q3 on the upper arm side.
  • FIG. 6 is an explanatory diagram showing an example of the dead time table 31 stored in the storage unit 30.
  • the storage unit 30 stores dead time data in the form of a table. That is, the dead time DT12 and the dead time DT34 of the switching elements constituting the full bridge circuit 20 are stored in the form of a table in association with the output current Io of the power supply device 1.
  • the control unit 101 refers to the dead time table 31 illustrated in FIG. 6 according to the magnitude of the output current Io of the power supply device 1.
  • the dead time table 31 is stored in an EEPROM (Electrically Erasable Programmable Read-Only Memory) in the storage unit 30.
  • EEPROM Electrical Erasable Programmable Read-Only Memory
  • the initial value data of the dead time stored in the dead time table 31 corresponds to, for example, an average value of variations in delay time of the drive circuit 11 and an average value of variations in characteristics of the switching elements Q1 to Q4.
  • a value estimated as the optimum dead time can be used.
  • This initial value data is a value set for each output current value zero (0), Io1, Io2, Io3, Io4, Io5, and Io6. That is, the initial value data stored in the dead time table 31 is the optimum dead time when the delay time of the drive circuit 11 and the characteristics of the switching elements Q1 to Q4 coincide with the average value.
  • the control unit 101 selects the dead time dt4 as the dead time DT12 and selects the dead time dt4 'as the dead time DT34.
  • the control unit 101 generates the gate signals G1 to G4 shown in FIG. 3, the control unit 101 generates the gate signals G1 to G4 using the dead time dt4 and the dead time dt4 '.
  • 7A to 7C are waveform diagrams showing examples of the drain-source voltage Vds of the switching element when the dead times are DT1, DT2, and DT3.
  • This waveform diagram is an example of the waveform of the drain-source voltage Vds of the switching element Q2, for example.
  • 7A shows a waveform when the dead time is DT1
  • FIG. 7B shows a waveform when the dead time is DT2
  • FIG. 7C shows a waveform when the dead time is DT3.
  • 7A to 7C the horizontal axis represents time
  • the vertical axis represents voltage.
  • FIG. 8 is an explanatory diagram illustrating a measurement example of the power conversion efficiency when the dead time is changed.
  • the voltmeter 5 and the ammeter 6 are arranged on the input side of the power supply device 1 and the voltmeter 7 and the ammeter 8 are arranged on the output side of the power supply device 1 as shown in FIG. To do.
  • the reference dead time (reference dead time) is changed in the + direction (the direction in which the time is extended) and the ⁇ direction (the direction in which the time is shortened) with the predetermined time ⁇ T as the unit time.
  • the reference dead time is set to 0 under the condition that the output current Io is constant, and the dead time is +3 (reference dead time + 3 ⁇ ⁇ T) in the positive direction from the reference dead time. It is changed to ⁇ 3 (reference dead time ⁇ 3 ⁇ ⁇ T) in the ⁇ direction.
  • the inspection apparatus 2 measures the power conversion efficiency e which changes according to the time width of a dead time. In the example shown in FIG. 8, when the dead time is “0 (reference dead time)”, the highest power conversion efficiency e11.4 is obtained, and when the dead time is “+3 (reference dead time + 3 ⁇ ⁇ T)”. The power conversion efficiency is the lowest.
  • FIG. 9A is a graph showing a change in power conversion efficiency when the dead time is changed, and is a graph showing the measurement result of the power conversion efficiency e shown in FIG.
  • the horizontal axis indicates the change in dead time
  • the vertical axis indicates the level of power conversion efficiency.
  • the change characteristic of the power conversion efficiency when the reference dead time is set to 0 and the reference dead time is changed in the + direction and the ⁇ direction with a predetermined time ⁇ T as a unit time. Is shown.
  • the symbols e1 to e12 indicate the level of power conversion efficiency.
  • the power conversion efficiency changes by changing the dead time.
  • the dead time is zero (0), that is, the dead time is the reference dead time.
  • the power conversion efficiency is maximized.
  • FIG. 9B is a graph showing an example of changes in power conversion efficiency due to variations in characteristics of switching elements. As shown in the characteristic curve B1 of FIG. 9B, when the dead time is +1 (reference dead time + ⁇ T), the power conversion efficiency may be the highest.
  • the inspection apparatus 2 determines that the dead time of “reference dead time + ⁇ T” is the optimum dead time that maximizes the power conversion efficiency e, and this optimum dead time and this optimum dead time are applied.
  • Information on the output current value is transmitted to the power supply device 1.
  • the power supply device 1 rewrites the dead time table 31 in the storage unit 30 with the data of the optimum dead time based on the information of the optimum dead time and output current value received from the inspection device 2.
  • there are two types of dead time dead time DT12 and dead time DT34.
  • the optimum dead time is set according to the value of each output current Io. It is set for each of the times DT34.
  • FIG. 10 is a flowchart showing the flow of the optimum dead time setting process.
  • FIG. 10 is a flowchart showing the flow of the optimum dead time setting process in the power supply device 1 and the inspection device 2 described above.
  • dead time DT12 and dead time DT34 there are two types of dead time, dead time DT12 and dead time DT34, and optimum dead time setting processing is performed for each of dead time DT12 and dead time DT34.
  • the order of setting the optimum dead time for the dead time DT12 and the dead time DT34 may be any first. For example, after setting the dead time DT12, the dead time DT34 is set.
  • the inspection device 2 when determining the optimum dead time by the inspection device 2, the input voltage Vin, the output voltage Vout, and the output current Io of the power supply device 1 are set to be constant, There is a simple method for determining the dead time when the input current is minimized as the optimum dead time.
  • the inspection device 2 acquires the input voltage Vin, the output voltage Vout, the output current Io, and the input current Iin of the power supply device 1.
  • the power conversion efficiency is measured, and the optimum dead time is determined based on the measurement result.
  • a voltmeter 5 that measures the input voltage Vin and an ammeter 6 that measures the input current Iin are arranged in advance on the input side of the power supply device 1, and the output of the power supply device 1 It is assumed that a voltmeter 7 for measuring the output voltage Vout and an ammeter 8 for measuring the output current Io are arranged in advance on the side.
  • the power supply device 1 and the inspection device 2 set the input voltage Vin, the output voltage Vout, and the output current Io to be constant (step S110).
  • an electronic load device is used as the load device 80 so that the output current Io is constant.
  • the control unit 101 of the power supply device 1 reads a dead time corresponding to the output current Io from the dead time table 31 and generates gate signals G1 to G4 via the drive circuit 11. Note that at the start of the optimum dead time setting process, the dead time becomes the reference dead time.
  • the inspection apparatus 2 acquires the input voltage Vin, the output voltage Vout, the output current Io, and the input current Iin, calculates the power conversion efficiency in the reference dead time, and uses the data of the power conversion efficiency as the data. It memorize
  • the power supply device 1 stores a new dead time obtained by adding +1 ( ⁇ T increase) to the current dead time in the dead time table 31, and changes the dead time. Based on the changed dead time, the control unit 101 of the power supply device 1 generates the gate signals G1 to G4 and drives the switching elements Q1 to Q4 (step S140).
  • the inspection apparatus 2 acquires the input voltage Vin, the output voltage Vout, the output current Io, and the input current Iin, calculates the power conversion efficiency, and stores the power conversion efficiency data in the storage unit 204. Store (step S150). Subsequently, the inspection apparatus 2 determines whether or not the dead time has been changed to +3 (reference dead time + 3 ⁇ ⁇ T) (step S160). If it is determined in the determination process in step S160 that the dead time has not been changed to +3 (step S160: NO), the inspection apparatus 2 returns to the process in step S130 to change the dead time and perform power conversion. Continue the efficiency measurement process.
  • step S160 when it is determined that the dead time has been changed to +3 (step S160: YES), the inspection apparatus 2 proceeds to the process of step S170. Then, the inspection apparatus 2 sets the dead time to ⁇ 1 (step S170). Further, when it is determined in step S200 that it is not -3, the inspection apparatus 2 subtracts the dead time by -1. For example, when the dead time is -1, the dead time becomes -2 by this process. Subsequently, the power supply device 1 stores the dead time set to ⁇ 1 or the dead time obtained by subtracting 1 in the dead time table 31 to change the dead time. The power supply device 1 generates the gate signals G1 to G4 based on the changed dead time, and drives the switching elements Q1 to Q4 (step S180).
  • the inspection apparatus 2 acquires the input voltage Vin, the output voltage Vout, the output current Io, and the input current Iin, calculates the power conversion efficiency, and stores the power conversion efficiency data in the storage unit 204. Store (step S190). Subsequently, the inspection apparatus 2 determines whether or not the dead time has been changed to ⁇ 3 (reference dead time ⁇ 3 ⁇ ⁇ T) (step S200). If it is determined in the determination process in step S200 that the dead time has not been changed to -3 (step S200: NO), the inspection apparatus 2 returns to the process in step S170 to change the dead time, Continue the conversion efficiency measurement process.
  • step S200 when it is determined that the dead time has been changed to ⁇ 3 (step S200: YES), the inspection apparatus 2 proceeds to the process of step S210. And the inspection apparatus 2 determines the dead time when the power conversion efficiency becomes the highest based on the data of the power conversion efficiency measured by changing the dead time in the ⁇ 3 direction from the reference dead time. That is, the inspection apparatus 2 determines that the dead time when the input current Iin is the lowest is the optimum dead time (step S210). Subsequently, the inspection apparatus 2 notifies the power supply apparatus 1 of information on the optimum dead time (step S220).
  • the power supply device 1 writes the optimum dead time notified from the inspection device 2 in the dead time table 31 in the storage unit 30 (step S230). Then, after executing the process of step S230, the power supply apparatus 1 and the inspection apparatus 2 finish the setting process of the optimum dead time of the PCS 40.
  • the inspection device 2 repeatedly performs the processing from step S110 to S230 for several different output currents Io, determines the optimum dead time according to each current value, and notifies the power supply device 1 of the determination. To do.
  • the power supply device 1 sets the optimum dead time in the dead time table 31 by writing the optimum dead time acquired from the inspection device 2 into the dead time table 31.
  • the dead time is determined when determining the dead time corresponding to the first output current Io to be measured.
  • the output current Io is indirectly measured by detecting the current flowing through the primary winding 51 using the current detection transformer 54 and the current detection circuit 70.
  • the output current Io may be detected by providing a current detection circuit in the synchronous rectification circuit 60.
  • FIG. 11 is a configuration diagram showing a configuration example of a power supply device 1A according to the second embodiment of the present invention.
  • the power supply device 1A shown in FIG. 11 excludes the current detection transformer 54 and the current detection circuit 70 on the primary winding 51 side shown in FIG.
  • the point that the current detection transformer 63 and the output current detection circuit 64 are newly added in the synchronous rectification circuit 60 is different in configuration.
  • the configuration differs in that the first current detection circuit 22 and the second current detection circuit 62 shown in FIG. 3 are omitted.
  • Other configurations are the same as those of the power supply device 1 shown in FIG. For this reason, the same code
  • a current detection transformer 63 is inserted between the choke coil L11 and the output terminal Out1, and the output current Io flowing from the power supply device 1A to the load device 80 by the current detection transformer 63. Is detected.
  • an output current detection circuit 64 for detecting a current value of the output current Io is formed while a circulation loop of a current flowing on the secondary winding side is formed.
  • the output current detection circuit 64 includes a circuit similar to the third current detection circuit 74 shown in FIG. 4, and the current signal Is detected by the output current detection circuit 64 is sent to the processing unit 10. Entered.
  • the optimum dead time setting operation in the power supply device 1A is the same as that of the power supply device 1 of the first embodiment except that the output current Io is detected by the current detection transformer 63 in the synchronous rectifier circuit 60. Done. For this reason, the overlapping description is omitted.
  • the optimum dead time can be set according to the value of the output current Io by directly detecting the output current Io flowing from the output terminal Out1 to the load device 80. .
  • FIG. 12 is a configuration diagram showing a configuration example of a power supply device 1B according to the third embodiment of the present invention.
  • the circuit configuration of the power supply device 1B including the half bridge circuit 20A shown in FIG. 12 is generally well known.
  • the half-bridge circuit 20A alternately turns on and off the switching elements Q1 and Q2, and drives the primary winding 51 with the electric charges accumulated in the capacitors C2 and C3. Then, the voltage induced in the secondary windings 52 and 53 is full-wave rectified by the synchronous rectifier circuit 60 (or the diode rectifier circuit) and supplied to the load device 80 via the choke coil L11.
  • the switching elements Q1 and Q2 are switched near zero voltage by resonating the output capacitances of the switching elements Q1 and Q2 and the leakage inductance of the transformer 50. The switching loss of Q1 and Q2 is reduced.
  • a dead time during which the switching elements Q1 and Q2 are simultaneously turned off is provided in the transition period between the on state and the off state of the switching elements Q1 and Q2.
  • a switching loss occurs as in the case of the full bridge circuit 20 of the first embodiment described above.
  • the inspection apparatus 2 determines the optimum dead time by the same method as the power supply apparatus 1 of the first embodiment, and sets the optimum dead time in the storage unit 30 in the power supply apparatus 1B. . Thereby, also in the power supply device 1B using the half bridge circuit 20A on the primary side in the transformer 50, an optimal dead time can be set.
  • the power supply device of the present invention is a forward type DC-DC converter device that uses a partial resonance action at the time of switching of the main switching element to reduce the loss at the time of switching. Can also be effectively applied. Furthermore, the power supply device of the present invention can be effectively applied to a push-pull type DC / DC converter device.
  • the power supply apparatus according to the present invention corresponds to the power supply apparatus 1, the power supply apparatus 1 ⁇ / b> A, or the power supply apparatus 1 ⁇ / b> B.
  • the first dead time in the present invention is data stored in the dead time table 31 of the storage unit 30, and corresponds to data of the dead time before being rewritten to the optimum dead time.
  • the second dead time corresponds to the optimum dead time determined by the inspection apparatus 2, and the dead time table 31 of the storage unit 30 is finally rewritten to this optimum dead time.
  • the switching circuit in the present invention corresponds to the full bridge circuit 20 or the half bridge circuit 20A, and the switching elements in the present invention correspond to, for example, the switching elements Q1 to Q4 in the full bridge circuit 20.
  • the power supply device 1 includes the storage unit 30 that stores the first dead time of the switching elements (Q1 to Q4) that constitute the switching circuit (full bridge circuit 20), and the measurement of the input current.
  • An acquisition unit 102 that externally inputs information on the second dead time set based on the result, and a rewriting unit 103 that rewrites the first dead time stored in the storage unit 30 to the second dead time acquired by the acquisition unit 102.
  • the control unit 101 controls the switching elements (Q1 to Q4) according to the second dead time stored in the storage unit 30.
  • the second dead time (optimum dead time) set based on the measurement result of the input current is acquired from the outside, and the first dead time data stored in the storage unit 30 is obtained.
  • the control unit 101 controls the switching element according to the second dead time.
  • the power supply device 1 has a second dead time (optimum dead time) in which the input current is minimized without adding a circuit for measuring the input current or a new circuit for determining the dead time. Can be set for each product.
  • the acquisition unit 102 externally inputs information on the second dead time set based on the measurement result of the power conversion efficiency.
  • the second dead time (optimum dead time) set based on the measurement result of the power conversion efficiency is acquired from the outside, and the first dead time data stored in the storage unit 30 To the second dead time.
  • the control unit 101 controls the switching element according to the second dead time.
  • the power supply device 1 has a second dead time (optimum dead time) at which the power conversion efficiency is maximized without adding a circuit for measuring the power conversion efficiency and a circuit for determining the dead time inside the product. Can be set for each product.
  • the acquisition unit 102 obtains the second dead time from the dead time setting unit (inspection apparatus 2) that determines the second dead time based on the input / output current and the input / output voltage.
  • the second dead time is input.
  • the dead time setting unit (inspection device 2) determines the second dead time based on the input / output current and the input / output voltage of the power supply device 1, and obtains the power supply device 1.
  • the unit 102 acquires information on the second dead time from the dead time setting unit (inspection apparatus 2), and stores the second dead time in the storage unit 30.
  • the dead time setting unit determines the second dead time (optimum dead time) at which the power conversion efficiency is maximized based on the input / output current and the input / output voltage of the power supply device 1, and the power supply
  • the device 1 can acquire the information on the second dead time from the dead time setting unit (inspection device 2) and store it in the storage unit 30.
  • the second dead time (optimum dead time) is the input voltage Vin to the power supply device 1, the output voltage Vout from the power supply device 1, and the output from the power supply device 1.
  • the input current Iin of the power supply device 1 is a value that becomes the smallest.
  • the power supply device 1 acquires information on the second dead time (optimal dead time), which is a dead time when the input current becomes the smallest, by the acquisition unit 102 and stores the second dead time in the storage unit 30. To do. As a result, the power supply device 1 sets the dead time when the input current Iin is minimized while maintaining the input voltage Vin, the output voltage Vout, and the output current Io to be the second dead time (optimum dead time). Can be acquired by the acquisition unit 102 and stored in the storage unit 30.
  • the second dead time optical dead time
  • the storage unit 30 stores the relationship between the output current and the first dead time for each output current, and the rewrite unit 103 outputs the output stored in the storage unit 30.
  • the first dead time for each current is rewritten to the second dead time for each output current acquired by the acquisition unit 102.
  • the storage unit 30 stores the relationship between the output current and the first dead time for each output current.
  • the power supply device 1 acquires the information of the 2nd dead time for every output current by the acquisition part 102, and the output from which the acquisition part 102 acquired the 1st dead time for every output current memorize
  • the switching element is an element constituting a half bridge circuit or a full bridge circuit. If it is a power supply device of such a structure, the 2nd dead time (optimal dead time) which maximizes power conversion efficiency can be set with respect to the switching element which comprises a half bridge circuit or a full bridge circuit.
  • the switching elements (Q1 to Q4) are switched using a partial resonance action.
  • the second dead time optimum for maximizing the power conversion efficiency with respect to the switching elements (Q1 to Q4) constituting the partial resonance type full bridge circuit or half bridge circuit. Dead time
  • the inspection apparatus 2 of the present invention is a power supply apparatus in which the first dead time of the switching elements (Q1 to Q4) of the switching circuit (full bridge circuit 20) can be changed by information on dead time input from the outside.
  • the measurement unit 201 that instructs to change the first dead time and measures the input current of the power supply device, and the input current is the most based on the measured value of the input current measured by the measurement unit 201
  • the determination unit 202 that determines the dead time when the dead time is reduced as the second dead time, and notifies the power supply apparatus 1 of the information on the second dead time, and causes the power supply apparatus 1 to set the first dead time as the second dead time.
  • a writing unit 203 that determines the dead time when the dead time is reduced as the second dead time, and notifies the power supply apparatus 1 of the information on the second dead time, and causes the power supply apparatus 1 to set the first dead time as the second dead time.
  • the power supply apparatus 1 is instructed to change the first dead time, and the input of the power supply apparatus 1 is changed while changing the dead time of the switching elements (Q1 to Q4). Measure current. And the inspection apparatus 2 determines the dead time when the input current is the smallest as the second dead time (optimal dead time) based on the measurement result of the input current. Then, the inspection apparatus 2 notifies the power supply apparatus 1 of the dead time information, and causes the power supply apparatus 1 to set the first dead time to the second dead time. As a result, the inspection device 2 measures the input current while changing the dead time of the switching elements (Q1 to Q4) of the switching circuit (full bridge circuit 20) of the power supply device 1, and the second dead time (optimum dead time). Time).
  • the inspection apparatus 2 can notify the power supply apparatus 1 of the second dead time and store it in the storage unit 30.
  • the power supply device 1 has the second dead time (optimum dead time) in which the input current is minimized without adding a new circuit for measuring the input current or a circuit for determining the dead time inside the product. Can be set for each product.
  • the measurement unit 201 maintains a constant input voltage to the power supply apparatus 1, output voltage from the power supply apparatus 1, and output current from the power supply apparatus 1.
  • the power conversion device is instructed to change the first dead time to measure the power conversion efficiency, and the determination unit 202 determines the power conversion efficiency based on the measured value of the input current measured by the measurement unit 201. Is determined as the second dead time.
  • the inspection device has the first input voltage to the power supply device, the output voltage from the power supply device, and the output current from the power supply device kept constant.
  • the power conversion efficiency is measured by instructing to change one dead time, and the dead time when the power conversion efficiency of the power supply device becomes the highest is determined as the second dead time. Thereby, the inspection apparatus can easily determine the second dead time (optimum dead time) by measuring the power conversion efficiency.
  • the optimization method of the power supply device 1 optimizes the dead time of the switching elements (Q1 to Q4) constituting the switching circuit (full bridge circuit 20) of the power supply device 1 by the inspection device 2.
  • a method for optimizing a power supply apparatus 1 includes a procedure in which the power supply apparatus 1 changes a first dead time according to an instruction from the inspection apparatus 2, and the inspection apparatus 2 has a first dead time with respect to the power supply apparatus 1. And a procedure for measuring the input current of the power supply device 1 and the inspection device 2 determines the second dead time when the input current is minimized based on the measurement result of the input current.
  • the inspection apparatus 2 notifies the power supply apparatus 1 of the information on the second dead time, and causes the power supply apparatus 1 to set the first dead time to the second dead time. Characterized in that it comprises a forward, a.
  • the inspection device 2 changes the first dead time with respect to the power supply device 1 in which the first dead time of the switching elements (Q1 to Q4) can be changed.
  • the inspection apparatus 2 determines a second dead time (optimum dead time) at which the input current is minimized based on the measurement result of the input current.
  • the inspection device 2 transmits information on the second dead time to the power supply device 1 and causes the power supply device 1 to set the first dead time to the second dead time.
  • the power supply device 1 can set the optimum dead time for which the force current is minimized for each product without adding a circuit for measuring the input current and a new circuit for determining the dead time to the inside of the product. .
  • the input voltage to the power supply device 1, the output voltage from the power supply device 1, and the output current from the power supply device 1 are constant during the second dead time.
  • the inspection device 2 maintains a constant input voltage to the power supply device 1, output voltage from the power supply device 1, and output current from the power supply device 1. , Change the dead time. Then, the inspection device 2 determines that the dead time when the input current becomes the smallest is the second dead time (optimum dead time). Thereby, the test
  • the inspection device 2 determines the second dead time for the first output current, based on the information indicating the positive / negative direction in which the first dead time is changed. Determining a second dead time for the second output current.
  • the inspection device 2 corresponds to the first output current to be measured when the dead time is corrected for several different output currents.
  • determining the dead time it is stored whether the input current is the smallest or the power conversion efficiency is the largest when the dead time is changed in any of the positive and negative directions.
  • the inspection apparatus 2 determines the dead time from the positive direction when determining the dead time for the second output current. When the power conversion efficiency starts to decrease and the peak is detected, the dead time adjustment is terminated. Thereby, the test
  • the power supply device 1 of this invention is not limited only to the above-mentioned example of illustration, A various change can be added in the range which does not deviate from the summary of this invention. Of course.
  • the processing unit 10, the control unit 101, and the inspection device 2 in the power supply devices 1, 1A, and 1B described above may be realized by dedicated hardware, and realize the functions of the respective functional units.
  • the program may be recorded on a computer-readable recording medium, the program recorded on the recording medium may be read into a computer system and executed to realize the function. That is, the processing unit 10 and the inspection apparatus 2 are equipped with a computer system such as a microcontroller or a microcomputer having a CPU, a ROM, a RAM, and the like, and the CPU reads and executes a software program. A part or all of the processing functions of 10 may be realized.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

La présente invention concerne un dispositif d'alimentation électrique (1) qui comprend : une unité de stockage (30) qui stocke des premiers temps morts pour des éléments de commutation (Q1 à Q4) constituant un circuit de commutation (circuit en pont complet (20)); une unité d'acquisition (102) par l'intermédiaire de laquelle des informations sur des seconds temps morts réglés sur la base d'un résultat de mesure de courant d'entrée sont introduites depuis l'extérieur; une unité de remplacement (103) qui remplace les premiers temps morts stockés dans l'unité de stockage (30) par les seconds temps morts acquis par l'unité d'acquisition (102); et une unité de commande (101) qui commande les éléments de commutation (Q1 à Q4) en fonction des seconds temps morts stockés dans l'unité de stockage (30).
PCT/JP2013/082240 2013-11-29 2013-11-29 Dispositif d'alimentation électrique, dispositif d'inspection, et procédé d'optimisation pour dispositif d'alimentation électrique WO2015079573A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2013/082240 WO2015079573A1 (fr) 2013-11-29 2013-11-29 Dispositif d'alimentation électrique, dispositif d'inspection, et procédé d'optimisation pour dispositif d'alimentation électrique
JP2015550516A JP6171205B2 (ja) 2013-11-29 2013-11-29 電源装置、検査装置、及び電源装置の最適化方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2013/082240 WO2015079573A1 (fr) 2013-11-29 2013-11-29 Dispositif d'alimentation électrique, dispositif d'inspection, et procédé d'optimisation pour dispositif d'alimentation électrique

Publications (1)

Publication Number Publication Date
WO2015079573A1 true WO2015079573A1 (fr) 2015-06-04

Family

ID=53198558

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2013/082240 WO2015079573A1 (fr) 2013-11-29 2013-11-29 Dispositif d'alimentation électrique, dispositif d'inspection, et procédé d'optimisation pour dispositif d'alimentation électrique

Country Status (2)

Country Link
JP (1) JP6171205B2 (fr)
WO (1) WO2015079573A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017010134A1 (fr) * 2015-07-13 2017-01-19 シャープ株式会社 Dispositif de conversion de puissance et son procédé de commande
JP2017184555A (ja) * 2016-03-31 2017-10-05 住友電気工業株式会社 Dc/dc変換装置、コンピュータプログラム及びdc/dc変換装置の制御方法
WO2020193026A1 (fr) * 2019-03-27 2020-10-01 Zf Friedrichshafen Ag Appareil de commande pour déterminer des temps morts pour des demi-ponts électroniques de puissance
WO2020255720A1 (fr) * 2019-06-18 2020-12-24 株式会社オートネットワーク技術研究所 Convertisseur continu-continu isolé

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003125588A (ja) * 2001-10-12 2003-04-25 Mitsubishi Electric Corp 電力変換装置
JP2003174773A (ja) * 2001-12-04 2003-06-20 Matsuda Micronics Corp 電源装置
JP2004140913A (ja) * 2002-10-17 2004-05-13 Tdk Corp スイッチング電源装置
US20050281058A1 (en) * 2004-06-21 2005-12-22 Issa Batarseh Dynamic optimization of efficiency using dead time and FET drive control
JP2009011045A (ja) * 2007-06-27 2009-01-15 Nec Electronics Corp スイッチングレギュレータ、及び直流電圧変換方法
JP2013062952A (ja) * 2011-09-13 2013-04-04 Ricoh Co Ltd スイッチング回路、電子回路及びスイッチング方法
JP2013132112A (ja) * 2011-12-21 2013-07-04 Hitachi Computer Peripherals Co Ltd スイッチング電源装置及びその制御方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7098640B2 (en) * 2004-07-06 2006-08-29 International Rectifier Corporation Method and apparatus for intelligently setting dead time
US7589506B2 (en) * 2005-11-03 2009-09-15 International Rectifier Corporation Signal-to-noise improvement for power loss minimizing dead time

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003125588A (ja) * 2001-10-12 2003-04-25 Mitsubishi Electric Corp 電力変換装置
JP2003174773A (ja) * 2001-12-04 2003-06-20 Matsuda Micronics Corp 電源装置
JP2004140913A (ja) * 2002-10-17 2004-05-13 Tdk Corp スイッチング電源装置
US20050281058A1 (en) * 2004-06-21 2005-12-22 Issa Batarseh Dynamic optimization of efficiency using dead time and FET drive control
JP2009011045A (ja) * 2007-06-27 2009-01-15 Nec Electronics Corp スイッチングレギュレータ、及び直流電圧変換方法
JP2013062952A (ja) * 2011-09-13 2013-04-04 Ricoh Co Ltd スイッチング回路、電子回路及びスイッチング方法
JP2013132112A (ja) * 2011-12-21 2013-07-04 Hitachi Computer Peripherals Co Ltd スイッチング電源装置及びその制御方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017010134A1 (fr) * 2015-07-13 2017-01-19 シャープ株式会社 Dispositif de conversion de puissance et son procédé de commande
JP2017184555A (ja) * 2016-03-31 2017-10-05 住友電気工業株式会社 Dc/dc変換装置、コンピュータプログラム及びdc/dc変換装置の制御方法
WO2020193026A1 (fr) * 2019-03-27 2020-10-01 Zf Friedrichshafen Ag Appareil de commande pour déterminer des temps morts pour des demi-ponts électroniques de puissance
CN113615061A (zh) * 2019-03-27 2021-11-05 采埃孚股份公司 用于确定功率电子半桥的死区时间的控制器
US11462993B2 (en) 2019-03-27 2022-10-04 Zf Friedrichshafen Ag Controller for determining dead times for power electronics half-bridges
WO2020255720A1 (fr) * 2019-06-18 2020-12-24 株式会社オートネットワーク技術研究所 Convertisseur continu-continu isolé
JP7409169B2 (ja) 2019-06-18 2024-01-09 株式会社オートネットワーク技術研究所 絶縁型dcdcコンバータ
US11901825B2 (en) 2019-06-18 2024-02-13 Autonetworks Technologies, Ltd. Isolated DC-DC converter

Also Published As

Publication number Publication date
JPWO2015079573A1 (ja) 2017-03-16
JP6171205B2 (ja) 2017-08-09

Similar Documents

Publication Publication Date Title
JP5950635B2 (ja) 電源装置及び画像形成装置
US9088223B2 (en) Power factor correction circuit with input voltage estimation and driving method thereof
US10892687B2 (en) Asymmetric power converter, power converters, and operating power converters
US10008945B2 (en) Switching power supply device
WO2016088322A1 (fr) Dispositif d'alimentation à découpage
CN108233696B (zh) 控制脉冲宽度调制开关频率的装置和方法
JP6932633B2 (ja) スイッチング電源装置
JP6171205B2 (ja) 電源装置、検査装置、及び電源装置の最適化方法
US8634210B2 (en) DC-DC converter including switching frequency control circuit
JP6702112B2 (ja) スイッチング電源装置及びled点灯回路
US9716427B2 (en) Power factor correction circuit having bottom skip controller
JP2003244953A (ja) Dc−dcコンバータ
JP5241571B2 (ja) スイッチング電源装置
JP2010252610A (ja) Dc−dcコンバータ
JP6015947B2 (ja) スイッチング電源装置、及びその制御方法
JP4167811B2 (ja) スイッチング電源装置
JP6080326B2 (ja) 電源装置、検査装置、及び電源装置の最適化方法
WO2014077281A1 (fr) Appareil de conversion de puissance
JP2016059182A (ja) スイッチング電源装置
JP7102265B2 (ja) スイッチング電源およびスイッチング電源制御回路
JP6008450B2 (ja) スイッチング電源装置、及びその制御方法
JP2002252974A (ja) スイッチング電源装置
JP4702497B1 (ja) 多出力スイッチング電源装置
US20240072661A1 (en) Switching control circuit and power supply circuit
JP6659196B2 (ja) 電力変換装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13898406

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2015550516

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13898406

Country of ref document: EP

Kind code of ref document: A1