WO2015074283A1 - 软板上芯片卷带及对应的软板上芯片的压接方法 - Google Patents

软板上芯片卷带及对应的软板上芯片的压接方法 Download PDF

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Publication number
WO2015074283A1
WO2015074283A1 PCT/CN2013/087891 CN2013087891W WO2015074283A1 WO 2015074283 A1 WO2015074283 A1 WO 2015074283A1 CN 2013087891 W CN2013087891 W CN 2013087891W WO 2015074283 A1 WO2015074283 A1 WO 2015074283A1
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Prior art keywords
chip
board
chips
flexible
flexible board
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PCT/CN2013/087891
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English (en)
French (fr)
Inventor
齐明虎
吴俊豪
林昆贤
汪永强
舒志优
杨卫兵
陈增宏
杨国坤
李晨阳子
蒋运芍
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深圳市华星光电技术有限公司
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Priority to US14/235,808 priority Critical patent/US9324689B2/en
Publication of WO2015074283A1 publication Critical patent/WO2015074283A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1303—Apparatus specially adapted to the manufacture of LCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing

Definitions

  • the present invention relates to a flexible on-chip chip tape, and more particularly to a hybrid packaged flexible on-chip chip tape and a corresponding soft plate chip crimping method.
  • Liquid crystal display Display LCD
  • LCD Liquid crystal display Display
  • FPD liquid crystal display
  • the matrix process in the previous stage is to produce a thin film transistor (TFT) substrate (also called an array substrate) and a color filter (CF) substrate;
  • TFT thin film transistor
  • CF color filter
  • the middle segment forming process is responsible for combining the TFT substrate and the CF substrate, and injecting liquid crystal between the two.
  • the rear-end modular process is responsible for assembling the assembled panel with the backlight module, the panel driving circuit, the outer frame, and the like.
  • the LCD driver chip is an important component of the liquid crystal display, and its main function is to output the required voltage to the pixel to control the degree of twist of the liquid crystal molecules.
  • the Source driver chip is a tube signal
  • the Gate driver chip is a tube gate, which has different functions for the liquid crystal display panel.
  • the LCD image is a line and a line scan.
  • the Gate driver chip is a tube vertical signal. Assume that starting from the top line, the first leg of the Gate driver chip is set to On, and the rest is off. .
  • the source driver chip is the real signal (horizontal), and the signal it sends is only acceptable for the horizontal pixels of the first line.
  • the first line has finished sending the signal, it will change the second line.
  • the content of the Source driver chip should be replaced with the second line, and then the Gate driver chip is replaced with the second leg, and the rest is off, and the data can be sent to the second line.
  • the assembly of the driver chip in the assembly process of the latter stage module is an assembly process in which the source driver chip and the Gate driver chip are packaged together with the LCD liquid crystal panel.
  • LCD packages for driving chips such as quad flat package (quad) Flat package, QFP), chip on glass (COG), tape automated bonding (tape automated) Bonding, TAB) and chip on chip (chip on Film, COF), etc.
  • the COF soft on-board chip structure has become the mainstream of the LCD driver chip packaging process because of its flexibility and ability to provide a smaller pitch.
  • FIG. 1A shows a top view of a conventional chip strip on a source soft board
  • FIG. 1B shows a top view of a conventional chip strip on a gate soft board
  • FIG. 2 is a top view showing a conventional method of crimping a chip on a plurality of source and gate soft plates to a liquid crystal panel.
  • a chip package tape 80 on a source flexible board mainly includes a base tape 80a and a plurality of source flexible board chips 81.
  • the plurality of source flexible board chips 81 are arranged on the base tape 80a.
  • the chip board 81 on the source soft board to be used can be separated from the chip tape 80 on the source flexible board by a plurality of punching processes.
  • the chip reel 90 on a gate soft board mainly includes a base tape 90a and a plurality of gate soft chip chips 91.
  • the plurality of gate soft chip chips 91 are arranged on the base tape 90a.
  • the chip 91 on the gate soft board to be used is divided from the chip tape 90 of the gate soft board by a plurality of punching programs.
  • a liquid crystal panel 100 has a first side 110 and a second side 120 which are perpendicular to each other, and is subjected to multiple thermocompression (thermo-compression). a bonding process, the plurality of source flexible on-board chips 81 may be crimped to the first side 110 of the liquid crystal panel 100, and the plurality of gate soft-on-board chips 91 may be crimped to the The second side 120 of the liquid crystal panel 100 is used to complete the assembly work of the driving chip of the liquid crystal panel 100.
  • the invention provides a method for crimping a chip package on a flexible package and a corresponding chip on a soft board, so as to solve the problem that the prior art cannot simultaneously perform two different specifications in a single tape and a single device.
  • the present invention provides a flexible on-chip chip tape, comprising: a base tape; a plurality of first flexible board chips and a second flexible board chip; wherein the plurality of first flexible board chips and the plurality of Chips on the second flexible board are arranged on the base tape.
  • the number of chips on the first soft board and the second soft board corresponds to a liquid crystal panel
  • the number of chips on the first flexible board and the second flexible board is required.
  • the number of chips on the first soft board is n+m, and the number of chips on the second soft board is n.
  • n first chip on the first soft board and n chips on the second soft board are interspersed first, and then m first Chip on the soft board.
  • the present invention further provides a method for crimping a chip on a soft board, comprising the following steps:
  • Providing a chip roll on a flexible board comprising: a base tape, a plurality of first flexible board chips, and a plurality of second soft board chips, the plurality of first soft board chips and the plurality of second soft boards
  • the upper chip is arranged on the base tape, and the part of the flexible chip chip tape is unfolded;
  • the punching mechanism comprising a first punching head and a second punching head disposed above the unfolded chip strip of the flexible board, the mobile platform correspondingly
  • the first punching head is corresponding to die cutting a chip on the first flexible board to the mobile platform and/or the second punching head corresponding to a punching strip under the chip ribbon on the flexible board.
  • the second flexible board chip to the mobile platform;
  • liquid crystal panel having a first side and a second side perpendicular to each other;
  • the first pressure joint correspondingly extracting the first soft board chip on the moving platform, and correspondingly crimping to the first side of the liquid crystal panel
  • the second and/or the second crimping joint correspondingly extracts the second flexible chip on the moving platform, and is correspondingly crimped to the second side of the liquid crystal panel.
  • the punching-crimping step is repeated to complete the crimping operation of the chip on the first flexible board and the chip on the second flexible board on all the liquid crystal panels. .
  • the number of chips on the first soft board and the second soft board in a loop section of the chip tape on the flexible board corresponds to a liquid crystal panel
  • the number of chips on the first flexible board and the second flexible board is required.
  • the number of chips on the first soft board is n+m, and the number of chips on the second soft board is n, wherein n
  • the chip on the first flexible board is interspersed with the chips on the n second flexible boards, and then the first chips on the first flexible board are arranged.
  • the first punching head and the second punching head are according to the first soft board chip and the second soft board on the chip winding tape on the flexible board.
  • the arrangement of the upper chips is performed independently or simultaneously to die-cut the chip on the first flexible board and/or the second flexible board to the mobile platform.
  • the first pressure joint and the second pressure joint are arranged according to the placement of the first soft board chip and the second soft board chip on the mobile platform. Performing independent or simultaneous operation to crimp the chip on the first flexible board and/or the second flexible board to the liquid crystal panel.
  • the present invention further provides a method for crimping a chip on a soft board, comprising the following steps:
  • Providing a chip carrier tape on a flexible board comprising: a base tape, a plurality of first flexible board chips, and a plurality of second flexible board chips; wherein the plurality of first flexible board chips and the plurality of second The chips on the flexible board are arranged on the base tape; in a loop section of the chip tape on the flexible board, the number of chips on the first flexible board is n+m, and the second soft board The number of chips is n, n chips on the first soft board and n chips on the second soft board are interspersed first, and then m pieces of the first soft board chip are arranged; and the a chip on the flexible board with n portions of the first flexible board chip and n of the second flexible board chip interspersed;
  • the punching mechanism comprising a first punching head and a second punching head disposed above the unfolded chip strip of the flexible board, the mobile platform correspondingly
  • the first punching head is corresponding to punching one of the first flexible board chips to the moving platform and the second punching head corresponding to one of the punches under the chip ribbon on the flexible board.
  • a second flexible board chip to the mobile platform;
  • liquid crystal panel having a first side and a second side perpendicular to each other;
  • the first pressure joint correspondingly extracting the first soft board chip on the moving platform, and correspondingly crimping to the first side of the liquid crystal panel
  • the second pressure connector correspondingly extracts the second flexible chip on the moving platform, and is correspondingly crimped to the second side of the liquid crystal panel.
  • the above steps are repeated to complete the portion of the chip on the flexible board that is interspersed with the chips on the first soft board and the chips on the second second board.
  • the first punching head correspondingly punches one of the first soft board chips to the moving platform
  • the first pressure connector correspondingly extracts the first soft board chip located on the mobile platform, and is correspondingly crimped to the first side of the liquid crystal panel.
  • the above steps are repeated to complete the operation of crimping a portion of the m-chip strips on the first flexible board to the liquid crystal panel.
  • the present invention provides a method for crimping a chip on a flexible chip and a corresponding chip on a flexible board, which can simultaneously perform two types of flexible boards by using only one type of flexible tape on the flexible chip and a set of devices.
  • the crimping operation of the chip can effectively reduce costs and increase productivity.
  • Figure 1A A top view of a prior art chip strip on a source soft board.
  • Figure 1B A top view of a prior art chip ribbon on a gate soft board.
  • FIG. 2 is a top plan view showing a chip of a plurality of source and gate soft plates crimped to a liquid crystal panel.
  • Figure 3 is a top plan view of a first embodiment of a hybrid packaged on-board chip reel of the present invention.
  • 4A-4H are schematic views showing the steps of crimping a chip roll on a flexible board to a liquid crystal panel according to a first embodiment of the present invention.
  • Figure 5 is a top plan view of a second embodiment of a hybrid packaged on-board chip reel of the present invention.
  • 6A-6C are schematic views showing the steps of crimping a chip roll on a flexible board to a liquid crystal panel according to a second embodiment of the present invention.
  • FIG. 3 illustrates a top view of a first embodiment of a hybrid packaged on-board chip reel of the present invention. It is specifically noted that, for convenience of explanation, the drawings of the present invention are presented in a simplified schematic manner in which the number of lines has been simplified, and details not related to the description are also omitted.
  • the film, COF) tape 10 mainly comprises a base tape 10a, a plurality of first flexible chip chips 11 and a plurality of second flexible chip chips 12.
  • the plurality of first flexible board chips 11 and the plurality of second flexible board chips 12 are arranged on the base tape 10a in a regular arrangement.
  • the upper chip 11 and the plurality of second flexible chip 12 are arranged on the base tape 10a in a staggered manner.
  • the arrows in the figure of the present invention all indicate the direction in which the base tape 10a of the chip tape 10 on the flexible board is unfolded.
  • the first on-board chip 11 can be a source driver chip (Source Driver).
  • Source Driver The internal structure of the COF of IC
  • the first flexible board chip 11 mainly includes a soft board, a driving chip, a plurality of output side lines and a plurality of input side lines, and the soft board of the first flexible board chip 11 is provided with an output side and An input side, the output side is connected to a liquid crystal panel (not shown), and the input side is disposed on the other side corresponding to the output side for connecting to a circuit board (not shown).
  • the chip 12 on the second flexible board may be a gate driver chip (Gate Driver
  • the internal structure of the COF of IC) is presented in a simplified schematic manner and is not labeled.
  • the chip 12 on the second flexible board mainly includes a soft board, a driving chip and a plurality of output side lines, and the soft board of the chip 12 on the second flexible board is provided with an output side, and the output side is used for the output side.
  • a liquid crystal panel not shown.
  • FIG. 4A-4H is a schematic diagram showing the steps of crimping a chip roll 10 on a flexible board to a liquid crystal panel according to a first embodiment of the present invention.
  • the COF crimping operation in the present invention is, for example, an anisotropic conductive film layer is disposed between the output side of the chips 11, 12 on the flexible board and the edge contact of a liquid crystal panel (anisotropic Conductive film, ACF) is electrically connected to the upper side of the output side by heating, so that the contact of the output side is electrically connected to the contact of the liquid crystal panel, thereby completing the liquid crystal panel crimping operation of the COF.
  • anisotropic Conductive film, ACF anisotropic Conductive film
  • the above COF crimping method is also called thermo-compression Bonding)
  • the manner in which the COF is assembled to the liquid crystal panel is not limited in the present invention, and other methods of assembling the COF to the liquid crystal panel may be employed in the present invention.
  • the steps of crimping the chip-on-board tape 10 of the first embodiment of the present invention to a liquid crystal panel are as follows:
  • a chip-on-board tape 10 which includes a base tape 10a, a plurality of first flexible chip chips 11, and a plurality of second flexible chip chips 12, the plurality of first The chip 11 on the flexible board and the plurality of chip 12 on the second flexible board are interspersed and arranged on the base tape 10a, and a portion of the chip winding tape 10 on the flexible board is unfolded.
  • the punching mechanism 20 includes a first punching head 21 and a second punching head 22, which are placed in an unfolded manner.
  • the upper surface of the chip roll 10 on the flexible board; the moving platform 30 is correspondingly disposed under the chip roll 10 on the flexible board.
  • the first punching head 21 correspondingly punches the chip 11 on the first soft board below the moving platform 30, and the second punching head 22 corresponds to the punching.
  • the second flexible chip on the lower side of the chip 12 to the mobile platform 30.
  • the mobile platform 30 is removed to a position, and the positioning is preferably close to the vicinity of the next work area;
  • a liquid crystal panel 100 having a first side 110 and a second side 120 perpendicular to each other is provided.
  • a first crimping joint 41 is provided, and the first crimping joint 41 correspondingly extracts one of the first soft board chips 11 (shown in FIG. 4D) located on the moving platform 30, and the first The crimping joint 41 corresponds to crimping the chip 11 on the first flexible board to the first side 110 of the liquid crystal panel 100 (as shown in FIG. 4E).
  • a second crimping joint 42 is provided, and the second crimping joint 42 correspondingly extracts the second flexible chip 12 on the moving platform 30 (as shown in FIG. 4F).
  • the second crimping terminal 42 is correspondingly crimped to the second flexible chip 12 to the second side 120 of the liquid crystal panel 100 (as shown in FIG. 4G).
  • the flexible on-chip tape reel 10 of the first embodiment of the present invention is a hybrid packaged on-board chip reel 10 in which a plurality of first flexible on-board chips 11 and The chip 12 on the second flexible board is arranged on the base tape 10a in a penetrating manner, and the chip 11 on the first flexible board and the chip 12 on the second flexible board are correspondingly punched by a punching mechanism 20 to move.
  • the first flexible board chip 11 and the second flexible board chip 12 are respectively crimped to the two sides of a liquid crystal panel 100 through a first crimping joint 41 and a second crimping joint 42. .
  • the invention can save the purchase cost of the COF tape and the cost of the related machine, that is, the crimping operation of the two kinds of soft board chips can be simultaneously performed by using only one kind of soft chip chip tape and a set of equipment. Therefore, it can effectively reduce costs and increase production capacity.
  • the number of the first flexible board chip 11 and the second flexible board chip 12 is corresponding to that required on the liquid crystal panel 100.
  • the number of the first flexible board chip 11 and the second flexible board chip 12 and their arrangement rules and the subsequent punching-crimping step are described in the paragraphs.
  • FIG. 5 is a top view of a second embodiment of a hybrid packaged on-board chip reel according to the present invention.
  • the on-chip chip reel 10' of the second embodiment of the present invention is substantially similar to the on-chip chip reel 10 of the first embodiment of the present invention, so that the same component symbols and names are used, but the difference is that
  • the number of chips 11 on the first flexible board is larger than the number of chips 12 on the second flexible board, for example, the first soft board
  • the number of upper chips 11 is n+m
  • the number of chips 12 on the second flexible board is n.
  • the number of the first flexible board chip 11 and the second flexible board chip 12 are the same, thus the a plurality of first flexible on-board chips 11 and said plurality of second flexible on-board chips 12 are interspersed on said base tape 10a (as in the first embodiment of the present invention); but in the second paragraph
  • the chip-on-board tape 10' on the flexible board includes only m chips 11 on the first flexible board, that is, m consecutively arranged after the chip 12 on the last second flexible board of the first paragraph.
  • the chip 11 on the first flexible board is included in one of the loop paragraphs of the embodiment: in the first paragraph, the number of the first flexible board chip 11 and the second flexible board chip 12 are the same, thus the a plurality of first flexible on-board chips 11 and said plurality of second flexible on-board chips 12 are interspersed on said base tape 10a (as in the first embodiment of the present invention); but in the second paragraph
  • the chip-on-board tape 10' on the flexible board includes only m chips 11 on the first flexible board, that is
  • the on-chip chip reel 10' of the second embodiment of the present invention can ensure that the number of the chip 11 on the first flexible board and the chip 12 on the second flexible board can provide a liquid crystal in one of its loops.
  • Figures 6A-6C are schematic views showing the steps of crimping a flexible tape carrier tape 10' to a liquid crystal panel according to a second embodiment of the present invention.
  • the step of crimping the chip-on-board tape 10' of the second embodiment of the present invention to a liquid crystal panel can also be carried out in two stages: in the first stage, due to the chip 11 on the first flexible board and the first The number of chips 12 on the second flexible board is the same, so the same steps as in FIGS. 4A-4F are used; but when the first stage is completed, the first flexible board chip 11 needs to be individually crimped.
  • the first punching head 21 corresponds to the position of the chip 11 on the first flexible board, and the chip 11 on the first flexible board is punched into the moving platform 30.
  • the second punching head 22 does not need to consider any chip 2 corresponding to the second flexible board, and does not perform the punching action.
  • the mobile platform 30 is removed to a location.
  • the first pressure connector 41 correspondingly extracts the first flexible board chip 11 on the mobile platform 30, and correspondingly crimps the first flexible board chip 11 to a liquid crystal panel.
  • the above-described punching-crimping step can be repeated until the crimping operation of all of the first flexible on-board chips 11 on the first side 110' of the liquid crystal panel 100' is completed (as shown in Fig. 6C).
  • the present invention does not particularly limit the rules of the plurality of first flexible on-board chips 11 and the plurality of second flexible on-board chips 12 disposed on the flexible chip chip tape 10, however, regardless of the arrangement thereof The rules of the need to have a corresponding punching-crimping step. Furthermore, if the first pressure joint 41 and the second pressure joint can be prevented from interfering on the moving platform 30, the first pressure joint 41 and the second pressure joint 42 can be further extracted simultaneously. The chip 11 on the first flexible board and the chip 12 on the second flexible board are crimped.
  • the first punching head 21 and the second punching head 22 of the punching mechanism 20 are in accordance with the first soft board on the chip reel 10, 10' on the flexible board.
  • the arrangement of the upper chip 11 and the chip 12 on the second flexible board can be operated independently or simultaneously, and die-cutting the chip 11 on the first flexible board and/or the chip 12 on the second flexible board
  • the mobile platform 30; the first pressure connector 41 and the second pressure connector 42 can be placed according to the placement of the first flexible chip on the mobile platform 30 and the second flexible chip 12 Operate independently or simultaneously.
  • the first punching head 21 correspondingly punches one of the first soft board chips 11 to the moving platform 30 and/or the second punching head 22 correspondingly die cut.
  • the first side 110 of the liquid crystal panel 100, and/or the second crimping end 42 correspondingly extracts the second flexible chip on the moving platform 30 corresponding to the liquid crystal panel 100 Two sides 120.
  • the present invention provides a hybrid packaged on-board chip reel 10 comprising a plurality of first flexible on-board chips 11 and a second flexible on-board chip 12 arranged in a penetrating manner on a base tape 10a, and The first soft board chip 11 and the second soft board chip 12 are respectively crimped to the two sides of a liquid crystal panel 100 through a corresponding punching mechanism 20, a moving platform 30 and crimping joints 41, 42 respectively.
  • the present invention can save the purchase cost of the COF tape and the cost of the related machine, and can perform the crimping operation of the two kinds of soft board chips at the same time by using only one kind of soft chip chip tape and a set of equipment. Can effectively reduce costs and increase production capacity.

Abstract

提供一种软板上芯片卷带（10）及对应的软板上芯片的压接方法，该软板上芯片卷带包含一基带（10a）、多个第一软板上芯片（11）及第二软板上芯片（12），多个第一软板上芯片和第二软板上芯片以穿插的方式排列设置于基带上，并且通过一冲切机构（20）对应冲切至一移动平台（30）上，再通过一第一压接头（41）及一第二压接头（42）分别压接至一液晶面板（100）的两个侧边。只需要使用一种软板上芯片卷带和一组设备就可以同时进行两种软板上芯片的压接作业，因此可有效降低成本并提高产能。

Description

软板上芯片卷带及对应的软板上芯片的压接方法 技术领域
本发明涉及一种软板上芯片卷带，特别是涉及一种混合封装的软板上芯片卷带及对应的软板上芯片的压接方法。
 背景技术
液晶显示器(liquid crystal display，LCD)是利用液晶材料的特性来显示图像的一种平板显示装置(flat panel display，FPD)，其相较于其他显示装置而言更具轻薄、低驱动电压及低功耗等优点，已经成为整个消费市场上的主流产品。现今液晶显示面板的制作过程中，大致可分为前段矩阵(Array)工艺、中段成盒(Cell)工艺及后段模块化(Module)工艺。前段的矩阵工艺为生产薄膜式晶体管(TFT)基板(又称阵列基板)及彩色滤光片(CF)基板；中段成盒工艺则负责将TFT基板与CF基板组合，并两者之间注入液晶与切割合乎产品尺寸之面板；后段模块化工艺则负责将组合后的面板与背光模块、面板驱动电路、外框等做组装的工艺。
其中，LCD驱动芯片为液晶显示器的重要零组件，其主要功能是输出需要的电压至像素，以控制液晶分子的扭转程度。LCD驱动芯片分为两种：一为列于X轴的源极驱动芯片(Source Driver IC)与列于Y轴的闸极驱动芯片(Gate Driver IC)。换言之Source驱动芯片是管信号的，Gate驱动芯片则是管门闸的，对于液晶显示面板各有不同的作用。简单来说，LCD的影像是一条线一条线扫瞄下来的Gate驱动芯片是管垂直的信号，假设从最上面的一条线开始，那么就是Gate驱动芯片的第一支脚设为开，其余为关。Source驱动芯片里头是真正的信号(水平的)，它送出的信号只有第一条线的水平像素可以接受。第一条线送完信号，就换第二条线。这时Source驱动芯片的内容要换成第二线的了，然后Gate驱动芯片换成第二支脚开，其余为关，就可以把资料送到第二线。
再者，后段模块组装工艺中的驱动芯片的组装，是将上述Source驱动芯片及Gate驱动芯片经过封装后再要与LCD液晶面板组合在一起的组装工艺。LCD用于驱动芯片的封装形式有许多种类，例如四边扁平封装(quad flat package, QFP)、玻璃上芯片(chip on glass，COG)、带载自动键合(tape automated bonding，TAB)及软板上芯片(chip on film，COF)等。其中，COF软板上芯片构造因具有可挠性及能提供更小的间距，因此已成为LCD驱动芯片封装工艺的主流。
通常卷带式（TAB）封装生产的COF是以整卷的方式进行卷带和送带的，在目前LCD液晶面板制作中，需要提供上述两种COF分别压接(Bonding)至其两个边缘。请参照图1A、图1B及图2所示，图1A揭示现有一种源极软板上芯片卷带的上视图；图1B揭示现有一种闸极软板上芯片卷带的上视图；及图2揭示现有多个源极及闸极软板上芯片压接于一液晶面板的上视示意图。特别说明的是，为了说明上的方便，上述附图是以简化示意的方式来呈现，其中的线路数量已经过简化，并且也省略了与说明无关的细节。
如图1A所示，一源极软板上芯片卷带80主要包含一基带80a及多个源极软板上芯片81，所述多个源极软板上芯片81排列设于所述基带80a上，并且通过多次冲切程序可从所述源极软板上芯片卷带80中分割出需要使用的所述源极软板上芯片81。
如图1B所示，一闸极软板上芯片卷带90主要包含一基带90a及多个闸极软板上芯片91，所述多个闸极软板上芯片91排列设于所述基带90a上，并且通过多次冲切程序可从所述闸极软板上芯片卷带90中分割出需要使用的所述闸极软板上芯片91。
再者，如图2所示，一液晶面板100具有互呈垂直的一第一侧边110及一第二侧边120，通过多次热压接(thermo-compression bonding)程序，可将所述多个源极软板上芯片81压接至所述液晶面板100的第一侧边110，及将所述多个闸极软板上芯片91压接至所述液晶面板100的第二侧边120，以完成所述液晶面板100的驱动芯片的组装作业。
综上所述，随着液晶面板往大尺寸发展，并且对产能的要求也越来越高，因此LCD两边同时压接COF将成为一种新的发展趋势。然而，目前单一的COF卷带仅提供了单一种规格COF，因此需要分别提供上述源极软板上芯片81及闸极软板上芯片91，如需同时供给2种不同规格的COF，则需具有2套独立运作的设备，如此将会增加设备成本。
因此，有必要提供一种软板上芯片卷带及对应的软板上芯片的压接方法，以解决现有技术所存在的问题。
 技术问题
本发明提供一种混合封装的软板上芯片卷带及对应的软板上芯片的压接方法，以解决现有技术所存在的无法在单一卷带及单一设备中同时进行2种不同规格的软板上芯片的压接作业的技术问题。
 技术解决方案
本发明提供一种软板上芯片卷带，其包含：一基带；多个第一软板上芯片及第二软板上芯片；其中，所述多个第一软板上芯片与所述多个第二软板上芯片排列设置于所述基带上。
在本发明的一实施例中，在所述软板上芯片卷带的一个循环段落中，所述第一软板上芯片与所述第二软板上芯片的数量对应于一液晶面板上所需要的所述第一软板上芯片与所述第二软板上芯片的数量。
在本发明的一实施例中，在一个所述循环段中，所述第一软板上芯片的数量为n+m个，所述第二软板上芯片的数量为n个。
在本发明的一实施例中，在所述循环段落中，n个所述第一软板上芯片与n个所述第二软板上芯片先穿插排列，接着再排列m个所述第一软板上芯片。
为达上述目的，本发明另提供一种软板上芯片的压接方法，其包含以下步骤：
提供一软板上芯片卷带，其包含一基带、多个第一软板上芯片及多个第二软板上芯片，所述多个第一软板上芯片与所述多个第二软板上芯片排列设置于所述基带上，并展开部分的所述软板上芯片卷带；
提供一冲切机构及一移动平台，所述冲切机构包含一第一冲切头及一第二冲切头置于展开的所述软板上芯片卷带的上方，所述移动平台对应设于所述软板上芯片卷带的下方，所述第一冲切头对应冲切一个所述第一软板上芯片至所述移动平台及/或所述第二冲切头对应冲切一个所述第二软板上芯片至所述移动平台；
移出所述移动平台至一定位；
提供一液晶面板，具有互呈垂直的一第一侧边及一第二侧边；及
提供一第一压接头及一第二压接头，所述第一压接头对应提取位于所述移动平台上的所述第一软板上芯片，并对应压接至所述液晶面板的第一侧边，及/或所述第二压接头对应提取位于所述移动平台上的所述第二软板上芯片，并对应压接至所述液晶面板的第二侧边。
在本发明的一实施例中，重复所述冲切-压接步骤，以完成所有所述液晶面板的上的所述第一软板上芯片及所述第二软板上芯片的压接作业。
在本发明的一实施例中，在所述软板上芯片卷带的一个循环段落中的所述第一软板上芯片与所述第二软板上芯片的数量对应于一液晶面板上所需要的所述第一软板上芯片与所述第二软板上芯片的数量。
在本发明的一实施例中，在一个所述循环段落中，所述第一软板上芯片的数量为n+m个，所述第二软板上芯片的数量为n个，其中n个所述第一软板上芯片与n个所述第二软板上芯片先穿插排列，接着再排列m个所述第一软板上芯片。
在本发明的一实施例中，所述第一冲切头及所述第二冲切头依据所述软板上芯片卷带上的所述第一软板上芯片与所述第二软板上芯片的排列情形，进行独立或同时运作，以冲切所述第一软板上芯片及/或所述第二软板上芯片至所述移动平台。
在本发明的一实施例中，所述第一压接头及所述第二压接头依据所述移动平台上的所述第一软板上芯片与所述第二软板上芯片的放置情形，进行独立或同时运作，以压接所述第一软板上芯片及/或所述第二软板上芯片至所述液晶面板。
为达上述目的，本发明又提供一种软板上芯片的压接方法，其包含以下步骤：
提供一软板上芯片卷带，其包含一基带、多个第一软板上芯片及多个第二软板上芯片；其中所述多个第一软板上芯片与所述多个第二软板上芯片排列设置于所述基带上；在所述软板上芯片卷带的一个循环段落中，所述第一软板上芯片的数量为n+m个，所述第二软板上芯片的数量为n个，n个所述第一软板上芯片与n个所述第二软板上芯片先穿插排列，接着再排列m个所述第一软板上芯片；并展开所述软板上芯片卷带上n个所述第一软板上芯片与n个所述第二软板上芯片穿插排列的部分；
提供一冲切机构及一移动平台，所述冲切机构包含一第一冲切头及一第二冲切头置于展开的所述软板上芯片卷带的上方，所述移动平台对应设于所述软板上芯片卷带的下方，所述第一冲切头对应冲切一个所述第一软板上芯片至所述移动平台及所述第二冲切头对应冲切一个所述第二软板上芯片至所述移动平台；
移出所述移动平台至一定位；
提供一液晶面板，具有互呈垂直的一第一侧边及一第二侧边；及
提供一第一压接头及一第二压接头，所述第一压接头对应提取位于所述移动平台上的所述第一软板上芯片，并对应压接至所述液晶面板的第一侧边，及所述第二压接头对应提取位于所述移动平台上的所述第二软板上芯片，并对应压接至所述液晶面板的第二侧边。
在本发明的一实施例中，重复上述步骤，以完成将所述软板上芯片卷带上n个所述第一软板上芯片与n个所述第二软板上芯片穿插排列的部分压接至所述液晶面板的作业。
在本发明的一实施例中，在上述步骤之后还包含以下步骤:
展开所述软板上芯片卷带上m个所述第一软板上芯片排列的部分；
所述第一冲切头对应冲切一个所述第一软板上芯片至所述移动平台；
移出所述移动平台至一定位；
所述第一压接头对应提取位于所述移动平台上的所述第一软板上芯片，并对应压接至所述液晶面板的第一侧边。
在本发明的一实施例中，重复上述步骤，以完成将所述软板上芯片卷带上m个所述第一软板上芯片排列的部分压接至所述液晶面板的作业。
 有益效果
因此，本发明提供一种软板上芯片卷带及对应的软板上芯片的压接方法，其只需使用一种软板上芯片卷带及一组设备即可同时进行两种软板上芯片的压接作业，因此可有效降低成本及提高产能。
 附图说明
图1A：现有一种源极软板上芯片卷带的上视图。
图1B：现有一种闸极软板上芯片卷带的上视图。
图2：现有多个源极及闸极软板上芯片压接于一液晶面板的上视示意图。
图3：本发明一种混合封装的软板上芯片卷带的第一实施例的上视图。
图4A-4H：本发明第一实施例的软板上芯片卷带压接于一液晶面板的步骤示意图。
图5：本发明一种混合封装的软板上芯片卷带的第二实施例的上视图。
图6A-6C：本发明第二实施例的软板上芯片卷带压接于一液晶面板的步骤示意图。
 本发明的最佳实施方式
为让本发明上述目的、特征及优点更明显易懂，下文特举本发明较佳实施例，并配合附图，作详细说明如下。再者，本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参照图3所示，图3揭示本发明一种混合封装的软板上芯片卷带的第一实施例的上视图。特别说明的是，为了说明上的方便，本发明的各附图是以简化示意的方式来呈现，其中的线路数量已经过简化，并且也省略了与说明无关的细节。
如图3所示，本发明一种混合封装的软板上芯片(chip on film，COF)卷带10主要包含一基带10a、多个第一软板上芯片11及多个第二软板上芯片12。所述多个第一软板上芯片11与所述多个第二软板上芯片12以一定的规则排列设于所述基带10a上，在本实施例中，所述多个第一软板上芯片11与所述多个第二软板上芯片12是以穿插的方式排列设于所述基带10a上。另外，本案图中的箭头皆表示所述软板上芯片卷带10的基带10a展开拉出的方向。
在图3中，所述第一软板上芯片11可以是一源极驱动芯片(Source Driver IC)的COF，其内部构造是以简化示意的方式来呈现，并且不做标示。所述第一软板上芯片11主要包含一软板、一驱动芯片、多个输出侧线路及多个输入侧线路，另外所述第一软板上芯片11的软板设有一输出侧边及一输入侧边，所述输出侧边用以连接至一液晶面板(未绘示)，而所述输入侧边设于对应于所述输出侧边的另一侧，用以连接至一电路板(未绘示)。
另外，在本实施例中，所述第二软板上芯片12可以是一闸极驱动芯片(Gate Driver IC)的COF，其内部构造是以简化示意的方式来呈现，并且不做标示。所述第二软板上芯片12主要包含一软板、一驱动芯片及多个输出侧线路，另外所述第二软板上芯片12的软板设有一输出侧边，所述输出侧边用以连接至一液晶面板(未绘示)。
请参照图4A-4H所示，图4A-4H揭示本发明第一实施例的软板上芯片卷带10压接于一液晶面板的步骤示意图。本发明中的COF压接作业，例如是在所述软板上芯片11,12的输出侧边与一液晶面板的边缘接点之间设一各向异性导电膜层(anisotropic conductive film, ACF)，并通过加热加压于所述输出侧边的上方，使所述输出侧边的接点与所述液晶面板的接点电性连接，从而完成此一COF的液晶面板压接动作。上述COF压接方法又称为热压接(thermo-compression bonding)，然而，本发明中并不限制组装COF于液晶面板的方式，本发明也可采用其它组装COF于液晶面板的方式。
本发明第一实施例的软板上芯片卷带10压接于一液晶面板的步骤说明如下：
首先，如图4A所示，提供一软板上芯片卷带10，其包含一基带10a、多个第一软板上芯片11及多个第二软板上芯片12，所述多个第一软板上芯片11与所述多个第二软板上芯片12穿插排列设于所述基带10a上，并展开部分的所述软板上芯片卷带10。
接着，如图4A及图4B所示，提供一冲切机构20及一移动平台30，所述冲切机构20包含一第一冲切头21及一第二冲切头22，置于展开的所述软板上芯片卷带10的上方；所述移动平台30对应设于所述软板上芯片卷带10的下方。接着如图4B所示，所述第一冲切头21对应冲切其下方的所述第一软板上芯片11至所述移动平台30上，同时所述第二冲切头22对应冲切其下方的所述第二软板上芯片12至所述移动平台30。
接着，如图4C所示，移出所述移动平台30至一定位，所述定位优选靠近于下一个工作区的附近；
再接着，如图4D及图4E所示，提供一液晶面板100，所述液晶面板100具有互呈垂直的一第一侧边110及一第二侧边120。另外，提供一第一压接头41，所述第一压接头41对应提取位于所述移动平台30上的一个所述第一软板上芯片11(如图4D所示)，并且所述第一压接头41对应压接所述第一软板上芯片11至所述液晶面板100的第一侧边110(如图4E所示)。
再接着，如图4F及图4G所示，提供一第二压接头42，所述第二压接头42对应提取位于所述移动平台30上的所述第二软板上芯片12(如图4F所示)，并且所述第二压接头42对应压接所述第二软板上芯片12至所述液晶面板100的第二侧边120(如图4G所示)。
最后，如图4H所示，重复上述冲切、移动及压接步骤。在本实施例中，由于所述液晶面板100上的第一软板上芯片11及第二软板上芯片12的数量是相同的，因此重复上述冲切、移动及压接步骤，即可完成所述液晶面板100上其它的第一软板上芯片11及第二软板上芯片12的压接作业。
综上所述，本发明的第一实施例的所述软板上芯片卷带10是一种混合封装式的软板上芯片卷带10，其内的多个第一软板上芯片11与第二软板上芯片12以穿插的方式排列设于所述基带10a上，并且通过一冲切机构20对应冲切所述第一软板上芯片11与第二软板上芯片12至一移动平台30上，再通过一第一压接头41及一第二压接头42将所述第一软板上芯片11与第二软板上芯片12分别压接至一液晶面板100的两个侧边。因此，本发明可以节省COF卷带的采购成本及相关机台的费用，也就是只需使用一种软板上芯片卷带及一组设备即可同时进行两种软板上芯片的压接作业，因此可有效降低成本及提高产能。
然而，在所述软板上芯片卷带10的一个循环段落中，所述第一软板上芯片11与所述第二软板上芯片12的数量是对应于所述液晶面板100上所需要的所述第一软板上芯片11与第二软板上芯片12的数量。因此，当所述液晶面板100中所需要的所述第一软板上芯片11与第二软板上芯片12的数量不相同时，则需要对应调整在一个所述软板上芯片卷带10的循环段落中所述第一软板上芯片11与第二软板上芯片12的数量及其排列规则以及后续的冲切-压接的步骤。
请参照图5所示，图5揭示本发明一种混合封装的软板上芯片卷带的第二实施例的上视图。本发明第二实施例的软板上芯片卷带10’大致相似于本发明第一实施例的软板上芯片卷带10，因此沿用相同的组件符号与名称，但其不同之处在于：在本发明第二实施例的软板上芯片卷带10’中，所述第一软板上芯片11的数量多于所述第二软板上芯片12的数量，例如：所述第一软板上芯片11的数量是n+m个，而所述第二软板上芯片12的数量为n个。因此，在本实施例的一个循环段落中包含了两个段落：在第一段落中，所述第一软板上芯片11与所述第二软板上芯片12的数量是相同的，因此所述多个第一软板上芯片11与所述多个第二软板上芯片12是以穿插的方式排列设于所述基带10a上(如同本发明的第一实施例)；但在第二段落中，所述软板上芯片卷带10’只包含m个所述第一软板上芯片11，也就是说，在第一段落的最后一个所述第二软板上芯片12之后连续排列m个所述第一软板上芯片11。因此，本发明第二实施例的软板上芯片卷带10’可以确保在其一个循环段落中，所述第一软板上芯片11及第二软板上芯片12的数量刚好可提供一个液晶面板中所需要的所述第一软板上芯片11与第二软板上芯片12的数量。
请参照图6A-6C所示，图6A-6C揭示本发明第二实施例的软板上芯片卷带10’压接于一液晶面板的步骤示意图。本发明第二实施例的软板上芯片卷带10’压接于一液晶面板的步骤也可分成两阶段进行：在第一阶段中，由于所述第一软板上芯片11与所述第二软板上芯片12的数量是相同的，因此采用与图4A-4F相同的步骤；但当第一阶段完成后，则需要单独对所述第一软板上芯片11进行压接。
如图6A所示，所述第一冲切头21对应一个所述第一软板上芯片11的位置，并冲切所述第一软板上芯片11至所述移动平台30。此时所述第二冲切头22不需考虑对应任何第二软板上芯片12，也不进行冲切动作。接着，移出所述移动平台30至一定位。
如图6B所示，所述第一压接头41对应提取位于所述移动平台30上的所述第一软板上芯片11，并对应压接所述第一软板上芯片11至一液晶面板100’的第一侧边110’。
上述冲切-压接步骤可反复进行，直到完成所述液晶面板100’的第一侧边110’上所有的第一软板上芯片11的压接作业(如图6C所示)。
本发明并不特别限制所述多个第一软板上芯片11与所述多个第二软板上芯片12排列设于所述软板上芯片卷带10上的规则，然而，不论其排列的规则为何，都需要有对应的冲切-压接步骤。再者，若可避免所述第一压接头41及所述第二压接头在所述移动平台30上发生干涉，那么所述第一压接头41及第二压接头42还可进一步同时提取及压接所述第一软板上芯片11及所述第二软板上芯片12。
也就是说，在本发明中，所述冲切机构20的第一冲切头21及第二冲切头22依据所述软板上芯片卷带10,10’上的所述第一软板上芯片11与所述第二软板上芯片12的排列情形，可进行独立或同时运作，并冲切所述第一软板上芯片11及/或所述第二软板上芯片12至所述移动平台30；所述第一压接头41及第二压接头42依据所述移动平台上30的所述第一软板上芯片11与所述第二软板上芯片12的放置情形，可进行独立或同时运作。
或者是说，在本发明中，所述第一冲切头21对应冲切一个所述第一软板上芯片11至所述移动平台30及/或所述第二冲切头22对应冲切一个所述第二软板上芯片12至所述移动平台30；以及所述第一压接头41对应提取位于所述移动平台30上的所述第一软板上芯片11对应压接至所述液晶面板100的第一侧边110，及/或所述第二压接头42对应提取位于所述移动平台30上的所述第二软板上芯片12对应压接至所述液晶面板100的第二侧边120。
综上所述，相较于现有单一的COF卷带仅提供了单一种规格COF，因此如需同时供给2种不同规格的COF，则需具有2套独立运作的设备，如此将会增加设备成本。本发明的通过提供一种混合封装的软板上芯片卷带10，其包含多个第一软板上芯片11与第二软板上芯片12以穿插的方式排列设于一基带10a上，并且通过对应的一冲切机构20、一移动平台30及压接头41,42，将所述第一软板上芯片11与第二软板上芯片12分别压接至一液晶面板100的两个侧边，并反复进行，直到完成所述液晶面板100上所有的第一软板上芯片11及第二软板上芯片12的压接作业。因此，本发明可以节省COF卷带的采购成本及相关机台的费用，只需使用一种软板上芯片卷带及一组设备即可同时进行两种软板上芯片的压接作业，因此可有效降低成本及提高产能。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。
 本发明的实施方式
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Claims (14)

  1. 一种软板上芯片卷带，其包含：
    一基带；
    多个第一软板上芯片；及
    多个第二软板上芯片；
    其中，所述多个第一软板上芯片与所述多个第二软板上芯片排列设置于所述基带上。
  2. 如权利要求1所述的软板上芯片卷带，其中在所述软板上芯片卷带的一个循环段落中，所述第一软板上芯片与所述第二软板上芯片的数量对应于一液晶面板上所需要的所述第一软板上芯片与所述第二软板上芯片的数量。
  3. 如权利要求2所述的软板上芯片卷带，其中在所述循环段中，所述第一软板上芯片的数量为n+m个，所述第二软板上芯片的数量为n个。
  4. 如权利要求3所述的软板上芯片卷带，其中在所述循环段落中，n个所述第一软板上芯片与n个所述第二软板上芯片先穿插排列，接着再排列m个所述第一软板上芯片。
  5. 一种软板上芯片的压接方法，其包含步骤：
    提供一软板上芯片卷带，其包含一基带、多个第一软板上芯片及多个第二软板上芯片，其中所述多个第一软板上芯片与所述多个第二软板上芯片排列设置于所述基带上，并展开部分的所述软板上芯片卷带；
    提供一冲切机构及一移动平台，所述冲切机构包含一第一冲切头及一第二冲切头置于展开的所述软板上芯片卷带的上方，所述移动平台对应设于所述软板上芯片卷带的下方，所述第一冲切头对应冲切一个所述第一软板上芯片至所述移动平台及/或所述第二冲切头对应冲切一个所述第二软板上芯片至所述移动平台；
    移出所述移动平台至一定位；
    提供一液晶面板，具有互呈垂直的一第一侧边及一第二侧边；及
    提供一第一压接头及一第二压接头，所述第一压接头对应提取位于所述移动平台上的所述第一软板上芯片，并对应压接至所述液晶面板的第一侧边，及/或所述第二压接头对应提取位于所述移动平台上的所述第二软板上芯片，并对应压接至所述液晶面板的第二侧边。
  6. 如权利要求5所述的压接方法，其中重复所述冲切-压接步骤，以完成所有所述液晶面板的上的所述第一软板上芯片及所述第二软板上芯片的压接作业。
  7. 如权利要求6所述的压接方法，其中在所述软板上芯片卷带的一个循环段落中，所述第一软板上芯片与所述第二软板上芯片的数量对应于一液晶面板上所需要的所述第一软板上芯片与所述第二软板上芯片的数量。
  8. 如权利要求7所述的压接方法，其中在所述循环段落中，所述第一软板上芯片的数量为n+m个，所述第二软板上芯片的数量为n个，其中n个所述第一软板上芯片与n个所述第二软板上芯片先穿插排列，接着再排列m个所述第一软板上芯片。
  9. 如权利要求8所述的压接方法，其中所述第一冲切头及所述第二冲切头依据所述软板上芯片卷带上的所述第一软板上芯片与所述第二软板上芯片的排列情形，进行独立或同时运作，以冲切所述第一软板上芯片及/或所述第二软板上芯片至所述移动平台。
  10. 如权利要求9所述的压接方法，其中所述第一压接头及所述第二压接头依据所述移动平台上的所述第一软板上芯片与所述第二软板上芯片的放置情形，进行独立或同时运作，以压接所述第一软板上芯片及/或所述第二软板上芯片至所述液晶面板。
  11. 一种软板上芯片的压接方法，其包含步骤：
    提供一软板上芯片卷带，其包含一基带、多个第一软板上芯片及多个第二软板上芯片，其中所述多个第一软板上芯片与所述多个第二软板上芯片排列设置于所述基带上；在所述软板上芯片卷带的一个循环段落中，所述第一软板上芯片的数量为n+m个，所述第二软板上芯片的数量为n个，n个所述第一软板上芯片与n个所述第二软板上芯片先穿插排列，接着再排列m个所述第一软板上芯片；并展开所述软板上芯片卷带上n个所述第一软板上芯片与n个所述第二软板上芯片穿插排列的部分；
    提供一冲切机构及一移动平台，所述冲切机构包含一第一冲切头及一第二冲切头置于展开的所述软板上芯片卷带的上方，所述移动平台对应设于所述软板上芯片卷带的下方，所述第一冲切头对应冲切一个所述第一软板上芯片至所述移动平台及所述第二冲切头对应冲切一个所述第二软板上芯片至所述移动平台；
    移出所述移动平台至一定位；
    提供一液晶面板，具有互呈垂直的一第一侧边及一第二侧边；及
    提供一第一压接头及一第二压接头，所述第一压接头对应提取位于所述移动平台上的所述第一软板上芯片，并对应压接至所述液晶面板的第一侧边，及所述第二压接头对应提取位于所述移动平台上的所述第二软板上芯片，并对应压接至所述液晶面板的第二侧边。
  12. 如权利要求11所述的压接方法，其中重复权利要求11的步骤，以完成将所述软板上芯片卷带上n个所述第一软板上芯片与n个所述第二软板上芯片穿插排列的部分压接至所述液晶面板的作业。
  13. 如权利要求12所述的压接方法，其中在权利要求12之后还包含以下步骤:
    展开所述软板上芯片卷带上m个所述第一软板上芯片排列的部分；
    所述第一冲切头对应冲切一个所述第一软板上芯片至所述移动平台；
    移出所述移动平台至一定位；
    所述第一压接头对应提取位于所述移动平台上的所述第一软板上芯片，并对应压接至所述液晶面板的第一侧边。
  14. 如权利要求13所述的压接方法，其中重复权利要求13的步骤，以完成将所述软板上芯片卷带上m个所述第一软板上芯片排列的部分压接至所述液晶面板的作业。
PCT/CN2013/087891 2013-11-21 2013-11-27 软板上芯片卷带及对应的软板上芯片的压接方法 WO2015074283A1 (zh)

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