WO2015072424A1 - ハンダ内のボイドの評価装置及びハンダ内のボイドの評価方法 - Google Patents

ハンダ内のボイドの評価装置及びハンダ内のボイドの評価方法 Download PDF

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Publication number
WO2015072424A1
WO2015072424A1 PCT/JP2014/079717 JP2014079717W WO2015072424A1 WO 2015072424 A1 WO2015072424 A1 WO 2015072424A1 JP 2014079717 W JP2014079717 W JP 2014079717W WO 2015072424 A1 WO2015072424 A1 WO 2015072424A1
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WO
WIPO (PCT)
Prior art keywords
solder
void
image
voids
evaluation
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Ceased
Application number
PCT/JP2014/079717
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English (en)
French (fr)
Japanese (ja)
Inventor
鈴木 貴
末喜 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BEAMSENSE Co Ltd
University of Osaka NUC
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BEAMSENSE Co Ltd
Osaka University NUC
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Filing date
Publication date
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Priority to US15/034,302 priority Critical patent/US9965849B2/en
Publication of WO2015072424A1 publication Critical patent/WO2015072424A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • G06T7/0008Industrial image inspection checking presence/absence
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N23/00Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
    • G01N23/02Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material
    • G01N23/04Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by transmitting the radiation through the material and forming images of the material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00Investigating materials by wave or particle radiation
    • G01N2223/40Imaging
    • G01N2223/401Imaging image processing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00Investigating materials by wave or particle radiation
    • G01N2223/60Specific applications or type of materials
    • G01N2223/611Specific applications or type of materials patterned objects; electronic devices
    • G01N2223/6113Specific applications or type of materials patterned objects; electronic devices printed circuit board [PCB]
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00Investigating materials by wave or particle radiation
    • G01N2223/60Specific applications or type of materials
    • G01N2223/648Specific applications or type of materials voids
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/10Image acquisition modality
    • G06T2207/10116X-ray image
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30152Solder
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30164Workpiece; Machine component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/162Testing a finished product, e.g. heat cycle testing of solder joints
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16Inspection; Monitoring; Aligning
    • H05K2203/163Monitoring a manufacturing process
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to an evaluation device for voids in solder and a method for evaluating voids in solder.
  • one problem is that only the number of voids and the void area ratio with respect to the solder balls are used as indices representing the reliability of the solder balls.
  • BGA connection failure will be caused, and even if the void area ratio increases, BGA connection failure will also be caused, which can be an evaluation index.
  • Another problem is the evaluation speed.
  • the conventional method is very time consuming to calculate. Since the number of solder balls per package may exceed 1000, it can be said that it is not preferable to require a long time for inspection.
  • an object of the present invention is to provide an evaluation apparatus and a method for evaluating a void in a solder that can evaluate a void in the solder at high speed and more accurately.
  • the pixel value p i included in the voids is 1 and the pixel value p i which is not included in the void is set to 0 and solder
  • An evaluation function calculation unit for calculating an evaluation function i: Pixel number (1 to N) p i : Pixel value (0 or 1) w (r i ): weight function For each solder, a void evaluation unit that evaluates that the influence of the void is larger as the evaluation function is relatively larger; Is provided.
  • the void in each solder can be evaluated accurately at high speed.
  • FIG. 3 is a block diagram illustrating a functional configuration of the void evaluation apparatus in the solder according to the first embodiment.
  • FIG. 3 is a block diagram illustrating a physical configuration of the void evaluation apparatus in the solder according to the first embodiment.
  • 3 is a flowchart of a void evaluation method in solder according to the first embodiment. It is an example of a two-dimensional X-ray image.
  • FIG. 5 is an image obtained by removing the influence of the coherent member of the substrate based on the two-dimensional X-ray image of FIG. 4.
  • 6 is an image obtained by performing circle detection corresponding to a solder ball based on the image of FIG. 5. It is the image of the solder ball detected based on the image of FIG. It is an image in one solder.
  • FIG. 9 is an image obtained by enhancing the overall image contrast using the matching histogram equalization method for the image of FIG. 8. It is a graph which shows the histogram of the intensity
  • strength about the image of FIG. 10, and a target histogram. 11 is an image obtained by enhancing the local contrast using an applicable histogram equalization method for the image of FIG. It is an image which represents intensity
  • FIG. 15 is an image reflecting the voids separated in FIG. 16. It is an example of the image which shows the void in each solder ball about a plurality of solder balls contained in a two-dimensional X-ray image. It is an example of the image obtained by setting so that only the void with a comparatively big influence may be shown.
  • Evaluation device of voids in the solder for each pixel constituting an image in the solder, the pixel value p i included in the voids is 1 and the pixel value p i which is not included in the voids and 0
  • An evaluation function calculation unit for calculating an evaluation function of the void i: Pixel number (1 to N) p i : Pixel value (0 or 1)
  • a void evaluation unit that evaluates that the influence of the void is larger as the evaluation function is relatively larger; Is provided.
  • the solder void evaluation apparatus may further include an image extraction unit that extracts an image in each solder from the two-dimensional X-ray image in the first aspect.
  • the void evaluation apparatus in the solder according to the third aspect may further include a void detection unit that detects a void in the image in the solder.
  • the weight function w (r i ) may be (r 0 ⁇ r i ). .
  • the pixel value included in the void is set to 1
  • the pixel value not included in the void is set to 0, and the center of the solder is set.
  • the void evaluation method in the solder according to the sixth aspect is the step of extracting the image in each solder from the two-dimensional X-ray image in the fifth aspect, Detecting a void portion from an image in each solder; May further be included.
  • the weighting function w (r i ) may be (r 0 ⁇ r i ).
  • a computer program for evaluating voids in solder according to an eighth aspect causes a computer to execute the steps of the method for evaluating voids in solder according to any one of the fifth to seventh aspects, thereby causing voids in solder. Perform an evaluation.
  • a computer-readable recording medium stores the solder void evaluation computer program according to the eighth aspect.
  • FIG. 1 is a block diagram showing a functional configuration of the void evaluation apparatus in the solder according to the first embodiment.
  • FIG. 2 is a block diagram illustrating a physical configuration of the void evaluation apparatus in the solder according to the first embodiment.
  • the void evaluation apparatus 10 in the solder includes an evaluation function calculation unit 13 and a void evaluation unit 14 as functional configurations.
  • the image extraction unit 11 extracts an image in each solder from the two-dimensional X-ray image.
  • the void detection unit 12 detects a void in the image in each solder.
  • Evaluation function calculation unit 13 for each pixel constituting an image in the solder, with its pixel value and the weighting function w (r i), and calculates the evaluation function within each solder.
  • the void evaluation unit 14 evaluates that the influence of the void is larger as the evaluation function is relatively larger for each solder.
  • the void evaluation device 10 in the solder includes a CPU 21, a memory 22, a storage device 23, an input / output unit 24, a display device 25, and an interface 26 as physical configurations. That is, the void evaluation apparatus 10 in the solder can be realized by a personal computer that operates software that realizes the functional configuration.
  • the void in the solder can be automatically evaluated appropriately at high speed.
  • the influence of voids in an actual solder ball appears as, for example, a connection failure because the bonding strength of the solder portion is reduced. It is considered that the voids in the solder cause cracks in the solder, resulting in poor connection and, consequently, malfunction of the entire device.
  • the void evaluation device in the solder according to the first embodiment it is possible to suppress the occurrence of poor connection of the solder part.
  • FIG. 4 is an example of a two-dimensional X-ray image.
  • a general two-dimensional X-ray image has, for example, a 0-255 gradation bitmap format.
  • the solder balls often interfere with other substrate members. For example, some joints produce a closed solder ball. Therefore, it is desirable to use a powerful segment extraction algorithm to handle various types of interfering background members.
  • Removal of coherent member FIG. 5 is an image obtained by removing the influence of the coherent member on the substrate based on the two-dimensional X-ray image of FIG. In this case, an appropriate threshold value of intensity may be automatically set to reduce the interfering background.
  • FIG. 6 is an image obtained by performing circle detection corresponding to the solder ball based on the image of FIG.
  • the extraction of the position where the solder ball is likely may be performed using, for example, a Hough transform which is a circle detection algorithm.
  • a circle radius value may be obtained by performing circle detection using a resized image instead of the original image and reducing the processing amount.
  • the circle detection algorithm is not limited to the Hough transform, and other algorithms may be used.
  • the solder shape is not a circle like a solder ball but a square or the like, another shape matching algorithm may be used.
  • FIG. 7 is an image of a solder ball detected based on the image of FIG.
  • a default radius range applied in the Hough transform may be expanded.
  • an inappropriate ball that is, a portion that is not a solder ball is excluded, and an appropriate ball, that is, a portion that is considered to be a solder ball is finally selected.
  • an image in each solder can be obtained from the two-dimensional X-ray image.
  • the void detection unit 12 detects a void in the image in each solder.
  • FIGS. 1 Original Image Intensity Distribution and Target Histogram
  • FIG. 8 shows an image in one solder.
  • FIG. 9 is a graph showing an intensity histogram and a target histogram for the image of FIG. Even if the voids appear bright in the solder ball in the image in one solder, it was actually difficult to detect these voids due to various factors. For example, factors such as bad image contrast, irregular shapes formed by overlapping voids, the size / position of various voids, and the influence of other members.
  • FIG. 1 Original Image Intensity Distribution and Target Histogram
  • FIG. 10 is an image obtained by enhancing the overall image contrast using the matching histogram equalization method for the image of FIG. .
  • FIG. 11 is a graph showing an intensity histogram and a target histogram for the image of FIG. The quality of the image contrast varies according to various data acquisition settings.
  • the input intensity conversion can enhance the overall image contrast and match the output intensity histogram to a desired target histogram with better contrast.
  • FIG. 12 is an image obtained by enhancing the local contrast using the applicable histogram equalization method for the image of FIG.
  • FIG. 13 is a three-dimensional image of the image of FIG.
  • the local contrast of the local region may be improved by smoothing the image and then applying the contrast limited adaptive histogram equalization (CLAHE). .
  • CLAHE contrast limited adaptive histogram equalization
  • FIG. 14 is an image when the connected voids are erroneously detected as one connected void.
  • FIG. 15 is a schematic diagram showing boundaries separating successive voids discovered by applying a water shedding algorithm to the image of FIG.
  • the boundary of each void may be effectively determined by applying an appropriately sized edge detection algorithm (Laplacian of Gaussian filter). Sometimes a continuous void is mistakenly detected as a single connected void. Therefore, a boundary that separates consecutive voids can be found by applying a water shedding algorithm.
  • the edge detection algorithm is not limited to the water shedding algorithm, and other algorithms may be used.
  • FIG. 16 is a diagram in which only the voids are extracted from the image of FIG. 15 and the connected voids are separated by boundaries.
  • FIG. 17 is an image in which the voids separated in FIG. 16 are reflected on the image of FIG.
  • a two-dimensional X-ray image is binarized by setting an appropriate threshold value, and voids are detected using Betti numbers, which are topological information included in the binary image. Yes.
  • a morphological operation is performed to remove the connected locations and completely separate the connected voids. As described above, a void portion in each solder can be detected.
  • the evaluation function is as follows. i: Pixel number (1 to N) r i : Distance from the solder center of the i-th pixel p i : Pixel value of the i-th pixel (0 or 1) w (ri): weight function
  • i is a pixel number, which is number 1 to number N.
  • p i is each pixel value and takes 0 or 1.
  • the weight function w (r i ) may be determined depending on what function the influence of the void is expressed with respect to the distance r i from the BGA center. The present inventor considered that the influence becomes larger as the void position is closer to the center of the BGA, and that the influence becomes 0 when the maximum radius (r 0 ) of the BGA is exceeded. It is a thing.
  • the weighting function w (r i ) may be (r 0 ⁇ r i ).
  • the evaluation function in this case can be expressed as the following equation (2).
  • a matching weight function may be selected.
  • a quadratic function ((r 0 ⁇ r i ) 2 ) or a higher order function may be selected.
  • the evaluation may be performed for each void.
  • the area S j of each void may be evaluated. This may be calculated assuming that S j pixels are gathered at the center of the void.
  • the evaluation function is represented by the following expression (3). j: Void number (1 to M) r j : pixel at the center of the j th void S j : area of the j th void, here expressed as the number of pixels contained in the void.
  • the pixels included in the void are processed not for individual pixels but for the void area Sj for the center of the j-th void.
  • the equation for all pixels is the same as the above equation (2).
  • the denominator may be treated as a constant.
  • the evaluation function is as follows.
  • the evaluation function is not limited to those shown in the above formulas (1) to (5).
  • the void evaluation unit 14 evaluates that the influence of the void is larger as the evaluation function is relatively larger for each solder.
  • FIG. 18 is an example of an image showing a void in each solder ball for a plurality of solder balls included in the two-dimensional X-ray image.
  • FIG. 19 is an example of an image obtained by performing settings so as to show only voids having a relatively large influence. 18 and 19 are images in a plurality of solder balls included in the two-dimensional X-ray image, respectively. Detected voids are shown in each solder.
  • each solder can be compared with the conventional method by calculating an evaluation function using a weight function that takes into account voids having a large influence. It is possible to accurately evaluate the influence of voids at a high speed.
  • the void evaluation method according to the first embodiment is characterized in that voids in solder are evaluated by an evaluation function weighted by a weight function w (ri) for the distance ri from the BGA center of the void.
  • FIG. 3 is a flowchart of the void evaluation method in the solder according to the first embodiment.
  • the void evaluation method in the solder includes the following steps. (A) An image in each solder is extracted from the two-dimensional X-ray image (S01). (B) A void is detected for the image in each solder (S01).
  • the value of the evaluation function is to evaluate the large influence of the more relatively large void (S03).
  • the voids in each solder can be automatically evaluated appropriately at high speed.
  • effect According to the void evaluation method in the solder according to the present invention, the void in the solder can be automatically evaluated appropriately at high speed.
  • a computer program for evaluating voids in solder for causing the computer to execute each step of the method for evaluating voids in solder and evaluating voids in solder can be provided.
  • the in-solder void evaluation computer program may be stored in a computer-readable recording medium.
  • the computer-readable recording medium is, for example, a magnetic recording medium such as a flexible disk or a magnetic tape, an optical recording medium such as a compact disk (CD), a digital versatile disk (DVD), or a Blu-ray (registered trademark) disk (BD). Any of semiconductor storage media such as a magneto-optical recording medium, a USB memory, and a flash memory may be used.
  • the void in the solder can be automatically evaluated appropriately at high speed. Therefore, it is useful for applications such as a soldered circuit board evaluation device or a semiconductor device manufacturing device including these.

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PCT/JP2014/079717 2013-11-15 2014-11-10 ハンダ内のボイドの評価装置及びハンダ内のボイドの評価方法 Ceased WO2015072424A1 (ja)

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US15/034,302 US9965849B2 (en) 2013-11-15 2014-11-10 Void evaluation apparatus and void evaluation method in the solder

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JP2020159758A (ja) * 2019-03-25 2020-10-01 豊田合成株式会社 発光装置の製造方法および半田接合部検査装置
JP7728536B2 (ja) * 2020-01-15 2025-08-25 株式会社クオルテック 電子部品を接続する接合部のボイド・クラックの検出方法

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JP2007121082A (ja) * 2005-10-27 2007-05-17 Nagoya Electric Works Co Ltd X線画像出力装置、x線画像出力方法およびx線画像出力プログラム

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023057471A (ja) * 2021-10-11 2023-04-21 Jfeスチール株式会社 耐火物の欠陥評価方法
JP7708639B2 (ja) 2021-10-11 2025-07-15 Jfeスチール株式会社 耐火物の欠陥評価方法

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