WO2015059974A1

WO2015059974A1 - Electronic apparatus

Info

Publication number: WO2015059974A1
Application number: PCT/JP2014/070504
Authority: WO
Inventors: 藤田　浩章; 克行米沢; 健松井; 勝美高岡; 啓太泉
Original assignee: ソニー株式会社
Priority date: 2013-10-24
Filing date: 2014-08-04
Publication date: 2015-04-30

Abstract

　The purpose of the invention is to accurately operate a circuit using a simple configuration. This electronic apparatus is provided with a first reference voltage generation circuit, a second reference voltage generation circuit the power consumption of which is lower than that of the first reference voltage generation circuit, two logic circuits, and a reference voltage switching unit. The two logic circuits input and output to each other a logic value referenced to a reference voltage . The reference voltage switching unit supplies, in a normal mode in which both of the two logic circuits are operating, the reference voltage from the first reference voltage generation circuit to the two logic circuits; and supplies, in a power-saving mode in which one of the two logic circuits is operating, the reference voltage from the second reference voltage generation circuit to the one operating logic circuit.

Description

Electronic equipment

This technology relates to an electronic device. Specifically, the present invention relates to an electronic device that generates a reference voltage.

Conventionally, in electronic devices, reference voltage generation circuits that generate a constant reference voltage regardless of the power supply voltage have been widely used. For example, a power supply device that supplies power to a plurality of loads and includes a reference voltage generation circuit for each of the loads has been proposed (see, for example, Patent Document 1). Priorities are determined for each of the plurality of loads, and the power supply device stops the power supply devices in order from the reference voltage generation circuit corresponding to the load with the lower priority when reducing the power consumption.

Japanese Patent Laid-Open No. 2004-23990

However, with the above-described prior art, it is difficult to accurately operate the circuit in each load. When the power consumption of each of the plurality of reference voltage generation circuits is different, the reference voltage generation circuit with the lower power consumption tends to vary in the generated reference voltage compared to the reference voltage generation circuit with the higher power consumption. is there. For this reason, there is a possibility that the reference voltages of the plurality of reference voltage generation circuits may not be the same. Therefore, when operating a plurality of loads and exchanging signals based on the reference voltage between the loads, it is necessary to provide a level shifter for converting the voltage of the signal between the loads. For a load including a logic circuit, static timing analysis (STA) that verifies the timing of the logic circuit needs to be performed in the design. As a result, it is difficult to accurately operate the circuit with a simple configuration.

This technology was created in view of such a situation, and aims to operate a circuit accurately with a simple configuration.

The present technology has been made to solve the above-described problems. The first aspect of the present technology includes a first reference voltage generation circuit and a second power consumption lower than that of the first reference voltage generation circuit. Reference voltage generation circuit, two logic circuits that input and output a logic value based on the reference voltage, and a reference from the first reference voltage generation circuit in a normal mode in which both of the two logic circuits operate. A reference voltage switching unit that supplies a voltage to the two logic circuits and supplies a reference voltage from the second reference voltage generation circuit to the one in a power saving mode in which one of the two logic circuits operates. Electronic device. Accordingly, the reference voltage from the first reference voltage generation circuit is supplied to the two logic circuits in the normal mode, and the reference voltage from the second reference voltage generation circuit is supplied to one side in the power saving mode. Bring.

In the first aspect, one of the two logic circuits includes an input / output unit that inputs / outputs a logical value between the two logic circuits and the other, and the other and the input / output unit. And a control unit that sets a logical value input / output between them to a predetermined value in the power saving mode. This brings about the effect that the value of the input / output logical value becomes a predetermined value in the power saving mode.

Also, in this first aspect, the power consumption of each of the two logic circuits is different, and the lower power consumption of the two logic circuits may operate in the power saving mode. Thereby, in the power saving mode, there is an effect that the lower one of the two logic circuits operates.

In this first aspect, in the power saving mode, one of the two logic circuits may stop the other of the two logic circuits and the first reference voltage generation circuit. This brings about the effect that the other of the two logic circuits and the first reference voltage generation circuit are stopped in the power saving mode.

In addition, in the first aspect, a control circuit for stopping one of the two logic circuits and the first reference voltage generation circuit in the power saving mode may be further included. As a result, one of the two logic circuits and the first reference voltage generation circuit are stopped in the power saving mode.

According to the present technology, an excellent effect that the circuit can be accurately operated with a simple configuration can be obtained. Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

It is a block diagram which shows the example of 1 structure of the communication apparatus in 1st Embodiment. It is a block diagram which shows one structural example of the communication circuit in 1st Embodiment. FIG. 3 is a circuit diagram illustrating a configuration example of a high power consumption reference voltage generation circuit according to the first embodiment. FIG. 3 is a circuit diagram illustrating a configuration example of a low power consumption reference voltage generation circuit according to the first embodiment. 1 is a block diagram illustrating a configuration example of a low power consumption logic circuit according to a first embodiment. It is a figure which shows an example of the communication circuit at the time of the power saving mode in 1st Embodiment. It is a block diagram which shows the example of 1 structure of the communication circuit in a modification. It is a circuit diagram which shows one structural example of the low power consumption logic circuit in a modification.

Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The description will be made in the following order.
1. 1st Embodiment (example which switches the supply source of a reference voltage)
2. Modified example

<1. First Embodiment>
[Configuration example of communication device]
FIG. 1 is a block diagram illustrating a configuration example of the communication apparatus 100 according to the first embodiment. The communication device 100 is a device that performs communication with a communication partner device, and is mounted on a mobile communication device such as a mobile phone device, for example. The communication device 100 includes a power supply circuit 110, a control circuit 120, and a communication circuit 200.

The power supply circuit 110 supplies the power supply voltage VDD to the communication circuit 200 via the signal line 119. The communication circuit 200 detects a communication partner device and performs communication with the device.

The control circuit 120 generates a control signal and supplies it to the communication circuit 200 via the signal line 129. This control signal is a signal for instructing either a normal mode in which the communication circuit 200 is operated with predetermined power consumption or a power saving mode in which the communication circuit 200 is operated with lower power consumption than in the normal mode. For example, the control circuit 120 generates a control signal instructing the normal mode in the initial state. The control circuit 120 receives a device detection result from the communication circuit 200 and receives an operation signal generated by a user operation. The control circuit 120 outputs a control signal for instructing the power saving mode when the communication circuit 200 does not detect the device for a certain period of time or when the power saving mode is set by a user operation. Generate.

Note that the communication device 100 is an example of an electronic device described in the claims.

[Configuration example of communication circuit]
FIG. 2 is a block diagram illustrating a configuration example of the communication circuit 200 according to the first embodiment. The communication circuit 200 includes a high power consumption reference voltage generation circuit 210, a low power consumption reference voltage generation circuit 220, and a switch 230. The communication circuit 200 includes a high power consumption regulator 240, a low power consumption regulator 250, a voltage detector 260, a high power consumption logic circuit 270, and a low power consumption logic circuit 280.

The high power consumption reference voltage generation circuit 210 generates the reference voltage Vref1. The high power consumption reference voltage generation circuit 210 receives the control signal, and when the normal mode is instructed by the control signal, generates the reference voltage Vref1 from the power supply voltage VDD and supplies the reference voltage Vref1 to the high power consumption regulator 240 and the switch 230. Supply. On the other hand, when the power saving mode is instructed, the high power consumption reference voltage generation circuit 210 stops its operation. Thereby, power consumption is reduced in the power saving mode.

The low power consumption reference voltage generation circuit 220 generates the reference voltage Vref2. It is assumed that the power consumption of the low power consumption reference voltage generation circuit 220 is lower than that of the high power consumption reference voltage generation circuit 210. For this reason, the accuracy of the reference voltage Vref2 is lower than that of the reference voltage Vref1. The reason why the reference voltages of the reference voltage generation circuits (210 and 220) are different in accuracy will be described later. The low power consumption reference voltage generation circuit 220 generates a reference voltage Vref2 from the power supply voltage VDD and supplies the reference voltage Vref2 to the switch 230.

The switch 230 switches the supply source of the reference voltage according to the control signal. The switch 230 has two input terminals, one of which is connected to the high power consumption reference voltage generation circuit 210 and the other is connected to the low power consumption reference voltage generation circuit 220. The switch 230 supplies the reference voltage Vref1 from the high power consumption reference voltage generation circuit 210 to the low power consumption regulator 250 when the normal mode is instructed by the control signal. On the other hand, when the power saving mode is instructed, the switch 230 supplies the reference voltage Vref2 from the low power consumption reference voltage generation circuit 220 to the low power consumption regulator 250. The switch 230 is an example of a reference voltage switching unit described in the claims.

The high power consumption regulator 240 adjusts the reference voltage Vref1. When the normal mode is instructed by the control signal, the high power consumption regulator 240 adjusts the reference voltage Vref1 and supplies the adjusted voltage VDD1 to the voltage detector 260 and the high power consumption logic circuit 270. Further, when the power saving mode is instructed, the high power consumption regulator 240 stops its operation. Thereby, power consumption is reduced in the power saving mode.

The low power consumption regulator 250 adjusts the reference voltage Vref1 or Vref2 from the switch 230. The high power consumption regulator 240 supplies VDD1 adjusted Vref1 or VDD1 ′ adjusted Vref2 to the low power consumption logic circuit 280. The high power consumption regulator 240 and the low power consumption regulator 250 are provided as necessary. If adjustment of the reference voltage is unnecessary, these regulators need not be provided.

The voltage detector 260 detects whether or not the reference voltage Vref1 is equal to or higher than a predetermined threshold voltage. The voltage detector 260 supplies the detection result to the low power consumption logic circuit 280. For example, a high level detection result is generated when the reference voltage Vref1 is equal to or higher than a predetermined threshold voltage, and a low level detection result is generated otherwise.

The high power consumption logic circuit 270 is a logic circuit that consumes more power than the low power consumption logic circuit 280. When the normal mode is designated by the control signal, the high power consumption logic circuit 270 performs a logic operation on a logic value based on the voltage VDD1. In the high power consumption logic circuit 270, for example, after a communication partner device is detected, processing on data transmitted to and received from the device is performed by a logical operation. The high power consumption logic circuit 270 inputs / outputs the operation result to / from the low power consumption logic circuit 280. Further, the high power consumption logic circuit 270 stops its operation when the power saving mode is designated.

The low power consumption logic circuit 280 is a logic circuit with lower power consumption than the high power consumption logic circuit 270. The low power consumption logic circuit 280 performs a logic operation on a logic value based on the voltage VDD1 ′. In the low power consumption logic circuit 280, for example, a process of performing polling for detecting a communication partner device at regular intervals is performed by a logical operation. Then, the low power consumption logic circuit 280 inputs / outputs the operation result to / from the high power consumption logic circuit 270. The low power consumption logic circuit 280 supplies the device detection result to the control circuit 120.

As illustrated in FIG. 2, the switch 230 supplies a highly accurate reference voltage from the high power consumption reference voltage generation circuit 210 to the high power consumption logic circuit 270 and the low power consumption logic circuit 280 in the normal mode. Can be operated accurately. Further, since the same reference voltage is supplied to each of the logic circuits, it is not necessary to provide a level shifter between the high power consumption logic circuit 270 and the low power consumption logic circuit 280. Further, it is not necessary to perform a static timing analysis on the exchange of signals between these logic circuits. Therefore, the circuit can be accurately operated with a simple configuration.

In addition, although the high power consumption regulator 240 and the voltage detector 260 are configured to stop in the power saving mode, at least one of them may be operated in the power saving mode.

Further, although the power consumption of the high power consumption logic circuit 270 and the low power consumption logic circuit 280 is different, the present invention is not limited to this configuration. For example, the power consumption of these logic circuits may be the same. Even in this case, power consumption can be reduced by stopping one of the logic circuits.

Further, although the reference voltage supply source is switched in the communication circuit 200, the reference voltage supply source is switched in a circuit other than the communication circuit as long as the circuit includes two logic circuits and one of them is stopped in the power saving mode. May be.

[Configuration example of reference voltage generation circuit]
FIG. 3 is a circuit diagram illustrating a configuration example of the high power consumption reference voltage generation circuit 210 according to the first embodiment. The high power consumption reference voltage generation circuit 210 includes a switch 211,

resistors

212, 213, and 215, a plurality of diodes 214, and a diode 216.

The switch 211 stops the high power consumption reference voltage generation circuit 210 according to the control signal. This switch 211 has two terminals, and opens and closes a line between these terminals according to a control signal. One of the two terminals of the switch 211 is connected to the power supply circuit 110, and the other is connected to the power supply terminal of the operational amplifier 217. The switch 211 shifts to the closed state when the control signal indicates the normal mode, and shifts to the open state when the control signal indicates the power saving mode.

The

resistors

212 and 213 and the plurality of diodes 214 are connected in series between the output terminal of the operational amplifier 217 and the ground terminal. The plurality of diodes 214 are connected in parallel between the resistor 213 and the ground terminal. The resistor 215 and the diode 216 are connected in series between the output terminal of the operational amplifier 217 and the ground terminal.

Here, the

diodes

214 and 216 are forward-connected. In other words, the anodes of the

diodes

214 and 216 are connected to the operational amplifier 217 side, and the cathode is connected to the ground terminal.

The circuit composed of the resistor 212, the resistor 213, and the diode 214 and the circuit composed of the resistor 215 and the diode 216 are connected in parallel between the output terminal of the operational amplifier 217 and the ground terminal.

The connection point between the resistor 212 and the resistor 213 is connected to the inverting input terminal (−) of the operational amplifier 217, and the connection point between the resistor 215 and the diode 216 is connected to the non-inverting input terminal (+) of the operational amplifier 217. .

The operational amplifier 217 amplifies the potential difference between the inverting input terminal (−) and the non-inverting input terminal (+). The output terminal of the operational amplifier 217 is connected to the resistor 212, the resistor 215, and the switch 230. With this configuration, the output current of the operational amplifier 217 is fed back to the

resistors

212 and 215.

When a predetermined power supply voltage VDD is applied, a forward current flows through the

diodes

214 and 216. As the current increases, the voltage V + of the inverting input terminal (−) and the voltage V− of the non-inverting input terminal (+) increase. However, the amount of change in voltage V + is relatively small with respect to the increase in current. On the other hand, the amount of change in the voltage V− is relatively large because of the resistance 213.

Since the operational amplifier 217 feeds back the output current, the voltage V + of the inverting input terminal (−) and the voltage V− of the non-inverting input terminal (+) become the same by the feedback output current. When the voltage V + of the inverting input terminal (−) and the voltage V− of the non-inverting input terminal (+) become the same, the voltage of the output terminal of the operational amplifier 217 becomes a reference voltage Vref1 expressed by the following equation 1.
Vref1 = Vf + K × VT Equation 1

In the above formula, K is a constant represented by the following formula 2. VT is a thermal voltage represented by the following expression 3, and its unit is, for example, volts (V).
K = R2 / R3 × ln (R2 / R1) Equation 2
VT = k × T / q Equation 3

Here, in Expression 2, R1 is the resistance value of the resistor 215, R2 is the resistance value of the resistor 212, and R3 is the resistance value of the resistor 213. The unit of R1, R2 and R3 is, for example, ohm (Ω).

In Equation 3, k is Boltzmann's constant, which is about 1.38 × 10 ⁻²³ joules per Kelvin (J / K). T is an absolute temperature and the unit is, for example, Kelvin (K). q is the elementary electric charge and is about 1.60 × 10 ⁻¹⁹ coulombs (C).

Equations 1 to 3 indicate that the reference voltage Vref1 is a constant voltage determined by the characteristics of the diode 214 and the like and the resistance value. This reference voltage Vref is a value depending on the band gap voltage of the semiconductor. A circuit that generates a constant reference voltage depending on the bandgap voltage in this way is called a bandgap reference circuit.

Although the switch 211 is provided inside the high power consumption reference voltage generation circuit 210, the switch 211 may be provided outside the high power consumption reference voltage generation circuit 210.

The high power consumption reference voltage generation circuit 210 is not limited to the configuration illustrated in FIG. 3 as long as it can generate a constant reference voltage. For example, a transistor may be provided instead of the

diodes

214 and 216.

FIG. 4 is a circuit diagram showing a configuration example of the low power consumption reference voltage generation circuit 220 according to the first embodiment. The low power consumption reference voltage generation circuit 220 includes

resistors

222, 223 and 225, a plurality of diodes 224, a diode 226, and an operational amplifier 227. A circuit including these

resistors

222, 223 and 225, a plurality of diodes 224, a diode 226, and an operational amplifier 227 has the same configuration as that of the high power consumption reference voltage generation circuit 210 excluding the switch 211. However, since the impedance of the entire low power consumption reference voltage generation circuit 220 is smaller than that of the high power consumption reference voltage generation circuit 210, the power consumption is relatively small.

Here, in the operational amplifier 227, even if the potential difference between the non-inverting input terminal and the inverting input terminal is zero, a slight voltage (hereinafter referred to as “offset voltage”) is generated at the output terminal. This offset voltage indicates an error in the output voltage. A current generated by the offset voltage is called an offset current. These offset voltages and the like are caused by causes such as the characteristics of the two transistors in the differential amplifier circuit in the operational amplifier 227 not completely matching (mismatch).

The offset current is considered for each of the case where the transistor operates in the strong inversion region and the case where the transistor operates in the weak inversion region. The offset current in the strong inversion region is expressed by the following equation.

In the above equation, V _GS is the gate voltage of the transistor, and V _T is the threshold voltage of the transistor. I is the drain current. B is a current amplification factor.

As shown in the above equation, the mismatch tends to decrease as the gate voltage V _GS increases. The mismatch tends to increase as the power consumption decreases and the gate voltage V _GS decreases. On the other hand, with regard to the mismatch in the weak inversion region, as described in "F. Forti and ME Wright" Measurement of MOS current mismatch in the weak inversion region "IEEE journal of solid state circuits, SC-29, 138 (1994)" There is a tendency for the current to increase as the current flowing through it decreases.

As described above, even if the transistor operates in either the strong inversion region or the weak inversion region, the mismatch tends to increase as the current decreases due to the reduction in power consumption. As a result, mismatch increases in the feedback path in the low power consumption reference voltage generation circuit 220, and the variation of the reference voltage increases. In other words, the accuracy of the reference voltage is lowered.

The configuration of the low power consumption reference voltage generation circuit 220 is the same as that of the high power consumption reference voltage generation circuit 210 except for the switch 211. However, these configurations may be different.

[Configuration example of low power consumption logic circuit]
FIG. 5 is a block diagram illustrating a configuration example of the low power consumption logic circuit 280 according to the first embodiment. The low power consumption logic circuit 280 includes AND

gates

281 and 282 and a polling processing unit 283.

The AND gate 281 makes the voltage of the signal output from the polling processing unit 283 to the high power consumption logic circuit 270 low level in the power saving mode. The AND gate 281 outputs a logical product of the detection result from the voltage detector 260 and the logical value from the polling processing unit 283 to the high power consumption logic circuit 270. Thereby, the leakage current flowing to the high power consumption logic circuit 270 is suppressed. In the normal mode, the AND gate 281 outputs a signal from the polling processing unit 283 to the high power consumption logic circuit 270. This signal includes, for example, a detection result of the device.

The AND gate 282 makes the voltage of the signal input from the polling processing unit 283 to the high power consumption logic circuit 270 low level in the power saving mode. The AND gate 282 outputs a logical product of the detection result from the voltage detector 260 and the logical value from the high power consumption logic circuit 270 to the polling processing unit 283. Thereby, it is suppressed that a signal with an indefinite level is input to the polling processing unit 283. In the normal mode, the AND gate 282 inputs a signal from the high power consumption logic circuit 270 to the polling processing unit 283. This signal includes setting information related to polling processing such as a polling interval.

The circuit including the AND

gates

281 and 282 is an example of a control unit described in the claims.

The polling processing unit 283 performs polling at regular intervals. The polling processing unit 283 operates when a reference voltage is supplied from the low power consumption regulator 250 and supplies a device detection result to the control circuit 120 every time polling is performed. The polling processing unit 283 is an example of an input / output unit described in the claims.

FIG. 6 is a diagram illustrating an example of the communication circuit 200 in the power saving mode according to the first embodiment. In the power saving mode, the switch 230 switches the supply source of the reference voltage to the low power consumption reference voltage generation circuit 220 according to the control signal. In addition, the high power consumption reference voltage generation circuit 210, the high power consumption regulator 240, the voltage detector 260, and the high power consumption logic circuit 270 stop operating in accordance with the control signal. Thereby, the power consumption of the communication circuit 200 is reduced. As described above, the accuracy of the reference voltage Vref2 from the low power consumption reference voltage generation circuit 220 is relatively low. However, since the high power consumption logic circuit 270 is stopped in the power saving mode and no signal is exchanged between the high power consumption logic circuit 270 and the low power consumption logic circuit 280, no problem occurs.

As described above, according to the first embodiment of the present technology, the communication circuit 200 supplies the reference voltage Vref1 to the two logic circuits in the normal mode. Therefore, the logic circuits use the same reference voltage as a reference. Can be generated. Thus, the circuit can be accurately operated with a simple configuration.

<2. Modification>
In the first embodiment, the control circuit 120 generates the control signal, but the low power consumption logic circuit 280 can also generate the control signal. The communication circuit 200 according to the modified example is different from the first embodiment in that the low power consumption logic circuit 280 generates a control signal.

FIG. 7 is a block diagram illustrating a configuration example of the communication circuit 200 according to the modification. The communication circuit 200 according to the modified example is different from the first embodiment in that an OR (logical sum) gate 290 is further provided. Further, the low power consumption logic circuit 280 of the modification is different from that of the first embodiment in that the control signal C2 is output instead of the detection result. In addition, the control circuit 120 according to the modification does not receive the device detection result, and generates the control signal C1 according to the user's operation.

The OR gate 290 outputs a control signal from the control circuit 120 or the low power consumption logic circuit 280. The OR gate 290 uses the logical sum of the control signal C1 and the control signal C2 as a control signal C3 to the switch 230, the high power consumption reference voltage generation circuit 210, the high power consumption regulator 240, the voltage detector 260, and the high power consumption logic circuit 270. Supply.

Note that both the control circuit 120 and the low power consumption logic circuit 280 generate the control signal, but only the low power consumption logic circuit 280 may generate the control signal. In this case, it is not necessary to provide the OR gate 290.

FIG. 8 is a circuit diagram showing a configuration example of the low power consumption logic circuit 280 in the modification. The low power consumption logic circuit 280 of the modification is different from that of the first embodiment in that a mode control unit 284 is further provided. Further, the polling processing unit 283 of the modification supplies the detection result to the mode control unit 284.

The mode control unit 284 generates the control signal C2 from the detection result. The mode control unit 284 operates when a reference voltage is supplied from the low power consumption regulator 250. Then, for example, the mode control unit 284 generates the control signal C2 instructing the power saving mode when the period in which the device is not detected continues for a certain time or longer, and generates the control signal C2 instructing the normal mode otherwise. To do. The mode control unit 284 supplies the generated control signal C2 to the OR gate 290.

Thus, according to the modification, since the low power consumption logic circuit 280 generates the control signal from the detection result, the control circuit 120 does not need to process the detection result, and the burden on the control circuit 120 is reduced.

The above-described embodiment shows an example for embodying the present technology, and the matters in the embodiment and the invention-specific matters in the claims have a corresponding relationship. Similarly, the invention specific matter in the claims and the matter in the embodiment of the present technology having the same name as this have a corresponding relationship. However, the present technology is not limited to the embodiment, and can be embodied by making various modifications to the embodiment without departing from the gist thereof.

Further, the processing procedure described in the above embodiment may be regarded as a method having a series of these procedures, and a program for causing a computer to execute these series of procedures or a recording medium storing the program. You may catch it. As this recording medium, for example, a CD (Compact Disc), an MD (MiniDisc), a DVD (Digital Versatile Disc), a memory card, a Blu-ray disc (Blu-ray (registered trademark) Disc), or the like can be used.

It should be noted that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

In addition, this technique can also take the following structures.
(1) a first reference voltage generation circuit;
A second reference voltage generation circuit that consumes less power than the first reference voltage generation circuit;
Two logic circuits that mutually input and output logic values based on a reference voltage;
In the normal mode in which both of the two logic circuits operate, the reference voltage from the first reference voltage generation circuit is supplied to the two logic circuits, and in the power saving mode in which one of the two logic circuits operates. An electronic apparatus comprising: a reference voltage switching unit that supplies a reference voltage from a second reference voltage generation circuit to the one side.
(2) One of the two logic circuits is
An input / output unit for inputting / outputting a logical value to / from the other of the two logic circuits;
The electronic device according to (1), further comprising a control unit configured to set a logical value input / output between the other side and the input / output unit to a predetermined value in the power saving mode.
(3) The power consumption of each of the two logic circuits is different,
The electronic device according to (1) or (2), wherein the lower one of the two logic circuits operates in the power saving mode.
(4) In the power saving mode, one of the two logic circuits stops the other of the two logic circuits and the first reference voltage generation circuit, according to any one of (1) to (3) Electronic devices.
(5) The electronic device according to any one of (1) to (4), further including a control circuit that stops one of the two logic circuits and the first reference voltage generation circuit in the power saving mode. .

DESCRIPTION OF SYMBOLS 100 Communication apparatus 110 Power supply circuit 120 Control circuit 200 Communication circuit 210 High power consumption reference

voltage generation circuit

211, 230

Switch

212, 213, 215, 222, 223, 225

Resistance

214, 216, 224, 226

Diode

217, 227 Operational amplifier 220 Low Power consumption reference voltage generation circuit 240 High power consumption regulator 250 Low power consumption regulator 260 Voltage detector 270 High power consumption logic circuit 280 Low power consumption logic circuit 281 282 AND (logical product) gate 283 Polling processing unit 284 Mode control unit 290 OR (logical sum) gate

Claims

A first reference voltage generation circuit;
A second reference voltage generation circuit that consumes less power than the first reference voltage generation circuit;
Two logic circuits that mutually input and output logic values based on a reference voltage;
In the normal mode in which both of the two logic circuits operate, the reference voltage from the first reference voltage generation circuit is supplied to the two logic circuits, and in the power saving mode in which one of the two logic circuits operates. An electronic apparatus comprising: a reference voltage switching unit that supplies a reference voltage from a second reference voltage generation circuit to the one side.
One of the two logic circuits is
An input / output unit for inputting / outputting a logical value to / from the other of the two logic circuits;
The electronic device according to claim 1, further comprising: a control unit configured to set a logical value input / output between the other side and the input / output unit to a predetermined value in the power saving mode.
The power consumption of each of the two logic circuits is different,
The electronic device according to claim 1, wherein one of the two logic circuits having the lower power consumption operates in the power saving mode.
2. The electronic device according to claim 1, wherein one of the two logic circuits stops the other of the two logic circuits and the first reference voltage generation circuit in the power saving mode.
The electronic device according to claim 1, further comprising a control circuit that stops one of the two logic circuits and the first reference voltage generation circuit in the power saving mode.