WO2014192989A1 - Dispositif capteur d'image cmos à haute sensibilité - Google Patents

Dispositif capteur d'image cmos à haute sensibilité Download PDF

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Publication number
WO2014192989A1
WO2014192989A1 PCT/KR2013/004606 KR2013004606W WO2014192989A1 WO 2014192989 A1 WO2014192989 A1 WO 2014192989A1 KR 2013004606 W KR2013004606 W KR 2013004606W WO 2014192989 A1 WO2014192989 A1 WO 2014192989A1
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WIPO (PCT)
Prior art keywords
voltage
charge
transistor
image sensor
feedback capacitor
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PCT/KR2013/004606
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English (en)
Korean (ko)
Inventor
배준형
이정태
김경우
Original Assignee
주식회사 나노포커스레이
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Priority to PCT/KR2013/004606 priority Critical patent/WO2014192989A1/fr
Publication of WO2014192989A1 publication Critical patent/WO2014192989A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/741—Circuitry for compensating brightness variation in the scene by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range
    • H04N25/59—Control of the dynamic range by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/771—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising storage means other than floating diffusion

Definitions

  • the present invention relates to a CMOS image sensor comprising pixels with high sensitivity, wide dynamic range and capable of adjusting the reset voltage of a photodiode.
  • An image sensor refers to a device that generates an image electrically by using characteristics of a semiconductor that reacts to light.
  • an image sensor is composed of a two-dimensional array of tens of thousands to tens of millions of unit pixels, and each unit pixel generates different electrical signals according to the intensity and wavelength of incident light.
  • Such electrical signals are typically output in analog form, converted to digital signals through an analog-to-digital converter (ADC), and represented as images on a computer monitor or a small liquid crystal device.
  • ADC analog-to-digital converter
  • BACKGROUND Image sensors using semiconductors are the basis of digital cameras, camcorders, mobile phone cameras, and the like, and have recently been applied to X-ray imaging fields such as diagnostic medical and industrial nondestructive testing.
  • Such image sensors are generally manufactured by two technologies, namely, charge coupled device (CCD) and complementary metal-oxide-silicon (CMOS) methods.
  • CCD image sensors have relatively high driving voltages, high power consumption, and system integration is difficult because signal processing circuits cannot be mounted inside the sensor.
  • CMOS image sensors can operate at low voltage, consume less power, and can be manufactured using existing CMOS semiconductor processes, making process steps simpler than CCDs.
  • a chip Systemon-Chip
  • CMOS image sensors have some disadvantages such as low sensitivity and low dynamic range due to a higher noise and dark current than CCD image sensors. Therefore, researches on process technologies and pixel structures to improve them are being actively conducted.
  • the CTIA pixel 110 is composed of a photodiode 111 that is a light sensing means, three NMOS transistors, and a feedback capacitor 115.
  • the reset transistor 112 of the three transistors serves to reset the photodiode to a predetermined voltage, and the charge amplifying transistor 113 is applied to each column of the two-dimensional pixel array through the column output line 120. It is connected to the current source 130 disposed, and serves as a common source amplifier.
  • the feedback capacitor is connected between the input (IN node) and the output (OUT node) of the common source amplifier, and the charge generated in the photodiode is accumulated in the feedback capacitor.
  • the select transistor 114 is connected between the drain of the charge amplifying transistor (ie, the OUT node) and the column output line to address the pixel.
  • CTIA is formed when the select transistor is turned on by a row select control signal.
  • the reset transistor is turned on (ON)
  • the voltage of the IN node and OUT node is reset to V SS + V GS.DR.
  • VSS is a negative supply voltage and is mainly connected to ground
  • V GS.DR is a gate-source voltage of a charge amplifying transistor.
  • a dotted line is a signal that is output to VOUT when the select transistor is on, and in actual operation, a signal such as a solid line is output since the select transistor is off.
  • a signal such as a solid line is output since the select transistor is off.
  • both the signal voltage and the reset voltage by light are read.
  • the subtracted two signals become the final output. This process is called CDS (Correlated Double Sampling), and can remove pixel offset or flicker noise.
  • the sensitivity and dynamic range are determined by the capacitance (CPD) of the photodiode.
  • the sensitivity of the pixel is inversely proportional to the capacitance, and the dynamic range is proportional to the square root of the capacitance. Therefore, if the capacitance of the photodiode is large, the sensitivity is lowered, but the dynamic range is increased, and if the capacitance of the photodiode is reduced to increase the sensitivity of the pixel, the dynamic 2 range is reduced.
  • the dynamic range DR is generally defined as the ratio of the signal saturation level to the pixel noise level as follows.
  • V OUT is a graph showing an output voltage V OUT according to the amount of light of the CTIA pixel illustrated in FIG. 1.
  • V OUT reaches V DD -V TH.SEL (the threshold voltage of the select transistor) in the graph, it can be seen that the pixel does not operate linearly even if the amount of light increases thereafter .
  • the threshold voltage is further increased by the body effect. Therefore, the linear operating range becomes narrower and the signal saturation level is lowered, so the dynamic range is reduced.
  • the reset voltage of the photodiode is determined to be smaller by the threshold voltage of the reset transistor than the power supply voltage. Therefore, when the power supply voltage is 3.3V, the reverse voltage applied to the photodiode is about 2.3 to 2.7V.
  • the reset voltage of the photodiode is determined to be higher than the negative supply voltage by the gate-source voltage of the charge amplifier transistor. When the negative supply voltage is ground, the reverse voltage applied to the photodiode is approximately It is about 0.5 to 0.8V.
  • the characteristics of the photodiode are determined by the reverse voltage. In the case of CTIA pixels, the depletion region is narrower because the reverse voltage applied to the photodiode is lower than that of the 3-Tr structure, thereby reducing the quantum efficiency for incident light (especially long wavelength light). The problem arises.
  • the present invention is to solve the problem of low sensitivity and low dynamic range of the conventional CMOS image sensor, by eliminating the signal loss caused by the threshold voltage by changing the position and number of the select transistor, and increases the linear dynamic range to increase the dynamic range SUMMARY A CMOS image sensor device having a high sensitivity CTIA pixel structure having a range is provided.
  • an object of the present invention is to control the reset voltage of the photodiode by connecting a separate voltage separated from the substrate voltage to the source terminal of the charge amplifier transistor.
  • a CMOS image sensor device comprising: a sensor device comprising a two-dimensional array of unit pixels, the unit pixel comprising: a photodiode generating charge in response to input light; Charge-amplifying transistors and feedback capacitors that convert generated charges into voltages; A reset transistor for resetting the photodiode and the feedback capacitor; A reset control terminal for adjusting a reset voltage of the photodiode; And two select transistors for selecting unit pixels.
  • each column is connected to a current source through a column output line and a charge amplifier transistor is connected to the current source to form a common source amplifier structure.
  • a feedback capacitor is connected between the input and the output of the common source amplifier, and charge generated in the photodiode is accumulated in the feedback capacitor.
  • the current source uses one PMOS transistor or two or more PMOS transistors in cascode form.
  • the amount of charge supplied to the common source amplifier of the unit pixel is determined by the W / L ratio of the PMOS used as the current source, and the voltage applied to the gate terminal of the PMOS transistor is calculated by the equation.
  • V OUTSAT V DD -BIAS-V TH.PMOS
  • V TH.PMOS is the threshold voltage of the current source PMOS.
  • the reset control terminal is connected to the source terminal of the charge amplifying transistor and to a separate voltage separate from the substrate voltage.
  • one of the two select transistors is connected between one terminal of the feedback capacitor and the gate terminal of the charge amplifier transistor, and the other is the drain of the charge amplifier transistor and the other terminal of the feedback capacitor. Connected to the terminal.
  • two select transistors are connected to gates and operated simultaneously.
  • CMOS pixel having a wide dynamic range can be realized by maintaining a high sensitivity by removing the influence of the select transistor threshold voltage and increasing the signal saturation level through the structure of changing the position and number of the select transistor.
  • the reset voltage of the photodiode can be adjusted externally to realize a high-quantity CMOS pixel while maintaining high sensitivity, and by connecting the substrate voltage and the source terminal of the charge amplifier transistor to separate voltages, Substrate Coupling Noise generated can be eliminated.
  • FIG. 1 is a block diagram illustrating a structure of a conventional high sensitivity CMOS CTIA pixel according to an embodiment of the present invention.
  • FIG. 2 shows a signal for explaining the operation of a conventional high-sensitivity CMOS CTIA pixel in the practice of the present invention.
  • FIG. 3 is a graph showing an output voltage according to a light amount of a conventional high-sensitivity CMOS CTIA pixel according to an embodiment of the present invention.
  • FIG. 4 is a diagram illustrating a unit pixel structure of a high sensitivity CMOS image sensor according to an exemplary embodiment of the present invention.
  • FIG. 5 is a graph showing an output voltage according to the amount of light of a unit pixel of a high sensitivity CMOS image sensor according to an exemplary embodiment of the present invention.
  • FIG. 6 is a graph illustrating an output voltage according to an amount of light when the voltage V REF of the reset control terminal is changed in a unit pixel.
  • FIG. 7 is a diagram illustrating a structure of an image sensor using one PMOS transistor as a current source in an embodiment of the present invention.
  • FIG. 8 is a block diagram illustrating a structure of an image sensor in which two or more PMOS transistors are connected in cascode form as a current source to increase an open loop gain of a common source amplifier.
  • the present invention provides a pixel structure that can extend the dynamic range of a high-sensitivity CMOS image sensor, and controls the reset voltage of the photodiode by connecting a separate voltage separated from the substrate voltage to the source terminal of the charge amplifying transistor. And a high sensitivity CMOS image sensor device.
  • a CMOS image sensor device comprising: a sensor device composed of a two-dimensional array of unit pixels (410), the unit pixels (410) comprising: a photodiode (411) for generating charge in response to input light; A charge amplifying transistor 413 and a feedback capacitor 415 for converting the generated charge into a voltage; A reset transistor 412 for resetting the photodiode 411 and the feedback capacitor 415; A reset control terminal 416 for adjusting a reset voltage of the photodiode; And two select transistors 414 for selecting unit pixels.
  • a CMOS image sensor device comprising: a sensor device composed of a two-dimensional array of unit pixels (410), the unit pixels (410) comprising: a photodiode (411) for generating charge in response to input light; A charge amplifying transistor 413 and a feedback capacitor 415 for converting the generated charge into a voltage; A reset transistor 412 for resetting the photodiode 411 and the feedback capacitor 415; A reset control terminal 4
  • the photodiode 411 of FIG. 4 may be composed of various conventional pn junctions that can be implemented in a CMOS process, and is mainly implemented on an epitaxial wafer having a large resistivity to widen a depletion region.
  • a mask is used to prevent the formation of salicide to maximize the light receiving efficiency.
  • the feedback capacitor 415 may be configured with various conventional structures, such as a metalinsulator-metal (MiM), a poly-insulator-poly (PiP), a metal-oxide-semiconductor (MOS) capacitor, which can be implemented in a CMOS process.
  • a metalinsulator-metal MEMS
  • PiP poly-insulator-poly
  • MOS metal-oxide-semiconductor
  • each column of the pixel array is connected to the current source 430 through the column output line 420, and the charge amplifying transistor 413 of the unit pixel 410 is connected to the current source 430, thereby providing a common source amplifier. It may be formed in a common source amplifier structure.
  • the feedback capacitor 415 is connected between the input and the output of the common source amplifier, and the charge generated in the photodiode 411 may be accumulated in the feedback capacitor 415.
  • One of the two select transistors 414 for selecting a pixel 414-1 may be connected between one terminal of the feedback capacitor 415 and the gate terminal of the charge amplifier transistor 413, and the other 414-2 is selected. ) May be connected to the other terminal of the feedback capacitor 415 and the drain terminal of the charge amplifier transistor 413.
  • the reset control terminal 416 which is connected to the source terminal of the charge amplifying transistor 413 and controls the reset voltage of the photodiode 411, has a separate voltage VREF for controlling the reset voltage of the photodiode 411. ) Is connected, and the reset voltage of the photodiode 411 can be adjusted from the outside, thereby realizing a high-quantity CMOS pixel while maintaining high sensitivity.
  • substrate coupling noise generated inside the unit pixel may be eliminated by connecting the substrate voltage and the source terminal of the charge amplifying transistor 413, that is, the reset control terminal 416 to a separate voltage.
  • CMOS image sensor composed of the unit pixels of FIG. 4 is the same as that of the conventional CTIA pixel shown in FIG. 2.
  • an operation of a unit pixel according to the present invention may be divided into three parts, such as reset, integration, and signal output.
  • CTIA is formed when the select transistor 414 is turned on by the row select control signal.
  • the reset transistor 412 is turned on, the IN node and the OUT node are connected to each other.
  • the voltage is reset to VSS + VGS.DR.
  • VSS is a negative power supply voltage and is mainly connected to ground
  • VGS.DR is a gate-source voltage of the charge amplifier transistor 413.
  • a dotted line is a signal that is output to V OUT when the select transistor 414 is in an ON state. Is output. After a predetermined charge accumulation time, both the signal voltage and the reset voltage by light are read, and the final output is obtained by subtracting these two signals. This process is called CDS (Correlated Double Sampling), and can remove pixel offset or flicker noise. However, depending on the application field of the image sensor, it is possible to read only the signal voltage without CDS.
  • V OUTSAT is a value determined by the operating characteristics of the current source, which is the maximum voltage that allows the current source implemented by the transistor to operate in the saturation region to supply a constant current.
  • FIG. 6 is a graph showing an output voltage according to an amount of light when the voltage V REF of the reset control terminal 416 is changed in the unit pixel 410 proposed by the present invention.
  • V REF the applied voltage
  • the slope determined by the value of the feedback capacitor 415 is maintained but the y-intercept is changed.
  • Increasing V REF reduces the linear operating area of the pixel, while widening the depletion area because the reverse voltage of the photodiode 411 increases.
  • decreasing the V REF increases the linear operating region, while decreasing the reverse voltage of the photodiode 411, thereby narrowing the depletion region. This trade-off allows one image sensor to be used in many applications with different performance requirements.
  • the portion shown as the current source of FIG. 4 may use one PMOS transistor or connect two or more PMOS transistors in a cascode form.
  • FIGS. 7 and 8 can be seen.
  • FIG. 7 is a block diagram illustrating a structure of an image sensor using one PMOS transistor 730 as a current source according to an embodiment of the present invention.
  • the W / L (Width / Length) ratio of the PMOS transistor 730 determines the amount of current supplied to the common source amplifier of each unit pixel, and the gate-source voltage of the charge amplifying transistor 413 also corresponds to this value. May be affected.
  • V OUTSAT value of FIG. 5 may be determined by Equation 2 according to the voltage BIAS applied to the gate of the PMOS transistor.
  • V OUTSAT V DD -BIAS-V TH.PMOS
  • V TH.PMOS means the threshold voltage of the PMOS as the current source.
  • the L-value of the PMOS transistor determines the drain-source resistance, that is, the output resistance. The larger the value, the larger the open-loop gain of the common source amplifier is, resulting in a linear and low noise response to light.
  • CMOS image sensor capable of increasing the open loop gain of a common source amplifier by using two or more PMOS transistors in cascode form as a current source is shown in FIG. 7.
  • the open-loop gain of the common source amplifier can be greatly increased because the output resistance of the current source is greatly increased than when only one PMOS transistor is used.
  • a highly linear and low noise pixel can be realized.
  • the high-sensitivity image sensor according to the present invention may express a target object clearly even in a dark environment, and may be composed of pixels having a wide dynamic range to eliminate the spread of bright light.
  • the present invention provides a pixel structure that can widen the dynamic range of a high sensitivity CMOS image sensor.
  • a CMOS image sensor device comprising: a sensor device composed of a two-dimensional array of unit pixels (410), the unit pixel (410) comprising: a photodiode (411) for generating charge in response to input light; A charge amplifying transistor 413 and a feedback capacitor 415 for converting the generated charge into a voltage; A reset transistor 412 for resetting the photodiode 411 and the feedback capacitor 415; And two select transistors 414 for selecting unit pixels.
  • the photodiode 411 of FIG. 9 may be composed of various conventional pn junctions that can be implemented in a CMOS process, and is mainly implemented on an epitaxial wafer having a large resistivity to widen a depletion region.
  • a mask is used to prevent the formation of salicide to maximize the light receiving efficiency.
  • the feedback capacitor 415 may be configured with various conventional structures, such as metal-insulator-metal (MiM), poly-insulator-poly (PIP), and metal-oxide-semiconductor (MOS) capacitor, which can be implemented in a CMOS process.
  • MiM metal-insulator-metal
  • PIP poly-insulator-poly
  • MOS metal-oxide-semiconductor
  • each column of the pixel array is connected to the current source 430 through the column output line 420, and the charge amplifying transistor 413 of the unit pixel 410 is connected to the current source 430, thereby providing a common source amplifier. It may be formed in a common source amplifier structure.
  • the feedback capacitor 415 is connected between the input and the output of the common source amplifier, and the charge generated in the photodiode 411 may be accumulated in the feedback capacitor 415.
  • one 414-1 is connected between one terminal of the feedback capacitor 415 and the gate terminal of the charge amplifier transistor 413, and the other 414.
  • -2) is connected to the other terminal of the feedback capacitor 415 and the drain terminal of the charge amplifier transistor 413.
  • CMOS image sensor composed of the unit pixels of FIG. 9 is the same as that of the conventional CTIA pixel shown in FIG. 2.
  • an operation of a unit pixel according to the present invention may be divided into three parts, such as reset, integration, and signal output.
  • CTIA is formed when the select transistor 414 is turned on by a row select control signal.
  • the reset transistor 412 When the reset transistor 412 is turned on, the IN node and the OUT node are connected to each other. The voltage is reset to VSS + VGS.DR.
  • VSS is a negative power supply voltage and is mainly connected to ground
  • VGS.DR is a gate-source voltage of the charge amplifier transistor 413.
  • the reset transistor 412 is turned off after the photo diode 411 and the feedback capacitor 415 are reset, charges due to light incident on the pixel start to accumulate in the feedback capacitor 415. Due to this charge accumulation, the voltage at the OUT node increases linearly, and as the amount of light increases, the slope increases.
  • a dotted line is a signal output to VOUT when the select transistor 414 is in an ON state.
  • a signal such as a solid line is output.
  • both the signal voltage and the reset voltage by light are read, and the final output is obtained by subtracting these two signals.
  • This process is called CDS (Correlated Double Sampling), and can remove pixel offset or flicker noise.
  • CDS Correlated Double Sampling
  • VOUT_SAT is a value determined by the operating characteristics of the current source, which is the maximum voltage that allows the current source implemented by the transistor to operate in the saturation region to supply a constant current.
  • the portion shown as the current source of FIG. 9 may use one PMOS transistor or connect two or more PMOS transistors in a cascode form. As an example of this, look at Figures 11 and 12.
  • FIG. 11 is a block diagram illustrating a structure of an image sensor using one PMOS transistor 630 as a current source according to an embodiment of the present invention.
  • the W / L (Width / Length) ratio of the PMOS transistor determines the amount of current supplied to the common source amplifier of each unit pixel, and the gate-source voltage of the charge amplifying transistor may also be affected by this value.
  • the drain-source resistance that is, the output resistance is determined according to the L value of the PMOS transistor. The larger the determined value, the larger the open loop gain of the common source amplifier is, so that the response to light is linear and the noise is low.
  • CMOS image sensor capable of increasing the open loop gain of a common source amplifier by using two or more PMOS transistors in cascode form as a current source is shown in FIG. 7.
  • the open-loop gain of the common source amplifier can be greatly increased because the output resistance of the current source is greatly increased than when only one PMOS transistor is used.
  • a highly linear and low noise pixel can be realized.
  • the high-sensitivity image sensor according to the present invention may express a target object clearly even in a dark environment, and may be composed of pixels having a wide dynamic range to eliminate the spread of bright light.

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Abstract

La présente invention porte sur un capteur d'image CMOS possédant une haute sensibilité et une large gamme dynamique et comprenant des pixels pouvant commander une tension de réinitialisation de photodiode, et qui comprend: une photodiode pour générer une charge; un transistor amplificateur de charge et un condensateur de rétroaction pour convertir la charge générée en une tension; un transistor de réinitialisation pour réinitialiser la photodiode et le condensateur de rétroaction; une borne de commande de réinitialisation pour commander la tension de réinitialisation de photodiode; et deux transistors de sélection pour sélectionner des pixels unitaires.
PCT/KR2013/004606 2013-05-27 2013-05-27 Dispositif capteur d'image cmos à haute sensibilité WO2014192989A1 (fr)

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EP3667727A1 (fr) * 2018-12-12 2020-06-17 Artilux Inc. Appareil de photo-détection comportant un mécanisme de réinitialisation multiple
US11579267B2 (en) 2015-11-06 2023-02-14 Artilux, Inc. High-speed light sensing apparatus
US11630212B2 (en) 2018-02-23 2023-04-18 Artilux, Inc. Light-sensing apparatus and light-sensing method thereof
US11637142B2 (en) 2015-11-06 2023-04-25 Artilux, Inc. High-speed light sensing apparatus III
US11639991B2 (en) 2019-06-19 2023-05-02 Artilux, Inc. Photo-detecting apparatus with current-reuse
US11756969B2 (en) 2015-08-04 2023-09-12 Artilux, Inc. Germanium-silicon light sensing apparatus

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11756969B2 (en) 2015-08-04 2023-09-12 Artilux, Inc. Germanium-silicon light sensing apparatus
US11579267B2 (en) 2015-11-06 2023-02-14 Artilux, Inc. High-speed light sensing apparatus
US11637142B2 (en) 2015-11-06 2023-04-25 Artilux, Inc. High-speed light sensing apparatus III
US11747450B2 (en) 2015-11-06 2023-09-05 Artilux, Inc. High-speed light sensing apparatus
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EP3667727A1 (fr) * 2018-12-12 2020-06-17 Artilux Inc. Appareil de photo-détection comportant un mécanisme de réinitialisation multiple
US11448830B2 (en) 2018-12-12 2022-09-20 Artilux, Inc. Photo-detecting apparatus with multi-reset mechanism
US11639991B2 (en) 2019-06-19 2023-05-02 Artilux, Inc. Photo-detecting apparatus with current-reuse

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